sim/mips/ChangeLog

   1 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * configure: Regenerated to track ../common/aclocal.m4 changes.
   4
   5 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   6
   7         * mips.igen: Include tx.igen.
   8         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
   9         * tx.igen: New file, contains MADD and MADDU.
  10
  11         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
  12         the hardwired constant `7'.
  13         (store_memory): Ditto.
  14         (LOADDRMASK): Move definition to sim-main.h.
  15
  16         mips.igen (MTC0): Enable for r3900.
  17         (ADDU): Add trace.
  18
  19         mips.igen (do_load_byte): Delete.
  20         (do_load, do_store, do_load_left, do_load_write, do_store_left,
  21         do_store_right): New functions.
  22         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
  23
  24         configure.in: Let the tx39 use igen again.
  25         configure: Update.
  26
  27 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  28
  29         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
  30         not an address sized quantity.  Return zero for cache sizes.
  31
  32 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  33
  34         * mips.igen (r3900): r3900 does not support 64 bit integer
  35         operations.
  36
  37 start-sanitize-sky
  38 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
  39
  40         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
  41
  42 end-sanitize-sky
  43 start-sanitize-sky
  44 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
  45
  46         * interp.c (decode_coproc): Continuing COP2 work.
  47         (cop_[ls]q): Make sky-target-only.
  48
  49         * sim-main.h (COP_[LS]Q): Make sky-target-only.
  50 end-sanitize-sky
  51
  52 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
  53
  54         * configure.in (mipstx39*-*-*): Use gencode simulator rather
  55         than igen one.
  56         * configure : Rebuild.
  57
  58 start-sanitize-sky
  59 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
  60
  61         * interp.c (decode_coproc): Added a missing TARGET_SKY check
  62         around COP2 implementation skeleton.
  63
  64 end-sanitize-sky
  65
  66 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
  67
  68 start-sanitize-sky
  69         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
  70
  71         * interp.c (sim_{load,store}_register): Use new vu[01]_device
  72         static to access VU registers.
  73         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
  74         decoding.  Work in progress.
  75
  76         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
  77         overlapping/redundant bit pattern.
  78         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
  79         progress.
  80
  81         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
  82         status register.
  83
  84         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
  85         access to coprocessor registers.
  86
  87         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
  88 end-sanitize-sky
  89
  90 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  91
  92         * configure: Regenerated to track ../common/aclocal.m4 changes.
  93
  94 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  95
  96         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
  97
  98 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
  99
 100         * configure: Regenerated to track ../common/aclocal.m4 changes.
 101         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 102
 103 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 104
 105         * configure: Regenerated to track ../common/aclocal.m4 changes.
 106
 107 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 108
 109         * interp.c (Max, Min): Comment out functions. Not yet used.
 110
 111 start-sanitize-vr4320
 112 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 113
 114         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 115
 116 end-sanitize-vr4320
 117 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 118
 119         * configure: Regenerated to track ../common/aclocal.m4 changes.
 120
 121 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 122
 123         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 124         configurable settings for stand-alone simulator.
 125
 126 start-sanitize-sky
 127         * configure.in: Added --with-sim-gpu2 option to specify path of
 128         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 129         links/compiles stand-alone simulator with this library.
 130
 131         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 132 end-sanitize-sky
 133
 134         * configure.in: Added X11 search, just in case.
 135
 136         * configure: Regenerated.
 137
 138 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 139
 140         * interp.c (sim_write, sim_read, load_memory, store_memory):
 141         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 142
 143 start-sanitize-vr4320
 144 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 145
 146         * vr4320.igen (clz,dclz) : Added.
 147         (dmac): Replaced 99, with LO.
 148
 149 end-sanitize-vr4320
 150 start-sanitize-vr5400
 151 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 152
 153         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 154
 155 end-sanitize-vr5400
 156 start-sanitize-vr4320
 157 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 158
 159         * vr4320.igen: New file.
 160         * Makefile.in (vr4320.igen) : Added.
 161         * configure.in (mips64vr4320-*-*): Added.
 162         * configure : Rebuilt.
 163         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 164         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 165
 166 end-sanitize-vr4320
 167 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 168
 169         * sim-main.h (GETFCC): Return an unsigned value.
 170
 171 start-sanitize-r5900
 172         * r5900.igen: Use an unsigned array index variable `i'.
 173         (QFSRV): Ditto for variable bytes.
 174
 175 end-sanitize-r5900
 176 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 177
 178         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 179         (DADD): Result destination is RD not RT.
 180
 181 start-sanitize-r5900
 182         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 183         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 184         divide.
 185
 186 end-sanitize-r5900
 187 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 188
 189         * sim-main.h (HIACCESS, LOACCESS): Always define.
 190
 191         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 192
 193         * interp.c (sim_info): Delete.
 194
 195 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 196
 197         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 198         (mips_option_handler): New argument `cpu'.
 199         (sim_open): Update call to sim_add_option_table.
 200
 201 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 202
 203         * mips.igen (CxC1): Add tracing.
 204
 205 start-sanitize-r5900
 206 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 207
 208         * r5900.igen (StoreFP): Delete.
 209         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 210         New functions.
 211         (rsqrt.s, sqrt.s): Implement.
 212         (r59cond): New function.
 213         (C.COND.S): Call r59cond in assembler line.
 214         (cvt.w.s, cvt.s.w): Implement.
 215
 216         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 217         instruction set.
 218
 219         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 220
 221 end-sanitize-r5900
 222 start-sanitize-r5900
 223 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 224
 225         * r5900.igen: Add tracing to all p* instructions.
 226
 227 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 228
 229         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 230         to get gdb talking to re-aranged sim_cpu register structure.
 231
 232 end-sanitize-r5900
 233 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 234
 235         * sim-main.h (Max, Min): Declare.
 236
 237         * interp.c (Max, Min): New functions.
 238
 239         * mips.igen (BC1): Add tracing.
 240
 241 start-sanitize-vr5400
 242 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * mdmx.igen: Tag all functions as requiring either with mdmx or
 245         vr5400 processor.
 246
 247 end-sanitize-vr5400
 248 start-sanitize-r5900
 249 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 250
 251         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 252         to 32.
 253         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 254
 255         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 256
 257         * r5900.igen: Rewrite.
 258
 259         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 260         struct.
 261         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 262         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 263
 264 end-sanitize-r5900
 265 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 266
 267         * interp.c Added memory map for stack in vr4100
 268
 269 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 270
 271         * interp.c (load_memory): Add missing "break"'s.
 272
 273 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 274
 275         * interp.c (sim_store_register, sim_fetch_register): Pass in
 276         length parameter.  Return -1.
 277
 278 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 279
 280         * interp.c: Added hardware init hook, fixed warnings.
 281
 282 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 283
 284         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 285
 286 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 287
 288         * interp.c (ifetch16): New function.
 289
 290         * sim-main.h (IMEM32): Rename IMEM.
 291         (IMEM16_IMMED): Define.
 292         (IMEM16): Define.
 293         (DELAY_SLOT): Update.
 294
 295         * m16run.c (sim_engine_run): New file.
 296
 297         * m16.igen: All instructions except LB.
 298         (LB): Call do_load_byte.
 299         * mips.igen (do_load_byte): New function.
 300         (LB): Call do_load_byte.
 301
 302         * mips.igen: Move spec for insn bit size and high bit from here.
 303         * Makefile.in (tmp-igen, tmp-m16): To here.
 304
 305         * m16.dc: New file, decode mips16 instructions.
 306
 307         * Makefile.in (SIM_NO_ALL): Define.
 308         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 309
 310 start-sanitize-tx19
 311         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 312         set.
 313
 314 end-sanitize-tx19
 315 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 316
 317         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 318         point unit to 32 bit registers.
 319         * configure: Re-generate.
 320
 321 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 322
 323         * configure.in (sim_use_gen): Make IGEN the default simulator
 324         generator for generic 32 and 64 bit mips targets.
 325         * configure: Re-generate.
 326
 327 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 328
 329         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 330         bitsize.
 331
 332         * interp.c (sim_fetch_register, sim_store_register): Read/write
 333         FGR from correct location.
 334         (sim_open): Set size of FGR's according to
 335         WITH_TARGET_FLOATING_POINT_BITSIZE.
 336
 337         * sim-main.h (FGR): Store floating point registers in a separate
 338         array.
 339
 340 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 341
 342         * configure: Regenerated to track ../common/aclocal.m4 changes.
 343
 344 start-sanitize-vr5400
 345         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 346
 347 end-sanitize-vr5400
 348 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 349
 350         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 351
 352         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 353
 354         * interp.c (pending_tick): New function.  Deliver pending writes.
 355
 356         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 357         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 358         it can handle mixed sized quantites and single bits.
 359
 360 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 361
 362         * interp.c (oengine.h): Do not include when building with IGEN.
 363         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 364         (sim_info): Ditto for PROCESSOR_64BIT.
 365         (sim_monitor): Replace ut_reg with unsigned_word.
 366         (*): Ditto for t_reg.
 367         (LOADDRMASK): Define.
 368         (sim_open): Remove defunct check that host FP is IEEE compliant,
 369         using software to emulate floating point.
 370         (value_fpr, ...): Always compile, was conditional on HASFPU.
 371
 372 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 373
 374         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 375         size.
 376
 377         * interp.c (SD, CPU): Define.
 378         (mips_option_handler): Set flags in each CPU.
 379         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 380         (sim_close): Do not clear STATE, deleted anyway.
 381         (sim_write, sim_read): Assume CPU zero's vm should be used for
 382         data transfers.
 383         (sim_create_inferior): Set the PC for all processors.
 384         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 385         argument.
 386         (mips16_entry): Pass correct nr of args to store_word, load_word.
 387         (ColdReset): Cold reset all cpu's.
 388         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 389         (sim_monitor, load_memory, store_memory, signal_exception): Use
 390         `CPU' instead of STATE_CPU.
 391
 392
 393         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 394         SD or CPU_.
 395
 396         * sim-main.h (signal_exception): Add sim_cpu arg.
 397         (SignalException*): Pass both SD and CPU to signal_exception.
 398         * interp.c (signal_exception): Update.
 399
 400         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 401         Ditto
 402         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 403         address_translation): Ditto
 404         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 405
 406 start-sanitize-vr5400
 407         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 408         `sd'.
 409         (ByteAlign): Use StoreFPR, pass args in correct order.
 410
 411 end-sanitize-vr5400
 412 start-sanitize-r5900
 413 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 414
 415         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 416
 417 end-sanitize-r5900
 418 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 419
 420         * configure: Regenerated to track ../common/aclocal.m4 changes.
 421
 422 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 423
 424 start-sanitize-r5900
 425         * configure.in (sim_igen_filter): For r5900, use igen.
 426         * configure: Re-generate.
 427
 428 end-sanitize-r5900
 429         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 430
 431         * mips.igen (model): Map processor names onto BFD name.
 432
 433         * sim-main.h (CPU_CIA): Delete.
 434         (SET_CIA, GET_CIA): Define
 435
 436 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 437
 438         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 439         regiser.
 440
 441         * configure.in (default_endian): Configure a big-endian simulator
 442         by default.
 443         * configure: Re-generate.
 444
 445 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 446
 447         * configure: Regenerated to track ../common/aclocal.m4 changes.
 448
 449 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 450
 451         * interp.c (sim_monitor): Handle Densan monitor outbyte
 452         and inbyte functions.
 453
 454 1997-12-29  Felix Lee  <flee@cygnus.com>
 455
 456         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 457
 458 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 459
 460         * Makefile.in (tmp-igen): Arrange for $zero to always be
 461         reset to zero after every instruction.
 462
 463 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 464
 465         * configure: Regenerated to track ../common/aclocal.m4 changes.
 466         * config.in: Ditto.
 467
 468 start-sanitize-vr5400
 469 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 470
 471         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 472         bit values.
 473
 474 end-sanitize-vr5400
 475 start-sanitize-vr5400
 476 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 477
 478         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 479         vr5400 with the vr5000 as the default.
 480
 481 end-sanitize-vr5400
 482 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 483
 484         * mips.igen (MSUB): Fix to work like MADD.
 485         * gencode.c (MSUB): Similarly.
 486
 487 start-sanitize-vr5400
 488 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 489
 490         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 491         vr5400.
 492
 493 end-sanitize-vr5400
 494 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 495
 496         * configure: Regenerated to track ../common/aclocal.m4 changes.
 497
 498 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 499
 500         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 501
 502 start-sanitize-vr5400
 503         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 504         (value_cc, store_cc): Implement.
 505
 506         * sim-main.h: Add 8*3*8 bit accumulator.
 507
 508         * vr5400.igen: Move mdmx instructins from here
 509         * mdmx.igen: To here - new file. Add/fix missing instructions.
 510         * mips.igen: Include mdmx.igen.
 511         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 512
 513 end-sanitize-vr5400
 514 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 515
 516         * sim-main.h (sim-fpu.h): Include.
 517
 518         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 519         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 520         using host independant sim_fpu module.
 521
 522 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 523
 524         * interp.c (signal_exception): Report internal errors with SIGABRT
 525         not SIGQUIT.
 526
 527         * sim-main.h (C0_CONFIG): New register.
 528         (signal.h): No longer include.
 529
 530         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 531
 532 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 533
 534         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 535
 536 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 537
 538         * mips.igen: Tag vr5000 instructions.
 539         (ANDI): Was missing mipsIV model, fix assembler syntax.
 540         (do_c_cond_fmt): New function.
 541         (C.cond.fmt): Handle mips I-III which do not support CC field
 542         separatly.
 543         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 544         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 545         in IV3.2 spec.
 546         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 547         vr5000 which saves LO in a GPR separatly.
 548
 549         * configure.in (enable-sim-igen): For vr5000, select vr5000
 550         specific instructions.
 551         * configure: Re-generate.
 552
 553 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 554
 555         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 556
 557         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 558         fmt_uninterpreted_64 bit cases to switch.  Convert to
 559         fmt_formatted,
 560
 561         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 562
 563         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 564         as specified in IV3.2 spec.
 565         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 566
 567 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 568
 569         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 570         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 571         (start-sanitize-r5900):
 572         (LWXC1, SWXC1): Delete from r5900 instruction set.
 573         (end-sanitize-r5900):
 574         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 575         PENDING_FILL versions of instructions.  Simplify.
 576         (X): New function.
 577         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 578         instructions.
 579         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 580         a signed value.
 581         (MTHI, MFHI): Disable code checking HI-LO.
 582
 583         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 584         global.
 585         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 586
 587 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 588
 589         * gencode.c (build_mips16_operands): Replace IPC with cia.
 590
 591         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 592         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 593         IPC to `cia'.
 594         (UndefinedResult): Replace function with macro/function
 595         combination.
 596         (sim_engine_run): Don't save PC in IPC.
 597
 598         * sim-main.h (IPC): Delete.
 599
 600         start-sanitize-vr5400
 601         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 602         (do_select): Rename function select.
 603         end-sanitize-vr5400
 604
 605         * interp.c (signal_exception, store_word, load_word,
 606         address_translation, load_memory, store_memory, cache_op,
 607         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 608         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 609         current instruction address - cia - argument.
 610         (sim_read, sim_write): Call address_translation directly.
 611         (sim_engine_run): Rename variable vaddr to cia.
 612         (signal_exception): Pass cia to sim_monitor
 613
 614         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 615         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 616         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 617
 618         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 619         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 620         SIM_ASSERT.
 621
 622         * interp.c (signal_exception): Pass restart address to
 623         sim_engine_restart.
 624
 625         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 626         idecode.o): Add dependency.
 627
 628         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 629         Delete definitions
 630         (DELAY_SLOT): Update NIA not PC with branch address.
 631         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 632
 633         * mips.igen: Use CIA not PC in branch calculations.
 634         (illegal): Call SignalException.
 635         (BEQ, ADDIU): Fix assembler.
 636
 637 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 638
 639         * m16.igen (JALX): Was missing.
 640
 641         * configure.in (enable-sim-igen): New configuration option.
 642         * configure: Re-generate.
 643
 644         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 645
 646         * interp.c (load_memory, store_memory): Delete parameter RAW.
 647         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 648         bypassing {load,store}_memory.
 649
 650         * sim-main.h (ByteSwapMem): Delete definition.
 651
 652         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 653
 654         * interp.c (sim_do_command, sim_commands): Delete mips specific
 655         commands.  Handled by module sim-options.
 656
 657         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 658         (WITH_MODULO_MEMORY): Define.
 659
 660         * interp.c (sim_info): Delete code printing memory size.
 661
 662         * interp.c (mips_size): Nee sim_size, delete function.
 663         (power2): Delete.
 664         (monitor, monitor_base, monitor_size): Delete global variables.
 665         (sim_open, sim_close): Delete code creating monitor and other
 666         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 667         manage memory regions.
 668         (load_memory, store_memory): Use sim-core for memory model.
 669
 670         * interp.c (address_translation): Delete all memory map code
 671         except line forcing 32 bit addresses.
 672
 673 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 674
 675         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 676         trace options.
 677
 678         * interp.c (logfh, logfile): Delete globals.
 679         (sim_open, sim_close): Delete code opening & closing log file.
 680         (mips_option_handler): Delete -l and -n options.
 681         (OPTION mips_options): Ditto.
 682
 683         * interp.c (OPTION mips_options): Rename option trace to dinero.
 684         (mips_option_handler): Update.
 685
 686 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 687
 688         * interp.c (fetch_str): New function.
 689         (sim_monitor): Rewrite using sim_read & sim_write.
 690         (sim_open): Check magic number.
 691         (sim_open): Write monitor vectors into memory using sim_write.
 692         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 693         (sim_read, sim_write): Simplify - transfer data one byte at a
 694         time.
 695         (load_memory, store_memory): Clarify meaning of parameter RAW.
 696
 697         * sim-main.h (isHOST): Defete definition.
 698         (isTARGET): Mark as depreciated.
 699         (address_translation): Delete parameter HOST.
 700
 701         * interp.c (address_translation): Delete parameter HOST.
 702
 703 start-sanitize-tx49
 704 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 705
 706         * gencode.c: Add tx49 configury and insns.
 707         * configure.in: Add tx49 configury.
 708         * configure: Update.
 709
 710 end-sanitize-tx49
 711 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 712
 713         * mips.igen:
 714
 715         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 716         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 717
 718 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 719
 720         * mips.igen: Add model filter field to records.
 721
 722 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 723
 724         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 725
 726         interp.c (sim_engine_run): Do not compile function sim_engine_run
 727         when WITH_IGEN == 1.
 728
 729         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 730         target architecture.
 731
 732         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 733         igen. Replace with configuration variables sim_igen_flags /
 734         sim_m16_flags.
 735
 736         start-sanitize-r5900
 737         * r5900.igen: New file. Copy r5900 insns here.
 738         end-sanitize-r5900
 739         start-sanitize-vr5400
 740         * vr5400.igen: New file.
 741         end-sanitize-vr5400
 742         * m16.igen: New file.  Copy mips16 insns here.
 743         * mips.igen: From here.
 744
 745 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 746
 747         start-sanitize-vr5400
 748         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 749
 750         * configure.in: Add mips64vr5400 target.
 751         * configure: Re-generate.
 752
 753         end-sanitize-vr5400
 754         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 755         to top.
 756         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 757
 758 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 759
 760         * gencode.c (build_instruction): Follow sim_write's lead in using
 761         BigEndianMem instead of !ByteSwapMem.
 762
 763 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 764
 765         * configure.in (sim_gen): Dependent on target, select type of
 766         generator.  Always select old style generator.
 767
 768         configure: Re-generate.
 769
 770         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 771         targets.
 772         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 773         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 774         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 775         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 776         SIM_@sim_gen@_*, set by autoconf.
 777
 778 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 779
 780         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 781
 782         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 783         CURRENT_FLOATING_POINT instead.
 784
 785         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 786         (address_translation): Raise exception InstructionFetch when
 787         translation fails and isINSTRUCTION.
 788
 789         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 790         sim_engine_run): Change type of of vaddr and paddr to
 791         address_word.
 792         (address_translation, prefetch, load_memory, store_memory,
 793         cache_op): Change type of vAddr and pAddr to address_word.
 794
 795         * gencode.c (build_instruction): Change type of vaddr and paddr to
 796         address_word.
 797
 798 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 799
 800         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 801         macro to obtain result of ALU op.
 802
 803 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 804
 805         * interp.c (sim_info): Call profile_print.
 806
 807 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 808
 809         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 810
 811         * sim-main.h (WITH_PROFILE): Do not define, defined in
 812         common/sim-config.h.  Use sim-profile module.
 813         (simPROFILE): Delete defintion.
 814
 815         * interp.c (PROFILE): Delete definition.
 816         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 817         (sim_close): Delete code writing profile histogram.
 818         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 819         Delete.
 820         (sim_engine_run): Delete code profiling the PC.
 821
 822 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 823
 824         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 825
 826         * interp.c (sim_monitor): Make register pointers of type
 827         unsigned_word*.
 828
 829         * sim-main.h: Make registers of type unsigned_word not
 830         signed_word.
 831
 832 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 833
 834 start-sanitize-r5900
 835         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 836         ...): Move to sim-main.h
 837
 838 end-sanitize-r5900
 839         * interp.c (sync_operation): Rename from SyncOperation, make
 840         global, add SD argument.
 841         (prefetch): Rename from Prefetch, make global, add SD argument.
 842         (decode_coproc): Make global.
 843
 844         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 845
 846         * gencode.c (build_instruction): Generate DecodeCoproc not
 847         decode_coproc calls.
 848
 849         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 850         (SizeFGR): Move to sim-main.h
 851         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 852         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 853         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 854         sim-main.h.
 855         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 856         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 857         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 858         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 859         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 860         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 861
 862         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 863         exception.
 864         (sim-alu.h): Include.
 865         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 866         (sim_cia): Typedef to instruction_address.
 867
 868 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 869
 870         * Makefile.in (interp.o): Rename generated file engine.c to
 871         oengine.c.
 872
 873         * interp.c: Update.
 874
 875 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 876
 877         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 878
 879 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         * gencode.c (build_instruction): For "FPSQRT", output correct
 882         number of arguments to Recip.
 883
 884 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 885
 886         * Makefile.in (interp.o): Depends on sim-main.h
 887
 888         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 889
 890         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 891         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 892         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 893         STATE, DSSTATE): Define
 894         (GPR, FGRIDX, ..): Define.
 895
 896         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 897         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 898         (GPR, FGRIDX, ...): Delete macros.
 899
 900         * interp.c: Update names to match defines from sim-main.h
 901
 902 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 903
 904         * interp.c (sim_monitor): Add SD argument.
 905         (sim_warning): Delete.  Replace calls with calls to
 906         sim_io_eprintf.
 907         (sim_error): Delete. Replace calls with sim_io_error.
 908         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 909         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 910         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 911         argument.
 912         (mips_size): Rename from sim_size. Add SD argument.
 913
 914         * interp.c (simulator): Delete global variable.
 915         (callback): Delete global variable.
 916         (mips_option_handler, sim_open, sim_write, sim_read,
 917         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 918         sim_size,sim_monitor): Use sim_io_* not callback->*.
 919         (sim_open): ZALLOC simulator struct.
 920         (PROFILE): Do not define.
 921
 922 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 923
 924         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 925         support.h with corresponding code.
 926
 927         * sim-main.h (word64, uword64), support.h: Move definition to
 928         sim-main.h.
 929         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 930
 931         * support.h: Delete
 932         * Makefile.in: Update dependencies
 933         * interp.c: Do not include.
 934
 935 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 936
 937         * interp.c (address_translation, load_memory, store_memory,
 938         cache_op): Rename to from AddressTranslation et.al., make global,
 939         add SD argument
 940
 941         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 942         CacheOp): Define.
 943
 944         * interp.c (SignalException): Rename to signal_exception, make
 945         global.
 946
 947         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 948
 949         * sim-main.h (SignalException, SignalExceptionInterrupt,
 950         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 951         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 952         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 953         Define.
 954
 955         * interp.c, support.h: Use.
 956
 957 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 958
 959         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 960         to value_fpr / store_fpr. Add SD argument.
 961         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 962         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 963
 964         * sim-main.h (ValueFPR, StoreFPR): Define.
 965
 966 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968         * interp.c (sim_engine_run): Check consistency between configure
 969         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 970         and HASFPU.
 971
 972         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 973         (mips_fpu): Configure WITH_FLOATING_POINT.
 974         (mips_endian): Configure WITH_TARGET_ENDIAN.
 975         * configure: Update.
 976
 977 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 978
 979         * configure: Regenerated to track ../common/aclocal.m4 changes.
 980
 981 start-sanitize-r5900
 982 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 983
 984         * interp.c (MAX_REG): Allow up-to 128 registers.
 985         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 986         (REGISTER_SA): Ditto.
 987         (sim_open): Initialize register_widths for r5900 specific
 988         registers.
 989         (sim_fetch_register, sim_store_register): Check for request of
 990         r5900 specific SA register.  Check for request for hi 64 bits of
 991         r5900 specific registers.
 992
 993 end-sanitize-r5900
 994 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 995
 996         * configure: Regenerated.
 997
 998 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 999
1000         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1001
1002 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1003
1004         * gencode.c (print_igen_insn_models): Assume certain architectures
1005         include all mips* instructions.
1006         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1007         instruction.
1008
1009         * Makefile.in (tmp.igen): Add target. Generate igen input from
1010         gencode file.
1011
1012         * gencode.c (FEATURE_IGEN): Define.
1013         (main): Add --igen option.  Generate output in igen format.
1014         (process_instructions): Format output according to igen option.
1015         (print_igen_insn_format): New function.
1016         (print_igen_insn_models): New function.
1017         (process_instructions): Only issue warnings and ignore
1018         instructions when no FEATURE_IGEN.
1019
1020 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1021
1022         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1023         MIPS targets.
1024
1025 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1026
1027         * configure: Regenerated to track ../common/aclocal.m4 changes.
1028
1029 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1030
1031         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1032         SIM_RESERVED_BITS): Delete, moved to common.
1033         (SIM_EXTRA_CFLAGS): Update.
1034
1035 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1036
1037         * configure.in: Configure non-strict memory alignment.
1038         * configure: Regenerated to track ../common/aclocal.m4 changes.
1039
1040 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1041
1042         * configure: Regenerated to track ../common/aclocal.m4 changes.
1043
1044 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1045
1046         * gencode.c (SDBBP,DERET): Added (3900) insns.
1047         (RFE): Turn on for 3900.
1048         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1049         (dsstate): Made global.
1050         (SUBTARGET_R3900): Added.
1051         (CANCELDELAYSLOT): New.
1052         (SignalException): Ignore SystemCall rather than ignore and
1053         terminate.  Add DebugBreakPoint handling.
1054         (decode_coproc): New insns RFE, DERET; and new registers Debug
1055         and DEPC protected by SUBTARGET_R3900.
1056         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1057         bits explicitly.
1058         * Makefile.in,configure.in: Add mips subtarget option.
1059         * configure: Update.
1060
1061 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1062
1063         * gencode.c: Add r3900 (tx39).
1064
1065 start-sanitize-tx19
1066         * gencode.c: Fix some configuration problems by improving
1067         the relationship between tx19 and tx39.
1068 end-sanitize-tx19
1069
1070 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1071
1072         * gencode.c (build_instruction): Don't need to subtract 4 for
1073         JALR, just 2.
1074
1075 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1076
1077         * interp.c: Correct some HASFPU problems.
1078
1079 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1080
1081         * configure: Regenerated to track ../common/aclocal.m4 changes.
1082
1083 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1084
1085         * interp.c (mips_options): Fix samples option short form, should
1086         be `x'.
1087
1088 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1089
1090         * interp.c (sim_info): Enable info code.  Was just returning.
1091
1092 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1093
1094         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1095         MFC0.
1096
1097 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1098
1099         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1100         constants.
1101         (build_instruction): Ditto for LL.
1102
1103 start-sanitize-tx19
1104 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1105
1106         * mips/configure.in, mips/gencode: Add tx19/r1900.
1107
1108 end-sanitize-tx19
1109 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1110
1111         * configure: Regenerated to track ../common/aclocal.m4 changes.
1112
1113 start-sanitize-r5900
1114 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1115
1116         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1117         for overflow due to ABS of MININT, set result to MAXINT.
1118         (build_instruction): For "psrlvw", signextend bit 31.
1119
1120 end-sanitize-r5900
1121 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1122
1123         * configure: Regenerated to track ../common/aclocal.m4 changes.
1124         * config.in: Ditto.
1125
1126 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1127
1128         * interp.c (sim_open): Add call to sim_analyze_program, update
1129         call to sim_config.
1130
1131 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1132
1133         * interp.c (sim_kill): Delete.
1134         (sim_create_inferior): Add ABFD argument. Set PC from same.
1135         (sim_load): Move code initializing trap handlers from here.
1136         (sim_open): To here.
1137         (sim_load): Delete, use sim-hload.c.
1138
1139         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1140
1141 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1142
1143         * configure: Regenerated to track ../common/aclocal.m4 changes.
1144         * config.in: Ditto.
1145
1146 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1147
1148         * interp.c (sim_open): Add ABFD argument.
1149         (sim_load): Move call to sim_config from here.
1150         (sim_open): To here.  Check return status.
1151
1152 start-sanitize-r5900
1153         * gencode.c (build_instruction): Do not define x8000000000000000,
1154         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1155
1156 end-sanitize-r5900
1157 start-sanitize-r5900
1158 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1159
1160         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1161         "pdivuw" check for overflow due to signed divide by -1.
1162
1163 end-sanitize-r5900
1164 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1165
1166         * gencode.c (build_instruction): Two arg MADD should
1167         not assign result to $0.
1168
1169 start-sanitize-r5900
1170 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1171
1172         * gencode.c (build_instruction): For "ppac5" use unsigned
1173         arrithmetic so that the sign bit doesn't smear when right shifted.
1174         (build_instruction): For "pdiv" perform sign extension when
1175         storing results in HI and LO.
1176         (build_instructions): For "pdiv" and "pdivbw" check for
1177         divide-by-zero.
1178         (build_instruction): For "pmfhl.slw" update hi part of dest
1179         register as well as low part.
1180         (build_instruction): For "pmfhl" portably handle long long values.
1181         (build_instruction): For "pmfhl.sh" correctly negative values.
1182         Store half words 2 and three in the correct place.
1183         (build_instruction): For "psllvw", sign extend value after shift.
1184
1185 end-sanitize-r5900
1186 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1187
1188         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1189         * sim/mips/configure.in: Regenerate.
1190
1191 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1192
1193         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1194         signed8, unsigned8 et.al. types.
1195
1196 start-sanitize-r5900
1197         * gencode.c (build_instruction): For PMULTU* do not sign extend
1198         registers.  Make generated code easier to debug.
1199
1200 end-sanitize-r5900
1201         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1202         hosts when selecting subreg.
1203
1204 start-sanitize-r5900
1205 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1206
1207         * gencode.c (type_for_data_len): For 32bit operations concerned
1208         with overflow, perform op using 64bits.
1209         (build_instruction): For PADD, always compute operation using type
1210         returned by type_for_data_len.
1211         (build_instruction): For PSUBU, when overflow, saturate to zero as
1212         actually underflow.
1213
1214 end-sanitize-r5900
1215 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1216
1217 start-sanitize-r5900
1218         * gencode.c (build_instruction): Handle "pext5" according to
1219         version 1.95 of the r5900 ISA.
1220
1221         * gencode.c (build_instruction): Handle "ppac5" according to
1222         version 1.95 of the r5900 ISA.
1223
1224 end-sanitize-r5900
1225         * interp.c (sim_engine_run): Reset the ZERO register to zero
1226         regardless of FEATURE_WARN_ZERO.
1227         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1228
1229 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1230
1231         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1232         (SignalException): For BreakPoints ignore any mode bits and just
1233         save the PC.
1234         (SignalException): Always set the CAUSE register.
1235
1236 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1237
1238         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1239         exception has been taken.
1240
1241         * interp.c: Implement the ERET and mt/f sr instructions.
1242
1243 start-sanitize-r5900
1244 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1245
1246         * gencode.c (build_instruction): For paddu, extract unsigned
1247         sub-fields.
1248
1249         * gencode.c (build_instruction): Saturate padds instead of padd
1250         instructions.
1251
1252 end-sanitize-r5900
1253 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1254
1255         * interp.c (SignalException): Don't bother restarting an
1256         interrupt.
1257
1258 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1259
1260         * interp.c (SignalException): Really take an interrupt.
1261         (interrupt_event): Only deliver interrupts when enabled.
1262
1263 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1264
1265         * interp.c (sim_info): Only print info when verbose.
1266         (sim_info) Use sim_io_printf for output.
1267
1268 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1269
1270         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1271         mips architectures.
1272
1273 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1274
1275         * interp.c (sim_do_command): Check for common commands if a
1276         simulator specific command fails.
1277
1278 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1279
1280         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1281         and simBE when DEBUG is defined.
1282
1283 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1284
1285         * interp.c (interrupt_event): New function.  Pass exception event
1286         onto exception handler.
1287
1288         * configure.in: Check for stdlib.h.
1289         * configure: Regenerate.
1290
1291         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1292         variable declaration.
1293         (build_instruction): Initialize memval1.
1294         (build_instruction): Add UNUSED attribute to byte, bigend,
1295         reverse.
1296         (build_operands): Ditto.
1297
1298         * interp.c: Fix GCC warnings.
1299         (sim_get_quit_code): Delete.
1300
1301         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1302         * Makefile.in: Ditto.
1303         * configure: Re-generate.
1304
1305         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1306
1307 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1308
1309         * interp.c (mips_option_handler): New function parse argumes using
1310         sim-options.
1311         (myname): Replace with STATE_MY_NAME.
1312         (sim_open): Delete check for host endianness - performed by
1313         sim_config.
1314         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1315         (sim_open): Move much of the initialization from here.
1316         (sim_load): To here.  After the image has been loaded and
1317         endianness set.
1318         (sim_open): Move ColdReset from here.
1319         (sim_create_inferior): To here.
1320         (sim_open): Make FP check less dependant on host endianness.
1321
1322         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1323         run.
1324         * interp.c (sim_set_callbacks): Delete.
1325
1326         * interp.c (membank, membank_base, membank_size): Replace with
1327         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1328         (sim_open): Remove call to callback->init. gdb/run do this.
1329
1330         * interp.c: Update
1331
1332         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1333
1334         * interp.c (big_endian_p): Delete, replaced by
1335         current_target_byte_order.
1336
1337 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1338
1339         * interp.c (host_read_long, host_read_word, host_swap_word,
1340         host_swap_long): Delete. Using common sim-endian.
1341         (sim_fetch_register, sim_store_register): Use H2T.
1342         (pipeline_ticks): Delete.  Handled by sim-events.
1343         (sim_info): Update.
1344         (sim_engine_run): Update.
1345
1346 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1347
1348         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1349         reason from here.
1350         (SignalException): To here. Signal using sim_engine_halt.
1351         (sim_stop_reason): Delete, moved to common.
1352
1353 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1354
1355         * interp.c (sim_open): Add callback argument.
1356         (sim_set_callbacks): Delete SIM_DESC argument.
1357         (sim_size): Ditto.
1358
1359 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1360
1361         * Makefile.in (SIM_OBJS): Add common modules.
1362
1363         * interp.c (sim_set_callbacks): Also set SD callback.
1364         (set_endianness, xfer_*, swap_*): Delete.
1365         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1366         Change to functions using sim-endian macros.
1367         (control_c, sim_stop): Delete, use common version.
1368         (simulate): Convert into.
1369         (sim_engine_run): This function.
1370         (sim_resume): Delete.
1371
1372         * interp.c (simulation): New variable - the simulator object.
1373         (sim_kind): Delete global - merged into simulation.
1374         (sim_load): Cleanup.  Move PC assignment from here.
1375         (sim_create_inferior): To here.
1376
1377         * sim-main.h: New file.
1378         * interp.c (sim-main.h): Include.
1379
1380 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1381
1382         * configure: Regenerated to track ../common/aclocal.m4 changes.
1383
1384 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1385
1386         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1387
1388 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1389
1390         * gencode.c (build_instruction): DIV instructions: check
1391         for division by zero and integer overflow before using
1392         host's division operation.
1393
1394 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1395
1396         * Makefile.in (SIM_OBJS): Add sim-load.o.
1397         * interp.c: #include bfd.h.
1398         (target_byte_order): Delete.
1399         (sim_kind, myname, big_endian_p): New static locals.
1400         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1401         after argument parsing.  Recognize -E arg, set endianness accordingly.
1402         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1403         load file into simulator.  Set PC from bfd.
1404         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1405         (set_endianness): Use big_endian_p instead of target_byte_order.
1406
1407 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1408
1409         * interp.c (sim_size): Delete prototype - conflicts with
1410         definition in remote-sim.h.  Correct definition.
1411
1412 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1413
1414         * configure: Regenerated to track ../common/aclocal.m4 changes.
1415         * config.in: Ditto.
1416
1417 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1418
1419         * interp.c (sim_open): New arg `kind'.
1420
1421         * configure: Regenerated to track ../common/aclocal.m4 changes.
1422
1423 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1424
1425         * configure: Regenerated to track ../common/aclocal.m4 changes.
1426
1427 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1428
1429         * interp.c (sim_open): Set optind to 0 before calling getopt.
1430
1431 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1432
1433         * configure: Regenerated to track ../common/aclocal.m4 changes.
1434
1435 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1436
1437         * interp.c : Replace uses of pr_addr with pr_uword64
1438         where the bit length is always 64 independent of SIM_ADDR.
1439         (pr_uword64) : added.
1440
1441 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1442
1443         * configure: Re-generate.
1444
1445 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1446
1447         * configure: Regenerate to track ../common/aclocal.m4 changes.
1448
1449 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1450
1451         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1452         in argv form.
1453         (other sim_*): New SIM_DESC argument.
1454
1455 start-sanitize-r5900
1456 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1457
1458         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1459         Change values to avoid overloading DOUBLEWORD which is tested
1460         for all insns.
1461         * gencode.c: reinstate "offending code".
1462
1463 end-sanitize-r5900
1464 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1465
1466         * interp.c: Fix printing of addresses for non-64-bit targets.
1467         (pr_addr): Add function to print address based on size.
1468 start-sanitize-r5900
1469         * gencode.c: #ifdef out offending code until a permanent fix
1470         can be added.  Code is causing build errors for non-5900 mips targets.
1471 end-sanitize-r5900
1472
1473 start-sanitize-r5900
1474 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1475
1476         * gencode.c (process_instructions): Correct test for ISA dependent
1477         architecture bits in isa field of MIPS_DECODE.
1478
1479 end-sanitize-r5900
1480 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1481
1482         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1483
1484 start-sanitize-r5900
1485 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1486
1487         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1488         PMADDUW.
1489
1490 end-sanitize-r5900
1491 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1492
1493         * gencode.c (build_mips16_operands): Correct computation of base
1494         address for extended PC relative instruction.
1495
1496 start-sanitize-r5900
1497 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1498
1499         * Makefile.in, configure, configure.in, gencode.c,
1500         interp.c, support.h: add r5900.
1501
1502 end-sanitize-r5900
1503 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1504
1505         * interp.c (mips16_entry): Add support for floating point cases.
1506         (SignalException): Pass floating point cases to mips16_entry.
1507         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1508         registers.
1509         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1510         or fmt_word.
1511         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1512         and then set the state to fmt_uninterpreted.
1513         (COP_SW): Temporarily set the state to fmt_word while calling
1514         ValueFPR.
1515
1516 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1517
1518         * gencode.c (build_instruction): The high order may be set in the
1519         comparison flags at any ISA level, not just ISA 4.
1520
1521 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1522
1523         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1524         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1525         * configure.in: sinclude ../common/aclocal.m4.
1526         * configure: Regenerated.
1527
1528 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1529
1530         * configure: Rebuild after change to aclocal.m4.
1531
1532 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1533
1534         * configure configure.in Makefile.in:  Update to new configure
1535         scheme which is more compatible with WinGDB builds.
1536         * configure.in:  Improve comment on how to run autoconf.
1537         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1538         * Makefile.in:  Use autoconf substitution to install common
1539         makefile fragment.
1540
1541 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1542
1543         * gencode.c (build_instruction): Use BigEndianCPU instead of
1544         ByteSwapMem.
1545
1546 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1547
1548         * interp.c (sim_monitor): Make output to stdout visible in
1549         wingdb's I/O log window.
1550
1551 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1552
1553         * support.h: Undo previous change to SIGTRAP
1554         and SIGQUIT values.
1555
1556 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1557
1558         * interp.c (store_word, load_word): New static functions.
1559         (mips16_entry): New static function.
1560         (SignalException): Look for mips16 entry and exit instructions.
1561         (simulate): Use the correct index when setting fpr_state after
1562         doing a pending move.
1563
1564 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1565
1566         * interp.c: Fix byte-swapping code throughout to work on
1567         both little- and big-endian hosts.
1568
1569 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1570
1571         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1572         with gdb/config/i386/xm-windows.h.
1573
1574 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1575
1576         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1577         that messes up arithmetic shifts.
1578
1579 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1580
1581         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1582         SIGTRAP and SIGQUIT for _WIN32.
1583
1584 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1585
1586         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1587         force a 64 bit multiplication.
1588         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1589         destination register is 0, since that is the default mips16 nop
1590         instruction.
1591
1592 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1593
1594         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1595         (build_endian_shift): Don't check proc64.
1596         (build_instruction): Always set memval to uword64.  Cast op2 to
1597         uword64 when shifting it left in memory instructions.  Always use
1598         the same code for stores--don't special case proc64.
1599
1600         * gencode.c (build_mips16_operands): Fix base PC value for PC
1601         relative operands.
1602         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1603         jal instruction.
1604         * interp.c (simJALDELAYSLOT): Define.
1605         (JALDELAYSLOT): Define.
1606         (INDELAYSLOT, INJALDELAYSLOT): Define.
1607         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1608
1609 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1610
1611         * interp.c (sim_open): add flush_cache as a PMON routine
1612         (sim_monitor): handle flush_cache by ignoring it
1613
1614 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1615
1616         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1617         BigEndianMem.
1618         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1619         (BigEndianMem): Rename to ByteSwapMem and change sense.
1620         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1621         BigEndianMem references to !ByteSwapMem.
1622         (set_endianness): New function, with prototype.
1623         (sim_open): Call set_endianness.
1624         (sim_info): Use simBE instead of BigEndianMem.
1625         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1626         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1627         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1628         ifdefs, keeping the prototype declaration.
1629         (swap_word): Rewrite correctly.
1630         (ColdReset): Delete references to CONFIG.  Delete endianness related
1631         code; moved to set_endianness.
1632
1633 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1634
1635         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1636         * interp.c (CHECKHILO): Define away.
1637         (simSIGINT): New macro.
1638         (membank_size): Increase from 1MB to 2MB.
1639         (control_c): New function.
1640         (sim_resume): Rename parameter signal to signal_number.  Add local
1641         variable prev.  Call signal before and after simulate.
1642         (sim_stop_reason): Add simSIGINT support.
1643         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1644         functions always.
1645         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1646         if logfh is NULL.
1647         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1648         a call to sim_warning.
1649
1650 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1651
1652         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1653         16 bit instructions.
1654
1655 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1656
1657         Add support for mips16 (16 bit MIPS implementation):
1658         * gencode.c (inst_type): Add mips16 instruction encoding types.
1659         (GETDATASIZEINSN): Define.
1660         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1661         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1662         mtlo.
1663         (MIPS16_DECODE): New table, for mips16 instructions.
1664         (bitmap_val): New static function.
1665         (struct mips16_op): Define.
1666         (mips16_op_table): New table, for mips16 operands.
1667         (build_mips16_operands): New static function.
1668         (process_instructions): If PC is odd, decode a mips16
1669         instruction.  Break out instruction handling into new
1670         build_instruction function.
1671         (build_instruction): New static function, broken out of
1672         process_instructions.  Check modifiers rather than flags for SHIFT
1673         bit count and m[ft]{hi,lo} direction.
1674         (usage): Pass program name to fprintf.
1675         (main): Remove unused variable this_option_optind.  Change
1676         ``*loptarg++'' to ``loptarg++''.
1677         (my_strtoul): Parenthesize && within ||.
1678         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1679         (simulate): If PC is odd, fetch a 16 bit instruction, and
1680         increment PC by 2 rather than 4.
1681         * configure.in: Add case for mips16*-*-*.
1682         * configure: Rebuild.
1683
1684 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1685
1686         * interp.c: Allow -t to enable tracing in standalone simulator.
1687         Fix garbage output in trace file and error messages.
1688
1689 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1690
1691         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1692         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1693         * configure.in: Simplify using macros in ../common/aclocal.m4.
1694         * configure: Regenerated.
1695         * tconfig.in: New file.
1696
1697 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1698
1699         * interp.c: Fix bugs in 64-bit port.
1700         Use ansi function declarations for msvc compiler.
1701         Initialize and test file pointer in trace code.
1702         Prevent duplicate definition of LAST_EMED_REGNUM.
1703
1704 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1705
1706         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1707
1708 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1709
1710         * interp.c (SignalException): Check for explicit terminating
1711         breakpoint value.
1712         * gencode.c: Pass instruction value through SignalException()
1713         calls for Trap, Breakpoint and Syscall.
1714
1715 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1716
1717         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1718         only used on those hosts that provide it.
1719         * configure.in: Add sqrt() to list of functions to be checked for.
1720         * config.in: Re-generated.
1721         * configure: Re-generated.
1722
1723 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1724
1725         * gencode.c (process_instructions): Call build_endian_shift when
1726         expanding STORE RIGHT, to fix swr.
1727         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1728         clear the high bits.
1729         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1730         Fix float to int conversions to produce signed values.
1731
1732 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1733
1734         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1735         (process_instructions): Correct handling of nor instruction.
1736         Correct shift count for 32 bit shift instructions. Correct sign
1737         extension for arithmetic shifts to not shift the number of bits in
1738         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1739         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1740         Fix madd.
1741         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1742         It's OK to have a mult follow a mult.  What's not OK is to have a
1743         mult follow an mfhi.
1744         (Convert): Comment out incorrect rounding code.
1745
1746 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1747
1748         * interp.c (sim_monitor): Improved monitor printf
1749         simulation. Tidied up simulator warnings, and added "--log" option
1750         for directing warning message output.
1751         * gencode.c: Use sim_warning() rather than WARNING macro.
1752
1753 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1754
1755         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1756         getopt1.o, rather than on gencode.c.  Link objects together.
1757         Don't link against -liberty.
1758         (gencode.o, getopt.o, getopt1.o): New targets.
1759         * gencode.c: Include <ctype.h> and "ansidecl.h".
1760         (AND): Undefine after including "ansidecl.h".
1761         (ULONG_MAX): Define if not defined.
1762         (OP_*): Don't define macros; now defined in opcode/mips.h.
1763         (main): Call my_strtoul rather than strtoul.
1764         (my_strtoul): New static function.
1765
1766 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1767
1768         * gencode.c (process_instructions):  Generate word64 and uword64
1769         instead of `long long' and `unsigned long long' data types.
1770         * interp.c:  #include sysdep.h to get signals, and define default
1771         for SIGBUS.
1772         * (Convert):  Work around for Visual-C++ compiler bug with type
1773         conversion.
1774         * support.h:  Make things compile under Visual-C++ by using
1775         __int64 instead of `long long'.  Change many refs to long long
1776         into word64/uword64 typedefs.
1777
1778 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1779
1780         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1781         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1782         (docdir): Removed.
1783         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1784         (AC_PROG_INSTALL): Added.
1785         (AC_PROG_CC): Moved to before configure.host call.
1786         * configure: Rebuilt.
1787
1788 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1789
1790         * configure.in: Define @SIMCONF@ depending on mips target.
1791         * configure: Rebuild.
1792         * Makefile.in (run): Add @SIMCONF@ to control simulator
1793         construction.
1794         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1795         * interp.c: Remove some debugging, provide more detailed error
1796         messages, update memory accesses to use LOADDRMASK.
1797
1798 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1799
1800         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1801         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1802         stamp-h.
1803         * configure: Rebuild.
1804         * config.in: New file, generated by autoheader.
1805         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1806         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1807         HAVE_ANINT and HAVE_AINT, as appropriate.
1808         * Makefile.in (run): Use @LIBS@ rather than -lm.
1809         (interp.o): Depend upon config.h.
1810         (Makefile): Just rebuild Makefile.
1811         (clean): Remove stamp-h.
1812         (mostlyclean): Make the same as clean, not as distclean.
1813         (config.h, stamp-h): New targets.
1814
1815 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1816
1817         * interp.c (ColdReset): Fix boolean test. Make all simulator
1818         globals static.
1819
1820 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1821
1822         * interp.c (xfer_direct_word, xfer_direct_long,
1823         swap_direct_word, swap_direct_long, xfer_big_word,
1824         xfer_big_long, xfer_little_word, xfer_little_long,
1825         swap_word,swap_long): Added.
1826         * interp.c (ColdReset): Provide function indirection to
1827         host<->simulated_target transfer routines.
1828         * interp.c (sim_store_register, sim_fetch_register): Updated to
1829         make use of indirected transfer routines.
1830
1831 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1832
1833         * gencode.c (process_instructions): Ensure FP ABS instruction
1834         recognised.
1835         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1836         system call support.
1837
1838 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1839
1840         * interp.c (sim_do_command): Complain if callback structure not
1841         initialised.
1842
1843 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1844
1845         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1846         support for Sun hosts.
1847         * Makefile.in (gencode): Ensure the host compiler and libraries
1848         used for cross-hosted build.
1849
1850 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1851
1852         * interp.c, gencode.c: Some more (TODO) tidying.
1853
1854 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1855
1856         * gencode.c, interp.c: Replaced explicit long long references with
1857         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1858         * support.h (SET64LO, SET64HI): Macros added.
1859
1860 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1861
1862         * configure: Regenerate with autoconf 2.7.
1863
1864 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1865
1866         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1867         * support.h: Remove superfluous "1" from #if.
1868         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1869
1870 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1871
1872         * interp.c (StoreFPR): Control UndefinedResult() call on
1873         WARN_RESULT manifest.
1874
1875 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1876
1877         * gencode.c: Tidied instruction decoding, and added FP instruction
1878         support.
1879
1880         * interp.c: Added dineroIII, and BSD profiling support. Also
1881         run-time FP handling.
1882
1883 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1884
1885         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1886         gencode.c, interp.c, support.h: created.