1 2013-09-23 Alan Modra <amodra@gmail.com>
3 * configure: Regenerate.
5 2013-06-03 Mike Frysinger <vapier@gentoo.org>
7 * aclocal.m4, configure: Regenerate.
9 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
13 2013-03-26 Mike Frysinger <vapier@gentoo.org>
15 * configure: Regenerate.
17 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
19 * configure.ac: Address use of dv-sockser.o.
20 * tconfig.in: Conditionalize use of dv_sockser_install.
21 * configure: Regenerated.
22 * config.in: Regenerated.
24 2012-10-04 Chao-ying Fu <fu@mips.com>
25 Steve Ellcey <sellcey@mips.com>
27 * mips/mips3264r2.igen (rdhwr): New.
29 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
31 * configure.ac: Always link against dv-sockser.o.
32 * configure: Regenerate.
34 2012-06-15 Joel Brobecker <brobecker@adacore.com>
36 * config.in, configure: Regenerate.
38 2012-05-18 Nick Clifton <nickc@redhat.com>
41 * interp.c: Include config.h before system header files.
43 2012-03-24 Mike Frysinger <vapier@gentoo.org>
45 * aclocal.m4, config.in, configure: Regenerate.
47 2011-12-03 Mike Frysinger <vapier@gentoo.org>
49 * aclocal.m4: New file.
50 * configure: Regenerate.
52 2011-10-19 Mike Frysinger <vapier@gentoo.org>
54 * configure: Regenerate after common/acinclude.m4 update.
56 2011-10-17 Mike Frysinger <vapier@gentoo.org>
58 * configure.ac: Change include to common/acinclude.m4.
60 2011-10-17 Mike Frysinger <vapier@gentoo.org>
62 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
63 call. Replace common.m4 include with SIM_AC_COMMON.
64 * configure: Regenerate.
66 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
68 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
70 (tmp-mach-multi): Exit early when igen fails.
72 2011-07-05 Mike Frysinger <vapier@gentoo.org>
74 * interp.c (sim_do_command): Delete.
76 2011-02-14 Mike Frysinger <vapier@gentoo.org>
78 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
79 (tx3904sio_fifo_reset): Likewise.
80 * interp.c (sim_monitor): Likewise.
82 2010-04-14 Mike Frysinger <vapier@gentoo.org>
84 * interp.c (sim_write): Add const to buffer arg.
86 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
88 * interp.c: Don't include sysdep.h
90 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
92 * configure: Regenerate.
94 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
96 * config.in: Regenerate.
97 * configure: Likewise.
99 * configure: Regenerate.
101 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
103 * configure: Regenerate to track ../common/common.m4 changes.
106 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
107 Daniel Jacobowitz <dan@codesourcery.com>
108 Joseph Myers <joseph@codesourcery.com>
110 * configure: Regenerate.
112 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
114 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
115 that unconditionally allows fmt_ps.
116 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
117 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
118 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
119 filter from 64,f to 32,f.
120 (PREFX): Change filter from 64 to 32.
121 (LDXC1, LUXC1): Provide separate mips32r2 implementations
122 that use do_load_double instead of do_load. Make both LUXC1
123 versions unpredictable if SizeFGR () != 64.
124 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
125 instead of do_store. Remove unused variable. Make both SUXC1
126 versions unpredictable if SizeFGR () != 64.
128 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
130 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
131 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
132 shifts for that case.
134 2007-09-04 Nick Clifton <nickc@redhat.com>
136 * interp.c (options enum): Add OPTION_INFO_MEMORY.
137 (display_mem_info): New static variable.
138 (mips_option_handler): Handle OPTION_INFO_MEMORY.
139 (mips_options): Add info-memory and memory-info.
140 (sim_open): After processing the command line and board
141 specification, check display_mem_info. If it is set then
142 call the real handler for the --memory-info command line
145 2007-08-24 Joel Brobecker <brobecker@adacore.com>
147 * configure.ac: Change license of multi-run.c to GPL version 3.
148 * configure: Regenerate.
150 2007-06-28 Richard Sandiford <richard@codesourcery.com>
152 * configure.ac, configure: Revert last patch.
154 2007-06-26 Richard Sandiford <richard@codesourcery.com>
156 * configure.ac (sim_mipsisa3264_configs): New variable.
157 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
158 every configuration support all four targets, using the triplet to
159 determine the default.
160 * configure: Regenerate.
162 2007-06-25 Richard Sandiford <richard@codesourcery.com>
164 * Makefile.in (m16run.o): New rule.
166 2007-05-15 Thiemo Seufer <ths@mips.com>
168 * mips3264r2.igen (DSHD): Fix compile warning.
170 2007-05-14 Thiemo Seufer <ths@mips.com>
172 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
173 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
174 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
175 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
178 2007-03-01 Thiemo Seufer <ths@mips.com>
180 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
183 2007-02-20 Thiemo Seufer <ths@mips.com>
185 * dsp.igen: Update copyright notice.
186 * dsp2.igen: Fix copyright notice.
188 2007-02-20 Thiemo Seufer <ths@mips.com>
189 Chao-Ying Fu <fu@mips.com>
191 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
192 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
193 Add dsp2 to sim_igen_machine.
194 * configure: Regenerate.
195 * dsp.igen (do_ph_op): Add MUL support when op = 2.
196 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
197 (mulq_rs.ph): Use do_ph_mulq.
198 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
199 * mips.igen: Add dsp2 model and include dsp2.igen.
200 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
201 for *mips32r2, *mips64r2, *dsp.
202 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
203 for *mips32r2, *mips64r2, *dsp2.
204 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
206 2007-02-19 Thiemo Seufer <ths@mips.com>
207 Nigel Stephens <nigel@mips.com>
209 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
210 jumps with hazard barrier.
212 2007-02-19 Thiemo Seufer <ths@mips.com>
213 Nigel Stephens <nigel@mips.com>
215 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
216 after each call to sim_io_write.
218 2007-02-19 Thiemo Seufer <ths@mips.com>
219 Nigel Stephens <nigel@mips.com>
221 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
222 supported by this simulator.
223 (decode_coproc): Recognise additional CP0 Config registers
226 2007-02-19 Thiemo Seufer <ths@mips.com>
227 Nigel Stephens <nigel@mips.com>
228 David Ung <davidu@mips.com>
230 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
231 uninterpreted formats. If fmt is one of the uninterpreted types
232 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
233 fmt_word, and fmt_uninterpreted_64 like fmt_long.
234 (store_fpr): When writing an invalid odd register, set the
235 matching even register to fmt_unknown, not the following register.
236 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
237 the the memory window at offset 0 set by --memory-size command
239 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
241 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
243 (sim_monitor): When returning the memory size to the MIPS
244 application, use the value in STATE_MEM_SIZE, not an arbitrary
246 (cop_lw): Don' mess around with FPR_STATE, just pass
247 fmt_uninterpreted_32 to StoreFPR.
249 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
251 * mips.igen (not_word_value): Single version for mips32, mips64
254 2007-02-19 Thiemo Seufer <ths@mips.com>
255 Nigel Stephens <nigel@mips.com>
257 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
260 2007-02-17 Thiemo Seufer <ths@mips.com>
262 * configure.ac (mips*-sde-elf*): Move in front of generic machine
264 * configure: Regenerate.
266 2007-02-17 Thiemo Seufer <ths@mips.com>
268 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
269 Add mdmx to sim_igen_machine.
270 (mipsisa64*-*-*): Likewise. Remove dsp.
271 (mipsisa32*-*-*): Remove dsp.
272 * configure: Regenerate.
274 2007-02-13 Thiemo Seufer <ths@mips.com>
276 * configure.ac: Add mips*-sde-elf* target.
277 * configure: Regenerate.
279 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
281 * acconfig.h: Remove.
282 * config.in, configure: Regenerate.
284 2006-11-07 Thiemo Seufer <ths@mips.com>
286 * dsp.igen (do_w_op): Fix compiler warning.
288 2006-08-29 Thiemo Seufer <ths@mips.com>
289 David Ung <davidu@mips.com>
291 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
293 * configure: Regenerate.
294 * mips.igen (model): Add smartmips.
295 (MADDU): Increment ACX if carry.
296 (do_mult): Clear ACX.
297 (ROR,RORV): Add smartmips.
298 (include): Include smartmips.igen.
299 * sim-main.h (ACX): Set to REGISTERS[89].
300 * smartmips.igen: New file.
302 2006-08-29 Thiemo Seufer <ths@mips.com>
303 David Ung <davidu@mips.com>
305 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
306 mips3264r2.igen. Add missing dependency rules.
307 * m16e.igen: Support for mips16e save/restore instructions.
309 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
311 * configure: Regenerated.
313 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
315 * configure: Regenerated.
317 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
319 * configure: Regenerated.
321 2006-05-15 Chao-ying Fu <fu@mips.com>
323 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
325 2006-04-18 Nick Clifton <nickc@redhat.com>
327 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
330 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
332 * configure: Regenerate.
334 2005-12-14 Chao-ying Fu <fu@mips.com>
336 * Makefile.in (SIM_OBJS): Add dsp.o.
337 (dsp.o): New dependency.
338 (IGEN_INCLUDE): Add dsp.igen.
339 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
340 mipsisa64*-*-*): Add dsp to sim_igen_machine.
341 * configure: Regenerate.
342 * mips.igen: Add dsp model and include dsp.igen.
343 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
344 because these instructions are extended in DSP ASE.
345 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
346 adding 6 DSP accumulator registers and 1 DSP control register.
347 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
348 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
349 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
350 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
351 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
352 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
353 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
354 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
355 DSPCR_CCOND_SMASK): New define.
356 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
357 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
359 2005-07-08 Ian Lance Taylor <ian@airs.com>
361 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
363 2005-06-16 David Ung <davidu@mips.com>
364 Nigel Stephens <nigel@mips.com>
366 * mips.igen: New mips16e model and include m16e.igen.
367 (check_u64): Add mips16e tag.
368 * m16e.igen: New file for MIPS16e instructions.
369 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
370 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
372 * configure: Regenerate.
374 2005-05-26 David Ung <davidu@mips.com>
376 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
377 tags to all instructions which are applicable to the new ISAs.
378 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
380 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
382 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
384 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
385 * configure: Regenerate.
387 2005-03-23 Mark Kettenis <kettenis@gnu.org>
389 * configure: Regenerate.
391 2005-01-14 Andrew Cagney <cagney@gnu.org>
393 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
394 explicit call to AC_CONFIG_HEADER.
395 * configure: Regenerate.
397 2005-01-12 Andrew Cagney <cagney@gnu.org>
399 * configure.ac: Update to use ../common/common.m4.
400 * configure: Re-generate.
402 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
404 * configure: Regenerated to track ../common/aclocal.m4 changes.
406 2005-01-07 Andrew Cagney <cagney@gnu.org>
408 * configure.ac: Rename configure.in, require autoconf 2.59.
409 * configure: Re-generate.
411 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
413 * configure: Regenerate for ../common/aclocal.m4 update.
415 2004-09-24 Monika Chaddha <monika@acmet.com>
417 Committed by Andrew Cagney.
418 * m16.igen (CMP, CMPI): Fix assembler.
420 2004-08-18 Chris Demetriou <cgd@broadcom.com>
422 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
423 * configure: Regenerate.
425 2004-06-25 Chris Demetriou <cgd@broadcom.com>
427 * configure.in (sim_m16_machine): Include mipsIII.
428 * configure: Regenerate.
430 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
432 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
434 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
436 2004-04-10 Chris Demetriou <cgd@broadcom.com>
438 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
440 2004-04-09 Chris Demetriou <cgd@broadcom.com>
442 * mips.igen (check_fmt): Remove.
443 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
444 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
445 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
446 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
447 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
448 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
449 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
450 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
451 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
452 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
454 2004-04-09 Chris Demetriou <cgd@broadcom.com>
456 * sb1.igen (check_sbx): New function.
457 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
459 2004-03-29 Chris Demetriou <cgd@broadcom.com>
460 Richard Sandiford <rsandifo@redhat.com>
462 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
463 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
464 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
465 separate implementations for mipsIV and mipsV. Use new macros to
466 determine whether the restrictions apply.
468 2004-01-19 Chris Demetriou <cgd@broadcom.com>
470 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
471 (check_mult_hilo): Improve comments.
472 (check_div_hilo): Likewise. Also, fork off a new version
473 to handle mips32/mips64 (since there are no hazards to check
476 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
478 * mips.igen (do_dmultx): Fix check for negative operands.
480 2003-05-16 Ian Lance Taylor <ian@airs.com>
482 * Makefile.in (SHELL): Make sure this is defined.
483 (various): Use $(SHELL) whenever we invoke move-if-change.
485 2003-05-03 Chris Demetriou <cgd@broadcom.com>
487 * cp1.c: Tweak attribution slightly.
490 * mdmx.igen: Likewise.
491 * mips3d.igen: Likewise.
492 * sb1.igen: Likewise.
494 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
496 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
499 2003-02-27 Andrew Cagney <cagney@redhat.com>
501 * interp.c (sim_open): Rename _bfd to bfd.
502 (sim_create_inferior): Ditto.
504 2003-01-14 Chris Demetriou <cgd@broadcom.com>
506 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
508 2003-01-14 Chris Demetriou <cgd@broadcom.com>
510 * mips.igen (EI, DI): Remove.
512 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
514 * Makefile.in (tmp-run-multi): Fix mips16 filter.
516 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
517 Andrew Cagney <ac131313@redhat.com>
518 Gavin Romig-Koch <gavin@redhat.com>
519 Graydon Hoare <graydon@redhat.com>
520 Aldy Hernandez <aldyh@redhat.com>
521 Dave Brolley <brolley@redhat.com>
522 Chris Demetriou <cgd@broadcom.com>
524 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
525 (sim_mach_default): New variable.
526 (mips64vr-*-*, mips64vrel-*-*): New configurations.
527 Add a new simulator generator, MULTI.
528 * configure: Regenerate.
529 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
530 (multi-run.o): New dependency.
531 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
532 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
533 (tmp-multi): Combine them.
534 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
535 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
536 (distclean-extra): New rule.
537 * sim-main.h: Include bfd.h.
538 (MIPS_MACH): New macro.
539 * mips.igen (vr4120, vr5400, vr5500): New models.
540 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
541 * vr.igen: Replace with new version.
543 2003-01-04 Chris Demetriou <cgd@broadcom.com>
545 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
546 * configure: Regenerate.
548 2002-12-31 Chris Demetriou <cgd@broadcom.com>
550 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
551 * mips.igen: Remove all invocations of check_branch_bug and
554 2002-12-16 Chris Demetriou <cgd@broadcom.com>
556 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
558 2002-07-30 Chris Demetriou <cgd@broadcom.com>
560 * mips.igen (do_load_double, do_store_double): New functions.
561 (LDC1, SDC1): Rename to...
562 (LDC1b, SDC1b): respectively.
563 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
565 2002-07-29 Michael Snyder <msnyder@redhat.com>
567 * cp1.c (fp_recip2): Modify initialization expression so that
568 GCC will recognize it as constant.
570 2002-06-18 Chris Demetriou <cgd@broadcom.com>
572 * mdmx.c (SD_): Delete.
573 (Unpredictable): Re-define, for now, to directly invoke
574 unpredictable_action().
575 (mdmx_acc_op): Fix error in .ob immediate handling.
577 2002-06-18 Andrew Cagney <cagney@redhat.com>
579 * interp.c (sim_firmware_command): Initialize `address'.
581 2002-06-16 Andrew Cagney <ac131313@redhat.com>
583 * configure: Regenerated to track ../common/aclocal.m4 changes.
585 2002-06-14 Chris Demetriou <cgd@broadcom.com>
586 Ed Satterthwaite <ehs@broadcom.com>
588 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
589 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
590 * mips.igen: Include mips3d.igen.
591 (mips3d): New model name for MIPS-3D ASE instructions.
592 (CVT.W.fmt): Don't use this instruction for word (source) format
594 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
595 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
596 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
597 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
598 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
599 (RSquareRoot1, RSquareRoot2): New macros.
600 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
601 (fp_rsqrt2): New functions.
602 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
603 * configure: Regenerate.
605 2002-06-13 Chris Demetriou <cgd@broadcom.com>
606 Ed Satterthwaite <ehs@broadcom.com>
608 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
609 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
610 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
611 (convert): Note that this function is not used for paired-single
613 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
614 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
615 (check_fmt_p): Enable paired-single support.
616 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
617 (PUU.PS): New instructions.
618 (CVT.S.fmt): Don't use this instruction for paired-single format
620 * sim-main.h (FP_formats): New value 'fmt_ps.'
621 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
622 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
624 2002-06-12 Chris Demetriou <cgd@broadcom.com>
626 * mips.igen: Fix formatting of function calls in
629 2002-06-12 Chris Demetriou <cgd@broadcom.com>
631 * mips.igen (MOVN, MOVZ): Trace result.
632 (TNEI): Print "tnei" as the opcode name in traces.
633 (CEIL.W): Add disassembly string for traces.
634 (RSQRT.fmt): Make location of disassembly string consistent
635 with other instructions.
637 2002-06-12 Chris Demetriou <cgd@broadcom.com>
639 * mips.igen (X): Delete unused function.
641 2002-06-08 Andrew Cagney <cagney@redhat.com>
643 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
645 2002-06-07 Chris Demetriou <cgd@broadcom.com>
646 Ed Satterthwaite <ehs@broadcom.com>
648 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
649 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
650 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
651 (fp_nmsub): New prototypes.
652 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
653 (NegMultiplySub): New defines.
654 * mips.igen (RSQRT.fmt): Use RSquareRoot().
655 (MADD.D, MADD.S): Replace with...
656 (MADD.fmt): New instruction.
657 (MSUB.D, MSUB.S): Replace with...
658 (MSUB.fmt): New instruction.
659 (NMADD.D, NMADD.S): Replace with...
660 (NMADD.fmt): New instruction.
661 (NMSUB.D, MSUB.S): Replace with...
662 (NMSUB.fmt): New instruction.
664 2002-06-07 Chris Demetriou <cgd@broadcom.com>
665 Ed Satterthwaite <ehs@broadcom.com>
667 * cp1.c: Fix more comment spelling and formatting.
668 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
669 (denorm_mode): New function.
670 (fpu_unary, fpu_binary): Round results after operation, collect
671 status from rounding operations, and update the FCSR.
672 (convert): Collect status from integer conversions and rounding
673 operations, and update the FCSR. Adjust NaN values that result
674 from conversions. Convert to use sim_io_eprintf rather than
675 fprintf, and remove some debugging code.
676 * cp1.h (fenr_FS): New define.
678 2002-06-07 Chris Demetriou <cgd@broadcom.com>
680 * cp1.c (convert): Remove unusable debugging code, and move MIPS
681 rounding mode to sim FP rounding mode flag conversion code into...
682 (rounding_mode): New function.
684 2002-06-07 Chris Demetriou <cgd@broadcom.com>
686 * cp1.c: Clean up formatting of a few comments.
687 (value_fpr): Reformat switch statement.
689 2002-06-06 Chris Demetriou <cgd@broadcom.com>
690 Ed Satterthwaite <ehs@broadcom.com>
693 * sim-main.h: Include cp1.h.
694 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
695 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
696 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
697 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
698 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
699 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
700 * cp1.c: Don't include sim-fpu.h; already included by
701 sim-main.h. Clean up formatting of some comments.
702 (NaN, Equal, Less): Remove.
703 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
704 (fp_cmp): New functions.
705 * mips.igen (do_c_cond_fmt): Remove.
706 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
707 Compare. Add result tracing.
708 (CxC1): Remove, replace with...
709 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
710 (DMxC1): Remove, replace with...
711 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
712 (MxC1): Remove, replace with...
713 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
715 2002-06-04 Chris Demetriou <cgd@broadcom.com>
717 * sim-main.h (FGRIDX): Remove, replace all uses with...
718 (FGR_BASE): New macro.
719 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
720 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
721 (NR_FGR, FGR): Likewise.
722 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
723 * mips.igen: Likewise.
725 2002-06-04 Chris Demetriou <cgd@broadcom.com>
727 * cp1.c: Add an FSF Copyright notice to this file.
729 2002-06-04 Chris Demetriou <cgd@broadcom.com>
730 Ed Satterthwaite <ehs@broadcom.com>
732 * cp1.c (Infinity): Remove.
733 * sim-main.h (Infinity): Likewise.
735 * cp1.c (fp_unary, fp_binary): New functions.
736 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
737 (fp_sqrt): New functions, implemented in terms of the above.
738 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
739 (Recip, SquareRoot): Remove (replaced by functions above).
740 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
741 (fp_recip, fp_sqrt): New prototypes.
742 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
743 (Recip, SquareRoot): Replace prototypes with #defines which
744 invoke the functions above.
746 2002-06-03 Chris Demetriou <cgd@broadcom.com>
748 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
749 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
750 file, remove PARAMS from prototypes.
751 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
752 simulator state arguments.
753 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
754 pass simulator state arguments.
755 * cp1.c (SD): Redefine as CPU_STATE(cpu).
756 (store_fpr, convert): Remove 'sd' argument.
757 (value_fpr): Likewise. Convert to use 'SD' instead.
759 2002-06-03 Chris Demetriou <cgd@broadcom.com>
761 * cp1.c (Min, Max): Remove #if 0'd functions.
762 * sim-main.h (Min, Max): Remove.
764 2002-06-03 Chris Demetriou <cgd@broadcom.com>
766 * cp1.c: fix formatting of switch case and default labels.
767 * interp.c: Likewise.
768 * sim-main.c: Likewise.
770 2002-06-03 Chris Demetriou <cgd@broadcom.com>
772 * cp1.c: Clean up comments which describe FP formats.
773 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
775 2002-06-03 Chris Demetriou <cgd@broadcom.com>
776 Ed Satterthwaite <ehs@broadcom.com>
778 * configure.in (mipsisa64sb1*-*-*): New target for supporting
779 Broadcom SiByte SB-1 processor configurations.
780 * configure: Regenerate.
781 * sb1.igen: New file.
782 * mips.igen: Include sb1.igen.
784 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
785 * mdmx.igen: Add "sb1" model to all appropriate functions and
787 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
788 (ob_func, ob_acc): Reference the above.
789 (qh_acc): Adjust to keep the same size as ob_acc.
790 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
791 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
793 2002-06-03 Chris Demetriou <cgd@broadcom.com>
795 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
797 2002-06-02 Chris Demetriou <cgd@broadcom.com>
798 Ed Satterthwaite <ehs@broadcom.com>
800 * mips.igen (mdmx): New (pseudo-)model.
801 * mdmx.c, mdmx.igen: New files.
802 * Makefile.in (SIM_OBJS): Add mdmx.o.
803 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
805 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
806 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
807 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
808 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
809 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
810 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
811 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
812 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
813 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
814 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
815 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
816 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
817 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
818 (qh_fmtsel): New macros.
819 (_sim_cpu): New member "acc".
820 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
821 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
823 2002-05-01 Chris Demetriou <cgd@broadcom.com>
825 * interp.c: Use 'deprecated' rather than 'depreciated.'
826 * sim-main.h: Likewise.
828 2002-05-01 Chris Demetriou <cgd@broadcom.com>
830 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
831 which wouldn't compile anyway.
832 * sim-main.h (unpredictable_action): New function prototype.
833 (Unpredictable): Define to call igen function unpredictable().
834 (NotWordValue): New macro to call igen function not_word_value().
835 (UndefinedResult): Remove.
836 * interp.c (undefined_result): Remove.
837 (unpredictable_action): New function.
838 * mips.igen (not_word_value, unpredictable): New functions.
839 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
840 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
841 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
842 NotWordValue() to check for unpredictable inputs, then
843 Unpredictable() to handle them.
845 2002-02-24 Chris Demetriou <cgd@broadcom.com>
847 * mips.igen: Fix formatting of calls to Unpredictable().
849 2002-04-20 Andrew Cagney <ac131313@redhat.com>
851 * interp.c (sim_open): Revert previous change.
853 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
855 * interp.c (sim_open): Disable chunk of code that wrote code in
856 vector table entries.
858 2002-03-19 Chris Demetriou <cgd@broadcom.com>
860 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
861 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
864 2002-03-19 Chris Demetriou <cgd@broadcom.com>
866 * cp1.c: Fix many formatting issues.
868 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
870 * cp1.c (fpu_format_name): New function to replace...
871 (DOFMT): This. Delete, and update all callers.
872 (fpu_rounding_mode_name): New function to replace...
873 (RMMODE): This. Delete, and update all callers.
875 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
877 * interp.c: Move FPU support routines from here to...
878 * cp1.c: Here. New file.
879 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
882 2002-03-12 Chris Demetriou <cgd@broadcom.com>
884 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
885 * mips.igen (mips32, mips64): New models, add to all instructions
886 and functions as appropriate.
887 (loadstore_ea, check_u64): New variant for model mips64.
888 (check_fmt_p): New variant for models mipsV and mips64, remove
889 mipsV model marking fro other variant.
892 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
893 for mips32 and mips64.
894 (DCLO, DCLZ): New instructions for mips64.
896 2002-03-07 Chris Demetriou <cgd@broadcom.com>
898 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
899 immediate or code as a hex value with the "%#lx" format.
900 (ANDI): Likewise, and fix printed instruction name.
902 2002-03-05 Chris Demetriou <cgd@broadcom.com>
904 * sim-main.h (UndefinedResult, Unpredictable): New macros
905 which currently do nothing.
907 2002-03-05 Chris Demetriou <cgd@broadcom.com>
909 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
910 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
911 (status_CU3): New definitions.
913 * sim-main.h (ExceptionCause): Add new values for MIPS32
914 and MIPS64: MDMX, MCheck, CacheErr. Update comments
915 for DebugBreakPoint and NMIReset to note their status in
917 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
918 (SignalExceptionCacheErr): New exception macros.
920 2002-03-05 Chris Demetriou <cgd@broadcom.com>
922 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
923 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
925 (SignalExceptionCoProcessorUnusable): Take as argument the
926 unusable coprocessor number.
928 2002-03-05 Chris Demetriou <cgd@broadcom.com>
930 * mips.igen: Fix formatting of all SignalException calls.
932 2002-03-05 Chris Demetriou <cgd@broadcom.com>
934 * sim-main.h (SIGNEXTEND): Remove.
936 2002-03-04 Chris Demetriou <cgd@broadcom.com>
938 * mips.igen: Remove gencode comment from top of file, fix
939 spelling in another comment.
941 2002-03-04 Chris Demetriou <cgd@broadcom.com>
943 * mips.igen (check_fmt, check_fmt_p): New functions to check
944 whether specific floating point formats are usable.
945 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
946 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
947 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
948 Use the new functions.
949 (do_c_cond_fmt): Remove format checks...
950 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
952 2002-03-03 Chris Demetriou <cgd@broadcom.com>
954 * mips.igen: Fix formatting of check_fpu calls.
956 2002-03-03 Chris Demetriou <cgd@broadcom.com>
958 * mips.igen (FLOOR.L.fmt): Store correct destination register.
960 2002-03-03 Chris Demetriou <cgd@broadcom.com>
962 * mips.igen: Remove whitespace at end of lines.
964 2002-03-02 Chris Demetriou <cgd@broadcom.com>
966 * mips.igen (loadstore_ea): New function to do effective
967 address calculations.
968 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
969 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
970 CACHE): Use loadstore_ea to do effective address computations.
972 2002-03-02 Chris Demetriou <cgd@broadcom.com>
974 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
975 * mips.igen (LL, CxC1, MxC1): Likewise.
977 2002-03-02 Chris Demetriou <cgd@broadcom.com>
979 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
980 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
981 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
982 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
983 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
984 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
985 Don't split opcode fields by hand, use the opcode field values
988 2002-03-01 Chris Demetriou <cgd@broadcom.com>
990 * mips.igen (do_divu): Fix spacing.
992 * mips.igen (do_dsllv): Move to be right before DSLLV,
993 to match the rest of the do_<shift> functions.
995 2002-03-01 Chris Demetriou <cgd@broadcom.com>
997 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
998 DSRL32, do_dsrlv): Trace inputs and results.
1000 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1002 * mips.igen (CACHE): Provide instruction-printing string.
1004 * interp.c (signal_exception): Comment tokens after #endif.
1006 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1008 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1009 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1010 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1011 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1012 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1013 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1014 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1015 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1017 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1019 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1020 instruction-printing string.
1021 (LWU): Use '64' as the filter flag.
1023 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1025 * mips.igen (SDXC1): Fix instruction-printing string.
1027 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1029 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1030 filter flags "32,f".
1032 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1034 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1037 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1039 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1040 add a comma) so that it more closely match the MIPS ISA
1041 documentation opcode partitioning.
1042 (PREF): Put useful names on opcode fields, and include
1043 instruction-printing string.
1045 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1047 * mips.igen (check_u64): New function which in the future will
1048 check whether 64-bit instructions are usable and signal an
1049 exception if not. Currently a no-op.
1050 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1051 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1052 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1053 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1055 * mips.igen (check_fpu): New function which in the future will
1056 check whether FPU instructions are usable and signal an exception
1057 if not. Currently a no-op.
1058 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1059 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1060 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1061 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1062 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1063 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1064 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1065 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1067 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1069 * mips.igen (do_load_left, do_load_right): Move to be immediately
1071 (do_store_left, do_store_right): Move to be immediately following
1074 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1076 * mips.igen (mipsV): New model name. Also, add it to
1077 all instructions and functions where it is appropriate.
1079 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1081 * mips.igen: For all functions and instructions, list model
1082 names that support that instruction one per line.
1084 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1086 * mips.igen: Add some additional comments about supported
1087 models, and about which instructions go where.
1088 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1089 order as is used in the rest of the file.
1091 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1093 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1094 indicating that ALU32_END or ALU64_END are there to check
1096 (DADD): Likewise, but also remove previous comment about
1099 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1101 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1102 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1103 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1104 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1105 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1106 fields (i.e., add and move commas) so that they more closely
1107 match the MIPS ISA documentation opcode partitioning.
1109 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1111 * mips.igen (ADDI): Print immediate value.
1112 (BREAK): Print code.
1113 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1114 (SLL): Print "nop" specially, and don't run the code
1115 that does the shift for the "nop" case.
1117 2001-11-17 Fred Fish <fnf@redhat.com>
1119 * sim-main.h (float_operation): Move enum declaration outside
1120 of _sim_cpu struct declaration.
1122 2001-04-12 Jim Blandy <jimb@redhat.com>
1124 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1125 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1127 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1128 PENDING_FILL, and you can get the intended effect gracefully by
1129 calling PENDING_SCHED directly.
1131 2001-02-23 Ben Elliston <bje@redhat.com>
1133 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1134 already defined elsewhere.
1136 2001-02-19 Ben Elliston <bje@redhat.com>
1138 * sim-main.h (sim_monitor): Return an int.
1139 * interp.c (sim_monitor): Add return values.
1140 (signal_exception): Handle error conditions from sim_monitor.
1142 2001-02-08 Ben Elliston <bje@redhat.com>
1144 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1145 (store_memory): Likewise, pass cia to sim_core_write*.
1147 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1149 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1150 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1152 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1154 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1155 * Makefile.in: Don't delete *.igen when cleaning directory.
1157 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1159 * m16.igen (break): Call SignalException not sim_engine_halt.
1161 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1163 From Jason Eckhardt:
1164 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1166 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1168 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1170 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1172 * mips.igen (do_dmultx): Fix typo.
1174 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1176 * configure: Regenerated to track ../common/aclocal.m4 changes.
1178 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1180 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1182 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1184 * sim-main.h (GPR_CLEAR): Define macro.
1186 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1188 * interp.c (decode_coproc): Output long using %lx and not %s.
1190 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1192 * interp.c (sim_open): Sort & extend dummy memory regions for
1193 --board=jmr3904 for eCos.
1195 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1197 * configure: Regenerated.
1199 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1201 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1202 calls, conditional on the simulator being in verbose mode.
1204 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1206 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1207 cache don't get ReservedInstruction traps.
1209 1999-11-29 Mark Salter <msalter@cygnus.com>
1211 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1212 to clear status bits in sdisr register. This is how the hardware works.
1214 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1215 being used by cygmon.
1217 1999-11-11 Andrew Haley <aph@cygnus.com>
1219 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1222 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1224 * mips.igen (MULT): Correct previous mis-applied patch.
1226 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1228 * mips.igen (delayslot32): Handle sequence like
1229 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1230 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1231 (MULT): Actually pass the third register...
1233 1999-09-03 Mark Salter <msalter@cygnus.com>
1235 * interp.c (sim_open): Added more memory aliases for additional
1236 hardware being touched by cygmon on jmr3904 board.
1238 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1240 * configure: Regenerated to track ../common/aclocal.m4 changes.
1242 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1244 * interp.c (sim_store_register): Handle case where client - GDB -
1245 specifies that a 4 byte register is 8 bytes in size.
1246 (sim_fetch_register): Ditto.
1248 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1250 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1251 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1252 (idt_monitor_base): Base address for IDT monitor traps.
1253 (pmon_monitor_base): Ditto for PMON.
1254 (lsipmon_monitor_base): Ditto for LSI PMON.
1255 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1256 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1257 (sim_firmware_command): New function.
1258 (mips_option_handler): Call it for OPTION_FIRMWARE.
1259 (sim_open): Allocate memory for idt_monitor region. If "--board"
1260 option was given, add no monitor by default. Add BREAK hooks only if
1261 monitors are also there.
1263 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1265 * interp.c (sim_monitor): Flush output before reading input.
1267 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1269 * tconfig.in (SIM_HANDLES_LMA): Always define.
1271 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1273 From Mark Salter <msalter@cygnus.com>:
1274 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1275 (sim_open): Add setup for BSP board.
1277 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1279 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1280 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1281 them as unimplemented.
1283 1999-05-08 Felix Lee <flee@cygnus.com>
1285 * configure: Regenerated to track ../common/aclocal.m4 changes.
1287 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1289 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1291 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1293 * configure.in: Any mips64vr5*-*-* target should have
1294 -DTARGET_ENABLE_FR=1.
1295 (default_endian): Any mips64vr*el-*-* target should default to
1297 * configure: Re-generate.
1299 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1301 * mips.igen (ldl): Extend from _16_, not 32.
1303 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1305 * interp.c (sim_store_register): Force registers written to by GDB
1306 into an un-interpreted state.
1308 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1310 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1311 CPU, start periodic background I/O polls.
1312 (tx3904sio_poll): New function: periodic I/O poller.
1314 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1316 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1318 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1320 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1323 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1325 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1326 (load_word): Call SIM_CORE_SIGNAL hook on error.
1327 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1328 starting. For exception dispatching, pass PC instead of NULL_CIA.
1329 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1330 * sim-main.h (COP0_BADVADDR): Define.
1331 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1332 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1333 (_sim_cpu): Add exc_* fields to store register value snapshots.
1334 * mips.igen (*): Replace memory-related SignalException* calls
1335 with references to SIM_CORE_SIGNAL hook.
1337 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1339 * sim-main.c (*): Minor warning cleanups.
1341 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1343 * m16.igen (DADDIU5): Correct type-o.
1345 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1347 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1350 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1352 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1354 (interp.o): Add dependency on itable.h
1355 (oengine.c, gencode): Delete remaining references.
1356 (BUILT_SRC_FROM_GEN): Clean up.
1358 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1361 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1362 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1363 tmp-run-hack) : New.
1364 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1365 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1366 Drop the "64" qualifier to get the HACK generator working.
1367 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1368 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1369 qualifier to get the hack generator working.
1370 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1371 (DSLL): Use do_dsll.
1372 (DSLLV): Use do_dsllv.
1373 (DSRA): Use do_dsra.
1374 (DSRL): Use do_dsrl.
1375 (DSRLV): Use do_dsrlv.
1376 (BC1): Move *vr4100 to get the HACK generator working.
1377 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1378 get the HACK generator working.
1379 (MACC) Rename to get the HACK generator working.
1380 (DMACC,MACCS,DMACCS): Add the 64.
1382 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1384 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1385 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1387 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1389 * mips/interp.c (DEBUG): Cleanups.
1391 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1393 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1394 (tx3904sio_tickle): fflush after a stdout character output.
1396 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1398 * interp.c (sim_close): Uninstall modules.
1400 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1402 * sim-main.h, interp.c (sim_monitor): Change to global
1405 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1407 * configure.in (vr4100): Only include vr4100 instructions in
1409 * configure: Re-generate.
1410 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1412 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1414 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1415 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1418 * configure.in (sim_default_gen, sim_use_gen): Replace with
1420 (--enable-sim-igen): Delete config option. Always using IGEN.
1421 * configure: Re-generate.
1423 * Makefile.in (gencode): Kill, kill, kill.
1426 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1428 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1429 bit mips16 igen simulator.
1430 * configure: Re-generate.
1432 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1433 as part of vr4100 ISA.
1434 * vr.igen: Mark all instructions as 64 bit only.
1436 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1438 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1441 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1443 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1444 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1445 * configure: Re-generate.
1447 * m16.igen (BREAK): Define breakpoint instruction.
1448 (JALX32): Mark instruction as mips16 and not r3900.
1449 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1451 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1453 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1455 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1456 insn as a debug breakpoint.
1458 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1460 (PENDING_SCHED): Clean up trace statement.
1461 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1462 (PENDING_FILL): Delay write by only one cycle.
1463 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1465 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1467 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1469 (pending_tick): Move incrementing of index to FOR statement.
1470 (pending_tick): Only update PENDING_OUT after a write has occured.
1472 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1474 * configure: Re-generate.
1476 * interp.c (sim_engine_run OLD): Delete explicit call to
1477 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1479 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1481 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1482 interrupt level number to match changed SignalExceptionInterrupt
1485 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1487 * interp.c: #include "itable.h" if WITH_IGEN.
1488 (get_insn_name): New function.
1489 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1490 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1492 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1494 * configure: Rebuilt to inhale new common/aclocal.m4.
1496 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1498 * dv-tx3904sio.c: Include sim-assert.h.
1500 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1502 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1503 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1504 Reorganize target-specific sim-hardware checks.
1505 * configure: rebuilt.
1506 * interp.c (sim_open): For tx39 target boards, set
1507 OPERATING_ENVIRONMENT, add tx3904sio devices.
1508 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1509 ROM executables. Install dv-sockser into sim-modules list.
1511 * dv-tx3904irc.c: Compiler warning clean-up.
1512 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1513 frequent hw-trace messages.
1515 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1517 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1519 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1521 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1523 * vr.igen: New file.
1524 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1525 * mips.igen: Define vr4100 model. Include vr.igen.
1526 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1528 * mips.igen (check_mf_hilo): Correct check.
1530 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1532 * sim-main.h (interrupt_event): Add prototype.
1534 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1535 register_ptr, register_value.
1536 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1538 * sim-main.h (tracefh): Make extern.
1540 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1542 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1543 Reduce unnecessarily high timer event frequency.
1544 * dv-tx3904cpu.c: Ditto for interrupt event.
1546 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1548 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1550 (interrupt_event): Made non-static.
1552 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1553 interchange of configuration values for external vs. internal
1556 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1558 * mips.igen (BREAK): Moved code to here for
1559 simulator-reserved break instructions.
1560 * gencode.c (build_instruction): Ditto.
1561 * interp.c (signal_exception): Code moved from here. Non-
1562 reserved instructions now use exception vector, rather
1564 * sim-main.h: Moved magic constants to here.
1566 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1568 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1569 register upon non-zero interrupt event level, clear upon zero
1571 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1572 by passing zero event value.
1573 (*_io_{read,write}_buffer): Endianness fixes.
1574 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1575 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1577 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1578 serial I/O and timer module at base address 0xFFFF0000.
1580 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1582 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1585 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1587 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1589 * configure: Update.
1591 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1593 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1594 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1595 * configure.in: Include tx3904tmr in hw_device list.
1596 * configure: Rebuilt.
1597 * interp.c (sim_open): Instantiate three timer instances.
1598 Fix address typo of tx3904irc instance.
1600 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1602 * interp.c (signal_exception): SystemCall exception now uses
1603 the exception vector.
1605 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1607 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1610 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1612 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1614 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1616 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1618 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1619 sim-main.h. Declare a struct hw_descriptor instead of struct
1620 hw_device_descriptor.
1622 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1624 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1625 right bits and then re-align left hand bytes to correct byte
1626 lanes. Fix incorrect computation in do_store_left when loading
1627 bytes from second word.
1629 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1631 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1632 * interp.c (sim_open): Only create a device tree when HW is
1635 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1636 * interp.c (signal_exception): Ditto.
1638 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1640 * gencode.c: Mark BEGEZALL as LIKELY.
1642 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1644 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1645 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1647 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1649 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1650 modules. Recognize TX39 target with "mips*tx39" pattern.
1651 * configure: Rebuilt.
1652 * sim-main.h (*): Added many macros defining bits in
1653 TX39 control registers.
1654 (SignalInterrupt): Send actual PC instead of NULL.
1655 (SignalNMIReset): New exception type.
1656 * interp.c (board): New variable for future use to identify
1657 a particular board being simulated.
1658 (mips_option_handler,mips_options): Added "--board" option.
1659 (interrupt_event): Send actual PC.
1660 (sim_open): Make memory layout conditional on board setting.
1661 (signal_exception): Initial implementation of hardware interrupt
1662 handling. Accept another break instruction variant for simulator
1664 (decode_coproc): Implement RFE instruction for TX39.
1665 (mips.igen): Decode RFE instruction as such.
1666 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1667 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1668 bbegin to implement memory map.
1669 * dv-tx3904cpu.c: New file.
1670 * dv-tx3904irc.c: New file.
1672 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1674 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1676 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1678 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1679 with calls to check_div_hilo.
1681 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1683 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1684 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1685 Add special r3900 version of do_mult_hilo.
1686 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1687 with calls to check_mult_hilo.
1688 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1689 with calls to check_div_hilo.
1691 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1693 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1694 Document a replacement.
1696 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1698 * interp.c (sim_monitor): Make mon_printf work.
1700 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1702 * sim-main.h (INSN_NAME): New arg `cpu'.
1704 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1706 * configure: Regenerated to track ../common/aclocal.m4 changes.
1708 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1710 * configure: Regenerated to track ../common/aclocal.m4 changes.
1713 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1715 * acconfig.h: New file.
1716 * configure.in: Reverted change of Apr 24; use sinclude again.
1718 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1720 * configure: Regenerated to track ../common/aclocal.m4 changes.
1723 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1725 * configure.in: Don't call sinclude.
1727 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1729 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1731 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1733 * mips.igen (ERET): Implement.
1735 * interp.c (decode_coproc): Return sign-extended EPC.
1737 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1739 * interp.c (signal_exception): Do not ignore Trap.
1740 (signal_exception): On TRAP, restart at exception address.
1741 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1742 (signal_exception): Update.
1743 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1744 so that TRAP instructions are caught.
1746 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1748 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1749 contains HI/LO access history.
1750 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1751 (HIACCESS, LOACCESS): Delete, replace with
1752 (HIHISTORY, LOHISTORY): New macros.
1753 (CHECKHILO): Delete all, moved to mips.igen
1755 * gencode.c (build_instruction): Do not generate checks for
1756 correct HI/LO register usage.
1758 * interp.c (old_engine_run): Delete checks for correct HI/LO
1761 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1762 check_mf_cycles): New functions.
1763 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1764 do_divu, domultx, do_mult, do_multu): Use.
1766 * tx.igen ("madd", "maddu"): Use.
1768 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * mips.igen (DSRAV): Use function do_dsrav.
1771 (SRAV): Use new function do_srav.
1773 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1774 (B): Sign extend 11 bit immediate.
1775 (EXT-B*): Shift 16 bit immediate left by 1.
1776 (ADDIU*): Don't sign extend immediate value.
1778 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1780 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1782 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1785 * mips.igen (delayslot32, nullify_next_insn): New functions.
1786 (m16.igen): Always include.
1787 (do_*): Add more tracing.
1789 * m16.igen (delayslot16): Add NIA argument, could be called by a
1790 32 bit MIPS16 instruction.
1792 * interp.c (ifetch16): Move function from here.
1793 * sim-main.c (ifetch16): To here.
1795 * sim-main.c (ifetch16, ifetch32): Update to match current
1796 implementations of LH, LW.
1797 (signal_exception): Don't print out incorrect hex value of illegal
1800 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1802 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1805 * m16.igen: Implement MIPS16 instructions.
1807 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1808 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1809 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1810 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1811 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1812 bodies of corresponding code from 32 bit insn to these. Also used
1813 by MIPS16 versions of functions.
1815 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1816 (IMEM16): Drop NR argument from macro.
1818 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1820 * Makefile.in (SIM_OBJS): Add sim-main.o.
1822 * sim-main.h (address_translation, load_memory, store_memory,
1823 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1825 (pr_addr, pr_uword64): Declare.
1826 (sim-main.c): Include when H_REVEALS_MODULE_P.
1828 * interp.c (address_translation, load_memory, store_memory,
1829 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1831 * sim-main.c: To here. Fix compilation problems.
1833 * configure.in: Enable inlining.
1834 * configure: Re-config.
1836 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1838 * configure: Regenerated to track ../common/aclocal.m4 changes.
1840 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1842 * mips.igen: Include tx.igen.
1843 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1844 * tx.igen: New file, contains MADD and MADDU.
1846 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1847 the hardwired constant `7'.
1848 (store_memory): Ditto.
1849 (LOADDRMASK): Move definition to sim-main.h.
1851 mips.igen (MTC0): Enable for r3900.
1854 mips.igen (do_load_byte): Delete.
1855 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1856 do_store_right): New functions.
1857 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1859 configure.in: Let the tx39 use igen again.
1862 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1864 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1865 not an address sized quantity. Return zero for cache sizes.
1867 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1869 * mips.igen (r3900): r3900 does not support 64 bit integer
1872 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1874 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1876 * configure : Rebuild.
1878 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1880 * configure: Regenerated to track ../common/aclocal.m4 changes.
1882 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1884 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1886 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1888 * configure: Regenerated to track ../common/aclocal.m4 changes.
1889 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1891 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1893 * configure: Regenerated to track ../common/aclocal.m4 changes.
1895 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1897 * interp.c (Max, Min): Comment out functions. Not yet used.
1899 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1901 * configure: Regenerated to track ../common/aclocal.m4 changes.
1903 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1905 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1906 configurable settings for stand-alone simulator.
1908 * configure.in: Added X11 search, just in case.
1910 * configure: Regenerated.
1912 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1914 * interp.c (sim_write, sim_read, load_memory, store_memory):
1915 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1917 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1919 * sim-main.h (GETFCC): Return an unsigned value.
1921 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1923 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1924 (DADD): Result destination is RD not RT.
1926 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1928 * sim-main.h (HIACCESS, LOACCESS): Always define.
1930 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1932 * interp.c (sim_info): Delete.
1934 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1936 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1937 (mips_option_handler): New argument `cpu'.
1938 (sim_open): Update call to sim_add_option_table.
1940 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1942 * mips.igen (CxC1): Add tracing.
1944 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * sim-main.h (Max, Min): Declare.
1948 * interp.c (Max, Min): New functions.
1950 * mips.igen (BC1): Add tracing.
1952 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1954 * interp.c Added memory map for stack in vr4100
1956 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1958 * interp.c (load_memory): Add missing "break"'s.
1960 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1962 * interp.c (sim_store_register, sim_fetch_register): Pass in
1963 length parameter. Return -1.
1965 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1967 * interp.c: Added hardware init hook, fixed warnings.
1969 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1971 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1973 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * interp.c (ifetch16): New function.
1977 * sim-main.h (IMEM32): Rename IMEM.
1978 (IMEM16_IMMED): Define.
1980 (DELAY_SLOT): Update.
1982 * m16run.c (sim_engine_run): New file.
1984 * m16.igen: All instructions except LB.
1985 (LB): Call do_load_byte.
1986 * mips.igen (do_load_byte): New function.
1987 (LB): Call do_load_byte.
1989 * mips.igen: Move spec for insn bit size and high bit from here.
1990 * Makefile.in (tmp-igen, tmp-m16): To here.
1992 * m16.dc: New file, decode mips16 instructions.
1994 * Makefile.in (SIM_NO_ALL): Define.
1995 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1997 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1999 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2000 point unit to 32 bit registers.
2001 * configure: Re-generate.
2003 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2005 * configure.in (sim_use_gen): Make IGEN the default simulator
2006 generator for generic 32 and 64 bit mips targets.
2007 * configure: Re-generate.
2009 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2011 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2014 * interp.c (sim_fetch_register, sim_store_register): Read/write
2015 FGR from correct location.
2016 (sim_open): Set size of FGR's according to
2017 WITH_TARGET_FLOATING_POINT_BITSIZE.
2019 * sim-main.h (FGR): Store floating point registers in a separate
2022 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * configure: Regenerated to track ../common/aclocal.m4 changes.
2026 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2028 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2030 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2032 * interp.c (pending_tick): New function. Deliver pending writes.
2034 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2035 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2036 it can handle mixed sized quantites and single bits.
2038 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2040 * interp.c (oengine.h): Do not include when building with IGEN.
2041 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2042 (sim_info): Ditto for PROCESSOR_64BIT.
2043 (sim_monitor): Replace ut_reg with unsigned_word.
2044 (*): Ditto for t_reg.
2045 (LOADDRMASK): Define.
2046 (sim_open): Remove defunct check that host FP is IEEE compliant,
2047 using software to emulate floating point.
2048 (value_fpr, ...): Always compile, was conditional on HASFPU.
2050 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2052 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2055 * interp.c (SD, CPU): Define.
2056 (mips_option_handler): Set flags in each CPU.
2057 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2058 (sim_close): Do not clear STATE, deleted anyway.
2059 (sim_write, sim_read): Assume CPU zero's vm should be used for
2061 (sim_create_inferior): Set the PC for all processors.
2062 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2064 (mips16_entry): Pass correct nr of args to store_word, load_word.
2065 (ColdReset): Cold reset all cpu's.
2066 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2067 (sim_monitor, load_memory, store_memory, signal_exception): Use
2068 `CPU' instead of STATE_CPU.
2071 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2074 * sim-main.h (signal_exception): Add sim_cpu arg.
2075 (SignalException*): Pass both SD and CPU to signal_exception.
2076 * interp.c (signal_exception): Update.
2078 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2080 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2081 address_translation): Ditto
2082 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2084 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2086 * configure: Regenerated to track ../common/aclocal.m4 changes.
2088 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2090 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2092 * mips.igen (model): Map processor names onto BFD name.
2094 * sim-main.h (CPU_CIA): Delete.
2095 (SET_CIA, GET_CIA): Define
2097 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2099 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2102 * configure.in (default_endian): Configure a big-endian simulator
2104 * configure: Re-generate.
2106 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2108 * configure: Regenerated to track ../common/aclocal.m4 changes.
2110 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2112 * interp.c (sim_monitor): Handle Densan monitor outbyte
2113 and inbyte functions.
2115 1997-12-29 Felix Lee <flee@cygnus.com>
2117 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2119 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2121 * Makefile.in (tmp-igen): Arrange for $zero to always be
2122 reset to zero after every instruction.
2124 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2126 * configure: Regenerated to track ../common/aclocal.m4 changes.
2129 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2131 * mips.igen (MSUB): Fix to work like MADD.
2132 * gencode.c (MSUB): Similarly.
2134 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2136 * configure: Regenerated to track ../common/aclocal.m4 changes.
2138 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2140 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2142 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2144 * sim-main.h (sim-fpu.h): Include.
2146 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2147 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2148 using host independant sim_fpu module.
2150 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2152 * interp.c (signal_exception): Report internal errors with SIGABRT
2155 * sim-main.h (C0_CONFIG): New register.
2156 (signal.h): No longer include.
2158 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2160 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2162 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2164 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2166 * mips.igen: Tag vr5000 instructions.
2167 (ANDI): Was missing mipsIV model, fix assembler syntax.
2168 (do_c_cond_fmt): New function.
2169 (C.cond.fmt): Handle mips I-III which do not support CC field
2171 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2172 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2174 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2175 vr5000 which saves LO in a GPR separatly.
2177 * configure.in (enable-sim-igen): For vr5000, select vr5000
2178 specific instructions.
2179 * configure: Re-generate.
2181 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2183 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2185 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2186 fmt_uninterpreted_64 bit cases to switch. Convert to
2189 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2191 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2192 as specified in IV3.2 spec.
2193 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2195 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2197 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2198 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2199 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2200 PENDING_FILL versions of instructions. Simplify.
2202 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2204 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2206 (MTHI, MFHI): Disable code checking HI-LO.
2208 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2210 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2212 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2214 * gencode.c (build_mips16_operands): Replace IPC with cia.
2216 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2217 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2219 (UndefinedResult): Replace function with macro/function
2221 (sim_engine_run): Don't save PC in IPC.
2223 * sim-main.h (IPC): Delete.
2226 * interp.c (signal_exception, store_word, load_word,
2227 address_translation, load_memory, store_memory, cache_op,
2228 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2229 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2230 current instruction address - cia - argument.
2231 (sim_read, sim_write): Call address_translation directly.
2232 (sim_engine_run): Rename variable vaddr to cia.
2233 (signal_exception): Pass cia to sim_monitor
2235 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2236 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2237 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2239 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2240 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2243 * interp.c (signal_exception): Pass restart address to
2246 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2247 idecode.o): Add dependency.
2249 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2251 (DELAY_SLOT): Update NIA not PC with branch address.
2252 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2254 * mips.igen: Use CIA not PC in branch calculations.
2255 (illegal): Call SignalException.
2256 (BEQ, ADDIU): Fix assembler.
2258 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2260 * m16.igen (JALX): Was missing.
2262 * configure.in (enable-sim-igen): New configuration option.
2263 * configure: Re-generate.
2265 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2267 * interp.c (load_memory, store_memory): Delete parameter RAW.
2268 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2269 bypassing {load,store}_memory.
2271 * sim-main.h (ByteSwapMem): Delete definition.
2273 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2275 * interp.c (sim_do_command, sim_commands): Delete mips specific
2276 commands. Handled by module sim-options.
2278 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2279 (WITH_MODULO_MEMORY): Define.
2281 * interp.c (sim_info): Delete code printing memory size.
2283 * interp.c (mips_size): Nee sim_size, delete function.
2285 (monitor, monitor_base, monitor_size): Delete global variables.
2286 (sim_open, sim_close): Delete code creating monitor and other
2287 memory regions. Use sim-memopts module, via sim_do_commandf, to
2288 manage memory regions.
2289 (load_memory, store_memory): Use sim-core for memory model.
2291 * interp.c (address_translation): Delete all memory map code
2292 except line forcing 32 bit addresses.
2294 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2296 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2299 * interp.c (logfh, logfile): Delete globals.
2300 (sim_open, sim_close): Delete code opening & closing log file.
2301 (mips_option_handler): Delete -l and -n options.
2302 (OPTION mips_options): Ditto.
2304 * interp.c (OPTION mips_options): Rename option trace to dinero.
2305 (mips_option_handler): Update.
2307 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2309 * interp.c (fetch_str): New function.
2310 (sim_monitor): Rewrite using sim_read & sim_write.
2311 (sim_open): Check magic number.
2312 (sim_open): Write monitor vectors into memory using sim_write.
2313 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2314 (sim_read, sim_write): Simplify - transfer data one byte at a
2316 (load_memory, store_memory): Clarify meaning of parameter RAW.
2318 * sim-main.h (isHOST): Defete definition.
2319 (isTARGET): Mark as depreciated.
2320 (address_translation): Delete parameter HOST.
2322 * interp.c (address_translation): Delete parameter HOST.
2324 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2328 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2329 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2331 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2333 * mips.igen: Add model filter field to records.
2335 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2337 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2339 interp.c (sim_engine_run): Do not compile function sim_engine_run
2340 when WITH_IGEN == 1.
2342 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2343 target architecture.
2345 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2346 igen. Replace with configuration variables sim_igen_flags /
2349 * m16.igen: New file. Copy mips16 insns here.
2350 * mips.igen: From here.
2352 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2354 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2356 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2358 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2360 * gencode.c (build_instruction): Follow sim_write's lead in using
2361 BigEndianMem instead of !ByteSwapMem.
2363 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2365 * configure.in (sim_gen): Dependent on target, select type of
2366 generator. Always select old style generator.
2368 configure: Re-generate.
2370 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2372 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2373 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2374 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2375 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2376 SIM_@sim_gen@_*, set by autoconf.
2378 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2380 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2382 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2383 CURRENT_FLOATING_POINT instead.
2385 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2386 (address_translation): Raise exception InstructionFetch when
2387 translation fails and isINSTRUCTION.
2389 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2390 sim_engine_run): Change type of of vaddr and paddr to
2392 (address_translation, prefetch, load_memory, store_memory,
2393 cache_op): Change type of vAddr and pAddr to address_word.
2395 * gencode.c (build_instruction): Change type of vaddr and paddr to
2398 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2400 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2401 macro to obtain result of ALU op.
2403 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2405 * interp.c (sim_info): Call profile_print.
2407 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2409 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2411 * sim-main.h (WITH_PROFILE): Do not define, defined in
2412 common/sim-config.h. Use sim-profile module.
2413 (simPROFILE): Delete defintion.
2415 * interp.c (PROFILE): Delete definition.
2416 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2417 (sim_close): Delete code writing profile histogram.
2418 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2420 (sim_engine_run): Delete code profiling the PC.
2422 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2424 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2426 * interp.c (sim_monitor): Make register pointers of type
2429 * sim-main.h: Make registers of type unsigned_word not
2432 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2434 * interp.c (sync_operation): Rename from SyncOperation, make
2435 global, add SD argument.
2436 (prefetch): Rename from Prefetch, make global, add SD argument.
2437 (decode_coproc): Make global.
2439 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2441 * gencode.c (build_instruction): Generate DecodeCoproc not
2442 decode_coproc calls.
2444 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2445 (SizeFGR): Move to sim-main.h
2446 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2447 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2448 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2450 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2451 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2452 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2453 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2454 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2455 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2457 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2459 (sim-alu.h): Include.
2460 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2461 (sim_cia): Typedef to instruction_address.
2463 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2465 * Makefile.in (interp.o): Rename generated file engine.c to
2470 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2472 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2474 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2476 * gencode.c (build_instruction): For "FPSQRT", output correct
2477 number of arguments to Recip.
2479 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2481 * Makefile.in (interp.o): Depends on sim-main.h
2483 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2485 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2486 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2487 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2488 STATE, DSSTATE): Define
2489 (GPR, FGRIDX, ..): Define.
2491 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2492 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2493 (GPR, FGRIDX, ...): Delete macros.
2495 * interp.c: Update names to match defines from sim-main.h
2497 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2499 * interp.c (sim_monitor): Add SD argument.
2500 (sim_warning): Delete. Replace calls with calls to
2502 (sim_error): Delete. Replace calls with sim_io_error.
2503 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2504 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2505 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2507 (mips_size): Rename from sim_size. Add SD argument.
2509 * interp.c (simulator): Delete global variable.
2510 (callback): Delete global variable.
2511 (mips_option_handler, sim_open, sim_write, sim_read,
2512 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2513 sim_size,sim_monitor): Use sim_io_* not callback->*.
2514 (sim_open): ZALLOC simulator struct.
2515 (PROFILE): Do not define.
2517 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2519 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2520 support.h with corresponding code.
2522 * sim-main.h (word64, uword64), support.h: Move definition to
2524 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2527 * Makefile.in: Update dependencies
2528 * interp.c: Do not include.
2530 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2532 * interp.c (address_translation, load_memory, store_memory,
2533 cache_op): Rename to from AddressTranslation et.al., make global,
2536 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2539 * interp.c (SignalException): Rename to signal_exception, make
2542 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2544 * sim-main.h (SignalException, SignalExceptionInterrupt,
2545 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2546 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2547 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2550 * interp.c, support.h: Use.
2552 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2554 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2555 to value_fpr / store_fpr. Add SD argument.
2556 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2557 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2559 * sim-main.h (ValueFPR, StoreFPR): Define.
2561 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2563 * interp.c (sim_engine_run): Check consistency between configure
2564 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2567 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2568 (mips_fpu): Configure WITH_FLOATING_POINT.
2569 (mips_endian): Configure WITH_TARGET_ENDIAN.
2570 * configure: Update.
2572 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2574 * configure: Regenerated to track ../common/aclocal.m4 changes.
2576 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2578 * configure: Regenerated.
2580 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2582 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2584 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2586 * gencode.c (print_igen_insn_models): Assume certain architectures
2587 include all mips* instructions.
2588 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2591 * Makefile.in (tmp.igen): Add target. Generate igen input from
2594 * gencode.c (FEATURE_IGEN): Define.
2595 (main): Add --igen option. Generate output in igen format.
2596 (process_instructions): Format output according to igen option.
2597 (print_igen_insn_format): New function.
2598 (print_igen_insn_models): New function.
2599 (process_instructions): Only issue warnings and ignore
2600 instructions when no FEATURE_IGEN.
2602 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2604 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2607 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2609 * configure: Regenerated to track ../common/aclocal.m4 changes.
2611 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2613 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2614 SIM_RESERVED_BITS): Delete, moved to common.
2615 (SIM_EXTRA_CFLAGS): Update.
2617 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2619 * configure.in: Configure non-strict memory alignment.
2620 * configure: Regenerated to track ../common/aclocal.m4 changes.
2622 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2624 * configure: Regenerated to track ../common/aclocal.m4 changes.
2626 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2628 * gencode.c (SDBBP,DERET): Added (3900) insns.
2629 (RFE): Turn on for 3900.
2630 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2631 (dsstate): Made global.
2632 (SUBTARGET_R3900): Added.
2633 (CANCELDELAYSLOT): New.
2634 (SignalException): Ignore SystemCall rather than ignore and
2635 terminate. Add DebugBreakPoint handling.
2636 (decode_coproc): New insns RFE, DERET; and new registers Debug
2637 and DEPC protected by SUBTARGET_R3900.
2638 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2640 * Makefile.in,configure.in: Add mips subtarget option.
2641 * configure: Update.
2643 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2645 * gencode.c: Add r3900 (tx39).
2648 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2650 * gencode.c (build_instruction): Don't need to subtract 4 for
2653 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2655 * interp.c: Correct some HASFPU problems.
2657 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2659 * configure: Regenerated to track ../common/aclocal.m4 changes.
2661 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2663 * interp.c (mips_options): Fix samples option short form, should
2666 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2668 * interp.c (sim_info): Enable info code. Was just returning.
2670 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2675 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2679 (build_instruction): Ditto for LL.
2681 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2683 * configure: Regenerated to track ../common/aclocal.m4 changes.
2685 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * configure: Regenerated to track ../common/aclocal.m4 changes.
2690 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2692 * interp.c (sim_open): Add call to sim_analyze_program, update
2695 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * interp.c (sim_kill): Delete.
2698 (sim_create_inferior): Add ABFD argument. Set PC from same.
2699 (sim_load): Move code initializing trap handlers from here.
2700 (sim_open): To here.
2701 (sim_load): Delete, use sim-hload.c.
2703 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2705 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2707 * configure: Regenerated to track ../common/aclocal.m4 changes.
2710 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2712 * interp.c (sim_open): Add ABFD argument.
2713 (sim_load): Move call to sim_config from here.
2714 (sim_open): To here. Check return status.
2716 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2718 * gencode.c (build_instruction): Two arg MADD should
2719 not assign result to $0.
2721 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2723 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2724 * sim/mips/configure.in: Regenerate.
2726 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2728 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2729 signed8, unsigned8 et.al. types.
2731 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2732 hosts when selecting subreg.
2734 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2736 * interp.c (sim_engine_run): Reset the ZERO register to zero
2737 regardless of FEATURE_WARN_ZERO.
2738 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2740 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2742 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2743 (SignalException): For BreakPoints ignore any mode bits and just
2745 (SignalException): Always set the CAUSE register.
2747 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2749 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2750 exception has been taken.
2752 * interp.c: Implement the ERET and mt/f sr instructions.
2754 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2756 * interp.c (SignalException): Don't bother restarting an
2759 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2761 * interp.c (SignalException): Really take an interrupt.
2762 (interrupt_event): Only deliver interrupts when enabled.
2764 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2766 * interp.c (sim_info): Only print info when verbose.
2767 (sim_info) Use sim_io_printf for output.
2769 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2771 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2774 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2776 * interp.c (sim_do_command): Check for common commands if a
2777 simulator specific command fails.
2779 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2781 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2782 and simBE when DEBUG is defined.
2784 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2786 * interp.c (interrupt_event): New function. Pass exception event
2787 onto exception handler.
2789 * configure.in: Check for stdlib.h.
2790 * configure: Regenerate.
2792 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2793 variable declaration.
2794 (build_instruction): Initialize memval1.
2795 (build_instruction): Add UNUSED attribute to byte, bigend,
2797 (build_operands): Ditto.
2799 * interp.c: Fix GCC warnings.
2800 (sim_get_quit_code): Delete.
2802 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2803 * Makefile.in: Ditto.
2804 * configure: Re-generate.
2806 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2808 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2810 * interp.c (mips_option_handler): New function parse argumes using
2812 (myname): Replace with STATE_MY_NAME.
2813 (sim_open): Delete check for host endianness - performed by
2815 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2816 (sim_open): Move much of the initialization from here.
2817 (sim_load): To here. After the image has been loaded and
2819 (sim_open): Move ColdReset from here.
2820 (sim_create_inferior): To here.
2821 (sim_open): Make FP check less dependant on host endianness.
2823 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2825 * interp.c (sim_set_callbacks): Delete.
2827 * interp.c (membank, membank_base, membank_size): Replace with
2828 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2829 (sim_open): Remove call to callback->init. gdb/run do this.
2833 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2835 * interp.c (big_endian_p): Delete, replaced by
2836 current_target_byte_order.
2838 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * interp.c (host_read_long, host_read_word, host_swap_word,
2841 host_swap_long): Delete. Using common sim-endian.
2842 (sim_fetch_register, sim_store_register): Use H2T.
2843 (pipeline_ticks): Delete. Handled by sim-events.
2845 (sim_engine_run): Update.
2847 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2849 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2851 (SignalException): To here. Signal using sim_engine_halt.
2852 (sim_stop_reason): Delete, moved to common.
2854 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2856 * interp.c (sim_open): Add callback argument.
2857 (sim_set_callbacks): Delete SIM_DESC argument.
2860 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2862 * Makefile.in (SIM_OBJS): Add common modules.
2864 * interp.c (sim_set_callbacks): Also set SD callback.
2865 (set_endianness, xfer_*, swap_*): Delete.
2866 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2867 Change to functions using sim-endian macros.
2868 (control_c, sim_stop): Delete, use common version.
2869 (simulate): Convert into.
2870 (sim_engine_run): This function.
2871 (sim_resume): Delete.
2873 * interp.c (simulation): New variable - the simulator object.
2874 (sim_kind): Delete global - merged into simulation.
2875 (sim_load): Cleanup. Move PC assignment from here.
2876 (sim_create_inferior): To here.
2878 * sim-main.h: New file.
2879 * interp.c (sim-main.h): Include.
2881 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2883 * configure: Regenerated to track ../common/aclocal.m4 changes.
2885 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2887 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2889 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2891 * gencode.c (build_instruction): DIV instructions: check
2892 for division by zero and integer overflow before using
2893 host's division operation.
2895 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2897 * Makefile.in (SIM_OBJS): Add sim-load.o.
2898 * interp.c: #include bfd.h.
2899 (target_byte_order): Delete.
2900 (sim_kind, myname, big_endian_p): New static locals.
2901 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2902 after argument parsing. Recognize -E arg, set endianness accordingly.
2903 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2904 load file into simulator. Set PC from bfd.
2905 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2906 (set_endianness): Use big_endian_p instead of target_byte_order.
2908 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2910 * interp.c (sim_size): Delete prototype - conflicts with
2911 definition in remote-sim.h. Correct definition.
2913 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2915 * configure: Regenerated to track ../common/aclocal.m4 changes.
2918 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2920 * interp.c (sim_open): New arg `kind'.
2922 * configure: Regenerated to track ../common/aclocal.m4 changes.
2924 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2926 * configure: Regenerated to track ../common/aclocal.m4 changes.
2928 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2930 * interp.c (sim_open): Set optind to 0 before calling getopt.
2932 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2934 * configure: Regenerated to track ../common/aclocal.m4 changes.
2936 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2938 * interp.c : Replace uses of pr_addr with pr_uword64
2939 where the bit length is always 64 independent of SIM_ADDR.
2940 (pr_uword64) : added.
2942 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2944 * configure: Re-generate.
2946 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2948 * configure: Regenerate to track ../common/aclocal.m4 changes.
2950 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2952 * interp.c (sim_open): New SIM_DESC result. Argument is now
2954 (other sim_*): New SIM_DESC argument.
2956 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2958 * interp.c: Fix printing of addresses for non-64-bit targets.
2959 (pr_addr): Add function to print address based on size.
2961 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2963 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2965 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2967 * gencode.c (build_mips16_operands): Correct computation of base
2968 address for extended PC relative instruction.
2970 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2972 * interp.c (mips16_entry): Add support for floating point cases.
2973 (SignalException): Pass floating point cases to mips16_entry.
2974 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2976 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2978 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2979 and then set the state to fmt_uninterpreted.
2980 (COP_SW): Temporarily set the state to fmt_word while calling
2983 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2985 * gencode.c (build_instruction): The high order may be set in the
2986 comparison flags at any ISA level, not just ISA 4.
2988 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2990 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2991 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2992 * configure.in: sinclude ../common/aclocal.m4.
2993 * configure: Regenerated.
2995 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2997 * configure: Rebuild after change to aclocal.m4.
2999 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3001 * configure configure.in Makefile.in: Update to new configure
3002 scheme which is more compatible with WinGDB builds.
3003 * configure.in: Improve comment on how to run autoconf.
3004 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3005 * Makefile.in: Use autoconf substitution to install common
3008 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3010 * gencode.c (build_instruction): Use BigEndianCPU instead of
3013 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3015 * interp.c (sim_monitor): Make output to stdout visible in
3016 wingdb's I/O log window.
3018 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3020 * support.h: Undo previous change to SIGTRAP
3023 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3025 * interp.c (store_word, load_word): New static functions.
3026 (mips16_entry): New static function.
3027 (SignalException): Look for mips16 entry and exit instructions.
3028 (simulate): Use the correct index when setting fpr_state after
3029 doing a pending move.
3031 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3033 * interp.c: Fix byte-swapping code throughout to work on
3034 both little- and big-endian hosts.
3036 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3038 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3039 with gdb/config/i386/xm-windows.h.
3041 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3043 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3044 that messes up arithmetic shifts.
3046 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3048 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3049 SIGTRAP and SIGQUIT for _WIN32.
3051 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3053 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3054 force a 64 bit multiplication.
3055 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3056 destination register is 0, since that is the default mips16 nop
3059 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3061 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3062 (build_endian_shift): Don't check proc64.
3063 (build_instruction): Always set memval to uword64. Cast op2 to
3064 uword64 when shifting it left in memory instructions. Always use
3065 the same code for stores--don't special case proc64.
3067 * gencode.c (build_mips16_operands): Fix base PC value for PC
3069 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3071 * interp.c (simJALDELAYSLOT): Define.
3072 (JALDELAYSLOT): Define.
3073 (INDELAYSLOT, INJALDELAYSLOT): Define.
3074 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3076 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3078 * interp.c (sim_open): add flush_cache as a PMON routine
3079 (sim_monitor): handle flush_cache by ignoring it
3081 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3083 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3085 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3086 (BigEndianMem): Rename to ByteSwapMem and change sense.
3087 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3088 BigEndianMem references to !ByteSwapMem.
3089 (set_endianness): New function, with prototype.
3090 (sim_open): Call set_endianness.
3091 (sim_info): Use simBE instead of BigEndianMem.
3092 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3093 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3094 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3095 ifdefs, keeping the prototype declaration.
3096 (swap_word): Rewrite correctly.
3097 (ColdReset): Delete references to CONFIG. Delete endianness related
3098 code; moved to set_endianness.
3100 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3102 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3103 * interp.c (CHECKHILO): Define away.
3104 (simSIGINT): New macro.
3105 (membank_size): Increase from 1MB to 2MB.
3106 (control_c): New function.
3107 (sim_resume): Rename parameter signal to signal_number. Add local
3108 variable prev. Call signal before and after simulate.
3109 (sim_stop_reason): Add simSIGINT support.
3110 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3112 (sim_warning): Delete call to SignalException. Do call printf_filtered
3114 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3115 a call to sim_warning.
3117 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3119 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3120 16 bit instructions.
3122 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3124 Add support for mips16 (16 bit MIPS implementation):
3125 * gencode.c (inst_type): Add mips16 instruction encoding types.
3126 (GETDATASIZEINSN): Define.
3127 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3128 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3130 (MIPS16_DECODE): New table, for mips16 instructions.
3131 (bitmap_val): New static function.
3132 (struct mips16_op): Define.
3133 (mips16_op_table): New table, for mips16 operands.
3134 (build_mips16_operands): New static function.
3135 (process_instructions): If PC is odd, decode a mips16
3136 instruction. Break out instruction handling into new
3137 build_instruction function.
3138 (build_instruction): New static function, broken out of
3139 process_instructions. Check modifiers rather than flags for SHIFT
3140 bit count and m[ft]{hi,lo} direction.
3141 (usage): Pass program name to fprintf.
3142 (main): Remove unused variable this_option_optind. Change
3143 ``*loptarg++'' to ``loptarg++''.
3144 (my_strtoul): Parenthesize && within ||.
3145 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3146 (simulate): If PC is odd, fetch a 16 bit instruction, and
3147 increment PC by 2 rather than 4.
3148 * configure.in: Add case for mips16*-*-*.
3149 * configure: Rebuild.
3151 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3153 * interp.c: Allow -t to enable tracing in standalone simulator.
3154 Fix garbage output in trace file and error messages.
3156 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3158 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3159 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3160 * configure.in: Simplify using macros in ../common/aclocal.m4.
3161 * configure: Regenerated.
3162 * tconfig.in: New file.
3164 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3166 * interp.c: Fix bugs in 64-bit port.
3167 Use ansi function declarations for msvc compiler.
3168 Initialize and test file pointer in trace code.
3169 Prevent duplicate definition of LAST_EMED_REGNUM.
3171 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3173 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3175 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3177 * interp.c (SignalException): Check for explicit terminating
3179 * gencode.c: Pass instruction value through SignalException()
3180 calls for Trap, Breakpoint and Syscall.
3182 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3184 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3185 only used on those hosts that provide it.
3186 * configure.in: Add sqrt() to list of functions to be checked for.
3187 * config.in: Re-generated.
3188 * configure: Re-generated.
3190 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3192 * gencode.c (process_instructions): Call build_endian_shift when
3193 expanding STORE RIGHT, to fix swr.
3194 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3195 clear the high bits.
3196 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3197 Fix float to int conversions to produce signed values.
3199 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3201 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3202 (process_instructions): Correct handling of nor instruction.
3203 Correct shift count for 32 bit shift instructions. Correct sign
3204 extension for arithmetic shifts to not shift the number of bits in
3205 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3206 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3208 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3209 It's OK to have a mult follow a mult. What's not OK is to have a
3210 mult follow an mfhi.
3211 (Convert): Comment out incorrect rounding code.
3213 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3215 * interp.c (sim_monitor): Improved monitor printf
3216 simulation. Tidied up simulator warnings, and added "--log" option
3217 for directing warning message output.
3218 * gencode.c: Use sim_warning() rather than WARNING macro.
3220 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3222 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3223 getopt1.o, rather than on gencode.c. Link objects together.
3224 Don't link against -liberty.
3225 (gencode.o, getopt.o, getopt1.o): New targets.
3226 * gencode.c: Include <ctype.h> and "ansidecl.h".
3227 (AND): Undefine after including "ansidecl.h".
3228 (ULONG_MAX): Define if not defined.
3229 (OP_*): Don't define macros; now defined in opcode/mips.h.
3230 (main): Call my_strtoul rather than strtoul.
3231 (my_strtoul): New static function.
3233 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3235 * gencode.c (process_instructions): Generate word64 and uword64
3236 instead of `long long' and `unsigned long long' data types.
3237 * interp.c: #include sysdep.h to get signals, and define default
3239 * (Convert): Work around for Visual-C++ compiler bug with type
3241 * support.h: Make things compile under Visual-C++ by using
3242 __int64 instead of `long long'. Change many refs to long long
3243 into word64/uword64 typedefs.
3245 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3247 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3248 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3250 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3251 (AC_PROG_INSTALL): Added.
3252 (AC_PROG_CC): Moved to before configure.host call.
3253 * configure: Rebuilt.
3255 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3257 * configure.in: Define @SIMCONF@ depending on mips target.
3258 * configure: Rebuild.
3259 * Makefile.in (run): Add @SIMCONF@ to control simulator
3261 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3262 * interp.c: Remove some debugging, provide more detailed error
3263 messages, update memory accesses to use LOADDRMASK.
3265 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3267 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3268 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3270 * configure: Rebuild.
3271 * config.in: New file, generated by autoheader.
3272 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3273 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3274 HAVE_ANINT and HAVE_AINT, as appropriate.
3275 * Makefile.in (run): Use @LIBS@ rather than -lm.
3276 (interp.o): Depend upon config.h.
3277 (Makefile): Just rebuild Makefile.
3278 (clean): Remove stamp-h.
3279 (mostlyclean): Make the same as clean, not as distclean.
3280 (config.h, stamp-h): New targets.
3282 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3284 * interp.c (ColdReset): Fix boolean test. Make all simulator
3287 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3289 * interp.c (xfer_direct_word, xfer_direct_long,
3290 swap_direct_word, swap_direct_long, xfer_big_word,
3291 xfer_big_long, xfer_little_word, xfer_little_long,
3292 swap_word,swap_long): Added.
3293 * interp.c (ColdReset): Provide function indirection to
3294 host<->simulated_target transfer routines.
3295 * interp.c (sim_store_register, sim_fetch_register): Updated to
3296 make use of indirected transfer routines.
3298 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3300 * gencode.c (process_instructions): Ensure FP ABS instruction
3302 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3303 system call support.
3305 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3307 * interp.c (sim_do_command): Complain if callback structure not
3310 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3312 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3313 support for Sun hosts.
3314 * Makefile.in (gencode): Ensure the host compiler and libraries
3315 used for cross-hosted build.
3317 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3319 * interp.c, gencode.c: Some more (TODO) tidying.
3321 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3323 * gencode.c, interp.c: Replaced explicit long long references with
3324 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3325 * support.h (SET64LO, SET64HI): Macros added.
3327 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3329 * configure: Regenerate with autoconf 2.7.
3331 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3333 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3334 * support.h: Remove superfluous "1" from #if.
3335 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3337 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3339 * interp.c (StoreFPR): Control UndefinedResult() call on
3340 WARN_RESULT manifest.
3342 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3344 * gencode.c: Tidied instruction decoding, and added FP instruction
3347 * interp.c: Added dineroIII, and BSD profiling support. Also
3348 run-time FP handling.
3350 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3352 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3353 gencode.c, interp.c, support.h: created.