sim/mips/ChangeLog

   1 begin-sanitize-sky
   2 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * interp.c (decode_coproc): Make COP2 branch code compile after
   5         igen signature changes.
   6
   7 end-sanitize-sky
   8 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   9
  10         * mips.igen (DSRAV): Use function do_dsrav.
  11         (SRAV): Use new function do_srav.
  12
  13         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
  14         (B): Sign extend 11 bit immediate.
  15         (EXT-B*): Shift 16 bit immediate left by 1.
  16         (ADDIU*): Don't sign extend immediate value.
  17
  18 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  19
  20         * m16run.c (sim_engine_run): Restore CIA after handling an event.
  21
  22 start-sanitize-tx19
  23         * mips.igen (mtc0): Valid tx19 instruction.
  24
  25 end-sanitize-tx19
  26         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
  27         functions.
  28
  29         * mips.igen (delayslot32, nullify_next_insn): New functions.
  30         (m16.igen): Always include.
  31         (do_*): Add more tracing.
  32
  33         * m16.igen (delayslot16): Add NIA argument, could be called by a
  34         32 bit MIPS16 instruction.
  35
  36         * interp.c (ifetch16): Move function from here.
  37         * sim-main.c (ifetch16): To here.
  38
  39         * sim-main.c (ifetch16, ifetch32): Update to match current
  40         implementations of LH, LW.
  41         (signal_exception): Don't print out incorrect hex value of illegal
  42         instruction.
  43
  44 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  45
  46         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
  47         instruction.
  48
  49         * m16.igen: Implement MIPS16 instructions.
  50
  51         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
  52         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
  53         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
  54         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
  55         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
  56         bodies of corresponding code from 32 bit insn to these.  Also used
  57         by MIPS16 versions of functions.
  58
  59         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
  60         (IMEM16): Drop NR argument from macro.
  61
  62 start-sanitize-sky
  63 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
  64
  65         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
  66         of VU lower instruction.
  67
  68 end-sanitize-sky
  69 start-sanitize-sky
  70 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
  71
  72         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
  73         instead of QUADWORD.
  74
  75         * sim-main.h: Removed attempt at allowing 128-bit access.
  76
  77 end-sanitize-sky
  78 start-sanitize-sky
  79 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
  80
  81         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
  82
  83         * interp.c (decode_coproc): Refer to VU CIA as a "special"
  84         register, not as a "misc" register.  Aha.  Add activity
  85         assertions after VCALLMS* instructions.
  86
  87 end-sanitize-sky
  88 start-sanitize-sky
  89 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
  90
  91         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
  92         to upper code of generated VU instruction.
  93
  94 end-sanitize-sky
  95 start-sanitize-sky
  96 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
  97
  98         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
  99
 100         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 101         for TARGET_SKY.
 102
 103         * r5900.igen (SQC2): Thinko.
 104
 105 end-sanitize-sky
 106 start-sanitize-sky
 107 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 108
 109         * interp.c (*): Adapt code to merged VU device & state structs.
 110         (decode_coproc): Execute COP2 each macroinstruction without
 111         pipelining, by stepping VU to completion state.  Adapted to
 112         read_vu_*_reg style of register access.
 113
 114         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 115
 116         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 117
 118         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 119
 120 end-sanitize-sky
 121 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 122
 123         * Makefile.in (SIM_OBJS): Add sim-main.o.
 124
 125         * sim-main.h (address_translation, load_memory, store_memory,
 126         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 127         as INLINE_SIM_MAIN.
 128         (pr_addr, pr_uword64): Declare.
 129         (sim-main.c): Include when H_REVEALS_MODULE_P.
 130
 131         * interp.c (address_translation, load_memory, store_memory,
 132         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 133         from here.
 134         * sim-main.c: To here. Fix compilation problems.
 135
 136         * configure.in: Enable inlining.
 137         * configure: Re-config.
 138
 139 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 140
 141         * configure: Regenerated to track ../common/aclocal.m4 changes.
 142
 143 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 144
 145         * mips.igen: Include tx.igen.
 146         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 147         * tx.igen: New file, contains MADD and MADDU.
 148
 149         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 150         the hardwired constant `7'.
 151         (store_memory): Ditto.
 152         (LOADDRMASK): Move definition to sim-main.h.
 153
 154         mips.igen (MTC0): Enable for r3900.
 155         (ADDU): Add trace.
 156
 157         mips.igen (do_load_byte): Delete.
 158         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 159         do_store_right): New functions.
 160         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 161
 162         configure.in: Let the tx39 use igen again.
 163         configure: Update.
 164
 165 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 166
 167         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 168         not an address sized quantity.  Return zero for cache sizes.
 169
 170 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 171
 172         * mips.igen (r3900): r3900 does not support 64 bit integer
 173         operations.
 174
 175 start-sanitize-sky
 176 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 177
 178         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 179
 180 end-sanitize-sky
 181 start-sanitize-sky
 182 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 183
 184         * interp.c (decode_coproc): Continuing COP2 work.
 185         (cop_[ls]q): Make sky-target-only.
 186
 187         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 188 end-sanitize-sky
 189 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 190
 191         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 192         than igen one.
 193         * configure : Rebuild.
 194
 195 start-sanitize-sky
 196 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 197
 198         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 199         around COP2 implementation skeleton.
 200
 201 end-sanitize-sky
 202 start-sanitize-sky
 203 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 204
 205         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 206
 207         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 208         static to access VU registers.
 209         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 210         decoding.  Work in progress.
 211
 212         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 213         overlapping/redundant bit pattern.
 214         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 215         progress.
 216
 217         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 218         status register.
 219
 220         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 221         access to coprocessor registers.
 222
 223         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 224 end-sanitize-sky
 225 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 226
 227         * configure: Regenerated to track ../common/aclocal.m4 changes.
 228
 229 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 230
 231         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 232
 233 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 234
 235         * configure: Regenerated to track ../common/aclocal.m4 changes.
 236         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 237
 238 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 239
 240         * configure: Regenerated to track ../common/aclocal.m4 changes.
 241
 242 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * interp.c (Max, Min): Comment out functions. Not yet used.
 245
 246 start-sanitize-vr4320
 247 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 248
 249         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 250
 251 end-sanitize-vr4320
 252 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 253
 254         * configure: Regenerated to track ../common/aclocal.m4 changes.
 255
 256 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 257
 258         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 259         configurable settings for stand-alone simulator.
 260
 261 start-sanitize-sky
 262         * configure.in: Added --with-sim-gpu2 option to specify path of
 263         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 264         links/compiles stand-alone simulator with this library.
 265
 266         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 267 end-sanitize-sky
 268         * configure.in: Added X11 search, just in case.
 269
 270         * configure: Regenerated.
 271
 272 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 273
 274         * interp.c (sim_write, sim_read, load_memory, store_memory):
 275         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 276
 277 start-sanitize-vr4320
 278 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 279
 280         * vr4320.igen (clz,dclz) : Added.
 281         (dmac): Replaced 99, with LO.
 282
 283 end-sanitize-vr4320
 284 start-sanitize-vr5400
 285 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 286
 287         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 288
 289 end-sanitize-vr5400
 290 start-sanitize-vr4320
 291 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 292
 293         * vr4320.igen: New file.
 294         * Makefile.in (vr4320.igen) : Added.
 295         * configure.in (mips64vr4320-*-*): Added.
 296         * configure : Rebuilt.
 297         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 298         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 299
 300 end-sanitize-vr4320
 301 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 302
 303         * sim-main.h (GETFCC): Return an unsigned value.
 304
 305 start-sanitize-r5900
 306         * r5900.igen: Use an unsigned array index variable `i'.
 307         (QFSRV): Ditto for variable bytes.
 308
 309 end-sanitize-r5900
 310 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 311
 312         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 313         (DADD): Result destination is RD not RT.
 314
 315 start-sanitize-r5900
 316         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 317         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 318         divide.
 319
 320 end-sanitize-r5900
 321 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 322
 323         * sim-main.h (HIACCESS, LOACCESS): Always define.
 324
 325         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 326
 327         * interp.c (sim_info): Delete.
 328
 329 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 330
 331         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 332         (mips_option_handler): New argument `cpu'.
 333         (sim_open): Update call to sim_add_option_table.
 334
 335 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 336
 337         * mips.igen (CxC1): Add tracing.
 338
 339 start-sanitize-r5900
 340 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 341
 342         * r5900.igen (StoreFP): Delete.
 343         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 344         New functions.
 345         (rsqrt.s, sqrt.s): Implement.
 346         (r59cond): New function.
 347         (C.COND.S): Call r59cond in assembler line.
 348         (cvt.w.s, cvt.s.w): Implement.
 349
 350         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 351         instruction set.
 352
 353         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 354
 355 end-sanitize-r5900
 356 start-sanitize-r5900
 357 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 358
 359         * r5900.igen: Add tracing to all p* instructions.
 360
 361 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 362
 363         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 364         to get gdb talking to re-aranged sim_cpu register structure.
 365
 366 end-sanitize-r5900
 367 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * sim-main.h (Max, Min): Declare.
 370
 371         * interp.c (Max, Min): New functions.
 372
 373         * mips.igen (BC1): Add tracing.
 374
 375 start-sanitize-vr5400
 376 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 377
 378         * mdmx.igen: Tag all functions as requiring either with mdmx or
 379         vr5400 processor.
 380
 381 end-sanitize-vr5400
 382 start-sanitize-r5900
 383 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 384
 385         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 386         to 32.
 387         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 388
 389         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 390
 391         * r5900.igen: Rewrite.
 392
 393         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 394         struct.
 395         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 396         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 397
 398 end-sanitize-r5900
 399 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 400
 401         * interp.c Added memory map for stack in vr4100
 402
 403 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 404
 405         * interp.c (load_memory): Add missing "break"'s.
 406
 407 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 408
 409         * interp.c (sim_store_register, sim_fetch_register): Pass in
 410         length parameter.  Return -1.
 411
 412 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 413
 414         * interp.c: Added hardware init hook, fixed warnings.
 415
 416 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 417
 418         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 419
 420 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 421
 422         * interp.c (ifetch16): New function.
 423
 424         * sim-main.h (IMEM32): Rename IMEM.
 425         (IMEM16_IMMED): Define.
 426         (IMEM16): Define.
 427         (DELAY_SLOT): Update.
 428
 429         * m16run.c (sim_engine_run): New file.
 430
 431         * m16.igen: All instructions except LB.
 432         (LB): Call do_load_byte.
 433         * mips.igen (do_load_byte): New function.
 434         (LB): Call do_load_byte.
 435
 436         * mips.igen: Move spec for insn bit size and high bit from here.
 437         * Makefile.in (tmp-igen, tmp-m16): To here.
 438
 439         * m16.dc: New file, decode mips16 instructions.
 440
 441         * Makefile.in (SIM_NO_ALL): Define.
 442         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 443
 444 start-sanitize-tx19
 445         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 446         set.
 447
 448 end-sanitize-tx19
 449 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 450
 451         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 452         point unit to 32 bit registers.
 453         * configure: Re-generate.
 454
 455 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 456
 457         * configure.in (sim_use_gen): Make IGEN the default simulator
 458         generator for generic 32 and 64 bit mips targets.
 459         * configure: Re-generate.
 460
 461 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 462
 463         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 464         bitsize.
 465
 466         * interp.c (sim_fetch_register, sim_store_register): Read/write
 467         FGR from correct location.
 468         (sim_open): Set size of FGR's according to
 469         WITH_TARGET_FLOATING_POINT_BITSIZE.
 470
 471         * sim-main.h (FGR): Store floating point registers in a separate
 472         array.
 473
 474 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 475
 476         * configure: Regenerated to track ../common/aclocal.m4 changes.
 477
 478 start-sanitize-vr5400
 479         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 480
 481 end-sanitize-vr5400
 482 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 483
 484         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 485
 486         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 487
 488         * interp.c (pending_tick): New function.  Deliver pending writes.
 489
 490         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 491         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 492         it can handle mixed sized quantites and single bits.
 493
 494 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 495
 496         * interp.c (oengine.h): Do not include when building with IGEN.
 497         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 498         (sim_info): Ditto for PROCESSOR_64BIT.
 499         (sim_monitor): Replace ut_reg with unsigned_word.
 500         (*): Ditto for t_reg.
 501         (LOADDRMASK): Define.
 502         (sim_open): Remove defunct check that host FP is IEEE compliant,
 503         using software to emulate floating point.
 504         (value_fpr, ...): Always compile, was conditional on HASFPU.
 505
 506 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 507
 508         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 509         size.
 510
 511         * interp.c (SD, CPU): Define.
 512         (mips_option_handler): Set flags in each CPU.
 513         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 514         (sim_close): Do not clear STATE, deleted anyway.
 515         (sim_write, sim_read): Assume CPU zero's vm should be used for
 516         data transfers.
 517         (sim_create_inferior): Set the PC for all processors.
 518         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 519         argument.
 520         (mips16_entry): Pass correct nr of args to store_word, load_word.
 521         (ColdReset): Cold reset all cpu's.
 522         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 523         (sim_monitor, load_memory, store_memory, signal_exception): Use
 524         `CPU' instead of STATE_CPU.
 525
 526
 527         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 528         SD or CPU_.
 529
 530         * sim-main.h (signal_exception): Add sim_cpu arg.
 531         (SignalException*): Pass both SD and CPU to signal_exception.
 532         * interp.c (signal_exception): Update.
 533
 534         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 535         Ditto
 536         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 537         address_translation): Ditto
 538         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 539
 540 start-sanitize-vr5400
 541         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 542         `sd'.
 543         (ByteAlign): Use StoreFPR, pass args in correct order.
 544
 545 end-sanitize-vr5400
 546 start-sanitize-r5900
 547 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 548
 549         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 550
 551 end-sanitize-r5900
 552 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 553
 554         * configure: Regenerated to track ../common/aclocal.m4 changes.
 555
 556 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 557
 558 start-sanitize-r5900
 559         * configure.in (sim_igen_filter): For r5900, use igen.
 560         * configure: Re-generate.
 561
 562 end-sanitize-r5900
 563         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 564
 565         * mips.igen (model): Map processor names onto BFD name.
 566
 567         * sim-main.h (CPU_CIA): Delete.
 568         (SET_CIA, GET_CIA): Define
 569
 570 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 571
 572         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 573         regiser.
 574
 575         * configure.in (default_endian): Configure a big-endian simulator
 576         by default.
 577         * configure: Re-generate.
 578
 579 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 580
 581         * configure: Regenerated to track ../common/aclocal.m4 changes.
 582
 583 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 584
 585         * interp.c (sim_monitor): Handle Densan monitor outbyte
 586         and inbyte functions.
 587
 588 1997-12-29  Felix Lee  <flee@cygnus.com>
 589
 590         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 591
 592 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 593
 594         * Makefile.in (tmp-igen): Arrange for $zero to always be
 595         reset to zero after every instruction.
 596
 597 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 598
 599         * configure: Regenerated to track ../common/aclocal.m4 changes.
 600         * config.in: Ditto.
 601
 602 start-sanitize-vr5400
 603 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 604
 605         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 606         bit values.
 607
 608 end-sanitize-vr5400
 609 start-sanitize-vr5400
 610 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 611
 612         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 613         vr5400 with the vr5000 as the default.
 614
 615 end-sanitize-vr5400
 616 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 617
 618         * mips.igen (MSUB): Fix to work like MADD.
 619         * gencode.c (MSUB): Similarly.
 620
 621 start-sanitize-vr5400
 622 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 623
 624         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 625         vr5400.
 626
 627 end-sanitize-vr5400
 628 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 629
 630         * configure: Regenerated to track ../common/aclocal.m4 changes.
 631
 632 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 633
 634         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 635
 636 start-sanitize-vr5400
 637         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 638         (value_cc, store_cc): Implement.
 639
 640         * sim-main.h: Add 8*3*8 bit accumulator.
 641
 642         * vr5400.igen: Move mdmx instructins from here
 643         * mdmx.igen: To here - new file. Add/fix missing instructions.
 644         * mips.igen: Include mdmx.igen.
 645         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 646
 647 end-sanitize-vr5400
 648 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 649
 650         * sim-main.h (sim-fpu.h): Include.
 651
 652         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 653         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 654         using host independant sim_fpu module.
 655
 656 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 657
 658         * interp.c (signal_exception): Report internal errors with SIGABRT
 659         not SIGQUIT.
 660
 661         * sim-main.h (C0_CONFIG): New register.
 662         (signal.h): No longer include.
 663
 664         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 665
 666 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 667
 668         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 669
 670 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 671
 672         * mips.igen: Tag vr5000 instructions.
 673         (ANDI): Was missing mipsIV model, fix assembler syntax.
 674         (do_c_cond_fmt): New function.
 675         (C.cond.fmt): Handle mips I-III which do not support CC field
 676         separatly.
 677         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 678         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 679         in IV3.2 spec.
 680         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 681         vr5000 which saves LO in a GPR separatly.
 682
 683         * configure.in (enable-sim-igen): For vr5000, select vr5000
 684         specific instructions.
 685         * configure: Re-generate.
 686
 687 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 688
 689         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 690
 691         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 692         fmt_uninterpreted_64 bit cases to switch.  Convert to
 693         fmt_formatted,
 694
 695         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 696
 697         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 698         as specified in IV3.2 spec.
 699         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 700
 701 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 702
 703         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 704         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 705         (start-sanitize-r5900):
 706         (LWXC1, SWXC1): Delete from r5900 instruction set.
 707         (end-sanitize-r5900):
 708         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 709         PENDING_FILL versions of instructions.  Simplify.
 710         (X): New function.
 711         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 712         instructions.
 713         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 714         a signed value.
 715         (MTHI, MFHI): Disable code checking HI-LO.
 716
 717         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 718         global.
 719         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 720
 721 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 722
 723         * gencode.c (build_mips16_operands): Replace IPC with cia.
 724
 725         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 726         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 727         IPC to `cia'.
 728         (UndefinedResult): Replace function with macro/function
 729         combination.
 730         (sim_engine_run): Don't save PC in IPC.
 731
 732         * sim-main.h (IPC): Delete.
 733
 734         start-sanitize-vr5400
 735         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 736         (do_select): Rename function select.
 737         end-sanitize-vr5400
 738
 739         * interp.c (signal_exception, store_word, load_word,
 740         address_translation, load_memory, store_memory, cache_op,
 741         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 742         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 743         current instruction address - cia - argument.
 744         (sim_read, sim_write): Call address_translation directly.
 745         (sim_engine_run): Rename variable vaddr to cia.
 746         (signal_exception): Pass cia to sim_monitor
 747
 748         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 749         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 750         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 751
 752         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 753         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 754         SIM_ASSERT.
 755
 756         * interp.c (signal_exception): Pass restart address to
 757         sim_engine_restart.
 758
 759         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 760         idecode.o): Add dependency.
 761
 762         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 763         Delete definitions
 764         (DELAY_SLOT): Update NIA not PC with branch address.
 765         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 766
 767         * mips.igen: Use CIA not PC in branch calculations.
 768         (illegal): Call SignalException.
 769         (BEQ, ADDIU): Fix assembler.
 770
 771 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * m16.igen (JALX): Was missing.
 774
 775         * configure.in (enable-sim-igen): New configuration option.
 776         * configure: Re-generate.
 777
 778         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 779
 780         * interp.c (load_memory, store_memory): Delete parameter RAW.
 781         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 782         bypassing {load,store}_memory.
 783
 784         * sim-main.h (ByteSwapMem): Delete definition.
 785
 786         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 787
 788         * interp.c (sim_do_command, sim_commands): Delete mips specific
 789         commands.  Handled by module sim-options.
 790
 791         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 792         (WITH_MODULO_MEMORY): Define.
 793
 794         * interp.c (sim_info): Delete code printing memory size.
 795
 796         * interp.c (mips_size): Nee sim_size, delete function.
 797         (power2): Delete.
 798         (monitor, monitor_base, monitor_size): Delete global variables.
 799         (sim_open, sim_close): Delete code creating monitor and other
 800         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 801         manage memory regions.
 802         (load_memory, store_memory): Use sim-core for memory model.
 803
 804         * interp.c (address_translation): Delete all memory map code
 805         except line forcing 32 bit addresses.
 806
 807 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 808
 809         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 810         trace options.
 811
 812         * interp.c (logfh, logfile): Delete globals.
 813         (sim_open, sim_close): Delete code opening & closing log file.
 814         (mips_option_handler): Delete -l and -n options.
 815         (OPTION mips_options): Ditto.
 816
 817         * interp.c (OPTION mips_options): Rename option trace to dinero.
 818         (mips_option_handler): Update.
 819
 820 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 821
 822         * interp.c (fetch_str): New function.
 823         (sim_monitor): Rewrite using sim_read & sim_write.
 824         (sim_open): Check magic number.
 825         (sim_open): Write monitor vectors into memory using sim_write.
 826         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 827         (sim_read, sim_write): Simplify - transfer data one byte at a
 828         time.
 829         (load_memory, store_memory): Clarify meaning of parameter RAW.
 830
 831         * sim-main.h (isHOST): Defete definition.
 832         (isTARGET): Mark as depreciated.
 833         (address_translation): Delete parameter HOST.
 834
 835         * interp.c (address_translation): Delete parameter HOST.
 836
 837 start-sanitize-tx49
 838 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 839
 840         * gencode.c: Add tx49 configury and insns.
 841         * configure.in: Add tx49 configury.
 842         * configure: Update.
 843
 844 end-sanitize-tx49
 845 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 846
 847         * mips.igen:
 848
 849         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 850         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 851
 852 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 853
 854         * mips.igen: Add model filter field to records.
 855
 856 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 857
 858         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 859
 860         interp.c (sim_engine_run): Do not compile function sim_engine_run
 861         when WITH_IGEN == 1.
 862
 863         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 864         target architecture.
 865
 866         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 867         igen. Replace with configuration variables sim_igen_flags /
 868         sim_m16_flags.
 869
 870         start-sanitize-r5900
 871         * r5900.igen: New file. Copy r5900 insns here.
 872         end-sanitize-r5900
 873         start-sanitize-vr5400
 874         * vr5400.igen: New file.
 875         end-sanitize-vr5400
 876         * m16.igen: New file.  Copy mips16 insns here.
 877         * mips.igen: From here.
 878
 879 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         start-sanitize-vr5400
 882         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 883
 884         * configure.in: Add mips64vr5400 target.
 885         * configure: Re-generate.
 886
 887         end-sanitize-vr5400
 888         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 889         to top.
 890         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 891
 892 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 893
 894         * gencode.c (build_instruction): Follow sim_write's lead in using
 895         BigEndianMem instead of !ByteSwapMem.
 896
 897 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 898
 899         * configure.in (sim_gen): Dependent on target, select type of
 900         generator.  Always select old style generator.
 901
 902         configure: Re-generate.
 903
 904         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 905         targets.
 906         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 907         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 908         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 909         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 910         SIM_@sim_gen@_*, set by autoconf.
 911
 912 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 913
 914         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 915
 916         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 917         CURRENT_FLOATING_POINT instead.
 918
 919         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 920         (address_translation): Raise exception InstructionFetch when
 921         translation fails and isINSTRUCTION.
 922
 923         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 924         sim_engine_run): Change type of of vaddr and paddr to
 925         address_word.
 926         (address_translation, prefetch, load_memory, store_memory,
 927         cache_op): Change type of vAddr and pAddr to address_word.
 928
 929         * gencode.c (build_instruction): Change type of vaddr and paddr to
 930         address_word.
 931
 932 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 933
 934         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 935         macro to obtain result of ALU op.
 936
 937 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 938
 939         * interp.c (sim_info): Call profile_print.
 940
 941 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 942
 943         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 944
 945         * sim-main.h (WITH_PROFILE): Do not define, defined in
 946         common/sim-config.h.  Use sim-profile module.
 947         (simPROFILE): Delete defintion.
 948
 949         * interp.c (PROFILE): Delete definition.
 950         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 951         (sim_close): Delete code writing profile histogram.
 952         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 953         Delete.
 954         (sim_engine_run): Delete code profiling the PC.
 955
 956 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 957
 958         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 959
 960         * interp.c (sim_monitor): Make register pointers of type
 961         unsigned_word*.
 962
 963         * sim-main.h: Make registers of type unsigned_word not
 964         signed_word.
 965
 966 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968 start-sanitize-r5900
 969         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 970         ...): Move to sim-main.h
 971
 972 end-sanitize-r5900
 973         * interp.c (sync_operation): Rename from SyncOperation, make
 974         global, add SD argument.
 975         (prefetch): Rename from Prefetch, make global, add SD argument.
 976         (decode_coproc): Make global.
 977
 978         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 979
 980         * gencode.c (build_instruction): Generate DecodeCoproc not
 981         decode_coproc calls.
 982
 983         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 984         (SizeFGR): Move to sim-main.h
 985         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 986         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 987         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 988         sim-main.h.
 989         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 990         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 991         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 992         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 993         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 994         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 995
 996         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 997         exception.
 998         (sim-alu.h): Include.
 999         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1000         (sim_cia): Typedef to instruction_address.
1001
1002 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1003
1004         * Makefile.in (interp.o): Rename generated file engine.c to
1005         oengine.c.
1006
1007         * interp.c: Update.
1008
1009 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1010
1011         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1012
1013 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1014
1015         * gencode.c (build_instruction): For "FPSQRT", output correct
1016         number of arguments to Recip.
1017
1018 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1019
1020         * Makefile.in (interp.o): Depends on sim-main.h
1021
1022         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1023
1024         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1025         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1026         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1027         STATE, DSSTATE): Define
1028         (GPR, FGRIDX, ..): Define.
1029
1030         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1031         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1032         (GPR, FGRIDX, ...): Delete macros.
1033
1034         * interp.c: Update names to match defines from sim-main.h
1035
1036 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1037
1038         * interp.c (sim_monitor): Add SD argument.
1039         (sim_warning): Delete.  Replace calls with calls to
1040         sim_io_eprintf.
1041         (sim_error): Delete. Replace calls with sim_io_error.
1042         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1043         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1044         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1045         argument.
1046         (mips_size): Rename from sim_size. Add SD argument.
1047
1048         * interp.c (simulator): Delete global variable.
1049         (callback): Delete global variable.
1050         (mips_option_handler, sim_open, sim_write, sim_read,
1051         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1052         sim_size,sim_monitor): Use sim_io_* not callback->*.
1053         (sim_open): ZALLOC simulator struct.
1054         (PROFILE): Do not define.
1055
1056 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1057
1058         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1059         support.h with corresponding code.
1060
1061         * sim-main.h (word64, uword64), support.h: Move definition to
1062         sim-main.h.
1063         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1064
1065         * support.h: Delete
1066         * Makefile.in: Update dependencies
1067         * interp.c: Do not include.
1068
1069 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1070
1071         * interp.c (address_translation, load_memory, store_memory,
1072         cache_op): Rename to from AddressTranslation et.al., make global,
1073         add SD argument
1074
1075         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1076         CacheOp): Define.
1077
1078         * interp.c (SignalException): Rename to signal_exception, make
1079         global.
1080
1081         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1082
1083         * sim-main.h (SignalException, SignalExceptionInterrupt,
1084         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1085         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1086         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1087         Define.
1088
1089         * interp.c, support.h: Use.
1090
1091 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1092
1093         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1094         to value_fpr / store_fpr. Add SD argument.
1095         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1096         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1097
1098         * sim-main.h (ValueFPR, StoreFPR): Define.
1099
1100 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1101
1102         * interp.c (sim_engine_run): Check consistency between configure
1103         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1104         and HASFPU.
1105
1106         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1107         (mips_fpu): Configure WITH_FLOATING_POINT.
1108         (mips_endian): Configure WITH_TARGET_ENDIAN.
1109         * configure: Update.
1110
1111 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1112
1113         * configure: Regenerated to track ../common/aclocal.m4 changes.
1114
1115 start-sanitize-r5900
1116 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1117
1118         * interp.c (MAX_REG): Allow up-to 128 registers.
1119         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1120         (REGISTER_SA): Ditto.
1121         (sim_open): Initialize register_widths for r5900 specific
1122         registers.
1123         (sim_fetch_register, sim_store_register): Check for request of
1124         r5900 specific SA register.  Check for request for hi 64 bits of
1125         r5900 specific registers.
1126
1127 end-sanitize-r5900
1128 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1129
1130         * configure: Regenerated.
1131
1132 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1133
1134         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1135
1136 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1137
1138         * gencode.c (print_igen_insn_models): Assume certain architectures
1139         include all mips* instructions.
1140         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1141         instruction.
1142
1143         * Makefile.in (tmp.igen): Add target. Generate igen input from
1144         gencode file.
1145
1146         * gencode.c (FEATURE_IGEN): Define.
1147         (main): Add --igen option.  Generate output in igen format.
1148         (process_instructions): Format output according to igen option.
1149         (print_igen_insn_format): New function.
1150         (print_igen_insn_models): New function.
1151         (process_instructions): Only issue warnings and ignore
1152         instructions when no FEATURE_IGEN.
1153
1154 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1155
1156         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1157         MIPS targets.
1158
1159 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1160
1161         * configure: Regenerated to track ../common/aclocal.m4 changes.
1162
1163 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1164
1165         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1166         SIM_RESERVED_BITS): Delete, moved to common.
1167         (SIM_EXTRA_CFLAGS): Update.
1168
1169 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1170
1171         * configure.in: Configure non-strict memory alignment.
1172         * configure: Regenerated to track ../common/aclocal.m4 changes.
1173
1174 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1175
1176         * configure: Regenerated to track ../common/aclocal.m4 changes.
1177
1178 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1179
1180         * gencode.c (SDBBP,DERET): Added (3900) insns.
1181         (RFE): Turn on for 3900.
1182         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1183         (dsstate): Made global.
1184         (SUBTARGET_R3900): Added.
1185         (CANCELDELAYSLOT): New.
1186         (SignalException): Ignore SystemCall rather than ignore and
1187         terminate.  Add DebugBreakPoint handling.
1188         (decode_coproc): New insns RFE, DERET; and new registers Debug
1189         and DEPC protected by SUBTARGET_R3900.
1190         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1191         bits explicitly.
1192         * Makefile.in,configure.in: Add mips subtarget option.
1193         * configure: Update.
1194
1195 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1196
1197         * gencode.c: Add r3900 (tx39).
1198
1199 start-sanitize-tx19
1200         * gencode.c: Fix some configuration problems by improving
1201         the relationship between tx19 and tx39.
1202 end-sanitize-tx19
1203
1204 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1205
1206         * gencode.c (build_instruction): Don't need to subtract 4 for
1207         JALR, just 2.
1208
1209 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1210
1211         * interp.c: Correct some HASFPU problems.
1212
1213 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1214
1215         * configure: Regenerated to track ../common/aclocal.m4 changes.
1216
1217 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1218
1219         * interp.c (mips_options): Fix samples option short form, should
1220         be `x'.
1221
1222 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1223
1224         * interp.c (sim_info): Enable info code.  Was just returning.
1225
1226 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1227
1228         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1229         MFC0.
1230
1231 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1232
1233         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1234         constants.
1235         (build_instruction): Ditto for LL.
1236
1237 start-sanitize-tx19
1238 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1239
1240         * mips/configure.in, mips/gencode: Add tx19/r1900.
1241
1242 end-sanitize-tx19
1243 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1244
1245         * configure: Regenerated to track ../common/aclocal.m4 changes.
1246
1247 start-sanitize-r5900
1248 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1249
1250         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1251         for overflow due to ABS of MININT, set result to MAXINT.
1252         (build_instruction): For "psrlvw", signextend bit 31.
1253
1254 end-sanitize-r5900
1255 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1256
1257         * configure: Regenerated to track ../common/aclocal.m4 changes.
1258         * config.in: Ditto.
1259
1260 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1261
1262         * interp.c (sim_open): Add call to sim_analyze_program, update
1263         call to sim_config.
1264
1265 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1266
1267         * interp.c (sim_kill): Delete.
1268         (sim_create_inferior): Add ABFD argument. Set PC from same.
1269         (sim_load): Move code initializing trap handlers from here.
1270         (sim_open): To here.
1271         (sim_load): Delete, use sim-hload.c.
1272
1273         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1274
1275 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1276
1277         * configure: Regenerated to track ../common/aclocal.m4 changes.
1278         * config.in: Ditto.
1279
1280 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1281
1282         * interp.c (sim_open): Add ABFD argument.
1283         (sim_load): Move call to sim_config from here.
1284         (sim_open): To here.  Check return status.
1285
1286 start-sanitize-r5900
1287         * gencode.c (build_instruction): Do not define x8000000000000000,
1288         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1289
1290 end-sanitize-r5900
1291 start-sanitize-r5900
1292 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1293
1294         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1295         "pdivuw" check for overflow due to signed divide by -1.
1296
1297 end-sanitize-r5900
1298 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1299
1300         * gencode.c (build_instruction): Two arg MADD should
1301         not assign result to $0.
1302
1303 start-sanitize-r5900
1304 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1305
1306         * gencode.c (build_instruction): For "ppac5" use unsigned
1307         arrithmetic so that the sign bit doesn't smear when right shifted.
1308         (build_instruction): For "pdiv" perform sign extension when
1309         storing results in HI and LO.
1310         (build_instructions): For "pdiv" and "pdivbw" check for
1311         divide-by-zero.
1312         (build_instruction): For "pmfhl.slw" update hi part of dest
1313         register as well as low part.
1314         (build_instruction): For "pmfhl" portably handle long long values.
1315         (build_instruction): For "pmfhl.sh" correctly negative values.
1316         Store half words 2 and three in the correct place.
1317         (build_instruction): For "psllvw", sign extend value after shift.
1318
1319 end-sanitize-r5900
1320 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1321
1322         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1323         * sim/mips/configure.in: Regenerate.
1324
1325 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1326
1327         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1328         signed8, unsigned8 et.al. types.
1329
1330 start-sanitize-r5900
1331         * gencode.c (build_instruction): For PMULTU* do not sign extend
1332         registers.  Make generated code easier to debug.
1333
1334 end-sanitize-r5900
1335         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1336         hosts when selecting subreg.
1337
1338 start-sanitize-r5900
1339 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1340
1341         * gencode.c (type_for_data_len): For 32bit operations concerned
1342         with overflow, perform op using 64bits.
1343         (build_instruction): For PADD, always compute operation using type
1344         returned by type_for_data_len.
1345         (build_instruction): For PSUBU, when overflow, saturate to zero as
1346         actually underflow.
1347
1348 end-sanitize-r5900
1349 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1350
1351 start-sanitize-r5900
1352         * gencode.c (build_instruction): Handle "pext5" according to
1353         version 1.95 of the r5900 ISA.
1354
1355         * gencode.c (build_instruction): Handle "ppac5" according to
1356         version 1.95 of the r5900 ISA.
1357
1358 end-sanitize-r5900
1359         * interp.c (sim_engine_run): Reset the ZERO register to zero
1360         regardless of FEATURE_WARN_ZERO.
1361         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1362
1363 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1364
1365         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1366         (SignalException): For BreakPoints ignore any mode bits and just
1367         save the PC.
1368         (SignalException): Always set the CAUSE register.
1369
1370 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1371
1372         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1373         exception has been taken.
1374
1375         * interp.c: Implement the ERET and mt/f sr instructions.
1376
1377 start-sanitize-r5900
1378 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1379
1380         * gencode.c (build_instruction): For paddu, extract unsigned
1381         sub-fields.
1382
1383         * gencode.c (build_instruction): Saturate padds instead of padd
1384         instructions.
1385
1386 end-sanitize-r5900
1387 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1388
1389         * interp.c (SignalException): Don't bother restarting an
1390         interrupt.
1391
1392 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1393
1394         * interp.c (SignalException): Really take an interrupt.
1395         (interrupt_event): Only deliver interrupts when enabled.
1396
1397 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1398
1399         * interp.c (sim_info): Only print info when verbose.
1400         (sim_info) Use sim_io_printf for output.
1401
1402 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1403
1404         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1405         mips architectures.
1406
1407 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1408
1409         * interp.c (sim_do_command): Check for common commands if a
1410         simulator specific command fails.
1411
1412 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1413
1414         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1415         and simBE when DEBUG is defined.
1416
1417 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1418
1419         * interp.c (interrupt_event): New function.  Pass exception event
1420         onto exception handler.
1421
1422         * configure.in: Check for stdlib.h.
1423         * configure: Regenerate.
1424
1425         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1426         variable declaration.
1427         (build_instruction): Initialize memval1.
1428         (build_instruction): Add UNUSED attribute to byte, bigend,
1429         reverse.
1430         (build_operands): Ditto.
1431
1432         * interp.c: Fix GCC warnings.
1433         (sim_get_quit_code): Delete.
1434
1435         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1436         * Makefile.in: Ditto.
1437         * configure: Re-generate.
1438
1439         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1440
1441 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1442
1443         * interp.c (mips_option_handler): New function parse argumes using
1444         sim-options.
1445         (myname): Replace with STATE_MY_NAME.
1446         (sim_open): Delete check for host endianness - performed by
1447         sim_config.
1448         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1449         (sim_open): Move much of the initialization from here.
1450         (sim_load): To here.  After the image has been loaded and
1451         endianness set.
1452         (sim_open): Move ColdReset from here.
1453         (sim_create_inferior): To here.
1454         (sim_open): Make FP check less dependant on host endianness.
1455
1456         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1457         run.
1458         * interp.c (sim_set_callbacks): Delete.
1459
1460         * interp.c (membank, membank_base, membank_size): Replace with
1461         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1462         (sim_open): Remove call to callback->init. gdb/run do this.
1463
1464         * interp.c: Update
1465
1466         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1467
1468         * interp.c (big_endian_p): Delete, replaced by
1469         current_target_byte_order.
1470
1471 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1472
1473         * interp.c (host_read_long, host_read_word, host_swap_word,
1474         host_swap_long): Delete. Using common sim-endian.
1475         (sim_fetch_register, sim_store_register): Use H2T.
1476         (pipeline_ticks): Delete.  Handled by sim-events.
1477         (sim_info): Update.
1478         (sim_engine_run): Update.
1479
1480 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1481
1482         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1483         reason from here.
1484         (SignalException): To here. Signal using sim_engine_halt.
1485         (sim_stop_reason): Delete, moved to common.
1486
1487 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1488
1489         * interp.c (sim_open): Add callback argument.
1490         (sim_set_callbacks): Delete SIM_DESC argument.
1491         (sim_size): Ditto.
1492
1493 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1494
1495         * Makefile.in (SIM_OBJS): Add common modules.
1496
1497         * interp.c (sim_set_callbacks): Also set SD callback.
1498         (set_endianness, xfer_*, swap_*): Delete.
1499         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1500         Change to functions using sim-endian macros.
1501         (control_c, sim_stop): Delete, use common version.
1502         (simulate): Convert into.
1503         (sim_engine_run): This function.
1504         (sim_resume): Delete.
1505
1506         * interp.c (simulation): New variable - the simulator object.
1507         (sim_kind): Delete global - merged into simulation.
1508         (sim_load): Cleanup.  Move PC assignment from here.
1509         (sim_create_inferior): To here.
1510
1511         * sim-main.h: New file.
1512         * interp.c (sim-main.h): Include.
1513
1514 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1515
1516         * configure: Regenerated to track ../common/aclocal.m4 changes.
1517
1518 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1519
1520         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1521
1522 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1523
1524         * gencode.c (build_instruction): DIV instructions: check
1525         for division by zero and integer overflow before using
1526         host's division operation.
1527
1528 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1529
1530         * Makefile.in (SIM_OBJS): Add sim-load.o.
1531         * interp.c: #include bfd.h.
1532         (target_byte_order): Delete.
1533         (sim_kind, myname, big_endian_p): New static locals.
1534         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1535         after argument parsing.  Recognize -E arg, set endianness accordingly.
1536         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1537         load file into simulator.  Set PC from bfd.
1538         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1539         (set_endianness): Use big_endian_p instead of target_byte_order.
1540
1541 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1542
1543         * interp.c (sim_size): Delete prototype - conflicts with
1544         definition in remote-sim.h.  Correct definition.
1545
1546 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1547
1548         * configure: Regenerated to track ../common/aclocal.m4 changes.
1549         * config.in: Ditto.
1550
1551 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1552
1553         * interp.c (sim_open): New arg `kind'.
1554
1555         * configure: Regenerated to track ../common/aclocal.m4 changes.
1556
1557 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1558
1559         * configure: Regenerated to track ../common/aclocal.m4 changes.
1560
1561 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1562
1563         * interp.c (sim_open): Set optind to 0 before calling getopt.
1564
1565 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1566
1567         * configure: Regenerated to track ../common/aclocal.m4 changes.
1568
1569 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1570
1571         * interp.c : Replace uses of pr_addr with pr_uword64
1572         where the bit length is always 64 independent of SIM_ADDR.
1573         (pr_uword64) : added.
1574
1575 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1576
1577         * configure: Re-generate.
1578
1579 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1580
1581         * configure: Regenerate to track ../common/aclocal.m4 changes.
1582
1583 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1584
1585         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1586         in argv form.
1587         (other sim_*): New SIM_DESC argument.
1588
1589 start-sanitize-r5900
1590 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1591
1592         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1593         Change values to avoid overloading DOUBLEWORD which is tested
1594         for all insns.
1595         * gencode.c: reinstate "offending code".
1596
1597 end-sanitize-r5900
1598 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1599
1600         * interp.c: Fix printing of addresses for non-64-bit targets.
1601         (pr_addr): Add function to print address based on size.
1602 start-sanitize-r5900
1603         * gencode.c: #ifdef out offending code until a permanent fix
1604         can be added.  Code is causing build errors for non-5900 mips targets.
1605 end-sanitize-r5900
1606
1607 start-sanitize-r5900
1608 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1609
1610         * gencode.c (process_instructions): Correct test for ISA dependent
1611         architecture bits in isa field of MIPS_DECODE.
1612
1613 end-sanitize-r5900
1614 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1615
1616         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1617
1618 start-sanitize-r5900
1619 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1620
1621         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1622         PMADDUW.
1623
1624 end-sanitize-r5900
1625 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1626
1627         * gencode.c (build_mips16_operands): Correct computation of base
1628         address for extended PC relative instruction.
1629
1630 start-sanitize-r5900
1631 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1632
1633         * Makefile.in, configure, configure.in, gencode.c,
1634         interp.c, support.h: add r5900.
1635
1636 end-sanitize-r5900
1637 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1638
1639         * interp.c (mips16_entry): Add support for floating point cases.
1640         (SignalException): Pass floating point cases to mips16_entry.
1641         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1642         registers.
1643         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1644         or fmt_word.
1645         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1646         and then set the state to fmt_uninterpreted.
1647         (COP_SW): Temporarily set the state to fmt_word while calling
1648         ValueFPR.
1649
1650 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1651
1652         * gencode.c (build_instruction): The high order may be set in the
1653         comparison flags at any ISA level, not just ISA 4.
1654
1655 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1656
1657         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1658         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1659         * configure.in: sinclude ../common/aclocal.m4.
1660         * configure: Regenerated.
1661
1662 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1663
1664         * configure: Rebuild after change to aclocal.m4.
1665
1666 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1667
1668         * configure configure.in Makefile.in:  Update to new configure
1669         scheme which is more compatible with WinGDB builds.
1670         * configure.in:  Improve comment on how to run autoconf.
1671         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1672         * Makefile.in:  Use autoconf substitution to install common
1673         makefile fragment.
1674
1675 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1676
1677         * gencode.c (build_instruction): Use BigEndianCPU instead of
1678         ByteSwapMem.
1679
1680 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1681
1682         * interp.c (sim_monitor): Make output to stdout visible in
1683         wingdb's I/O log window.
1684
1685 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1686
1687         * support.h: Undo previous change to SIGTRAP
1688         and SIGQUIT values.
1689
1690 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1691
1692         * interp.c (store_word, load_word): New static functions.
1693         (mips16_entry): New static function.
1694         (SignalException): Look for mips16 entry and exit instructions.
1695         (simulate): Use the correct index when setting fpr_state after
1696         doing a pending move.
1697
1698 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1699
1700         * interp.c: Fix byte-swapping code throughout to work on
1701         both little- and big-endian hosts.
1702
1703 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1704
1705         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1706         with gdb/config/i386/xm-windows.h.
1707
1708 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1709
1710         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1711         that messes up arithmetic shifts.
1712
1713 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1714
1715         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1716         SIGTRAP and SIGQUIT for _WIN32.
1717
1718 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1719
1720         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1721         force a 64 bit multiplication.
1722         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1723         destination register is 0, since that is the default mips16 nop
1724         instruction.
1725
1726 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1727
1728         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1729         (build_endian_shift): Don't check proc64.
1730         (build_instruction): Always set memval to uword64.  Cast op2 to
1731         uword64 when shifting it left in memory instructions.  Always use
1732         the same code for stores--don't special case proc64.
1733
1734         * gencode.c (build_mips16_operands): Fix base PC value for PC
1735         relative operands.
1736         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1737         jal instruction.
1738         * interp.c (simJALDELAYSLOT): Define.
1739         (JALDELAYSLOT): Define.
1740         (INDELAYSLOT, INJALDELAYSLOT): Define.
1741         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1742
1743 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1744
1745         * interp.c (sim_open): add flush_cache as a PMON routine
1746         (sim_monitor): handle flush_cache by ignoring it
1747
1748 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1749
1750         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1751         BigEndianMem.
1752         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1753         (BigEndianMem): Rename to ByteSwapMem and change sense.
1754         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1755         BigEndianMem references to !ByteSwapMem.
1756         (set_endianness): New function, with prototype.
1757         (sim_open): Call set_endianness.
1758         (sim_info): Use simBE instead of BigEndianMem.
1759         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1760         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1761         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1762         ifdefs, keeping the prototype declaration.
1763         (swap_word): Rewrite correctly.
1764         (ColdReset): Delete references to CONFIG.  Delete endianness related
1765         code; moved to set_endianness.
1766
1767 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1768
1769         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1770         * interp.c (CHECKHILO): Define away.
1771         (simSIGINT): New macro.
1772         (membank_size): Increase from 1MB to 2MB.
1773         (control_c): New function.
1774         (sim_resume): Rename parameter signal to signal_number.  Add local
1775         variable prev.  Call signal before and after simulate.
1776         (sim_stop_reason): Add simSIGINT support.
1777         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1778         functions always.
1779         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1780         if logfh is NULL.
1781         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1782         a call to sim_warning.
1783
1784 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1785
1786         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1787         16 bit instructions.
1788
1789 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1790
1791         Add support for mips16 (16 bit MIPS implementation):
1792         * gencode.c (inst_type): Add mips16 instruction encoding types.
1793         (GETDATASIZEINSN): Define.
1794         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1795         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1796         mtlo.
1797         (MIPS16_DECODE): New table, for mips16 instructions.
1798         (bitmap_val): New static function.
1799         (struct mips16_op): Define.
1800         (mips16_op_table): New table, for mips16 operands.
1801         (build_mips16_operands): New static function.
1802         (process_instructions): If PC is odd, decode a mips16
1803         instruction.  Break out instruction handling into new
1804         build_instruction function.
1805         (build_instruction): New static function, broken out of
1806         process_instructions.  Check modifiers rather than flags for SHIFT
1807         bit count and m[ft]{hi,lo} direction.
1808         (usage): Pass program name to fprintf.
1809         (main): Remove unused variable this_option_optind.  Change
1810         ``*loptarg++'' to ``loptarg++''.
1811         (my_strtoul): Parenthesize && within ||.
1812         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1813         (simulate): If PC is odd, fetch a 16 bit instruction, and
1814         increment PC by 2 rather than 4.
1815         * configure.in: Add case for mips16*-*-*.
1816         * configure: Rebuild.
1817
1818 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1819
1820         * interp.c: Allow -t to enable tracing in standalone simulator.
1821         Fix garbage output in trace file and error messages.
1822
1823 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1824
1825         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1826         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1827         * configure.in: Simplify using macros in ../common/aclocal.m4.
1828         * configure: Regenerated.
1829         * tconfig.in: New file.
1830
1831 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1832
1833         * interp.c: Fix bugs in 64-bit port.
1834         Use ansi function declarations for msvc compiler.
1835         Initialize and test file pointer in trace code.
1836         Prevent duplicate definition of LAST_EMED_REGNUM.
1837
1838 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1839
1840         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1841
1842 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1843
1844         * interp.c (SignalException): Check for explicit terminating
1845         breakpoint value.
1846         * gencode.c: Pass instruction value through SignalException()
1847         calls for Trap, Breakpoint and Syscall.
1848
1849 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1850
1851         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1852         only used on those hosts that provide it.
1853         * configure.in: Add sqrt() to list of functions to be checked for.
1854         * config.in: Re-generated.
1855         * configure: Re-generated.
1856
1857 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1858
1859         * gencode.c (process_instructions): Call build_endian_shift when
1860         expanding STORE RIGHT, to fix swr.
1861         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1862         clear the high bits.
1863         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1864         Fix float to int conversions to produce signed values.
1865
1866 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1867
1868         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1869         (process_instructions): Correct handling of nor instruction.
1870         Correct shift count for 32 bit shift instructions. Correct sign
1871         extension for arithmetic shifts to not shift the number of bits in
1872         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1873         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1874         Fix madd.
1875         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1876         It's OK to have a mult follow a mult.  What's not OK is to have a
1877         mult follow an mfhi.
1878         (Convert): Comment out incorrect rounding code.
1879
1880 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1881
1882         * interp.c (sim_monitor): Improved monitor printf
1883         simulation. Tidied up simulator warnings, and added "--log" option
1884         for directing warning message output.
1885         * gencode.c: Use sim_warning() rather than WARNING macro.
1886
1887 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1888
1889         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1890         getopt1.o, rather than on gencode.c.  Link objects together.
1891         Don't link against -liberty.
1892         (gencode.o, getopt.o, getopt1.o): New targets.
1893         * gencode.c: Include <ctype.h> and "ansidecl.h".
1894         (AND): Undefine after including "ansidecl.h".
1895         (ULONG_MAX): Define if not defined.
1896         (OP_*): Don't define macros; now defined in opcode/mips.h.
1897         (main): Call my_strtoul rather than strtoul.
1898         (my_strtoul): New static function.
1899
1900 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1901
1902         * gencode.c (process_instructions):  Generate word64 and uword64
1903         instead of `long long' and `unsigned long long' data types.
1904         * interp.c:  #include sysdep.h to get signals, and define default
1905         for SIGBUS.
1906         * (Convert):  Work around for Visual-C++ compiler bug with type
1907         conversion.
1908         * support.h:  Make things compile under Visual-C++ by using
1909         __int64 instead of `long long'.  Change many refs to long long
1910         into word64/uword64 typedefs.
1911
1912 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1913
1914         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1915         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1916         (docdir): Removed.
1917         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1918         (AC_PROG_INSTALL): Added.
1919         (AC_PROG_CC): Moved to before configure.host call.
1920         * configure: Rebuilt.
1921
1922 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1923
1924         * configure.in: Define @SIMCONF@ depending on mips target.
1925         * configure: Rebuild.
1926         * Makefile.in (run): Add @SIMCONF@ to control simulator
1927         construction.
1928         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1929         * interp.c: Remove some debugging, provide more detailed error
1930         messages, update memory accesses to use LOADDRMASK.
1931
1932 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1933
1934         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1935         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1936         stamp-h.
1937         * configure: Rebuild.
1938         * config.in: New file, generated by autoheader.
1939         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1940         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1941         HAVE_ANINT and HAVE_AINT, as appropriate.
1942         * Makefile.in (run): Use @LIBS@ rather than -lm.
1943         (interp.o): Depend upon config.h.
1944         (Makefile): Just rebuild Makefile.
1945         (clean): Remove stamp-h.
1946         (mostlyclean): Make the same as clean, not as distclean.
1947         (config.h, stamp-h): New targets.
1948
1949 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1950
1951         * interp.c (ColdReset): Fix boolean test. Make all simulator
1952         globals static.
1953
1954 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1955
1956         * interp.c (xfer_direct_word, xfer_direct_long,
1957         swap_direct_word, swap_direct_long, xfer_big_word,
1958         xfer_big_long, xfer_little_word, xfer_little_long,
1959         swap_word,swap_long): Added.
1960         * interp.c (ColdReset): Provide function indirection to
1961         host<->simulated_target transfer routines.
1962         * interp.c (sim_store_register, sim_fetch_register): Updated to
1963         make use of indirected transfer routines.
1964
1965 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1966
1967         * gencode.c (process_instructions): Ensure FP ABS instruction
1968         recognised.
1969         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1970         system call support.
1971
1972 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1973
1974         * interp.c (sim_do_command): Complain if callback structure not
1975         initialised.
1976
1977 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1978
1979         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1980         support for Sun hosts.
1981         * Makefile.in (gencode): Ensure the host compiler and libraries
1982         used for cross-hosted build.
1983
1984 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1985
1986         * interp.c, gencode.c: Some more (TODO) tidying.
1987
1988 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1989
1990         * gencode.c, interp.c: Replaced explicit long long references with
1991         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1992         * support.h (SET64LO, SET64HI): Macros added.
1993
1994 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1995
1996         * configure: Regenerate with autoconf 2.7.
1997
1998 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1999
2000         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2001         * support.h: Remove superfluous "1" from #if.
2002         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2003
2004 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2005
2006         * interp.c (StoreFPR): Control UndefinedResult() call on
2007         WARN_RESULT manifest.
2008
2009 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2010
2011         * gencode.c: Tidied instruction decoding, and added FP instruction
2012         support.
2013
2014         * interp.c: Added dineroIII, and BSD profiling support. Also
2015         run-time FP handling.
2016
2017 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2018
2019         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2020         gencode.c, interp.c, support.h: created.