sim/mips/ChangeLog

   1 start-sanitize-tx3904
   2 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
   5         interrupt level number to match changed SignalExceptionInterrupt
   6         macro.
   7
   8 end-sanitize-tx3904
   9 start-sanitize-sky
  10 Thu Oct 29 12:47:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
  11
  12         * sim-main.c (tlb_try_match): Include physical address in
  13         scratchpad non-mapping warning.
  14
  15 end-sanitize-sky
  16 start-sanitize-r5900
  17 Thu Oct 29 11:06:30 EST 1998  Frank Ch. Eigler <fche@cygnus.com>
  18
  19         * r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
  20         as per customer patch.
  21
  22 end-sanitize-r5900
  23 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
  24
  25         * interp.c: #include "itable.h" if WITH_IGEN.
  26         (get_insn_name): New function.
  27         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
  28         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
  29
  30 start-sanitize-sky
  31 Tue Sep 22 10:35:37 1998  Frank Ch. Eigler  <fche@cygnus.com>
  32
  33         * sim-main.c (tlb_try_match): Specially match virtual
  34         pages mapped to scratchpad RAM, an unimplemented feature.
  35
  36 end-sanitize-sky
  37 start-sanitize-r5900
  38 Fri Sep 18 11:31:16 1998  Frank Ch. Eigler <fche@cygnus.com>
  39
  40         * r5900.igen (prot3w): Correct rotation sequence; patch
  41         from customer.
  42
  43 end-sanitize-r5900
  44 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
  45
  46         * configure: Rebuilt to inhale new common/aclocal.m4.
  47
  48 start-sanitize-r5900
  49 Thu Sep 10 11:50:54 1998  Doug Evans  <devans@canuck.cygnus.com>
  50
  51         * r5900.igen (plzcw): Make `i' signed.
  52
  53 Wed Sep  9 15:02:10 1998  Doug Evans  <devans@canuck.cygnus.com>
  54
  55         * sim-main.h (COP0_COUNT,COP0_COMPARE,status_IM7): New macros.
  56         * sky-engine.c (cpu_issue): Increment COP0_COUNT and signal an
  57         interrupt if == COP0_COMPARE and interrupt masks/enables allow it.
  58         * interp.c (signal_exception, sky version): Handle INT 2.
  59
  60 Wed Sep 9 11:28:20 1998  Ron Unrau <runrau@cygnus.com>
  61
  62         * sim-main.h: track COP0 registers
  63         * interp.c (sim_{fetch,store}_register): read/write COP0 registers
  64
  65 Fri Sep  4 10:37:57 1998  Frank Ch. Eigler  <fche@cygnus.com>
  66
  67         * r5900.igen (mtsab): Correct typo in input register.
  68
  69         * sim-main.h (TMP_*): New macros for accessing local 128-bit
  70         temporary for multimedia instructions.
  71         * r5900.igen (*): Convert most instructions to use new TMP
  72         macros to store output result during computation.
  73
  74 end-sanitize-r5900
  75 start-sanitize-tx3904
  76 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
  77
  78         * dv-tx3904sio.c: Include sim-assert.h.
  79
  80 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
  81
  82         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
  83         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
  84         Reorganize target-specific sim-hardware checks.
  85         * configure: rebuilt.
  86         * interp.c (sim_open): For tx39 target boards, set
  87         OPERATING_ENVIRONMENT, add tx3904sio devices.
  88         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
  89         ROM executables.  Install dv-sockser into sim-modules list.
  90
  91         * dv-tx3904irc.c: Compiler warning clean-up.
  92         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
  93         frequent hw-trace messages.
  94
  95 end-sanitize-tx3904
  96 start-sanitize-sky
  97 Tue Aug 11 13:52:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
  98
  99         * interp.c (signal_exception): Set IP3 bit in CAUSE on
 100         sky interrupt.
 101
 102 end-sanitize-sky
 103 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 104
 105         * vr.igen (MulAcc): Identify as a vr4100 specific function.
 106
 107 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 108
 109         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
 110
 111         * vr.igen: New file.
 112         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
 113         * mips.igen: Define vr4100 model. Include vr.igen.
 114 start-sanitize-cygnus
 115         * vr5400.igen: Move instructions to vr.igen
 116         * Makefile.in (IGEN_INCLUDE): Remove vr5400.igen.
 117 end-sanitize-cygnus
 118 start-sanitize-vr4320
 119         * vr4320.igen: Move instructions to vr.igen.
 120         * Makefile.in (IGEN_INCLUDE): Remove vr5320.igen.
 121
 122 end-sanitize-vr4320
 123 start-sanitize-sky
 124 Fri Jul 24 16:01:03 1998  Ian Carmichael  <iancarm@cygnus.com>
 125
 126         * interp.c (MONITOR_SIZE): Make 1MB monitor for SKY.
 127         * mips.igen (BREAK): Fix 0xffff2 monitor call.  Slightly less
 128         confusing message if not enough --load-next options appear.
 129
 130         * sky-pke.h (VUx_MEMx_SRCADDR_START): Move to 0x19800000 range.
 131         * sim-main.c (GDB_COMM_AREA): Move to 0x19810000.
 132         * sky-gdb.c (init_fifo_bp_cache): Use VIO_BASE when reading GDB area.
 133         (resume_handler): Same.
 134         (suspend_handler): Same.
 135
 136 Wed Jul 22 13:04:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 137
 138         * mips.igen (break): Implement LOAD_INSTRUCTION ("break 0xffff1")
 139         to trigger multi-phase load.
 140
 141         * sim-main.c: Include sim-assert.h for ASSERT macro.
 142         * sim-main.h (PRINTF_INSTRUCTION): Correct bit pattern for
 143         "break 0xffff2".
 144
 145 Tue Jul 21 18:37:36 1998  Ian Carmichael  <iancarm@cygnus.com>
 146
 147         MMU support.
 148         * interp.c (sim_open): Initialize TLB.
 149         * interp.c (signal_exceptions): New 5900 handling.
 150         * r5900.igen (TLBWR, TLBWI, TLBR, TLBP): Make these work.
 151         * sim-main.c (tlb_try_match, tlb_lookup): New functions.
 152         (address_translation): Use the TLB.
 153         * sim-main.h (r4000_tlb_entry_t): New type.
 154         (TLB_*): New constants.
 155         (COP0_*): New register names.
 156
 157         Sky character I/O device.
 158         * sky-psio.c: New file.
 159         * sky-psio.h: New file.
 160         * Makefile.in: Add sky-psio.o.
 161
 162 end-sanitize-sky
 163 start-sanitize-r5900
 164 Tue Jul 14 16:10:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 165
 166         * r5900.igen (r59fp_overflow): Replace argument ANS with argument
 167         SIGN_P.
 168         (r59fp_zero): Ditto.
 169         (r59fp_store): Update calls.
 170         (DIV.S): Compute 0/0 sign from inputs. Ditto for X/0.
 171
 172 end-sanitize-r5900
 173 start-sanitize-branchbug4011
 174 Mon Jun 29 09:31:27 1998  Gavin Koch  <gavin@cygnus.com>
 175
 176         * interp.c (OPTION_BRANCH_BUG_4011): Add.
 177         (mips_option_handler): Handle OPTION_BRANCH_BUG_4011.
 178         (mips_options): Define the option.
 179         * mips.igen (check_4011_branch_bug): New.
 180         (mark_4011_branch_bug): New.
 181         (all branch insn): Call mark_branch_bug, and check_branch_bug.
 182         * sim-main.h (branchbug4011_option, branchbug4011_last_target,
 183         branchbug4011_last_cia, BRANCHBUG4011_OPTION,
 184         BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA,
 185         check_branch_bug, mark_branch_bug): Define.
 186
 187 end-sanitize-branchbug4011
 188 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
 189
 190         * mips.igen (check_mf_hilo): Correct check.
 191
 192 start-sanitize-r5900
 193 Fri Jun 19 14:44:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 194
 195         * sim-main.h (NR_COP0_GPR, COP0_GPR, cop0_gpr, NR_COP0_BP,
 196         COP0_BP, cop0_bp, NR_COP0_P, COP0_P, cop0_p): Add 32 COP0 general
 197         purpose registers, add 8 COP0 break-point registers, add 64 COP0
 198         performance registers.
 199
 200         * interp.c (decode_coproc): Accept any MTC0/MFC0, MTBP/MFBP, MTP*
 201         MFP* instructions.  Just transfer value to/from corresponding
 202         register.
 203
 204         * r5900.igen (BC0F, BC0FL, BC0T, BC0TL): Implement, assume COP0
 205         status is always true.
 206         (CACHE, TLBP, TPGWI, TLBWR): Treat as NOP.
 207         (EI, DI): Set/clear Status-EIE bit.
 208
 209 end-sanitize-r5900
 210 start-sanitize-sky
 211 Fri Jun 19 14:44:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 212
 213         * mips.igen (BC0F, BC0FL, BC0T, BC0TL): Move to sky code to
 214         r5900.igen.
 215
 216 end-sanitize-sky
 217 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 218
 219 start-sanitize-sky
 220         * sky-vu.c (vu0_read_cop2_register, vu0_write_cop2_register): Call
 221         ASSERT not assert.
 222         * sky-gdb.c: Include "sim-assert.h".
 223
 224 end-sanitize-sky
 225         * sim-main.h (interrupt_event): Add prototype.
 226
 227 start-sanitize-tx3904
 228         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
 229         register_ptr, register_value.
 230         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
 231
 232 end-sanitize-tx3904
 233         * sim-main.h (tracefh): Make extern.
 234
 235 start-sanitize-tx3904
 236 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
 237
 238         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
 239         Reduce unnecessarily high timer event frequency.
 240         * dv-tx3904cpu.c: Ditto for interrupt event.
 241
 242 end-sanitize-tx3904
 243 start-sanitize-sky
 244 Tue Jun 16 14:12:09 1998  Frank Ch. Eigler  <fche@cygnus.com>
 245
 246         * interp.c (decode_coproc): Removed COP2 branches.
 247         * r5900.igen: Moved COP2 branch instructions here.
 248         * mips.igen: Restricted COPz == COP2 bit pattern to
 249         exclude COP2 branches.
 250
 251 end-sanitize-sky
 252 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
 253
 254         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 255         to allay warnings.
 256         (interrupt_event): Made non-static.
 257 start-sanitize-tx3904
 258
 259         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 260         interchange of configuration values for external vs. internal
 261         clock dividers.
 262 end-sanitize-tx3904
 263
 264 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
 265
 266         * mips.igen (BREAK): Moved code to here for
 267         simulator-reserved break instructions.
 268         * gencode.c (build_instruction): Ditto.
 269         * interp.c (signal_exception): Code moved from here.  Non-
 270         reserved instructions now use exception vector, rather
 271         than halting sim.
 272         * sim-main.h: Moved magic constants to here.
 273
 274 start-sanitize-tx3904
 275 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 276
 277         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 278         register upon non-zero interrupt event level, clear upon zero
 279         event value.
 280         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
 281         by passing zero event value.
 282         (*_io_{read,write}_buffer): Endianness fixes.
 283         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
 284         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
 285
 286         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
 287         serial I/O and timer module at base address 0xFFFF0000.
 288
 289 end-sanitize-tx3904
 290 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
 291
 292         * mips.igen (SWC1) : Correct the handling of ReverseEndian
 293         and BigEndianCPU.
 294
 295 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
 296
 297         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
 298         parts.
 299         * configure: Update.
 300
 301 start-sanitize-tx3904
 302 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
 303
 304         * dv-tx3904tmr.c: New file - implements tx3904 timer.
 305         * dv-tx3904{irc,cpu}.c: Mild reformatting.
 306         * configure.in: Include tx3904tmr in hw_device list.
 307         * configure: Rebuilt.
 308         * interp.c (sim_open): Instantiate three timer instances.
 309         Fix address typo of tx3904irc instance.
 310
 311 end-sanitize-tx3904
 312 start-sanitize-r5900
 313 Thu Jun  4 16:47:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 314
 315         * mips.igen (check_mt_hilo): 2.1 of r5900 spec stalls for HILO.
 316         Select corresponding check_mt_hilo function.
 317         (check_mult_hilo, check_div_hilo, check_mf_hilo, check_mt_hilo):
 318         Ditto.
 319
 320         * r5900.igen (check_mult_hilo_hi1lo1, check_div_hilo_hi1lo1): Mark
 321         as r5900 specific.
 322
 323 end-sanitize-r5900
 324 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
 325
 326         * interp.c (signal_exception): SystemCall exception now uses
 327         the exception vector.
 328
 329 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 330
 331         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
 332         to allay warnings.
 333
 334 start-sanitize-r5900
 335 Mon Jun  1 10:28:25 1998  Jeffrey A Law  (law@cygnus.com)
 336
 337         * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
 338         (sqrt.s): Likewise.
 339
 340 end-sanitize-r5900
 341 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 342
 343         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
 344
 345 start-sanitize-tx3904
 346 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 347
 348         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
 349
 350         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
 351         sim-main.h. Declare a struct hw_descriptor instead of struct
 352         hw_device_descriptor.
 353
 354 end-sanitize-tx3904
 355 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 356
 357         * mips.igen (do_store_left, do_load_left): Compute nr of left and
 358         right bits and then re-align left hand bytes to correct byte
 359         lanes.  Fix incorrect computation in do_store_left when loading
 360         bytes from second word.
 361
 362 start-sanitize-tx3904
 363 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 364
 365         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
 366         * interp.c (sim_open): Only create a device tree when HW is
 367         enabled.
 368
 369         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
 370         * interp.c (signal_exception): Ditto.
 371
 372 end-sanitize-tx3904
 373 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
 374
 375         * gencode.c: Mark BEGEZALL as LIKELY.
 376
 377 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 378
 379         * sim-main.h (ALU32_END): Sign extend 32 bit results.
 380         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
 381
 382 start-sanitize-r5900
 383 Thu May 21 17:15:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 384
 385         * interp.c (sim_fetch_register): Convert internal r5900 regs to
 386         target byte order
 387
 388 end-sanitize-r5900
 389 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
 390
 391         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 392         modules.  Recognize TX39 target with "mips*tx39" pattern.
 393         * configure: Rebuilt.
 394         * sim-main.h (*): Added many macros defining bits in
 395         TX39 control registers.
 396         (SignalInterrupt): Send actual PC instead of NULL.
 397         (SignalNMIReset): New exception type.
 398         * interp.c (board): New variable for future use to identify
 399         a particular board being simulated.
 400         (mips_option_handler,mips_options): Added "--board" option.
 401         (interrupt_event): Send actual PC.
 402         (sim_open): Make memory layout conditional on board setting.
 403         (signal_exception): Initial implementation of hardware interrupt
 404         handling.  Accept another break instruction variant for simulator
 405         exit.
 406         (decode_coproc): Implement RFE instruction for TX39.
 407         (mips.igen): Decode RFE instruction as such.
 408 start-sanitize-tx3904
 409         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
 410         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
 411         bbegin to implement memory map.
 412         * dv-tx3904cpu.c: New file.
 413         * dv-tx3904irc.c: New file.
 414 end-sanitize-tx3904
 415
 416 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
 417
 418         * mips.igen (check_mt_hilo): Create a separate r3900 version.
 419
 420 start-sanitize-r5900
 421 Wed May 13 14:27:53 1998  Gavin Koch  <gavin@cygnus.com>
 422
 423         * r5900.igen: Replace the calls and the definition of the
 424         function check_op_hilo_hi1lo1 with the pair
 425         check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
 426
 427 end-sanitize-r5900
 428 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
 429
 430         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
 431         with calls to check_div_hilo.
 432
 433 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
 434
 435         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
 436         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
 437         Add special r3900 version of do_mult_hilo.
 438         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
 439         with calls to check_mult_hilo.
 440         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
 441         with calls to check_div_hilo.
 442
 443 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 444
 445         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
 446         Document a replacement.
 447
 448 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
 449
 450         * interp.c (sim_monitor): Make mon_printf work.
 451
 452 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
 453
 454         * sim-main.h (INSN_NAME): New arg `cpu'.
 455
 456 start-sanitize-sky
 457 Thu Apr 30 18:51:26 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 458
 459         * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
 460         r59fp_mula.
 461
 462 end-sanitize-sky
 463 start-sanitize-r5900
 464 Wed Apr 29 22:54:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 465
 466         * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
 467         * r5900.igen (r59fp_overflow): Use.
 468
 469         * r5900.igen (r59fp_op3): Rename to
 470         (r59fp_mula): This, delete opm argument.
 471         (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
 472         (r59fp_mula): Overflowing product propogates through to result.
 473         (r59fp_mula): ACC to the MAX propogates to result.
 474         (r59fp_mula): Underflow during multiply only sets SU.
 475
 476 end-sanitize-r5900
 477 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 478
 479         * configure: Regenerated to track ../common/aclocal.m4 changes.
 480
 481 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 482
 483         * configure: Regenerated to track ../common/aclocal.m4 changes.
 484         * config.in: Ditto.
 485
 486 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
 487
 488         * acconfig.h: New file.
 489         * configure.in: Reverted change of Apr 24; use sinclude again.
 490
 491 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 492
 493         * configure: Regenerated to track ../common/aclocal.m4 changes.
 494         * config.in: Ditto.
 495
 496 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
 497
 498         * configure.in: Don't call sinclude.
 499
 500 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
 501
 502         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
 503
 504 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 505
 506         * mips.igen (ERET): Implement.
 507
 508         * interp.c (decode_coproc): Return sign-extended EPC.
 509
 510         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
 511
 512         * interp.c (signal_exception): Do not ignore Trap.
 513         (signal_exception): On TRAP, restart at exception address.
 514         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
 515         (signal_exception): Update.
 516         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
 517         so that TRAP instructions are caught.
 518
 519 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 520
 521         * sim-main.h (struct hilo_access, struct hilo_history): Define,
 522         contains HI/LO access history.
 523         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
 524         (HIACCESS, LOACCESS): Delete, replace with
 525         (HIHISTORY, LOHISTORY): New macros.
 526         (start-sanitize-r5900):
 527         (struct sim_5900_cpu): Make hi1access, lo1access of type
 528         hilo_access.
 529         (HI1ACCESS, LO1ACCESS): Delete, replace with
 530         (HI1HISTORY, LO1HISTORY): New macros.
 531         (end-sanitize-r5900):
 532         (CHECKHILO): Delete all, moved to mips.igen
 533
 534         * gencode.c (build_instruction): Do not generate checks for
 535         correct HI/LO register usage.
 536
 537         * interp.c (old_engine_run): Delete checks for correct HI/LO
 538         register usage.
 539
 540         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 541         check_mf_cycles): New functions.
 542         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 543         do_divu, domultx, do_mult, do_multu): Use.
 544
 545         * tx.igen ("madd", "maddu"): Use.
 546         (start-sanitize-r5900):
 547
 548         r5900.igen: Update all HI/LO checks.
 549         ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
 550         "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
 551         ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
 552         "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
 553         "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
 554         Check HI/LO op.
 555         (end-sanitize-r5900):
 556
 557 start-sanitize-sky
 558 Mon Apr 20 18:39:47 1998  Frank Ch. Eigler  <fche@cygnus.com>
 559
 560         * interp.c (decode_coproc): Correct CMFC2/QMTC2
 561         GPR access.
 562
 563         * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
 564         instead of a single 128-bit access.
 565
 566 end-sanitize-sky
 567 start-sanitize-sky
 568 Fri Apr 17 14:50:39 1998  Frank Ch. Eigler  <fche@cygnus.com>
 569
 570         * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
 571         * interp.c (cop_[ls]q): Fixes corresponding to above.
 572
 573 end-sanitize-sky
 574 start-sanitize-sky
 575 Thu Apr 16 15:24:14 1998  Frank Ch. Eigler  <fche@cygnus.com>
 576
 577         * interp.c (decode_coproc): Adapt COP2 micro interlock to
 578         clarified specs.  Reset "M" bit; exit also on "E" bit.
 579
 580 end-sanitize-sky
 581 start-sanitize-r5900
 582 Thu Apr 16 10:40:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 583
 584         * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
 585         * mips.igen (CFC1, CTC1): R5900 des not use generic version.
 586
 587         * r5900.igen (r59fp_unpack): New function.
 588         (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
 589         RSQRT.S, SQRT.S): Use.
 590         (r59fp_zero): New function.
 591         (r59fp_overflow): Generate r5900 specific overflow value.
 592         (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
 593         to zero.
 594         (CVT.S.W, CVT.W.S): Exchange implementations.
 595
 596         * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
 597
 598 end-sanitize-r5900
 599 start-sanitize-tx19
 600 Thu Apr 16 09:14:44 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 601
 602         * configure.in (tx19, sim_use_gen): Switch to igen.
 603         * configure: Re-build.
 604
 605 end-sanitize-tx19
 606 start-sanitize-sky
 607 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 608
 609         * interp.c (decode_coproc): Make COP2 branch code compile after
 610         igen signature changes.
 611
 612 end-sanitize-sky
 613 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 614
 615         * mips.igen (DSRAV): Use function do_dsrav.
 616         (SRAV): Use new function do_srav.
 617
 618         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 619         (B): Sign extend 11 bit immediate.
 620         (EXT-B*): Shift 16 bit immediate left by 1.
 621         (ADDIU*): Don't sign extend immediate value.
 622
 623 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 624
 625         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 626
 627 start-sanitize-tx19
 628         * mips.igen (mtc0): Valid tx19 instruction.
 629
 630 end-sanitize-tx19
 631         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 632         functions.
 633
 634         * mips.igen (delayslot32, nullify_next_insn): New functions.
 635         (m16.igen): Always include.
 636         (do_*): Add more tracing.
 637
 638         * m16.igen (delayslot16): Add NIA argument, could be called by a
 639         32 bit MIPS16 instruction.
 640
 641         * interp.c (ifetch16): Move function from here.
 642         * sim-main.c (ifetch16): To here.
 643
 644         * sim-main.c (ifetch16, ifetch32): Update to match current
 645         implementations of LH, LW.
 646         (signal_exception): Don't print out incorrect hex value of illegal
 647         instruction.
 648
 649 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 650
 651         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 652         instruction.
 653
 654         * m16.igen: Implement MIPS16 instructions.
 655
 656         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 657         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 658         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 659         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 660         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 661         bodies of corresponding code from 32 bit insn to these.  Also used
 662         by MIPS16 versions of functions.
 663
 664         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 665         (IMEM16): Drop NR argument from macro.
 666
 667 start-sanitize-sky
 668 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
 669
 670         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
 671         of VU lower instruction.
 672
 673 end-sanitize-sky
 674 start-sanitize-sky
 675 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 676
 677         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
 678         instead of QUADWORD.
 679
 680         * sim-main.h: Removed attempt at allowing 128-bit access.
 681
 682 end-sanitize-sky
 683 start-sanitize-sky
 684 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 685
 686         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
 687
 688         * interp.c (decode_coproc): Refer to VU CIA as a "special"
 689         register, not as a "misc" register.  Aha.  Add activity
 690         assertions after VCALLMS* instructions.
 691
 692 end-sanitize-sky
 693 start-sanitize-sky
 694 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
 695
 696         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
 697         to upper code of generated VU instruction.
 698
 699 end-sanitize-sky
 700 start-sanitize-sky
 701 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
 702
 703         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
 704
 705         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 706         for TARGET_SKY.
 707
 708         * r5900.igen (SQC2): Thinko.
 709
 710 end-sanitize-sky
 711 start-sanitize-sky
 712 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 713
 714         * interp.c (*): Adapt code to merged VU device & state structs.
 715         (decode_coproc): Execute COP2 each macroinstruction without
 716         pipelining, by stepping VU to completion state.  Adapted to
 717         read_vu_*_reg style of register access.
 718
 719         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 720
 721         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 722
 723         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 724
 725 end-sanitize-sky
 726 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 727
 728         * Makefile.in (SIM_OBJS): Add sim-main.o.
 729
 730         * sim-main.h (address_translation, load_memory, store_memory,
 731         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 732         as INLINE_SIM_MAIN.
 733         (pr_addr, pr_uword64): Declare.
 734         (sim-main.c): Include when H_REVEALS_MODULE_P.
 735
 736         * interp.c (address_translation, load_memory, store_memory,
 737         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 738         from here.
 739         * sim-main.c: To here. Fix compilation problems.
 740
 741         * configure.in: Enable inlining.
 742         * configure: Re-config.
 743
 744 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 745
 746         * configure: Regenerated to track ../common/aclocal.m4 changes.
 747
 748 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 749
 750         * mips.igen: Include tx.igen.
 751         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 752         * tx.igen: New file, contains MADD and MADDU.
 753
 754         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 755         the hardwired constant `7'.
 756         (store_memory): Ditto.
 757         (LOADDRMASK): Move definition to sim-main.h.
 758
 759         mips.igen (MTC0): Enable for r3900.
 760         (ADDU): Add trace.
 761
 762         mips.igen (do_load_byte): Delete.
 763         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 764         do_store_right): New functions.
 765         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 766
 767         configure.in: Let the tx39 use igen again.
 768         configure: Update.
 769
 770 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 771
 772         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 773         not an address sized quantity.  Return zero for cache sizes.
 774
 775 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 776
 777         * mips.igen (r3900): r3900 does not support 64 bit integer
 778         operations.
 779
 780 start-sanitize-sky
 781 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 782
 783         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 784
 785 end-sanitize-sky
 786 start-sanitize-sky
 787 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 788
 789         * interp.c (decode_coproc): Continuing COP2 work.
 790         (cop_[ls]q): Make sky-target-only.
 791
 792         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 793 end-sanitize-sky
 794 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 795
 796         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 797         than igen one.
 798         * configure : Rebuild.
 799
 800 start-sanitize-sky
 801 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 802
 803         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 804         around COP2 implementation skeleton.
 805
 806 end-sanitize-sky
 807 start-sanitize-sky
 808 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 809
 810         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 811
 812         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 813         static to access VU registers.
 814         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 815         decoding.  Work in progress.
 816
 817         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 818         overlapping/redundant bit pattern.
 819         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 820         progress.
 821
 822         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 823         status register.
 824
 825         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 826         access to coprocessor registers.
 827
 828         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 829 end-sanitize-sky
 830 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 831
 832         * configure: Regenerated to track ../common/aclocal.m4 changes.
 833
 834 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 835
 836         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 837
 838 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 839
 840         * configure: Regenerated to track ../common/aclocal.m4 changes.
 841         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 842
 843 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 844
 845         * configure: Regenerated to track ../common/aclocal.m4 changes.
 846
 847 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 848
 849         * interp.c (Max, Min): Comment out functions. Not yet used.
 850
 851 start-sanitize-vr4320
 852 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 853
 854         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 855
 856 end-sanitize-vr4320
 857 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 858
 859         * configure: Regenerated to track ../common/aclocal.m4 changes.
 860
 861 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 862
 863         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 864         configurable settings for stand-alone simulator.
 865
 866 start-sanitize-sky
 867         * configure.in: Added --with-sim-gpu2 option to specify path of
 868         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 869         links/compiles stand-alone simulator with this library.
 870
 871         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 872 end-sanitize-sky
 873         * configure.in: Added X11 search, just in case.
 874
 875         * configure: Regenerated.
 876
 877 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 878
 879         * interp.c (sim_write, sim_read, load_memory, store_memory):
 880         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 881
 882 start-sanitize-vr4320
 883 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 884
 885         * vr4320.igen (clz,dclz) : Added.
 886         (dmac): Replaced 99, with LO.
 887
 888 end-sanitize-vr4320
 889 start-sanitize-cygnus
 890 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 891
 892         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 893
 894 end-sanitize-cygnus
 895 start-sanitize-vr4320
 896 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 897
 898         * vr4320.igen: New file.
 899         * Makefile.in (vr4320.igen) : Added.
 900         * configure.in (mips64vr4320-*-*): Added.
 901         * configure : Rebuilt.
 902         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 903         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 904
 905 end-sanitize-vr4320
 906 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 907
 908         * sim-main.h (GETFCC): Return an unsigned value.
 909
 910 start-sanitize-r5900
 911         * r5900.igen: Use an unsigned array index variable `i'.
 912         (QFSRV): Ditto for variable bytes.
 913
 914 end-sanitize-r5900
 915 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 916
 917         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 918         (DADD): Result destination is RD not RT.
 919
 920 start-sanitize-r5900
 921         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 922         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 923         divide.
 924
 925 end-sanitize-r5900
 926 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 927
 928         * sim-main.h (HIACCESS, LOACCESS): Always define.
 929
 930         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 931
 932         * interp.c (sim_info): Delete.
 933
 934 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 935
 936         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 937         (mips_option_handler): New argument `cpu'.
 938         (sim_open): Update call to sim_add_option_table.
 939
 940 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 941
 942         * mips.igen (CxC1): Add tracing.
 943
 944 start-sanitize-r5900
 945 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 946
 947         * r5900.igen (StoreFP): Delete.
 948         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 949         New functions.
 950         (rsqrt.s, sqrt.s): Implement.
 951         (r59cond): New function.
 952         (C.COND.S): Call r59cond in assembler line.
 953         (cvt.w.s, cvt.s.w): Implement.
 954
 955         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 956         instruction set.
 957
 958         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 959
 960 end-sanitize-r5900
 961 start-sanitize-r5900
 962 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 963
 964         * r5900.igen: Add tracing to all p* instructions.
 965
 966 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 969         to get gdb talking to re-aranged sim_cpu register structure.
 970
 971 end-sanitize-r5900
 972 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * sim-main.h (Max, Min): Declare.
 975
 976         * interp.c (Max, Min): New functions.
 977
 978         * mips.igen (BC1): Add tracing.
 979
 980 start-sanitize-cygnus
 981 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 982
 983         * mdmx.igen: Tag all functions as requiring either with mdmx or
 984         vr5400 processor.
 985
 986 end-sanitize-cygnus
 987 start-sanitize-r5900
 988 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 989
 990         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 991         to 32.
 992         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 993
 994         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 995
 996         * r5900.igen: Rewrite.
 997
 998         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 999         struct.
1000         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
1001         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
1002
1003 end-sanitize-r5900
1004 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1005
1006         * interp.c Added memory map for stack in vr4100
1007
1008 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1009
1010         * interp.c (load_memory): Add missing "break"'s.
1011
1012 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1013
1014         * interp.c (sim_store_register, sim_fetch_register): Pass in
1015         length parameter.  Return -1.
1016
1017 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1018
1019         * interp.c: Added hardware init hook, fixed warnings.
1020
1021 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1022
1023         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1024
1025 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1026
1027         * interp.c (ifetch16): New function.
1028
1029         * sim-main.h (IMEM32): Rename IMEM.
1030         (IMEM16_IMMED): Define.
1031         (IMEM16): Define.
1032         (DELAY_SLOT): Update.
1033
1034         * m16run.c (sim_engine_run): New file.
1035
1036         * m16.igen: All instructions except LB.
1037         (LB): Call do_load_byte.
1038         * mips.igen (do_load_byte): New function.
1039         (LB): Call do_load_byte.
1040
1041         * mips.igen: Move spec for insn bit size and high bit from here.
1042         * Makefile.in (tmp-igen, tmp-m16): To here.
1043
1044         * m16.dc: New file, decode mips16 instructions.
1045
1046         * Makefile.in (SIM_NO_ALL): Define.
1047         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1048
1049 start-sanitize-tx19
1050         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
1051         set.
1052
1053 end-sanitize-tx19
1054 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1055
1056         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1057         point unit to 32 bit registers.
1058         * configure: Re-generate.
1059
1060 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1061
1062         * configure.in (sim_use_gen): Make IGEN the default simulator
1063         generator for generic 32 and 64 bit mips targets.
1064         * configure: Re-generate.
1065
1066 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1067
1068         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1069         bitsize.
1070
1071         * interp.c (sim_fetch_register, sim_store_register): Read/write
1072         FGR from correct location.
1073         (sim_open): Set size of FGR's according to
1074         WITH_TARGET_FLOATING_POINT_BITSIZE.
1075
1076         * sim-main.h (FGR): Store floating point registers in a separate
1077         array.
1078
1079 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1080
1081         * configure: Regenerated to track ../common/aclocal.m4 changes.
1082
1083 start-sanitize-cygnus
1084         * mdmx.igen: Mark all instructions as 64bit/fp specific.
1085
1086 end-sanitize-cygnus
1087 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1088
1089         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1090
1091         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1092
1093         * interp.c (pending_tick): New function.  Deliver pending writes.
1094
1095         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1096         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1097         it can handle mixed sized quantites and single bits.
1098
1099 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1100
1101         * interp.c (oengine.h): Do not include when building with IGEN.
1102         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1103         (sim_info): Ditto for PROCESSOR_64BIT.
1104         (sim_monitor): Replace ut_reg with unsigned_word.
1105         (*): Ditto for t_reg.
1106         (LOADDRMASK): Define.
1107         (sim_open): Remove defunct check that host FP is IEEE compliant,
1108         using software to emulate floating point.
1109         (value_fpr, ...): Always compile, was conditional on HASFPU.
1110
1111 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1112
1113         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1114         size.
1115
1116         * interp.c (SD, CPU): Define.
1117         (mips_option_handler): Set flags in each CPU.
1118         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1119         (sim_close): Do not clear STATE, deleted anyway.
1120         (sim_write, sim_read): Assume CPU zero's vm should be used for
1121         data transfers.
1122         (sim_create_inferior): Set the PC for all processors.
1123         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1124         argument.
1125         (mips16_entry): Pass correct nr of args to store_word, load_word.
1126         (ColdReset): Cold reset all cpu's.
1127         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1128         (sim_monitor, load_memory, store_memory, signal_exception): Use
1129         `CPU' instead of STATE_CPU.
1130
1131
1132         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1133         SD or CPU_.
1134
1135         * sim-main.h (signal_exception): Add sim_cpu arg.
1136         (SignalException*): Pass both SD and CPU to signal_exception.
1137         * interp.c (signal_exception): Update.
1138
1139         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1140         Ditto
1141         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1142         address_translation): Ditto
1143         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1144
1145 start-sanitize-cygnus
1146         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
1147         `sd'.
1148         (ByteAlign): Use StoreFPR, pass args in correct order.
1149
1150 end-sanitize-cygnus
1151 start-sanitize-r5900
1152 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1153
1154         * configure.in (sim_igen_filter): For r5900, configure as SMP.
1155
1156 end-sanitize-r5900
1157 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1158
1159         * configure: Regenerated to track ../common/aclocal.m4 changes.
1160
1161 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1162
1163 start-sanitize-r5900
1164         * configure.in (sim_igen_filter): For r5900, use igen.
1165         * configure: Re-generate.
1166
1167 end-sanitize-r5900
1168         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1169
1170         * mips.igen (model): Map processor names onto BFD name.
1171
1172         * sim-main.h (CPU_CIA): Delete.
1173         (SET_CIA, GET_CIA): Define
1174
1175 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1176
1177         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1178         regiser.
1179
1180         * configure.in (default_endian): Configure a big-endian simulator
1181         by default.
1182         * configure: Re-generate.
1183
1184 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1185
1186         * configure: Regenerated to track ../common/aclocal.m4 changes.
1187
1188 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1189
1190         * interp.c (sim_monitor): Handle Densan monitor outbyte
1191         and inbyte functions.
1192
1193 1997-12-29  Felix Lee  <flee@cygnus.com>
1194
1195         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1196
1197 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1198
1199         * Makefile.in (tmp-igen): Arrange for $zero to always be
1200         reset to zero after every instruction.
1201
1202 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1203
1204         * configure: Regenerated to track ../common/aclocal.m4 changes.
1205         * config.in: Ditto.
1206
1207 start-sanitize-cygnus
1208 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1209
1210         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
1211         bit values.
1212
1213 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
1214
1215         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
1216         vr5400 with the vr5000 as the default.
1217
1218 end-sanitize-cygnus
1219 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1220
1221         * mips.igen (MSUB): Fix to work like MADD.
1222         * gencode.c (MSUB): Similarly.
1223
1224 start-sanitize-cygnus
1225 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1226
1227         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
1228         vr5400.
1229
1230 end-sanitize-cygnus
1231 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1232
1233         * configure: Regenerated to track ../common/aclocal.m4 changes.
1234
1235 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1236
1237         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1238
1239 start-sanitize-cygnus
1240         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
1241         (value_cc, store_cc): Implement.
1242
1243         * sim-main.h: Add 8*3*8 bit accumulator.
1244
1245         * vr5400.igen: Move mdmx instructins from here
1246         * mdmx.igen: To here - new file. Add/fix missing instructions.
1247         * mips.igen: Include mdmx.igen.
1248         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1249
1250 end-sanitize-cygnus
1251 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1252
1253         * sim-main.h (sim-fpu.h): Include.
1254
1255         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1256         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1257         using host independant sim_fpu module.
1258
1259 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1260
1261         * interp.c (signal_exception): Report internal errors with SIGABRT
1262         not SIGQUIT.
1263
1264         * sim-main.h (C0_CONFIG): New register.
1265         (signal.h): No longer include.
1266
1267         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1268
1269 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1270
1271         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1272
1273 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1274
1275         * mips.igen: Tag vr5000 instructions.
1276         (ANDI): Was missing mipsIV model, fix assembler syntax.
1277         (do_c_cond_fmt): New function.
1278         (C.cond.fmt): Handle mips I-III which do not support CC field
1279         separatly.
1280         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1281         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1282         in IV3.2 spec.
1283         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1284         vr5000 which saves LO in a GPR separatly.
1285
1286         * configure.in (enable-sim-igen): For vr5000, select vr5000
1287         specific instructions.
1288         * configure: Re-generate.
1289
1290 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1291
1292         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1293
1294         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1295         fmt_uninterpreted_64 bit cases to switch.  Convert to
1296         fmt_formatted,
1297
1298         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1299
1300         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1301         as specified in IV3.2 spec.
1302         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1303
1304 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1305
1306         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1307         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1308         (start-sanitize-r5900):
1309         (LWXC1, SWXC1): Delete from r5900 instruction set.
1310         (end-sanitize-r5900):
1311         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1312         PENDING_FILL versions of instructions.  Simplify.
1313         (X): New function.
1314         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1315         instructions.
1316         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1317         a signed value.
1318         (MTHI, MFHI): Disable code checking HI-LO.
1319
1320         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1321         global.
1322         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1323
1324 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1325
1326         * gencode.c (build_mips16_operands): Replace IPC with cia.
1327
1328         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1329         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1330         IPC to `cia'.
1331         (UndefinedResult): Replace function with macro/function
1332         combination.
1333         (sim_engine_run): Don't save PC in IPC.
1334
1335         * sim-main.h (IPC): Delete.
1336
1337         start-sanitize-cygnus
1338         * vr5400.igen (vr): Add missing cia argument to value_fpr.
1339         (do_select): Rename function select.
1340         end-sanitize-cygnus
1341
1342         * interp.c (signal_exception, store_word, load_word,
1343         address_translation, load_memory, store_memory, cache_op,
1344         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1345         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1346         current instruction address - cia - argument.
1347         (sim_read, sim_write): Call address_translation directly.
1348         (sim_engine_run): Rename variable vaddr to cia.
1349         (signal_exception): Pass cia to sim_monitor
1350
1351         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1352         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1353         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1354
1355         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1356         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1357         SIM_ASSERT.
1358
1359         * interp.c (signal_exception): Pass restart address to
1360         sim_engine_restart.
1361
1362         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1363         idecode.o): Add dependency.
1364
1365         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1366         Delete definitions
1367         (DELAY_SLOT): Update NIA not PC with branch address.
1368         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1369
1370         * mips.igen: Use CIA not PC in branch calculations.
1371         (illegal): Call SignalException.
1372         (BEQ, ADDIU): Fix assembler.
1373
1374 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1375
1376         * m16.igen (JALX): Was missing.
1377
1378         * configure.in (enable-sim-igen): New configuration option.
1379         * configure: Re-generate.
1380
1381         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1382
1383         * interp.c (load_memory, store_memory): Delete parameter RAW.
1384         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1385         bypassing {load,store}_memory.
1386
1387         * sim-main.h (ByteSwapMem): Delete definition.
1388
1389         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1390
1391         * interp.c (sim_do_command, sim_commands): Delete mips specific
1392         commands.  Handled by module sim-options.
1393
1394         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1395         (WITH_MODULO_MEMORY): Define.
1396
1397         * interp.c (sim_info): Delete code printing memory size.
1398
1399         * interp.c (mips_size): Nee sim_size, delete function.
1400         (power2): Delete.
1401         (monitor, monitor_base, monitor_size): Delete global variables.
1402         (sim_open, sim_close): Delete code creating monitor and other
1403         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1404         manage memory regions.
1405         (load_memory, store_memory): Use sim-core for memory model.
1406
1407         * interp.c (address_translation): Delete all memory map code
1408         except line forcing 32 bit addresses.
1409
1410 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1411
1412         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1413         trace options.
1414
1415         * interp.c (logfh, logfile): Delete globals.
1416         (sim_open, sim_close): Delete code opening & closing log file.
1417         (mips_option_handler): Delete -l and -n options.
1418         (OPTION mips_options): Ditto.
1419
1420         * interp.c (OPTION mips_options): Rename option trace to dinero.
1421         (mips_option_handler): Update.
1422
1423 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1424
1425         * interp.c (fetch_str): New function.
1426         (sim_monitor): Rewrite using sim_read & sim_write.
1427         (sim_open): Check magic number.
1428         (sim_open): Write monitor vectors into memory using sim_write.
1429         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1430         (sim_read, sim_write): Simplify - transfer data one byte at a
1431         time.
1432         (load_memory, store_memory): Clarify meaning of parameter RAW.
1433
1434         * sim-main.h (isHOST): Defete definition.
1435         (isTARGET): Mark as depreciated.
1436         (address_translation): Delete parameter HOST.
1437
1438         * interp.c (address_translation): Delete parameter HOST.
1439
1440 start-sanitize-tx49
1441 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
1442
1443         * gencode.c: Add tx49 configury and insns.
1444         * configure.in: Add tx49 configury.
1445         * configure: Update.
1446
1447 end-sanitize-tx49
1448 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1449
1450         * mips.igen:
1451
1452         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1453         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1454
1455 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1456
1457         * mips.igen: Add model filter field to records.
1458
1459 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1460
1461         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1462
1463         interp.c (sim_engine_run): Do not compile function sim_engine_run
1464         when WITH_IGEN == 1.
1465
1466         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1467         target architecture.
1468
1469         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1470         igen. Replace with configuration variables sim_igen_flags /
1471         sim_m16_flags.
1472
1473         start-sanitize-r5900
1474         * r5900.igen: New file. Copy r5900 insns here.
1475         end-sanitize-r5900
1476         start-sanitize-cygnus
1477         * vr5400.igen: New file.
1478         end-sanitize-cygnus
1479         * m16.igen: New file.  Copy mips16 insns here.
1480         * mips.igen: From here.
1481
1482 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1483
1484         start-sanitize-cygnus
1485         * mips.igen: Tag all mipsIV instructions with vr5400 model.
1486
1487         * configure.in: Add mips64vr5400 target.
1488         * configure: Re-generate.
1489
1490         end-sanitize-cygnus
1491         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1492         to top.
1493         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1494
1495 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1496
1497         * gencode.c (build_instruction): Follow sim_write's lead in using
1498         BigEndianMem instead of !ByteSwapMem.
1499
1500 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1501
1502         * configure.in (sim_gen): Dependent on target, select type of
1503         generator.  Always select old style generator.
1504
1505         configure: Re-generate.
1506
1507         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1508         targets.
1509         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1510         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1511         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1512         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1513         SIM_@sim_gen@_*, set by autoconf.
1514
1515 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1516
1517         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1518
1519         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1520         CURRENT_FLOATING_POINT instead.
1521
1522         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1523         (address_translation): Raise exception InstructionFetch when
1524         translation fails and isINSTRUCTION.
1525
1526         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1527         sim_engine_run): Change type of of vaddr and paddr to
1528         address_word.
1529         (address_translation, prefetch, load_memory, store_memory,
1530         cache_op): Change type of vAddr and pAddr to address_word.
1531
1532         * gencode.c (build_instruction): Change type of vaddr and paddr to
1533         address_word.
1534
1535 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1536
1537         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1538         macro to obtain result of ALU op.
1539
1540 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1541
1542         * interp.c (sim_info): Call profile_print.
1543
1544 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1545
1546         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1547
1548         * sim-main.h (WITH_PROFILE): Do not define, defined in
1549         common/sim-config.h.  Use sim-profile module.
1550         (simPROFILE): Delete defintion.
1551
1552         * interp.c (PROFILE): Delete definition.
1553         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1554         (sim_close): Delete code writing profile histogram.
1555         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1556         Delete.
1557         (sim_engine_run): Delete code profiling the PC.
1558
1559 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1560
1561         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1562
1563         * interp.c (sim_monitor): Make register pointers of type
1564         unsigned_word*.
1565
1566         * sim-main.h: Make registers of type unsigned_word not
1567         signed_word.
1568
1569 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1570
1571 start-sanitize-r5900
1572         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1573         ...): Move to sim-main.h
1574
1575 end-sanitize-r5900
1576         * interp.c (sync_operation): Rename from SyncOperation, make
1577         global, add SD argument.
1578         (prefetch): Rename from Prefetch, make global, add SD argument.
1579         (decode_coproc): Make global.
1580
1581         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1582
1583         * gencode.c (build_instruction): Generate DecodeCoproc not
1584         decode_coproc calls.
1585
1586         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1587         (SizeFGR): Move to sim-main.h
1588         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1589         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1590         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1591         sim-main.h.
1592         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1593         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1594         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1595         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1596         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1597         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1598
1599         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1600         exception.
1601         (sim-alu.h): Include.
1602         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1603         (sim_cia): Typedef to instruction_address.
1604
1605 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1606
1607         * Makefile.in (interp.o): Rename generated file engine.c to
1608         oengine.c.
1609
1610         * interp.c: Update.
1611
1612 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1613
1614         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1615
1616 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1617
1618         * gencode.c (build_instruction): For "FPSQRT", output correct
1619         number of arguments to Recip.
1620
1621 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1622
1623         * Makefile.in (interp.o): Depends on sim-main.h
1624
1625         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1626
1627         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1628         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1629         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1630         STATE, DSSTATE): Define
1631         (GPR, FGRIDX, ..): Define.
1632
1633         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1634         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1635         (GPR, FGRIDX, ...): Delete macros.
1636
1637         * interp.c: Update names to match defines from sim-main.h
1638
1639 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1640
1641         * interp.c (sim_monitor): Add SD argument.
1642         (sim_warning): Delete.  Replace calls with calls to
1643         sim_io_eprintf.
1644         (sim_error): Delete. Replace calls with sim_io_error.
1645         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1646         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1647         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1648         argument.
1649         (mips_size): Rename from sim_size. Add SD argument.
1650
1651         * interp.c (simulator): Delete global variable.
1652         (callback): Delete global variable.
1653         (mips_option_handler, sim_open, sim_write, sim_read,
1654         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1655         sim_size,sim_monitor): Use sim_io_* not callback->*.
1656         (sim_open): ZALLOC simulator struct.
1657         (PROFILE): Do not define.
1658
1659 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1660
1661         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1662         support.h with corresponding code.
1663
1664         * sim-main.h (word64, uword64), support.h: Move definition to
1665         sim-main.h.
1666         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1667
1668         * support.h: Delete
1669         * Makefile.in: Update dependencies
1670         * interp.c: Do not include.
1671
1672 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1673
1674         * interp.c (address_translation, load_memory, store_memory,
1675         cache_op): Rename to from AddressTranslation et.al., make global,
1676         add SD argument
1677
1678         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1679         CacheOp): Define.
1680
1681         * interp.c (SignalException): Rename to signal_exception, make
1682         global.
1683
1684         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1685
1686         * sim-main.h (SignalException, SignalExceptionInterrupt,
1687         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1688         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1689         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1690         Define.
1691
1692         * interp.c, support.h: Use.
1693
1694 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1695
1696         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1697         to value_fpr / store_fpr. Add SD argument.
1698         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1699         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1700
1701         * sim-main.h (ValueFPR, StoreFPR): Define.
1702
1703 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         * interp.c (sim_engine_run): Check consistency between configure
1706         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1707         and HASFPU.
1708
1709         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1710         (mips_fpu): Configure WITH_FLOATING_POINT.
1711         (mips_endian): Configure WITH_TARGET_ENDIAN.
1712         * configure: Update.
1713
1714 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1715
1716         * configure: Regenerated to track ../common/aclocal.m4 changes.
1717
1718 start-sanitize-r5900
1719 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1720
1721         * interp.c (MAX_REG): Allow up-to 128 registers.
1722         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1723         (REGISTER_SA): Ditto.
1724         (sim_open): Initialize register_widths for r5900 specific
1725         registers.
1726         (sim_fetch_register, sim_store_register): Check for request of
1727         r5900 specific SA register.  Check for request for hi 64 bits of
1728         r5900 specific registers.
1729
1730 end-sanitize-r5900
1731 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1732
1733         * configure: Regenerated.
1734
1735 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1736
1737         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1738
1739 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1740
1741         * gencode.c (print_igen_insn_models): Assume certain architectures
1742         include all mips* instructions.
1743         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1744         instruction.
1745
1746         * Makefile.in (tmp.igen): Add target. Generate igen input from
1747         gencode file.
1748
1749         * gencode.c (FEATURE_IGEN): Define.
1750         (main): Add --igen option.  Generate output in igen format.
1751         (process_instructions): Format output according to igen option.
1752         (print_igen_insn_format): New function.
1753         (print_igen_insn_models): New function.
1754         (process_instructions): Only issue warnings and ignore
1755         instructions when no FEATURE_IGEN.
1756
1757 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1758
1759         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1760         MIPS targets.
1761
1762 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1763
1764         * configure: Regenerated to track ../common/aclocal.m4 changes.
1765
1766 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1767
1768         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1769         SIM_RESERVED_BITS): Delete, moved to common.
1770         (SIM_EXTRA_CFLAGS): Update.
1771
1772 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1773
1774         * configure.in: Configure non-strict memory alignment.
1775         * configure: Regenerated to track ../common/aclocal.m4 changes.
1776
1777 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1778
1779         * configure: Regenerated to track ../common/aclocal.m4 changes.
1780
1781 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1782
1783         * gencode.c (SDBBP,DERET): Added (3900) insns.
1784         (RFE): Turn on for 3900.
1785         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1786         (dsstate): Made global.
1787         (SUBTARGET_R3900): Added.
1788         (CANCELDELAYSLOT): New.
1789         (SignalException): Ignore SystemCall rather than ignore and
1790         terminate.  Add DebugBreakPoint handling.
1791         (decode_coproc): New insns RFE, DERET; and new registers Debug
1792         and DEPC protected by SUBTARGET_R3900.
1793         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1794         bits explicitly.
1795         * Makefile.in,configure.in: Add mips subtarget option.
1796         * configure: Update.
1797
1798 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1799
1800         * gencode.c: Add r3900 (tx39).
1801
1802 start-sanitize-tx19
1803         * gencode.c: Fix some configuration problems by improving
1804         the relationship between tx19 and tx39.
1805 end-sanitize-tx19
1806
1807 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1808
1809         * gencode.c (build_instruction): Don't need to subtract 4 for
1810         JALR, just 2.
1811
1812 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1813
1814         * interp.c: Correct some HASFPU problems.
1815
1816 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1817
1818         * configure: Regenerated to track ../common/aclocal.m4 changes.
1819
1820 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1821
1822         * interp.c (mips_options): Fix samples option short form, should
1823         be `x'.
1824
1825 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1826
1827         * interp.c (sim_info): Enable info code.  Was just returning.
1828
1829 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1830
1831         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1832         MFC0.
1833
1834 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1835
1836         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1837         constants.
1838         (build_instruction): Ditto for LL.
1839
1840 start-sanitize-tx19
1841 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1842
1843         * mips/configure.in, mips/gencode: Add tx19/r1900.
1844
1845 end-sanitize-tx19
1846 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1847
1848         * configure: Regenerated to track ../common/aclocal.m4 changes.
1849
1850 start-sanitize-r5900
1851 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1852
1853         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1854         for overflow due to ABS of MININT, set result to MAXINT.
1855         (build_instruction): For "psrlvw", signextend bit 31.
1856
1857 end-sanitize-r5900
1858 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1859
1860         * configure: Regenerated to track ../common/aclocal.m4 changes.
1861         * config.in: Ditto.
1862
1863 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1864
1865         * interp.c (sim_open): Add call to sim_analyze_program, update
1866         call to sim_config.
1867
1868 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1869
1870         * interp.c (sim_kill): Delete.
1871         (sim_create_inferior): Add ABFD argument. Set PC from same.
1872         (sim_load): Move code initializing trap handlers from here.
1873         (sim_open): To here.
1874         (sim_load): Delete, use sim-hload.c.
1875
1876         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1877
1878 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1879
1880         * configure: Regenerated to track ../common/aclocal.m4 changes.
1881         * config.in: Ditto.
1882
1883 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1884
1885         * interp.c (sim_open): Add ABFD argument.
1886         (sim_load): Move call to sim_config from here.
1887         (sim_open): To here.  Check return status.
1888
1889 start-sanitize-r5900
1890         * gencode.c (build_instruction): Do not define x8000000000000000,
1891         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1892
1893 end-sanitize-r5900
1894 start-sanitize-r5900
1895 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1896
1897         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1898         "pdivuw" check for overflow due to signed divide by -1.
1899
1900 end-sanitize-r5900
1901 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1902
1903         * gencode.c (build_instruction): Two arg MADD should
1904         not assign result to $0.
1905
1906 start-sanitize-r5900
1907 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1908
1909         * gencode.c (build_instruction): For "ppac5" use unsigned
1910         arrithmetic so that the sign bit doesn't smear when right shifted.
1911         (build_instruction): For "pdiv" perform sign extension when
1912         storing results in HI and LO.
1913         (build_instructions): For "pdiv" and "pdivbw" check for
1914         divide-by-zero.
1915         (build_instruction): For "pmfhl.slw" update hi part of dest
1916         register as well as low part.
1917         (build_instruction): For "pmfhl" portably handle long long values.
1918         (build_instruction): For "pmfhl.sh" correctly negative values.
1919         Store half words 2 and three in the correct place.
1920         (build_instruction): For "psllvw", sign extend value after shift.
1921
1922 end-sanitize-r5900
1923 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1924
1925         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1926         * sim/mips/configure.in: Regenerate.
1927
1928 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1929
1930         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1931         signed8, unsigned8 et.al. types.
1932
1933 start-sanitize-r5900
1934         * gencode.c (build_instruction): For PMULTU* do not sign extend
1935         registers.  Make generated code easier to debug.
1936
1937 end-sanitize-r5900
1938         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1939         hosts when selecting subreg.
1940
1941 start-sanitize-r5900
1942 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1943
1944         * gencode.c (type_for_data_len): For 32bit operations concerned
1945         with overflow, perform op using 64bits.
1946         (build_instruction): For PADD, always compute operation using type
1947         returned by type_for_data_len.
1948         (build_instruction): For PSUBU, when overflow, saturate to zero as
1949         actually underflow.
1950
1951 end-sanitize-r5900
1952 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1953
1954 start-sanitize-r5900
1955         * gencode.c (build_instruction): Handle "pext5" according to
1956         version 1.95 of the r5900 ISA.
1957
1958         * gencode.c (build_instruction): Handle "ppac5" according to
1959         version 1.95 of the r5900 ISA.
1960
1961 end-sanitize-r5900
1962         * interp.c (sim_engine_run): Reset the ZERO register to zero
1963         regardless of FEATURE_WARN_ZERO.
1964         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1965
1966 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1967
1968         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1969         (SignalException): For BreakPoints ignore any mode bits and just
1970         save the PC.
1971         (SignalException): Always set the CAUSE register.
1972
1973 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1974
1975         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1976         exception has been taken.
1977
1978         * interp.c: Implement the ERET and mt/f sr instructions.
1979
1980 start-sanitize-r5900
1981 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1982
1983         * gencode.c (build_instruction): For paddu, extract unsigned
1984         sub-fields.
1985
1986         * gencode.c (build_instruction): Saturate padds instead of padd
1987         instructions.
1988
1989 end-sanitize-r5900
1990 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1991
1992         * interp.c (SignalException): Don't bother restarting an
1993         interrupt.
1994
1995 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1996
1997         * interp.c (SignalException): Really take an interrupt.
1998         (interrupt_event): Only deliver interrupts when enabled.
1999
2000 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2001
2002         * interp.c (sim_info): Only print info when verbose.
2003         (sim_info) Use sim_io_printf for output.
2004
2005 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2006
2007         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2008         mips architectures.
2009
2010 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2011
2012         * interp.c (sim_do_command): Check for common commands if a
2013         simulator specific command fails.
2014
2015 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2016
2017         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2018         and simBE when DEBUG is defined.
2019
2020 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2021
2022         * interp.c (interrupt_event): New function.  Pass exception event
2023         onto exception handler.
2024
2025         * configure.in: Check for stdlib.h.
2026         * configure: Regenerate.
2027
2028         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2029         variable declaration.
2030         (build_instruction): Initialize memval1.
2031         (build_instruction): Add UNUSED attribute to byte, bigend,
2032         reverse.
2033         (build_operands): Ditto.
2034
2035         * interp.c: Fix GCC warnings.
2036         (sim_get_quit_code): Delete.
2037
2038         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2039         * Makefile.in: Ditto.
2040         * configure: Re-generate.
2041
2042         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2043
2044 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2045
2046         * interp.c (mips_option_handler): New function parse argumes using
2047         sim-options.
2048         (myname): Replace with STATE_MY_NAME.
2049         (sim_open): Delete check for host endianness - performed by
2050         sim_config.
2051         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2052         (sim_open): Move much of the initialization from here.
2053         (sim_load): To here.  After the image has been loaded and
2054         endianness set.
2055         (sim_open): Move ColdReset from here.
2056         (sim_create_inferior): To here.
2057         (sim_open): Make FP check less dependant on host endianness.
2058
2059         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2060         run.
2061         * interp.c (sim_set_callbacks): Delete.
2062
2063         * interp.c (membank, membank_base, membank_size): Replace with
2064         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2065         (sim_open): Remove call to callback->init. gdb/run do this.
2066
2067         * interp.c: Update
2068
2069         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2070
2071         * interp.c (big_endian_p): Delete, replaced by
2072         current_target_byte_order.
2073
2074 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2075
2076         * interp.c (host_read_long, host_read_word, host_swap_word,
2077         host_swap_long): Delete. Using common sim-endian.
2078         (sim_fetch_register, sim_store_register): Use H2T.
2079         (pipeline_ticks): Delete.  Handled by sim-events.
2080         (sim_info): Update.
2081         (sim_engine_run): Update.
2082
2083 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2084
2085         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2086         reason from here.
2087         (SignalException): To here. Signal using sim_engine_halt.
2088         (sim_stop_reason): Delete, moved to common.
2089
2090 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2091
2092         * interp.c (sim_open): Add callback argument.
2093         (sim_set_callbacks): Delete SIM_DESC argument.
2094         (sim_size): Ditto.
2095
2096 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2097
2098         * Makefile.in (SIM_OBJS): Add common modules.
2099
2100         * interp.c (sim_set_callbacks): Also set SD callback.
2101         (set_endianness, xfer_*, swap_*): Delete.
2102         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2103         Change to functions using sim-endian macros.
2104         (control_c, sim_stop): Delete, use common version.
2105         (simulate): Convert into.
2106         (sim_engine_run): This function.
2107         (sim_resume): Delete.
2108
2109         * interp.c (simulation): New variable - the simulator object.
2110         (sim_kind): Delete global - merged into simulation.
2111         (sim_load): Cleanup.  Move PC assignment from here.
2112         (sim_create_inferior): To here.
2113
2114         * sim-main.h: New file.
2115         * interp.c (sim-main.h): Include.
2116
2117 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2118
2119         * configure: Regenerated to track ../common/aclocal.m4 changes.
2120
2121 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2122
2123         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2124
2125 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2126
2127         * gencode.c (build_instruction): DIV instructions: check
2128         for division by zero and integer overflow before using
2129         host's division operation.
2130
2131 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2132
2133         * Makefile.in (SIM_OBJS): Add sim-load.o.
2134         * interp.c: #include bfd.h.
2135         (target_byte_order): Delete.
2136         (sim_kind, myname, big_endian_p): New static locals.
2137         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2138         after argument parsing.  Recognize -E arg, set endianness accordingly.
2139         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2140         load file into simulator.  Set PC from bfd.
2141         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2142         (set_endianness): Use big_endian_p instead of target_byte_order.
2143
2144 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * interp.c (sim_size): Delete prototype - conflicts with
2147         definition in remote-sim.h.  Correct definition.
2148
2149 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2150
2151         * configure: Regenerated to track ../common/aclocal.m4 changes.
2152         * config.in: Ditto.
2153
2154 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2155
2156         * interp.c (sim_open): New arg `kind'.
2157
2158         * configure: Regenerated to track ../common/aclocal.m4 changes.
2159
2160 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2161
2162         * configure: Regenerated to track ../common/aclocal.m4 changes.
2163
2164 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2165
2166         * interp.c (sim_open): Set optind to 0 before calling getopt.
2167
2168 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2169
2170         * configure: Regenerated to track ../common/aclocal.m4 changes.
2171
2172 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2173
2174         * interp.c : Replace uses of pr_addr with pr_uword64
2175         where the bit length is always 64 independent of SIM_ADDR.
2176         (pr_uword64) : added.
2177
2178 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2179
2180         * configure: Re-generate.
2181
2182 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2183
2184         * configure: Regenerate to track ../common/aclocal.m4 changes.
2185
2186 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2187
2188         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2189         in argv form.
2190         (other sim_*): New SIM_DESC argument.
2191
2192 start-sanitize-r5900
2193 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
2194
2195         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
2196         Change values to avoid overloading DOUBLEWORD which is tested
2197         for all insns.
2198         * gencode.c: reinstate "offending code".
2199
2200 end-sanitize-r5900
2201 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2202
2203         * interp.c: Fix printing of addresses for non-64-bit targets.
2204         (pr_addr): Add function to print address based on size.
2205 start-sanitize-r5900
2206         * gencode.c: #ifdef out offending code until a permanent fix
2207         can be added.  Code is causing build errors for non-5900 mips targets.
2208 end-sanitize-r5900
2209
2210 start-sanitize-r5900
2211 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2212
2213         * gencode.c (process_instructions): Correct test for ISA dependent
2214         architecture bits in isa field of MIPS_DECODE.
2215
2216 end-sanitize-r5900
2217 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2218
2219         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2220
2221 start-sanitize-r5900
2222 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
2223
2224         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
2225         PMADDUW.
2226
2227 end-sanitize-r5900
2228 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2229
2230         * gencode.c (build_mips16_operands): Correct computation of base
2231         address for extended PC relative instruction.
2232
2233 start-sanitize-r5900
2234 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
2235
2236         * Makefile.in, configure, configure.in, gencode.c,
2237         interp.c, support.h: add r5900.
2238
2239 end-sanitize-r5900
2240 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2241
2242         * interp.c (mips16_entry): Add support for floating point cases.
2243         (SignalException): Pass floating point cases to mips16_entry.
2244         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2245         registers.
2246         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2247         or fmt_word.
2248         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2249         and then set the state to fmt_uninterpreted.
2250         (COP_SW): Temporarily set the state to fmt_word while calling
2251         ValueFPR.
2252
2253 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2254
2255         * gencode.c (build_instruction): The high order may be set in the
2256         comparison flags at any ISA level, not just ISA 4.
2257
2258 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2259
2260         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2261         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2262         * configure.in: sinclude ../common/aclocal.m4.
2263         * configure: Regenerated.
2264
2265 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2266
2267         * configure: Rebuild after change to aclocal.m4.
2268
2269 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2270
2271         * configure configure.in Makefile.in:  Update to new configure
2272         scheme which is more compatible with WinGDB builds.
2273         * configure.in:  Improve comment on how to run autoconf.
2274         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2275         * Makefile.in:  Use autoconf substitution to install common
2276         makefile fragment.
2277
2278 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2279
2280         * gencode.c (build_instruction): Use BigEndianCPU instead of
2281         ByteSwapMem.
2282
2283 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2284
2285         * interp.c (sim_monitor): Make output to stdout visible in
2286         wingdb's I/O log window.
2287
2288 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2289
2290         * support.h: Undo previous change to SIGTRAP
2291         and SIGQUIT values.
2292
2293 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2294
2295         * interp.c (store_word, load_word): New static functions.
2296         (mips16_entry): New static function.
2297         (SignalException): Look for mips16 entry and exit instructions.
2298         (simulate): Use the correct index when setting fpr_state after
2299         doing a pending move.
2300
2301 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2302
2303         * interp.c: Fix byte-swapping code throughout to work on
2304         both little- and big-endian hosts.
2305
2306 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2307
2308         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2309         with gdb/config/i386/xm-windows.h.
2310
2311 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2312
2313         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2314         that messes up arithmetic shifts.
2315
2316 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2317
2318         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2319         SIGTRAP and SIGQUIT for _WIN32.
2320
2321 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2322
2323         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2324         force a 64 bit multiplication.
2325         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2326         destination register is 0, since that is the default mips16 nop
2327         instruction.
2328
2329 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2330
2331         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2332         (build_endian_shift): Don't check proc64.
2333         (build_instruction): Always set memval to uword64.  Cast op2 to
2334         uword64 when shifting it left in memory instructions.  Always use
2335         the same code for stores--don't special case proc64.
2336
2337         * gencode.c (build_mips16_operands): Fix base PC value for PC
2338         relative operands.
2339         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2340         jal instruction.
2341         * interp.c (simJALDELAYSLOT): Define.
2342         (JALDELAYSLOT): Define.
2343         (INDELAYSLOT, INJALDELAYSLOT): Define.
2344         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2345
2346 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2347
2348         * interp.c (sim_open): add flush_cache as a PMON routine
2349         (sim_monitor): handle flush_cache by ignoring it
2350
2351 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2352
2353         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2354         BigEndianMem.
2355         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2356         (BigEndianMem): Rename to ByteSwapMem and change sense.
2357         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2358         BigEndianMem references to !ByteSwapMem.
2359         (set_endianness): New function, with prototype.
2360         (sim_open): Call set_endianness.
2361         (sim_info): Use simBE instead of BigEndianMem.
2362         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2363         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2364         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2365         ifdefs, keeping the prototype declaration.
2366         (swap_word): Rewrite correctly.
2367         (ColdReset): Delete references to CONFIG.  Delete endianness related
2368         code; moved to set_endianness.
2369
2370 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2371
2372         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2373         * interp.c (CHECKHILO): Define away.
2374         (simSIGINT): New macro.
2375         (membank_size): Increase from 1MB to 2MB.
2376         (control_c): New function.
2377         (sim_resume): Rename parameter signal to signal_number.  Add local
2378         variable prev.  Call signal before and after simulate.
2379         (sim_stop_reason): Add simSIGINT support.
2380         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2381         functions always.
2382         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2383         if logfh is NULL.
2384         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2385         a call to sim_warning.
2386
2387 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2388
2389         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2390         16 bit instructions.
2391
2392 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2393
2394         Add support for mips16 (16 bit MIPS implementation):
2395         * gencode.c (inst_type): Add mips16 instruction encoding types.
2396         (GETDATASIZEINSN): Define.
2397         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2398         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2399         mtlo.
2400         (MIPS16_DECODE): New table, for mips16 instructions.
2401         (bitmap_val): New static function.
2402         (struct mips16_op): Define.
2403         (mips16_op_table): New table, for mips16 operands.
2404         (build_mips16_operands): New static function.
2405         (process_instructions): If PC is odd, decode a mips16
2406         instruction.  Break out instruction handling into new
2407         build_instruction function.
2408         (build_instruction): New static function, broken out of
2409         process_instructions.  Check modifiers rather than flags for SHIFT
2410         bit count and m[ft]{hi,lo} direction.
2411         (usage): Pass program name to fprintf.
2412         (main): Remove unused variable this_option_optind.  Change
2413         ``*loptarg++'' to ``loptarg++''.
2414         (my_strtoul): Parenthesize && within ||.
2415         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2416         (simulate): If PC is odd, fetch a 16 bit instruction, and
2417         increment PC by 2 rather than 4.
2418         * configure.in: Add case for mips16*-*-*.
2419         * configure: Rebuild.
2420
2421 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2422
2423         * interp.c: Allow -t to enable tracing in standalone simulator.
2424         Fix garbage output in trace file and error messages.
2425
2426 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2427
2428         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2429         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2430         * configure.in: Simplify using macros in ../common/aclocal.m4.
2431         * configure: Regenerated.
2432         * tconfig.in: New file.
2433
2434 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2435
2436         * interp.c: Fix bugs in 64-bit port.
2437         Use ansi function declarations for msvc compiler.
2438         Initialize and test file pointer in trace code.
2439         Prevent duplicate definition of LAST_EMED_REGNUM.
2440
2441 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2442
2443         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2444
2445 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2446
2447         * interp.c (SignalException): Check for explicit terminating
2448         breakpoint value.
2449         * gencode.c: Pass instruction value through SignalException()
2450         calls for Trap, Breakpoint and Syscall.
2451
2452 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2453
2454         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2455         only used on those hosts that provide it.
2456         * configure.in: Add sqrt() to list of functions to be checked for.
2457         * config.in: Re-generated.
2458         * configure: Re-generated.
2459
2460 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2461
2462         * gencode.c (process_instructions): Call build_endian_shift when
2463         expanding STORE RIGHT, to fix swr.
2464         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2465         clear the high bits.
2466         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2467         Fix float to int conversions to produce signed values.
2468
2469 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2470
2471         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2472         (process_instructions): Correct handling of nor instruction.
2473         Correct shift count for 32 bit shift instructions. Correct sign
2474         extension for arithmetic shifts to not shift the number of bits in
2475         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2476         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2477         Fix madd.
2478         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2479         It's OK to have a mult follow a mult.  What's not OK is to have a
2480         mult follow an mfhi.
2481         (Convert): Comment out incorrect rounding code.
2482
2483 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2484
2485         * interp.c (sim_monitor): Improved monitor printf
2486         simulation. Tidied up simulator warnings, and added "--log" option
2487         for directing warning message output.
2488         * gencode.c: Use sim_warning() rather than WARNING macro.
2489
2490 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2491
2492         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2493         getopt1.o, rather than on gencode.c.  Link objects together.
2494         Don't link against -liberty.
2495         (gencode.o, getopt.o, getopt1.o): New targets.
2496         * gencode.c: Include <ctype.h> and "ansidecl.h".
2497         (AND): Undefine after including "ansidecl.h".
2498         (ULONG_MAX): Define if not defined.
2499         (OP_*): Don't define macros; now defined in opcode/mips.h.
2500         (main): Call my_strtoul rather than strtoul.
2501         (my_strtoul): New static function.
2502
2503 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2504
2505         * gencode.c (process_instructions):  Generate word64 and uword64
2506         instead of `long long' and `unsigned long long' data types.
2507         * interp.c:  #include sysdep.h to get signals, and define default
2508         for SIGBUS.
2509         * (Convert):  Work around for Visual-C++ compiler bug with type
2510         conversion.
2511         * support.h:  Make things compile under Visual-C++ by using
2512         __int64 instead of `long long'.  Change many refs to long long
2513         into word64/uword64 typedefs.
2514
2515 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2516
2517         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2518         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2519         (docdir): Removed.
2520         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2521         (AC_PROG_INSTALL): Added.
2522         (AC_PROG_CC): Moved to before configure.host call.
2523         * configure: Rebuilt.
2524
2525 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2526
2527         * configure.in: Define @SIMCONF@ depending on mips target.
2528         * configure: Rebuild.
2529         * Makefile.in (run): Add @SIMCONF@ to control simulator
2530         construction.
2531         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2532         * interp.c: Remove some debugging, provide more detailed error
2533         messages, update memory accesses to use LOADDRMASK.
2534
2535 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2536
2537         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2538         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2539         stamp-h.
2540         * configure: Rebuild.
2541         * config.in: New file, generated by autoheader.
2542         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2543         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2544         HAVE_ANINT and HAVE_AINT, as appropriate.
2545         * Makefile.in (run): Use @LIBS@ rather than -lm.
2546         (interp.o): Depend upon config.h.
2547         (Makefile): Just rebuild Makefile.
2548         (clean): Remove stamp-h.
2549         (mostlyclean): Make the same as clean, not as distclean.
2550         (config.h, stamp-h): New targets.
2551
2552 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2553
2554         * interp.c (ColdReset): Fix boolean test. Make all simulator
2555         globals static.
2556
2557 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2558
2559         * interp.c (xfer_direct_word, xfer_direct_long,
2560         swap_direct_word, swap_direct_long, xfer_big_word,
2561         xfer_big_long, xfer_little_word, xfer_little_long,
2562         swap_word,swap_long): Added.
2563         * interp.c (ColdReset): Provide function indirection to
2564         host<->simulated_target transfer routines.
2565         * interp.c (sim_store_register, sim_fetch_register): Updated to
2566         make use of indirected transfer routines.
2567
2568 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2569
2570         * gencode.c (process_instructions): Ensure FP ABS instruction
2571         recognised.
2572         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2573         system call support.
2574
2575 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2576
2577         * interp.c (sim_do_command): Complain if callback structure not
2578         initialised.
2579
2580 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2581
2582         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2583         support for Sun hosts.
2584         * Makefile.in (gencode): Ensure the host compiler and libraries
2585         used for cross-hosted build.
2586
2587 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2588
2589         * interp.c, gencode.c: Some more (TODO) tidying.
2590
2591 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2592
2593         * gencode.c, interp.c: Replaced explicit long long references with
2594         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2595         * support.h (SET64LO, SET64HI): Macros added.
2596
2597 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2598
2599         * configure: Regenerate with autoconf 2.7.
2600
2601 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2602
2603         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2604         * support.h: Remove superfluous "1" from #if.
2605         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2606
2607 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2608
2609         * interp.c (StoreFPR): Control UndefinedResult() call on
2610         WARN_RESULT manifest.
2611
2612 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2613
2614         * gencode.c: Tidied instruction decoding, and added FP instruction
2615         support.
2616
2617         * interp.c: Added dineroIII, and BSD profiling support. Also
2618         run-time FP handling.
2619
2620 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2621
2622         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2623         gencode.c, interp.c, support.h: created.