1 1999-11-11 Andrew Haley <aph@cygnus.com>
3 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
6 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
8 * mips.igen (MULT): Correct previous mis-applied patch.
10 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
12 * mips.igen (delayslot32): Handle sequence like
13 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
14 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
15 (MULT): Actually pass the third register...
17 1999-09-03 Mark Salter <msalter@cygnus.com>
19 * interp.c (sim_open): Added more memory aliases for additional
20 hardware being touched by cygmon on jmr3904 board.
22 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
24 * configure: Regenerated to track ../common/aclocal.m4 changes.
26 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
28 * interp.c (sim_store_register): Handle case where client - GDB -
29 specifies that a 4 byte register is 8 bytes in size.
30 (sim_fetch_register): Ditto.
32 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
34 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
35 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
36 (idt_monitor_base): Base address for IDT monitor traps.
37 (pmon_monitor_base): Ditto for PMON.
38 (lsipmon_monitor_base): Ditto for LSI PMON.
39 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
40 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
41 (sim_firmware_command): New function.
42 (mips_option_handler): Call it for OPTION_FIRMWARE.
43 (sim_open): Allocate memory for idt_monitor region. If "--board"
44 option was given, add no monitor by default. Add BREAK hooks only if
45 monitors are also there.
47 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
49 * interp.c (sim_monitor): Flush output before reading input.
51 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
53 * tconfig.in (SIM_HANDLES_LMA): Always define.
55 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
57 From Mark Salter <msalter@cygnus.com>:
58 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
59 (sim_open): Add setup for BSP board.
61 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
63 * mips.igen (MULT, MULTU): Add syntax for two operand version.
64 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
65 them as unimplemented.
67 1999-05-08 Felix Lee <flee@cygnus.com>
69 * configure: Regenerated to track ../common/aclocal.m4 changes.
71 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
73 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
75 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
77 * configure.in: Any mips64vr5*-*-* target should have
79 (default_endian): Any mips64vr*el-*-* target should default to
81 * configure: Re-generate.
83 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
85 * mips.igen (ldl): Extend from _16_, not 32.
87 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
89 * interp.c (sim_store_register): Force registers written to by GDB
90 into an un-interpreted state.
92 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
94 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
95 CPU, start periodic background I/O polls.
96 (tx3904sio_poll): New function: periodic I/O poller.
98 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
100 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
102 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
104 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
107 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
109 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
110 (load_word): Call SIM_CORE_SIGNAL hook on error.
111 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
112 starting. For exception dispatching, pass PC instead of NULL_CIA.
113 (decode_coproc): Use COP0_BADVADDR to store faulting address.
114 * sim-main.h (COP0_BADVADDR): Define.
115 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
116 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
117 (_sim_cpu): Add exc_* fields to store register value snapshots.
118 * mips.igen (*): Replace memory-related SignalException* calls
119 with references to SIM_CORE_SIGNAL hook.
121 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
123 * sim-main.c (*): Minor warning cleanups.
125 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
127 * m16.igen (DADDIU5): Correct type-o.
129 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
131 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
134 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
136 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
138 (interp.o): Add dependency on itable.h
139 (oengine.c, gencode): Delete remaining references.
140 (BUILT_SRC_FROM_GEN): Clean up.
142 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
145 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
146 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
148 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
149 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
150 Drop the "64" qualifier to get the HACK generator working.
151 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
152 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
153 qualifier to get the hack generator working.
154 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
156 (DSLLV): Use do_dsllv.
159 (DSRLV): Use do_dsrlv.
160 (BC1): Move *vr4100 to get the HACK generator working.
161 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
162 get the HACK generator working.
163 (MACC) Rename to get the HACK generator working.
164 (DMACC,MACCS,DMACCS): Add the 64.
166 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
168 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
169 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
171 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
173 * mips/interp.c (DEBUG): Cleanups.
175 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
177 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
178 (tx3904sio_tickle): fflush after a stdout character output.
180 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
182 * interp.c (sim_close): Uninstall modules.
184 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
186 * sim-main.h, interp.c (sim_monitor): Change to global
189 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
191 * configure.in (vr4100): Only include vr4100 instructions in
193 * configure: Re-generate.
194 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
196 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
198 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
199 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
202 * configure.in (sim_default_gen, sim_use_gen): Replace with
204 (--enable-sim-igen): Delete config option. Always using IGEN.
205 * configure: Re-generate.
207 * Makefile.in (gencode): Kill, kill, kill.
210 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
212 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
213 bit mips16 igen simulator.
214 * configure: Re-generate.
216 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
217 as part of vr4100 ISA.
218 * vr.igen: Mark all instructions as 64 bit only.
220 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
222 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
225 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
227 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
228 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
229 * configure: Re-generate.
231 * m16.igen (BREAK): Define breakpoint instruction.
232 (JALX32): Mark instruction as mips16 and not r3900.
233 * mips.igen (C.cond.fmt): Fix typo in instruction format.
235 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
237 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
239 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
240 insn as a debug breakpoint.
242 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
244 (PENDING_SCHED): Clean up trace statement.
245 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
246 (PENDING_FILL): Delay write by only one cycle.
247 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
249 * sim-main.c (pending_tick): Clean up trace statements. Add trace
251 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
253 (pending_tick): Move incrementing of index to FOR statement.
254 (pending_tick): Only update PENDING_OUT after a write has occured.
256 * configure.in: Add explicit mips-lsi-* target. Use gencode to
258 * configure: Re-generate.
260 * interp.c (sim_engine_run OLD): Delete explicit call to
261 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
263 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
265 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
266 interrupt level number to match changed SignalExceptionInterrupt
269 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
271 * interp.c: #include "itable.h" if WITH_IGEN.
272 (get_insn_name): New function.
273 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
274 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
276 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
278 * configure: Rebuilt to inhale new common/aclocal.m4.
280 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
282 * dv-tx3904sio.c: Include sim-assert.h.
284 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
286 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
287 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
288 Reorganize target-specific sim-hardware checks.
289 * configure: rebuilt.
290 * interp.c (sim_open): For tx39 target boards, set
291 OPERATING_ENVIRONMENT, add tx3904sio devices.
292 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
293 ROM executables. Install dv-sockser into sim-modules list.
295 * dv-tx3904irc.c: Compiler warning clean-up.
296 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
297 frequent hw-trace messages.
299 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
301 * vr.igen (MulAcc): Identify as a vr4100 specific function.
303 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
305 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
308 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
309 * mips.igen: Define vr4100 model. Include vr.igen.
310 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
312 * mips.igen (check_mf_hilo): Correct check.
314 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
316 * sim-main.h (interrupt_event): Add prototype.
318 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
319 register_ptr, register_value.
320 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
322 * sim-main.h (tracefh): Make extern.
324 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
326 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
327 Reduce unnecessarily high timer event frequency.
328 * dv-tx3904cpu.c: Ditto for interrupt event.
330 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
332 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
334 (interrupt_event): Made non-static.
336 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
337 interchange of configuration values for external vs. internal
340 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
342 * mips.igen (BREAK): Moved code to here for
343 simulator-reserved break instructions.
344 * gencode.c (build_instruction): Ditto.
345 * interp.c (signal_exception): Code moved from here. Non-
346 reserved instructions now use exception vector, rather
348 * sim-main.h: Moved magic constants to here.
350 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
352 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
353 register upon non-zero interrupt event level, clear upon zero
355 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
356 by passing zero event value.
357 (*_io_{read,write}_buffer): Endianness fixes.
358 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
359 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
361 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
362 serial I/O and timer module at base address 0xFFFF0000.
364 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
366 * mips.igen (SWC1) : Correct the handling of ReverseEndian
369 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
371 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
375 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
377 * dv-tx3904tmr.c: New file - implements tx3904 timer.
378 * dv-tx3904{irc,cpu}.c: Mild reformatting.
379 * configure.in: Include tx3904tmr in hw_device list.
380 * configure: Rebuilt.
381 * interp.c (sim_open): Instantiate three timer instances.
382 Fix address typo of tx3904irc instance.
384 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
386 * interp.c (signal_exception): SystemCall exception now uses
387 the exception vector.
389 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
391 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
394 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
396 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
398 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
400 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
402 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
403 sim-main.h. Declare a struct hw_descriptor instead of struct
404 hw_device_descriptor.
406 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
408 * mips.igen (do_store_left, do_load_left): Compute nr of left and
409 right bits and then re-align left hand bytes to correct byte
410 lanes. Fix incorrect computation in do_store_left when loading
411 bytes from second word.
413 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
415 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
416 * interp.c (sim_open): Only create a device tree when HW is
419 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
420 * interp.c (signal_exception): Ditto.
422 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
424 * gencode.c: Mark BEGEZALL as LIKELY.
426 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
428 * sim-main.h (ALU32_END): Sign extend 32 bit results.
429 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
431 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
433 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
434 modules. Recognize TX39 target with "mips*tx39" pattern.
435 * configure: Rebuilt.
436 * sim-main.h (*): Added many macros defining bits in
437 TX39 control registers.
438 (SignalInterrupt): Send actual PC instead of NULL.
439 (SignalNMIReset): New exception type.
440 * interp.c (board): New variable for future use to identify
441 a particular board being simulated.
442 (mips_option_handler,mips_options): Added "--board" option.
443 (interrupt_event): Send actual PC.
444 (sim_open): Make memory layout conditional on board setting.
445 (signal_exception): Initial implementation of hardware interrupt
446 handling. Accept another break instruction variant for simulator
448 (decode_coproc): Implement RFE instruction for TX39.
449 (mips.igen): Decode RFE instruction as such.
450 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
451 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
452 bbegin to implement memory map.
453 * dv-tx3904cpu.c: New file.
454 * dv-tx3904irc.c: New file.
456 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
458 * mips.igen (check_mt_hilo): Create a separate r3900 version.
460 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
462 * tx.igen (madd,maddu): Replace calls to check_op_hilo
463 with calls to check_div_hilo.
465 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
467 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
468 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
469 Add special r3900 version of do_mult_hilo.
470 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
471 with calls to check_mult_hilo.
472 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
473 with calls to check_div_hilo.
475 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
477 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
478 Document a replacement.
480 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
482 * interp.c (sim_monitor): Make mon_printf work.
484 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
486 * sim-main.h (INSN_NAME): New arg `cpu'.
488 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
490 * configure: Regenerated to track ../common/aclocal.m4 changes.
492 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
494 * configure: Regenerated to track ../common/aclocal.m4 changes.
497 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
499 * acconfig.h: New file.
500 * configure.in: Reverted change of Apr 24; use sinclude again.
502 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
504 * configure: Regenerated to track ../common/aclocal.m4 changes.
507 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
509 * configure.in: Don't call sinclude.
511 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
513 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
515 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
517 * mips.igen (ERET): Implement.
519 * interp.c (decode_coproc): Return sign-extended EPC.
521 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
523 * interp.c (signal_exception): Do not ignore Trap.
524 (signal_exception): On TRAP, restart at exception address.
525 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
526 (signal_exception): Update.
527 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
528 so that TRAP instructions are caught.
530 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
532 * sim-main.h (struct hilo_access, struct hilo_history): Define,
533 contains HI/LO access history.
534 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
535 (HIACCESS, LOACCESS): Delete, replace with
536 (HIHISTORY, LOHISTORY): New macros.
537 (CHECKHILO): Delete all, moved to mips.igen
539 * gencode.c (build_instruction): Do not generate checks for
540 correct HI/LO register usage.
542 * interp.c (old_engine_run): Delete checks for correct HI/LO
545 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
546 check_mf_cycles): New functions.
547 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
548 do_divu, domultx, do_mult, do_multu): Use.
550 * tx.igen ("madd", "maddu"): Use.
552 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
554 * mips.igen (DSRAV): Use function do_dsrav.
555 (SRAV): Use new function do_srav.
557 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
558 (B): Sign extend 11 bit immediate.
559 (EXT-B*): Shift 16 bit immediate left by 1.
560 (ADDIU*): Don't sign extend immediate value.
562 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
564 * m16run.c (sim_engine_run): Restore CIA after handling an event.
566 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
569 * mips.igen (delayslot32, nullify_next_insn): New functions.
570 (m16.igen): Always include.
571 (do_*): Add more tracing.
573 * m16.igen (delayslot16): Add NIA argument, could be called by a
574 32 bit MIPS16 instruction.
576 * interp.c (ifetch16): Move function from here.
577 * sim-main.c (ifetch16): To here.
579 * sim-main.c (ifetch16, ifetch32): Update to match current
580 implementations of LH, LW.
581 (signal_exception): Don't print out incorrect hex value of illegal
584 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
586 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
589 * m16.igen: Implement MIPS16 instructions.
591 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
592 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
593 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
594 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
595 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
596 bodies of corresponding code from 32 bit insn to these. Also used
597 by MIPS16 versions of functions.
599 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
600 (IMEM16): Drop NR argument from macro.
602 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
604 * Makefile.in (SIM_OBJS): Add sim-main.o.
606 * sim-main.h (address_translation, load_memory, store_memory,
607 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
609 (pr_addr, pr_uword64): Declare.
610 (sim-main.c): Include when H_REVEALS_MODULE_P.
612 * interp.c (address_translation, load_memory, store_memory,
613 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
615 * sim-main.c: To here. Fix compilation problems.
617 * configure.in: Enable inlining.
618 * configure: Re-config.
620 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
622 * configure: Regenerated to track ../common/aclocal.m4 changes.
624 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
626 * mips.igen: Include tx.igen.
627 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
628 * tx.igen: New file, contains MADD and MADDU.
630 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
631 the hardwired constant `7'.
632 (store_memory): Ditto.
633 (LOADDRMASK): Move definition to sim-main.h.
635 mips.igen (MTC0): Enable for r3900.
638 mips.igen (do_load_byte): Delete.
639 (do_load, do_store, do_load_left, do_load_write, do_store_left,
640 do_store_right): New functions.
641 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
643 configure.in: Let the tx39 use igen again.
646 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
648 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
649 not an address sized quantity. Return zero for cache sizes.
651 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
653 * mips.igen (r3900): r3900 does not support 64 bit integer
656 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
658 * configure.in (mipstx39*-*-*): Use gencode simulator rather
660 * configure : Rebuild.
662 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
664 * configure: Regenerated to track ../common/aclocal.m4 changes.
666 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
668 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
670 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
672 * configure: Regenerated to track ../common/aclocal.m4 changes.
673 * config.in: Regenerated to track ../common/aclocal.m4 changes.
675 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
677 * configure: Regenerated to track ../common/aclocal.m4 changes.
679 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
681 * interp.c (Max, Min): Comment out functions. Not yet used.
683 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
685 * configure: Regenerated to track ../common/aclocal.m4 changes.
687 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
689 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
690 configurable settings for stand-alone simulator.
692 * configure.in: Added X11 search, just in case.
694 * configure: Regenerated.
696 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
698 * interp.c (sim_write, sim_read, load_memory, store_memory):
699 Replace sim_core_*_map with read_map, write_map, exec_map resp.
701 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
703 * sim-main.h (GETFCC): Return an unsigned value.
705 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
707 * mips.igen (DIV): Fix check for -1 / MIN_INT.
708 (DADD): Result destination is RD not RT.
710 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
712 * sim-main.h (HIACCESS, LOACCESS): Always define.
714 * mdmx.igen (Maxi, Mini): Rename Max, Min.
716 * interp.c (sim_info): Delete.
718 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
720 * interp.c (DECLARE_OPTION_HANDLER): Use it.
721 (mips_option_handler): New argument `cpu'.
722 (sim_open): Update call to sim_add_option_table.
724 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
726 * mips.igen (CxC1): Add tracing.
728 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
730 * sim-main.h (Max, Min): Declare.
732 * interp.c (Max, Min): New functions.
734 * mips.igen (BC1): Add tracing.
736 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
738 * interp.c Added memory map for stack in vr4100
740 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
742 * interp.c (load_memory): Add missing "break"'s.
744 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
746 * interp.c (sim_store_register, sim_fetch_register): Pass in
747 length parameter. Return -1.
749 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
751 * interp.c: Added hardware init hook, fixed warnings.
753 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
755 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
757 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
759 * interp.c (ifetch16): New function.
761 * sim-main.h (IMEM32): Rename IMEM.
762 (IMEM16_IMMED): Define.
764 (DELAY_SLOT): Update.
766 * m16run.c (sim_engine_run): New file.
768 * m16.igen: All instructions except LB.
769 (LB): Call do_load_byte.
770 * mips.igen (do_load_byte): New function.
771 (LB): Call do_load_byte.
773 * mips.igen: Move spec for insn bit size and high bit from here.
774 * Makefile.in (tmp-igen, tmp-m16): To here.
776 * m16.dc: New file, decode mips16 instructions.
778 * Makefile.in (SIM_NO_ALL): Define.
779 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
781 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
783 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
784 point unit to 32 bit registers.
785 * configure: Re-generate.
787 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
789 * configure.in (sim_use_gen): Make IGEN the default simulator
790 generator for generic 32 and 64 bit mips targets.
791 * configure: Re-generate.
793 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
795 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
798 * interp.c (sim_fetch_register, sim_store_register): Read/write
799 FGR from correct location.
800 (sim_open): Set size of FGR's according to
801 WITH_TARGET_FLOATING_POINT_BITSIZE.
803 * sim-main.h (FGR): Store floating point registers in a separate
806 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
808 * configure: Regenerated to track ../common/aclocal.m4 changes.
810 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
812 * interp.c (ColdReset): Call PENDING_INVALIDATE.
814 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
816 * interp.c (pending_tick): New function. Deliver pending writes.
818 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
819 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
820 it can handle mixed sized quantites and single bits.
822 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
824 * interp.c (oengine.h): Do not include when building with IGEN.
825 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
826 (sim_info): Ditto for PROCESSOR_64BIT.
827 (sim_monitor): Replace ut_reg with unsigned_word.
828 (*): Ditto for t_reg.
829 (LOADDRMASK): Define.
830 (sim_open): Remove defunct check that host FP is IEEE compliant,
831 using software to emulate floating point.
832 (value_fpr, ...): Always compile, was conditional on HASFPU.
834 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
836 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
839 * interp.c (SD, CPU): Define.
840 (mips_option_handler): Set flags in each CPU.
841 (interrupt_event): Assume CPU 0 is the one being iterrupted.
842 (sim_close): Do not clear STATE, deleted anyway.
843 (sim_write, sim_read): Assume CPU zero's vm should be used for
845 (sim_create_inferior): Set the PC for all processors.
846 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
848 (mips16_entry): Pass correct nr of args to store_word, load_word.
849 (ColdReset): Cold reset all cpu's.
850 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
851 (sim_monitor, load_memory, store_memory, signal_exception): Use
852 `CPU' instead of STATE_CPU.
855 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
858 * sim-main.h (signal_exception): Add sim_cpu arg.
859 (SignalException*): Pass both SD and CPU to signal_exception.
860 * interp.c (signal_exception): Update.
862 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
864 (sync_operation, prefetch, cache_op, store_memory, load_memory,
865 address_translation): Ditto
866 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
868 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
870 * configure: Regenerated to track ../common/aclocal.m4 changes.
872 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
874 * interp.c (sim_engine_run): Add `nr_cpus' argument.
876 * mips.igen (model): Map processor names onto BFD name.
878 * sim-main.h (CPU_CIA): Delete.
879 (SET_CIA, GET_CIA): Define
881 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
883 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
886 * configure.in (default_endian): Configure a big-endian simulator
888 * configure: Re-generate.
890 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
892 * configure: Regenerated to track ../common/aclocal.m4 changes.
894 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
896 * interp.c (sim_monitor): Handle Densan monitor outbyte
897 and inbyte functions.
899 1997-12-29 Felix Lee <flee@cygnus.com>
901 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
903 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
905 * Makefile.in (tmp-igen): Arrange for $zero to always be
906 reset to zero after every instruction.
908 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
910 * configure: Regenerated to track ../common/aclocal.m4 changes.
913 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
915 * mips.igen (MSUB): Fix to work like MADD.
916 * gencode.c (MSUB): Similarly.
918 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
920 * configure: Regenerated to track ../common/aclocal.m4 changes.
922 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
924 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
926 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
928 * sim-main.h (sim-fpu.h): Include.
930 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
931 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
932 using host independant sim_fpu module.
934 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
936 * interp.c (signal_exception): Report internal errors with SIGABRT
939 * sim-main.h (C0_CONFIG): New register.
940 (signal.h): No longer include.
942 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
944 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
946 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
948 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
950 * mips.igen: Tag vr5000 instructions.
951 (ANDI): Was missing mipsIV model, fix assembler syntax.
952 (do_c_cond_fmt): New function.
953 (C.cond.fmt): Handle mips I-III which do not support CC field
955 (bc1): Handle mips IV which do not have a delaed FCC separatly.
956 (SDR): Mask paddr when BigEndianMem, not the converse as specified
958 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
959 vr5000 which saves LO in a GPR separatly.
961 * configure.in (enable-sim-igen): For vr5000, select vr5000
962 specific instructions.
963 * configure: Re-generate.
965 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
967 * Makefile.in (SIM_OBJS): Add sim-fpu module.
969 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
970 fmt_uninterpreted_64 bit cases to switch. Convert to
973 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
975 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
976 as specified in IV3.2 spec.
977 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
979 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
981 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
982 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
983 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
984 PENDING_FILL versions of instructions. Simplify.
986 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
988 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
990 (MTHI, MFHI): Disable code checking HI-LO.
992 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
994 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
996 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
998 * gencode.c (build_mips16_operands): Replace IPC with cia.
1000 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1001 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1003 (UndefinedResult): Replace function with macro/function
1005 (sim_engine_run): Don't save PC in IPC.
1007 * sim-main.h (IPC): Delete.
1010 * interp.c (signal_exception, store_word, load_word,
1011 address_translation, load_memory, store_memory, cache_op,
1012 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1013 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1014 current instruction address - cia - argument.
1015 (sim_read, sim_write): Call address_translation directly.
1016 (sim_engine_run): Rename variable vaddr to cia.
1017 (signal_exception): Pass cia to sim_monitor
1019 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1020 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1021 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1023 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1024 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1027 * interp.c (signal_exception): Pass restart address to
1030 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1031 idecode.o): Add dependency.
1033 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1035 (DELAY_SLOT): Update NIA not PC with branch address.
1036 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1038 * mips.igen: Use CIA not PC in branch calculations.
1039 (illegal): Call SignalException.
1040 (BEQ, ADDIU): Fix assembler.
1042 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1044 * m16.igen (JALX): Was missing.
1046 * configure.in (enable-sim-igen): New configuration option.
1047 * configure: Re-generate.
1049 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1051 * interp.c (load_memory, store_memory): Delete parameter RAW.
1052 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1053 bypassing {load,store}_memory.
1055 * sim-main.h (ByteSwapMem): Delete definition.
1057 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1059 * interp.c (sim_do_command, sim_commands): Delete mips specific
1060 commands. Handled by module sim-options.
1062 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1063 (WITH_MODULO_MEMORY): Define.
1065 * interp.c (sim_info): Delete code printing memory size.
1067 * interp.c (mips_size): Nee sim_size, delete function.
1069 (monitor, monitor_base, monitor_size): Delete global variables.
1070 (sim_open, sim_close): Delete code creating monitor and other
1071 memory regions. Use sim-memopts module, via sim_do_commandf, to
1072 manage memory regions.
1073 (load_memory, store_memory): Use sim-core for memory model.
1075 * interp.c (address_translation): Delete all memory map code
1076 except line forcing 32 bit addresses.
1078 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1080 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1083 * interp.c (logfh, logfile): Delete globals.
1084 (sim_open, sim_close): Delete code opening & closing log file.
1085 (mips_option_handler): Delete -l and -n options.
1086 (OPTION mips_options): Ditto.
1088 * interp.c (OPTION mips_options): Rename option trace to dinero.
1089 (mips_option_handler): Update.
1091 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1093 * interp.c (fetch_str): New function.
1094 (sim_monitor): Rewrite using sim_read & sim_write.
1095 (sim_open): Check magic number.
1096 (sim_open): Write monitor vectors into memory using sim_write.
1097 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1098 (sim_read, sim_write): Simplify - transfer data one byte at a
1100 (load_memory, store_memory): Clarify meaning of parameter RAW.
1102 * sim-main.h (isHOST): Defete definition.
1103 (isTARGET): Mark as depreciated.
1104 (address_translation): Delete parameter HOST.
1106 * interp.c (address_translation): Delete parameter HOST.
1108 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1112 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1113 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1115 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1117 * mips.igen: Add model filter field to records.
1119 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1121 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1123 interp.c (sim_engine_run): Do not compile function sim_engine_run
1124 when WITH_IGEN == 1.
1126 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1127 target architecture.
1129 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1130 igen. Replace with configuration variables sim_igen_flags /
1133 * m16.igen: New file. Copy mips16 insns here.
1134 * mips.igen: From here.
1136 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1138 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1140 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1142 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1144 * gencode.c (build_instruction): Follow sim_write's lead in using
1145 BigEndianMem instead of !ByteSwapMem.
1147 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1149 * configure.in (sim_gen): Dependent on target, select type of
1150 generator. Always select old style generator.
1152 configure: Re-generate.
1154 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1156 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1157 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1158 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1159 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1160 SIM_@sim_gen@_*, set by autoconf.
1162 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1164 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1166 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1167 CURRENT_FLOATING_POINT instead.
1169 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1170 (address_translation): Raise exception InstructionFetch when
1171 translation fails and isINSTRUCTION.
1173 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1174 sim_engine_run): Change type of of vaddr and paddr to
1176 (address_translation, prefetch, load_memory, store_memory,
1177 cache_op): Change type of vAddr and pAddr to address_word.
1179 * gencode.c (build_instruction): Change type of vaddr and paddr to
1182 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1184 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1185 macro to obtain result of ALU op.
1187 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1189 * interp.c (sim_info): Call profile_print.
1191 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1193 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1195 * sim-main.h (WITH_PROFILE): Do not define, defined in
1196 common/sim-config.h. Use sim-profile module.
1197 (simPROFILE): Delete defintion.
1199 * interp.c (PROFILE): Delete definition.
1200 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1201 (sim_close): Delete code writing profile histogram.
1202 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1204 (sim_engine_run): Delete code profiling the PC.
1206 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1208 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1210 * interp.c (sim_monitor): Make register pointers of type
1213 * sim-main.h: Make registers of type unsigned_word not
1216 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1218 * interp.c (sync_operation): Rename from SyncOperation, make
1219 global, add SD argument.
1220 (prefetch): Rename from Prefetch, make global, add SD argument.
1221 (decode_coproc): Make global.
1223 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1225 * gencode.c (build_instruction): Generate DecodeCoproc not
1226 decode_coproc calls.
1228 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1229 (SizeFGR): Move to sim-main.h
1230 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1231 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1232 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1234 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1235 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1236 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1237 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1238 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1239 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1241 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1243 (sim-alu.h): Include.
1244 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1245 (sim_cia): Typedef to instruction_address.
1247 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1249 * Makefile.in (interp.o): Rename generated file engine.c to
1254 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1256 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1258 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1260 * gencode.c (build_instruction): For "FPSQRT", output correct
1261 number of arguments to Recip.
1263 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1265 * Makefile.in (interp.o): Depends on sim-main.h
1267 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1269 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1270 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1271 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1272 STATE, DSSTATE): Define
1273 (GPR, FGRIDX, ..): Define.
1275 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1276 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1277 (GPR, FGRIDX, ...): Delete macros.
1279 * interp.c: Update names to match defines from sim-main.h
1281 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1283 * interp.c (sim_monitor): Add SD argument.
1284 (sim_warning): Delete. Replace calls with calls to
1286 (sim_error): Delete. Replace calls with sim_io_error.
1287 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1288 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1289 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1291 (mips_size): Rename from sim_size. Add SD argument.
1293 * interp.c (simulator): Delete global variable.
1294 (callback): Delete global variable.
1295 (mips_option_handler, sim_open, sim_write, sim_read,
1296 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1297 sim_size,sim_monitor): Use sim_io_* not callback->*.
1298 (sim_open): ZALLOC simulator struct.
1299 (PROFILE): Do not define.
1301 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1303 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1304 support.h with corresponding code.
1306 * sim-main.h (word64, uword64), support.h: Move definition to
1308 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1311 * Makefile.in: Update dependencies
1312 * interp.c: Do not include.
1314 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1316 * interp.c (address_translation, load_memory, store_memory,
1317 cache_op): Rename to from AddressTranslation et.al., make global,
1320 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1323 * interp.c (SignalException): Rename to signal_exception, make
1326 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1328 * sim-main.h (SignalException, SignalExceptionInterrupt,
1329 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1330 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1331 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1334 * interp.c, support.h: Use.
1336 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1338 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1339 to value_fpr / store_fpr. Add SD argument.
1340 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1341 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1343 * sim-main.h (ValueFPR, StoreFPR): Define.
1345 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1347 * interp.c (sim_engine_run): Check consistency between configure
1348 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1351 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1352 (mips_fpu): Configure WITH_FLOATING_POINT.
1353 (mips_endian): Configure WITH_TARGET_ENDIAN.
1354 * configure: Update.
1356 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1358 * configure: Regenerated to track ../common/aclocal.m4 changes.
1360 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1362 * configure: Regenerated.
1364 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1366 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1368 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1370 * gencode.c (print_igen_insn_models): Assume certain architectures
1371 include all mips* instructions.
1372 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1375 * Makefile.in (tmp.igen): Add target. Generate igen input from
1378 * gencode.c (FEATURE_IGEN): Define.
1379 (main): Add --igen option. Generate output in igen format.
1380 (process_instructions): Format output according to igen option.
1381 (print_igen_insn_format): New function.
1382 (print_igen_insn_models): New function.
1383 (process_instructions): Only issue warnings and ignore
1384 instructions when no FEATURE_IGEN.
1386 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1388 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1391 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1393 * configure: Regenerated to track ../common/aclocal.m4 changes.
1395 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1397 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1398 SIM_RESERVED_BITS): Delete, moved to common.
1399 (SIM_EXTRA_CFLAGS): Update.
1401 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1403 * configure.in: Configure non-strict memory alignment.
1404 * configure: Regenerated to track ../common/aclocal.m4 changes.
1406 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1408 * configure: Regenerated to track ../common/aclocal.m4 changes.
1410 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1412 * gencode.c (SDBBP,DERET): Added (3900) insns.
1413 (RFE): Turn on for 3900.
1414 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1415 (dsstate): Made global.
1416 (SUBTARGET_R3900): Added.
1417 (CANCELDELAYSLOT): New.
1418 (SignalException): Ignore SystemCall rather than ignore and
1419 terminate. Add DebugBreakPoint handling.
1420 (decode_coproc): New insns RFE, DERET; and new registers Debug
1421 and DEPC protected by SUBTARGET_R3900.
1422 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1424 * Makefile.in,configure.in: Add mips subtarget option.
1425 * configure: Update.
1427 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1429 * gencode.c: Add r3900 (tx39).
1432 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1434 * gencode.c (build_instruction): Don't need to subtract 4 for
1437 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1439 * interp.c: Correct some HASFPU problems.
1441 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1443 * configure: Regenerated to track ../common/aclocal.m4 changes.
1445 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1447 * interp.c (mips_options): Fix samples option short form, should
1450 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1452 * interp.c (sim_info): Enable info code. Was just returning.
1454 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1456 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1459 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1461 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1463 (build_instruction): Ditto for LL.
1465 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1467 * configure: Regenerated to track ../common/aclocal.m4 changes.
1469 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1471 * configure: Regenerated to track ../common/aclocal.m4 changes.
1474 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1476 * interp.c (sim_open): Add call to sim_analyze_program, update
1479 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1481 * interp.c (sim_kill): Delete.
1482 (sim_create_inferior): Add ABFD argument. Set PC from same.
1483 (sim_load): Move code initializing trap handlers from here.
1484 (sim_open): To here.
1485 (sim_load): Delete, use sim-hload.c.
1487 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1489 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1491 * configure: Regenerated to track ../common/aclocal.m4 changes.
1494 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1496 * interp.c (sim_open): Add ABFD argument.
1497 (sim_load): Move call to sim_config from here.
1498 (sim_open): To here. Check return status.
1500 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1502 * gencode.c (build_instruction): Two arg MADD should
1503 not assign result to $0.
1505 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1507 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1508 * sim/mips/configure.in: Regenerate.
1510 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1512 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1513 signed8, unsigned8 et.al. types.
1515 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1516 hosts when selecting subreg.
1518 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1520 * interp.c (sim_engine_run): Reset the ZERO register to zero
1521 regardless of FEATURE_WARN_ZERO.
1522 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1524 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1526 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1527 (SignalException): For BreakPoints ignore any mode bits and just
1529 (SignalException): Always set the CAUSE register.
1531 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1533 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1534 exception has been taken.
1536 * interp.c: Implement the ERET and mt/f sr instructions.
1538 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1540 * interp.c (SignalException): Don't bother restarting an
1543 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1545 * interp.c (SignalException): Really take an interrupt.
1546 (interrupt_event): Only deliver interrupts when enabled.
1548 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1550 * interp.c (sim_info): Only print info when verbose.
1551 (sim_info) Use sim_io_printf for output.
1553 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1555 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1558 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1560 * interp.c (sim_do_command): Check for common commands if a
1561 simulator specific command fails.
1563 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1565 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1566 and simBE when DEBUG is defined.
1568 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1570 * interp.c (interrupt_event): New function. Pass exception event
1571 onto exception handler.
1573 * configure.in: Check for stdlib.h.
1574 * configure: Regenerate.
1576 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1577 variable declaration.
1578 (build_instruction): Initialize memval1.
1579 (build_instruction): Add UNUSED attribute to byte, bigend,
1581 (build_operands): Ditto.
1583 * interp.c: Fix GCC warnings.
1584 (sim_get_quit_code): Delete.
1586 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1587 * Makefile.in: Ditto.
1588 * configure: Re-generate.
1590 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1592 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1594 * interp.c (mips_option_handler): New function parse argumes using
1596 (myname): Replace with STATE_MY_NAME.
1597 (sim_open): Delete check for host endianness - performed by
1599 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1600 (sim_open): Move much of the initialization from here.
1601 (sim_load): To here. After the image has been loaded and
1603 (sim_open): Move ColdReset from here.
1604 (sim_create_inferior): To here.
1605 (sim_open): Make FP check less dependant on host endianness.
1607 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1609 * interp.c (sim_set_callbacks): Delete.
1611 * interp.c (membank, membank_base, membank_size): Replace with
1612 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1613 (sim_open): Remove call to callback->init. gdb/run do this.
1617 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1619 * interp.c (big_endian_p): Delete, replaced by
1620 current_target_byte_order.
1622 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1624 * interp.c (host_read_long, host_read_word, host_swap_word,
1625 host_swap_long): Delete. Using common sim-endian.
1626 (sim_fetch_register, sim_store_register): Use H2T.
1627 (pipeline_ticks): Delete. Handled by sim-events.
1629 (sim_engine_run): Update.
1631 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1633 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1635 (SignalException): To here. Signal using sim_engine_halt.
1636 (sim_stop_reason): Delete, moved to common.
1638 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1640 * interp.c (sim_open): Add callback argument.
1641 (sim_set_callbacks): Delete SIM_DESC argument.
1644 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1646 * Makefile.in (SIM_OBJS): Add common modules.
1648 * interp.c (sim_set_callbacks): Also set SD callback.
1649 (set_endianness, xfer_*, swap_*): Delete.
1650 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1651 Change to functions using sim-endian macros.
1652 (control_c, sim_stop): Delete, use common version.
1653 (simulate): Convert into.
1654 (sim_engine_run): This function.
1655 (sim_resume): Delete.
1657 * interp.c (simulation): New variable - the simulator object.
1658 (sim_kind): Delete global - merged into simulation.
1659 (sim_load): Cleanup. Move PC assignment from here.
1660 (sim_create_inferior): To here.
1662 * sim-main.h: New file.
1663 * interp.c (sim-main.h): Include.
1665 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1667 * configure: Regenerated to track ../common/aclocal.m4 changes.
1669 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1671 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1673 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1675 * gencode.c (build_instruction): DIV instructions: check
1676 for division by zero and integer overflow before using
1677 host's division operation.
1679 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1681 * Makefile.in (SIM_OBJS): Add sim-load.o.
1682 * interp.c: #include bfd.h.
1683 (target_byte_order): Delete.
1684 (sim_kind, myname, big_endian_p): New static locals.
1685 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1686 after argument parsing. Recognize -E arg, set endianness accordingly.
1687 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1688 load file into simulator. Set PC from bfd.
1689 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1690 (set_endianness): Use big_endian_p instead of target_byte_order.
1692 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1694 * interp.c (sim_size): Delete prototype - conflicts with
1695 definition in remote-sim.h. Correct definition.
1697 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1699 * configure: Regenerated to track ../common/aclocal.m4 changes.
1702 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1704 * interp.c (sim_open): New arg `kind'.
1706 * configure: Regenerated to track ../common/aclocal.m4 changes.
1708 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1710 * configure: Regenerated to track ../common/aclocal.m4 changes.
1712 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1714 * interp.c (sim_open): Set optind to 0 before calling getopt.
1716 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1718 * configure: Regenerated to track ../common/aclocal.m4 changes.
1720 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1722 * interp.c : Replace uses of pr_addr with pr_uword64
1723 where the bit length is always 64 independent of SIM_ADDR.
1724 (pr_uword64) : added.
1726 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1728 * configure: Re-generate.
1730 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1732 * configure: Regenerate to track ../common/aclocal.m4 changes.
1734 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1736 * interp.c (sim_open): New SIM_DESC result. Argument is now
1738 (other sim_*): New SIM_DESC argument.
1740 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1742 * interp.c: Fix printing of addresses for non-64-bit targets.
1743 (pr_addr): Add function to print address based on size.
1745 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1747 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1749 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1751 * gencode.c (build_mips16_operands): Correct computation of base
1752 address for extended PC relative instruction.
1754 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1756 * interp.c (mips16_entry): Add support for floating point cases.
1757 (SignalException): Pass floating point cases to mips16_entry.
1758 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1760 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1762 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1763 and then set the state to fmt_uninterpreted.
1764 (COP_SW): Temporarily set the state to fmt_word while calling
1767 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1769 * gencode.c (build_instruction): The high order may be set in the
1770 comparison flags at any ISA level, not just ISA 4.
1772 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1774 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1775 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1776 * configure.in: sinclude ../common/aclocal.m4.
1777 * configure: Regenerated.
1779 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1781 * configure: Rebuild after change to aclocal.m4.
1783 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1785 * configure configure.in Makefile.in: Update to new configure
1786 scheme which is more compatible with WinGDB builds.
1787 * configure.in: Improve comment on how to run autoconf.
1788 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1789 * Makefile.in: Use autoconf substitution to install common
1792 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1794 * gencode.c (build_instruction): Use BigEndianCPU instead of
1797 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1799 * interp.c (sim_monitor): Make output to stdout visible in
1800 wingdb's I/O log window.
1802 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1804 * support.h: Undo previous change to SIGTRAP
1807 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1809 * interp.c (store_word, load_word): New static functions.
1810 (mips16_entry): New static function.
1811 (SignalException): Look for mips16 entry and exit instructions.
1812 (simulate): Use the correct index when setting fpr_state after
1813 doing a pending move.
1815 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1817 * interp.c: Fix byte-swapping code throughout to work on
1818 both little- and big-endian hosts.
1820 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1822 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1823 with gdb/config/i386/xm-windows.h.
1825 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1827 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1828 that messes up arithmetic shifts.
1830 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1832 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1833 SIGTRAP and SIGQUIT for _WIN32.
1835 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1837 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1838 force a 64 bit multiplication.
1839 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1840 destination register is 0, since that is the default mips16 nop
1843 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1845 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1846 (build_endian_shift): Don't check proc64.
1847 (build_instruction): Always set memval to uword64. Cast op2 to
1848 uword64 when shifting it left in memory instructions. Always use
1849 the same code for stores--don't special case proc64.
1851 * gencode.c (build_mips16_operands): Fix base PC value for PC
1853 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1855 * interp.c (simJALDELAYSLOT): Define.
1856 (JALDELAYSLOT): Define.
1857 (INDELAYSLOT, INJALDELAYSLOT): Define.
1858 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1860 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1862 * interp.c (sim_open): add flush_cache as a PMON routine
1863 (sim_monitor): handle flush_cache by ignoring it
1865 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1867 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1869 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1870 (BigEndianMem): Rename to ByteSwapMem and change sense.
1871 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1872 BigEndianMem references to !ByteSwapMem.
1873 (set_endianness): New function, with prototype.
1874 (sim_open): Call set_endianness.
1875 (sim_info): Use simBE instead of BigEndianMem.
1876 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1877 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1878 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1879 ifdefs, keeping the prototype declaration.
1880 (swap_word): Rewrite correctly.
1881 (ColdReset): Delete references to CONFIG. Delete endianness related
1882 code; moved to set_endianness.
1884 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1886 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1887 * interp.c (CHECKHILO): Define away.
1888 (simSIGINT): New macro.
1889 (membank_size): Increase from 1MB to 2MB.
1890 (control_c): New function.
1891 (sim_resume): Rename parameter signal to signal_number. Add local
1892 variable prev. Call signal before and after simulate.
1893 (sim_stop_reason): Add simSIGINT support.
1894 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1896 (sim_warning): Delete call to SignalException. Do call printf_filtered
1898 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1899 a call to sim_warning.
1901 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1903 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1904 16 bit instructions.
1906 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1908 Add support for mips16 (16 bit MIPS implementation):
1909 * gencode.c (inst_type): Add mips16 instruction encoding types.
1910 (GETDATASIZEINSN): Define.
1911 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1912 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1914 (MIPS16_DECODE): New table, for mips16 instructions.
1915 (bitmap_val): New static function.
1916 (struct mips16_op): Define.
1917 (mips16_op_table): New table, for mips16 operands.
1918 (build_mips16_operands): New static function.
1919 (process_instructions): If PC is odd, decode a mips16
1920 instruction. Break out instruction handling into new
1921 build_instruction function.
1922 (build_instruction): New static function, broken out of
1923 process_instructions. Check modifiers rather than flags for SHIFT
1924 bit count and m[ft]{hi,lo} direction.
1925 (usage): Pass program name to fprintf.
1926 (main): Remove unused variable this_option_optind. Change
1927 ``*loptarg++'' to ``loptarg++''.
1928 (my_strtoul): Parenthesize && within ||.
1929 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1930 (simulate): If PC is odd, fetch a 16 bit instruction, and
1931 increment PC by 2 rather than 4.
1932 * configure.in: Add case for mips16*-*-*.
1933 * configure: Rebuild.
1935 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1937 * interp.c: Allow -t to enable tracing in standalone simulator.
1938 Fix garbage output in trace file and error messages.
1940 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1942 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1943 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1944 * configure.in: Simplify using macros in ../common/aclocal.m4.
1945 * configure: Regenerated.
1946 * tconfig.in: New file.
1948 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1950 * interp.c: Fix bugs in 64-bit port.
1951 Use ansi function declarations for msvc compiler.
1952 Initialize and test file pointer in trace code.
1953 Prevent duplicate definition of LAST_EMED_REGNUM.
1955 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1957 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1959 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1961 * interp.c (SignalException): Check for explicit terminating
1963 * gencode.c: Pass instruction value through SignalException()
1964 calls for Trap, Breakpoint and Syscall.
1966 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1968 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1969 only used on those hosts that provide it.
1970 * configure.in: Add sqrt() to list of functions to be checked for.
1971 * config.in: Re-generated.
1972 * configure: Re-generated.
1974 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1976 * gencode.c (process_instructions): Call build_endian_shift when
1977 expanding STORE RIGHT, to fix swr.
1978 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1979 clear the high bits.
1980 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1981 Fix float to int conversions to produce signed values.
1983 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1985 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1986 (process_instructions): Correct handling of nor instruction.
1987 Correct shift count for 32 bit shift instructions. Correct sign
1988 extension for arithmetic shifts to not shift the number of bits in
1989 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1990 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1992 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1993 It's OK to have a mult follow a mult. What's not OK is to have a
1994 mult follow an mfhi.
1995 (Convert): Comment out incorrect rounding code.
1997 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1999 * interp.c (sim_monitor): Improved monitor printf
2000 simulation. Tidied up simulator warnings, and added "--log" option
2001 for directing warning message output.
2002 * gencode.c: Use sim_warning() rather than WARNING macro.
2004 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2006 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2007 getopt1.o, rather than on gencode.c. Link objects together.
2008 Don't link against -liberty.
2009 (gencode.o, getopt.o, getopt1.o): New targets.
2010 * gencode.c: Include <ctype.h> and "ansidecl.h".
2011 (AND): Undefine after including "ansidecl.h".
2012 (ULONG_MAX): Define if not defined.
2013 (OP_*): Don't define macros; now defined in opcode/mips.h.
2014 (main): Call my_strtoul rather than strtoul.
2015 (my_strtoul): New static function.
2017 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2019 * gencode.c (process_instructions): Generate word64 and uword64
2020 instead of `long long' and `unsigned long long' data types.
2021 * interp.c: #include sysdep.h to get signals, and define default
2023 * (Convert): Work around for Visual-C++ compiler bug with type
2025 * support.h: Make things compile under Visual-C++ by using
2026 __int64 instead of `long long'. Change many refs to long long
2027 into word64/uword64 typedefs.
2029 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2031 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2032 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2034 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2035 (AC_PROG_INSTALL): Added.
2036 (AC_PROG_CC): Moved to before configure.host call.
2037 * configure: Rebuilt.
2039 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2041 * configure.in: Define @SIMCONF@ depending on mips target.
2042 * configure: Rebuild.
2043 * Makefile.in (run): Add @SIMCONF@ to control simulator
2045 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2046 * interp.c: Remove some debugging, provide more detailed error
2047 messages, update memory accesses to use LOADDRMASK.
2049 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2051 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2052 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2054 * configure: Rebuild.
2055 * config.in: New file, generated by autoheader.
2056 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2057 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2058 HAVE_ANINT and HAVE_AINT, as appropriate.
2059 * Makefile.in (run): Use @LIBS@ rather than -lm.
2060 (interp.o): Depend upon config.h.
2061 (Makefile): Just rebuild Makefile.
2062 (clean): Remove stamp-h.
2063 (mostlyclean): Make the same as clean, not as distclean.
2064 (config.h, stamp-h): New targets.
2066 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2068 * interp.c (ColdReset): Fix boolean test. Make all simulator
2071 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2073 * interp.c (xfer_direct_word, xfer_direct_long,
2074 swap_direct_word, swap_direct_long, xfer_big_word,
2075 xfer_big_long, xfer_little_word, xfer_little_long,
2076 swap_word,swap_long): Added.
2077 * interp.c (ColdReset): Provide function indirection to
2078 host<->simulated_target transfer routines.
2079 * interp.c (sim_store_register, sim_fetch_register): Updated to
2080 make use of indirected transfer routines.
2082 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2084 * gencode.c (process_instructions): Ensure FP ABS instruction
2086 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2087 system call support.
2089 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2091 * interp.c (sim_do_command): Complain if callback structure not
2094 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2096 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2097 support for Sun hosts.
2098 * Makefile.in (gencode): Ensure the host compiler and libraries
2099 used for cross-hosted build.
2101 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2103 * interp.c, gencode.c: Some more (TODO) tidying.
2105 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2107 * gencode.c, interp.c: Replaced explicit long long references with
2108 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2109 * support.h (SET64LO, SET64HI): Macros added.
2111 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2113 * configure: Regenerate with autoconf 2.7.
2115 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2117 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2118 * support.h: Remove superfluous "1" from #if.
2119 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2121 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2123 * interp.c (StoreFPR): Control UndefinedResult() call on
2124 WARN_RESULT manifest.
2126 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2128 * gencode.c: Tidied instruction decoding, and added FP instruction
2131 * interp.c: Added dineroIII, and BSD profiling support. Also
2132 run-time FP handling.
2134 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2136 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2137 gencode.c, interp.c, support.h: created.