1 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
6 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
8 * sim-main.h: Add 8*3*8 bit accumulator.
10 * vr5400.igen: Move mdmx instructins from here
11 * mdmx.igen: To here - new file. Add/fix missing instructions.
12 * mips.igen: Include mdmx.igen.
15 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
17 * sim-main.h (sim-fpu.h): Include.
19 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
20 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
21 using host independant sim_fpu module.
23 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
25 * interp.c (signal_exception): Report internal errors with SIGABRT
28 * sim-main.h (C0_CONFIG): New register.
29 (signal.h): No longer include.
31 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
33 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
35 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
37 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
39 * mips.igen: Tag vr5000 instructions.
40 (ANDI): Was missing mipsIV model, fix assembler syntax.
41 (do_c_cond_fmt): New function.
42 (C.cond.fmt): Handle mips I-III which do not support CC field
44 (bc1): Handle mips IV which do not have a delaed FCC separatly.
45 (SDR): Mask paddr when BigEndianMem, not the converse as specified
47 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
48 vr5000 which saves LO in a GPR separatly.
50 * configure.in (enable-sim-igen): For vr5000, select vr5000
51 specific instructions.
52 * configure: Re-generate.
54 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
56 * Makefile.in (SIM_OBJS): Add sim-fpu module.
58 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
59 fmt_uninterpreted_64 bit cases to switch. Convert to
62 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
64 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
65 as specified in IV3.2 spec.
66 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
68 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
70 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
71 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
72 (start-sanitize-r5900):
73 (LWXC1, SWXC1): Delete from r5900 instruction set.
75 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
76 PENDING_FILL versions of instructions. Simplify.
78 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
80 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
82 (MTHI, MFHI): Disable code checking HI-LO.
84 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
86 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
88 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
90 * gencode.c (build_mips16_operands): Replace IPC with cia.
92 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
93 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
95 (UndefinedResult): Replace function with macro/function
97 (sim_engine_run): Don't save PC in IPC.
99 * sim-main.h (IPC): Delete.
101 start-sanitize-vr5400
102 * vr5400.igen (vr): Add missing cia argument to value_fpr.
103 (do_select): Rename function select.
106 * interp.c (signal_exception, store_word, load_word,
107 address_translation, load_memory, store_memory, cache_op,
108 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
109 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
110 current instruction address - cia - argument.
111 (sim_read, sim_write): Call address_translation directly.
112 (sim_engine_run): Rename variable vaddr to cia.
113 (signal_exception): Pass cia to sim_monitor
115 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
116 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
117 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
119 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
120 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
123 * interp.c (signal_exception): Pass restart address to
126 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
127 idecode.o): Add dependency.
129 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
131 (DELAY_SLOT): Update NIA not PC with branch address.
132 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
134 * mips.igen: Use CIA not PC in branch calculations.
135 (illegal): Call SignalException.
136 (BEQ, ADDIU): Fix assembler.
138 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
140 * m16.igen (JALX): Was missing.
142 * configure.in (enable-sim-igen): New configuration option.
143 * configure: Re-generate.
145 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
147 * interp.c (load_memory, store_memory): Delete parameter RAW.
148 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
149 bypassing {load,store}_memory.
151 * sim-main.h (ByteSwapMem): Delete definition.
153 * Makefile.in (SIM_OBJS): Add sim-memopt module.
155 * interp.c (sim_do_command, sim_commands): Delete mips specific
156 commands. Handled by module sim-options.
158 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
159 (WITH_MODULO_MEMORY): Define.
161 * interp.c (sim_info): Delete code printing memory size.
163 * interp.c (mips_size): Nee sim_size, delete function.
165 (monitor, monitor_base, monitor_size): Delete global variables.
166 (sim_open, sim_close): Delete code creating monitor and other
167 memory regions. Use sim-memopts module, via sim_do_commandf, to
168 manage memory regions.
169 (load_memory, store_memory): Use sim-core for memory model.
171 * interp.c (address_translation): Delete all memory map code
172 except line forcing 32 bit addresses.
174 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
176 * sim-main.h (WITH_TRACE): Delete definition. Enables common
179 * interp.c (logfh, logfile): Delete globals.
180 (sim_open, sim_close): Delete code opening & closing log file.
181 (mips_option_handler): Delete -l and -n options.
182 (OPTION mips_options): Ditto.
184 * interp.c (OPTION mips_options): Rename option trace to dinero.
185 (mips_option_handler): Update.
187 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
189 * interp.c (fetch_str): New function.
190 (sim_monitor): Rewrite using sim_read & sim_write.
191 (sim_open): Check magic number.
192 (sim_open): Write monitor vectors into memory using sim_write.
193 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
194 (sim_read, sim_write): Simplify - transfer data one byte at a
196 (load_memory, store_memory): Clarify meaning of parameter RAW.
198 * sim-main.h (isHOST): Defete definition.
199 (isTARGET): Mark as depreciated.
200 (address_translation): Delete parameter HOST.
202 * interp.c (address_translation): Delete parameter HOST.
205 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
207 * gencode.c: Add tx49 configury and insns.
208 * configure.in: Add tx49 configury.
212 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
216 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
217 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
219 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
221 * mips.igen: Add model filter field to records.
223 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
225 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
227 interp.c (sim_engine_run): Do not compile function sim_engine_run
230 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
233 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
234 igen. Replace with configuration variables sim_igen_flags /
238 * r5900.igen: New file. Copy r5900 insns here.
240 start-sanitize-vr5400
241 * vr5400.igen: New file.
243 * m16.igen: New file. Copy mips16 insns here.
244 * mips.igen: From here.
246 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
248 start-sanitize-vr5400
249 * mips.igen: Tag all mipsIV instructions with vr5400 model.
251 * configure.in: Add mips64vr5400 target.
252 * configure: Re-generate.
255 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
257 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
259 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
261 * gencode.c (build_instruction): Follow sim_write's lead in using
262 BigEndianMem instead of !ByteSwapMem.
264 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
266 * configure.in (sim_gen): Dependent on target, select type of
267 generator. Always select old style generator.
269 configure: Re-generate.
271 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
273 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
274 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
275 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
276 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
277 SIM_@sim_gen@_*, set by autoconf.
279 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
281 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
283 * interp.c (ColdReset): Remove #ifdef HASFPU, check
284 CURRENT_FLOATING_POINT instead.
286 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
287 (address_translation): Raise exception InstructionFetch when
288 translation fails and isINSTRUCTION.
290 * interp.c (sim_open, sim_write, sim_monitor, store_word,
291 sim_engine_run): Change type of of vaddr and paddr to
293 (address_translation, prefetch, load_memory, store_memory,
294 cache_op): Change type of vAddr and pAddr to address_word.
296 * gencode.c (build_instruction): Change type of vaddr and paddr to
299 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
301 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
302 macro to obtain result of ALU op.
304 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
306 * interp.c (sim_info): Call profile_print.
308 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
310 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
312 * sim-main.h (WITH_PROFILE): Do not define, defined in
313 common/sim-config.h. Use sim-profile module.
314 (simPROFILE): Delete defintion.
316 * interp.c (PROFILE): Delete definition.
317 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
318 (sim_close): Delete code writing profile histogram.
319 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
321 (sim_engine_run): Delete code profiling the PC.
323 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
325 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
327 * interp.c (sim_monitor): Make register pointers of type
330 * sim-main.h: Make registers of type unsigned_word not
333 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
336 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
337 ...): Move to sim-main.h
340 * interp.c (sync_operation): Rename from SyncOperation, make
341 global, add SD argument.
342 (prefetch): Rename from Prefetch, make global, add SD argument.
343 (decode_coproc): Make global.
345 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
347 * gencode.c (build_instruction): Generate DecodeCoproc not
350 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
351 (SizeFGR): Move to sim-main.h
352 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
353 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
354 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
356 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
357 FP_RM_TOMINF, GETRM): Move to sim-main.h.
358 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
359 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
360 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
361 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
363 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
365 (sim-alu.h): Include.
366 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
367 (sim_cia): Typedef to instruction_address.
369 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
371 * Makefile.in (interp.o): Rename generated file engine.c to
376 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
378 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
380 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
382 * gencode.c (build_instruction): For "FPSQRT", output correct
383 number of arguments to Recip.
385 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
387 * Makefile.in (interp.o): Depends on sim-main.h
389 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
391 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
392 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
393 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
394 STATE, DSSTATE): Define
395 (GPR, FGRIDX, ..): Define.
397 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
398 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
399 (GPR, FGRIDX, ...): Delete macros.
401 * interp.c: Update names to match defines from sim-main.h
403 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
405 * interp.c (sim_monitor): Add SD argument.
406 (sim_warning): Delete. Replace calls with calls to
408 (sim_error): Delete. Replace calls with sim_io_error.
409 (open_trace, writeout32, writeout16, getnum): Add SD argument.
410 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
411 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
413 (mips_size): Rename from sim_size. Add SD argument.
415 * interp.c (simulator): Delete global variable.
416 (callback): Delete global variable.
417 (mips_option_handler, sim_open, sim_write, sim_read,
418 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
419 sim_size,sim_monitor): Use sim_io_* not callback->*.
420 (sim_open): ZALLOC simulator struct.
421 (PROFILE): Do not define.
423 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
425 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
426 support.h with corresponding code.
428 * sim-main.h (word64, uword64), support.h: Move definition to
430 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
433 * Makefile.in: Update dependencies
434 * interp.c: Do not include.
436 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
438 * interp.c (address_translation, load_memory, store_memory,
439 cache_op): Rename to from AddressTranslation et.al., make global,
442 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
445 * interp.c (SignalException): Rename to signal_exception, make
448 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
450 * sim-main.h (SignalException, SignalExceptionInterrupt,
451 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
452 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
453 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
456 * interp.c, support.h: Use.
458 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
460 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
461 to value_fpr / store_fpr. Add SD argument.
462 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
463 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
465 * sim-main.h (ValueFPR, StoreFPR): Define.
467 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
469 * interp.c (sim_engine_run): Check consistency between configure
470 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
473 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
474 (mips_fpu): Configure WITH_FLOATING_POINT.
475 (mips_endian): Configure WITH_TARGET_ENDIAN.
478 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
480 * configure: Regenerated to track ../common/aclocal.m4 changes.
483 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
485 * interp.c (MAX_REG): Allow up-to 128 registers.
486 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
487 (REGISTER_SA): Ditto.
488 (sim_open): Initialize register_widths for r5900 specific
490 (sim_fetch_register, sim_store_register): Check for request of
491 r5900 specific SA register. Check for request for hi 64 bits of
492 r5900 specific registers.
495 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
497 * configure: Regenerated.
499 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
501 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
503 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
505 * gencode.c (print_igen_insn_models): Assume certain architectures
506 include all mips* instructions.
507 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
510 * Makefile.in (tmp.igen): Add target. Generate igen input from
513 * gencode.c (FEATURE_IGEN): Define.
514 (main): Add --igen option. Generate output in igen format.
515 (process_instructions): Format output according to igen option.
516 (print_igen_insn_format): New function.
517 (print_igen_insn_models): New function.
518 (process_instructions): Only issue warnings and ignore
519 instructions when no FEATURE_IGEN.
521 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
523 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
526 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
528 * configure: Regenerated to track ../common/aclocal.m4 changes.
530 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
532 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
533 SIM_RESERVED_BITS): Delete, moved to common.
534 (SIM_EXTRA_CFLAGS): Update.
536 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
538 * configure.in: Configure non-strict memory alignment.
539 * configure: Regenerated to track ../common/aclocal.m4 changes.
541 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
543 * configure: Regenerated to track ../common/aclocal.m4 changes.
545 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
547 * gencode.c (SDBBP,DERET): Added (3900) insns.
548 (RFE): Turn on for 3900.
549 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
550 (dsstate): Made global.
551 (SUBTARGET_R3900): Added.
552 (CANCELDELAYSLOT): New.
553 (SignalException): Ignore SystemCall rather than ignore and
554 terminate. Add DebugBreakPoint handling.
555 (decode_coproc): New insns RFE, DERET; and new registers Debug
556 and DEPC protected by SUBTARGET_R3900.
557 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
559 * Makefile.in,configure.in: Add mips subtarget option.
562 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
564 * gencode.c: Add r3900 (tx39).
567 * gencode.c: Fix some configuration problems by improving
568 the relationship between tx19 and tx39.
571 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
573 * gencode.c (build_instruction): Don't need to subtract 4 for
576 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
578 * interp.c: Correct some HASFPU problems.
580 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
582 * configure: Regenerated to track ../common/aclocal.m4 changes.
584 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
586 * interp.c (mips_options): Fix samples option short form, should
589 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
591 * interp.c (sim_info): Enable info code. Was just returning.
593 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
595 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
598 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
600 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
602 (build_instruction): Ditto for LL.
605 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
607 * mips/configure.in, mips/gencode: Add tx19/r1900.
610 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
612 * configure: Regenerated to track ../common/aclocal.m4 changes.
615 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
617 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
618 for overflow due to ABS of MININT, set result to MAXINT.
619 (build_instruction): For "psrlvw", signextend bit 31.
622 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
624 * configure: Regenerated to track ../common/aclocal.m4 changes.
627 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
629 * interp.c (sim_open): Add call to sim_analyze_program, update
632 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
634 * interp.c (sim_kill): Delete.
635 (sim_create_inferior): Add ABFD argument. Set PC from same.
636 (sim_load): Move code initializing trap handlers from here.
638 (sim_load): Delete, use sim-hload.c.
640 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
642 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
644 * configure: Regenerated to track ../common/aclocal.m4 changes.
647 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
649 * interp.c (sim_open): Add ABFD argument.
650 (sim_load): Move call to sim_config from here.
651 (sim_open): To here. Check return status.
654 * gencode.c (build_instruction): Do not define x8000000000000000,
655 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
659 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
661 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
662 "pdivuw" check for overflow due to signed divide by -1.
665 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
667 * gencode.c (build_instruction): Two arg MADD should
668 not assign result to $0.
671 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
673 * gencode.c (build_instruction): For "ppac5" use unsigned
674 arrithmetic so that the sign bit doesn't smear when right shifted.
675 (build_instruction): For "pdiv" perform sign extension when
676 storing results in HI and LO.
677 (build_instructions): For "pdiv" and "pdivbw" check for
679 (build_instruction): For "pmfhl.slw" update hi part of dest
680 register as well as low part.
681 (build_instruction): For "pmfhl" portably handle long long values.
682 (build_instruction): For "pmfhl.sh" correctly negative values.
683 Store half words 2 and three in the correct place.
684 (build_instruction): For "psllvw", sign extend value after shift.
687 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
689 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
690 * sim/mips/configure.in: Regenerate.
692 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
694 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
695 signed8, unsigned8 et.al. types.
698 * gencode.c (build_instruction): For PMULTU* do not sign extend
699 registers. Make generated code easier to debug.
702 * interp.c (SUB_REG_FETCH): Handle both little and big endian
703 hosts when selecting subreg.
706 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
708 * gencode.c (type_for_data_len): For 32bit operations concerned
709 with overflow, perform op using 64bits.
710 (build_instruction): For PADD, always compute operation using type
711 returned by type_for_data_len.
712 (build_instruction): For PSUBU, when overflow, saturate to zero as
716 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
719 * gencode.c (build_instruction): Handle "pext5" according to
720 version 1.95 of the r5900 ISA.
722 * gencode.c (build_instruction): Handle "ppac5" according to
723 version 1.95 of the r5900 ISA.
726 * interp.c (sim_engine_run): Reset the ZERO register to zero
727 regardless of FEATURE_WARN_ZERO.
728 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
730 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
732 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
733 (SignalException): For BreakPoints ignore any mode bits and just
735 (SignalException): Always set the CAUSE register.
737 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
739 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
740 exception has been taken.
742 * interp.c: Implement the ERET and mt/f sr instructions.
745 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
747 * gencode.c (build_instruction): For paddu, extract unsigned
750 * gencode.c (build_instruction): Saturate padds instead of padd
754 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
756 * interp.c (SignalException): Don't bother restarting an
759 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
761 * interp.c (SignalException): Really take an interrupt.
762 (interrupt_event): Only deliver interrupts when enabled.
764 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
766 * interp.c (sim_info): Only print info when verbose.
767 (sim_info) Use sim_io_printf for output.
769 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
771 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
774 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
776 * interp.c (sim_do_command): Check for common commands if a
777 simulator specific command fails.
779 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
781 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
782 and simBE when DEBUG is defined.
784 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
786 * interp.c (interrupt_event): New function. Pass exception event
787 onto exception handler.
789 * configure.in: Check for stdlib.h.
790 * configure: Regenerate.
792 * gencode.c (build_instruction): Add UNUSED attribute to tempS
793 variable declaration.
794 (build_instruction): Initialize memval1.
795 (build_instruction): Add UNUSED attribute to byte, bigend,
797 (build_operands): Ditto.
799 * interp.c: Fix GCC warnings.
800 (sim_get_quit_code): Delete.
802 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
803 * Makefile.in: Ditto.
804 * configure: Re-generate.
806 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
808 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
810 * interp.c (mips_option_handler): New function parse argumes using
812 (myname): Replace with STATE_MY_NAME.
813 (sim_open): Delete check for host endianness - performed by
815 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
816 (sim_open): Move much of the initialization from here.
817 (sim_load): To here. After the image has been loaded and
819 (sim_open): Move ColdReset from here.
820 (sim_create_inferior): To here.
821 (sim_open): Make FP check less dependant on host endianness.
823 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
825 * interp.c (sim_set_callbacks): Delete.
827 * interp.c (membank, membank_base, membank_size): Replace with
828 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
829 (sim_open): Remove call to callback->init. gdb/run do this.
833 * sim-main.h (SIM_HAVE_FLATMEM): Define.
835 * interp.c (big_endian_p): Delete, replaced by
836 current_target_byte_order.
838 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
840 * interp.c (host_read_long, host_read_word, host_swap_word,
841 host_swap_long): Delete. Using common sim-endian.
842 (sim_fetch_register, sim_store_register): Use H2T.
843 (pipeline_ticks): Delete. Handled by sim-events.
845 (sim_engine_run): Update.
847 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
849 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
851 (SignalException): To here. Signal using sim_engine_halt.
852 (sim_stop_reason): Delete, moved to common.
854 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
856 * interp.c (sim_open): Add callback argument.
857 (sim_set_callbacks): Delete SIM_DESC argument.
860 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
862 * Makefile.in (SIM_OBJS): Add common modules.
864 * interp.c (sim_set_callbacks): Also set SD callback.
865 (set_endianness, xfer_*, swap_*): Delete.
866 (host_read_word, host_read_long, host_swap_word, host_swap_long):
867 Change to functions using sim-endian macros.
868 (control_c, sim_stop): Delete, use common version.
869 (simulate): Convert into.
870 (sim_engine_run): This function.
871 (sim_resume): Delete.
873 * interp.c (simulation): New variable - the simulator object.
874 (sim_kind): Delete global - merged into simulation.
875 (sim_load): Cleanup. Move PC assignment from here.
876 (sim_create_inferior): To here.
878 * sim-main.h: New file.
879 * interp.c (sim-main.h): Include.
881 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
883 * configure: Regenerated to track ../common/aclocal.m4 changes.
885 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
887 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
889 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
891 * gencode.c (build_instruction): DIV instructions: check
892 for division by zero and integer overflow before using
893 host's division operation.
895 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
897 * Makefile.in (SIM_OBJS): Add sim-load.o.
898 * interp.c: #include bfd.h.
899 (target_byte_order): Delete.
900 (sim_kind, myname, big_endian_p): New static locals.
901 (sim_open): Set sim_kind, myname. Move call to set_endianness to
902 after argument parsing. Recognize -E arg, set endianness accordingly.
903 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
904 load file into simulator. Set PC from bfd.
905 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
906 (set_endianness): Use big_endian_p instead of target_byte_order.
908 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
910 * interp.c (sim_size): Delete prototype - conflicts with
911 definition in remote-sim.h. Correct definition.
913 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
915 * configure: Regenerated to track ../common/aclocal.m4 changes.
918 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
920 * interp.c (sim_open): New arg `kind'.
922 * configure: Regenerated to track ../common/aclocal.m4 changes.
924 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
926 * configure: Regenerated to track ../common/aclocal.m4 changes.
928 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
930 * interp.c (sim_open): Set optind to 0 before calling getopt.
932 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
934 * configure: Regenerated to track ../common/aclocal.m4 changes.
936 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
938 * interp.c : Replace uses of pr_addr with pr_uword64
939 where the bit length is always 64 independent of SIM_ADDR.
940 (pr_uword64) : added.
942 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
944 * configure: Re-generate.
946 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
948 * configure: Regenerate to track ../common/aclocal.m4 changes.
950 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
952 * interp.c (sim_open): New SIM_DESC result. Argument is now
954 (other sim_*): New SIM_DESC argument.
957 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
959 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
960 Change values to avoid overloading DOUBLEWORD which is tested
962 * gencode.c: reinstate "offending code".
965 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
967 * interp.c: Fix printing of addresses for non-64-bit targets.
968 (pr_addr): Add function to print address based on size.
970 * gencode.c: #ifdef out offending code until a permanent fix
971 can be added. Code is causing build errors for non-5900 mips targets.
975 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
977 * gencode.c (process_instructions): Correct test for ISA dependent
978 architecture bits in isa field of MIPS_DECODE.
981 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
983 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
986 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
988 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
992 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
994 * gencode.c (build_mips16_operands): Correct computation of base
995 address for extended PC relative instruction.
998 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1000 * Makefile.in, configure, configure.in, gencode.c,
1001 interp.c, support.h: add r5900.
1004 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1006 * interp.c (mips16_entry): Add support for floating point cases.
1007 (SignalException): Pass floating point cases to mips16_entry.
1008 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1010 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1012 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1013 and then set the state to fmt_uninterpreted.
1014 (COP_SW): Temporarily set the state to fmt_word while calling
1017 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1019 * gencode.c (build_instruction): The high order may be set in the
1020 comparison flags at any ISA level, not just ISA 4.
1022 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1024 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1025 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1026 * configure.in: sinclude ../common/aclocal.m4.
1027 * configure: Regenerated.
1029 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1031 * configure: Rebuild after change to aclocal.m4.
1033 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1035 * configure configure.in Makefile.in: Update to new configure
1036 scheme which is more compatible with WinGDB builds.
1037 * configure.in: Improve comment on how to run autoconf.
1038 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1039 * Makefile.in: Use autoconf substitution to install common
1042 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1044 * gencode.c (build_instruction): Use BigEndianCPU instead of
1047 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1049 * interp.c (sim_monitor): Make output to stdout visible in
1050 wingdb's I/O log window.
1052 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1054 * support.h: Undo previous change to SIGTRAP
1057 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1059 * interp.c (store_word, load_word): New static functions.
1060 (mips16_entry): New static function.
1061 (SignalException): Look for mips16 entry and exit instructions.
1062 (simulate): Use the correct index when setting fpr_state after
1063 doing a pending move.
1065 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1067 * interp.c: Fix byte-swapping code throughout to work on
1068 both little- and big-endian hosts.
1070 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1072 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1073 with gdb/config/i386/xm-windows.h.
1075 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1077 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1078 that messes up arithmetic shifts.
1080 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1082 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1083 SIGTRAP and SIGQUIT for _WIN32.
1085 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1087 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1088 force a 64 bit multiplication.
1089 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1090 destination register is 0, since that is the default mips16 nop
1093 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1095 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1096 (build_endian_shift): Don't check proc64.
1097 (build_instruction): Always set memval to uword64. Cast op2 to
1098 uword64 when shifting it left in memory instructions. Always use
1099 the same code for stores--don't special case proc64.
1101 * gencode.c (build_mips16_operands): Fix base PC value for PC
1103 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1105 * interp.c (simJALDELAYSLOT): Define.
1106 (JALDELAYSLOT): Define.
1107 (INDELAYSLOT, INJALDELAYSLOT): Define.
1108 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1110 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1112 * interp.c (sim_open): add flush_cache as a PMON routine
1113 (sim_monitor): handle flush_cache by ignoring it
1115 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1117 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1119 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1120 (BigEndianMem): Rename to ByteSwapMem and change sense.
1121 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1122 BigEndianMem references to !ByteSwapMem.
1123 (set_endianness): New function, with prototype.
1124 (sim_open): Call set_endianness.
1125 (sim_info): Use simBE instead of BigEndianMem.
1126 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1127 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1128 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1129 ifdefs, keeping the prototype declaration.
1130 (swap_word): Rewrite correctly.
1131 (ColdReset): Delete references to CONFIG. Delete endianness related
1132 code; moved to set_endianness.
1134 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1136 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1137 * interp.c (CHECKHILO): Define away.
1138 (simSIGINT): New macro.
1139 (membank_size): Increase from 1MB to 2MB.
1140 (control_c): New function.
1141 (sim_resume): Rename parameter signal to signal_number. Add local
1142 variable prev. Call signal before and after simulate.
1143 (sim_stop_reason): Add simSIGINT support.
1144 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1146 (sim_warning): Delete call to SignalException. Do call printf_filtered
1148 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1149 a call to sim_warning.
1151 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1153 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1154 16 bit instructions.
1156 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1158 Add support for mips16 (16 bit MIPS implementation):
1159 * gencode.c (inst_type): Add mips16 instruction encoding types.
1160 (GETDATASIZEINSN): Define.
1161 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1162 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1164 (MIPS16_DECODE): New table, for mips16 instructions.
1165 (bitmap_val): New static function.
1166 (struct mips16_op): Define.
1167 (mips16_op_table): New table, for mips16 operands.
1168 (build_mips16_operands): New static function.
1169 (process_instructions): If PC is odd, decode a mips16
1170 instruction. Break out instruction handling into new
1171 build_instruction function.
1172 (build_instruction): New static function, broken out of
1173 process_instructions. Check modifiers rather than flags for SHIFT
1174 bit count and m[ft]{hi,lo} direction.
1175 (usage): Pass program name to fprintf.
1176 (main): Remove unused variable this_option_optind. Change
1177 ``*loptarg++'' to ``loptarg++''.
1178 (my_strtoul): Parenthesize && within ||.
1179 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1180 (simulate): If PC is odd, fetch a 16 bit instruction, and
1181 increment PC by 2 rather than 4.
1182 * configure.in: Add case for mips16*-*-*.
1183 * configure: Rebuild.
1185 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1187 * interp.c: Allow -t to enable tracing in standalone simulator.
1188 Fix garbage output in trace file and error messages.
1190 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1192 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1193 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1194 * configure.in: Simplify using macros in ../common/aclocal.m4.
1195 * configure: Regenerated.
1196 * tconfig.in: New file.
1198 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1200 * interp.c: Fix bugs in 64-bit port.
1201 Use ansi function declarations for msvc compiler.
1202 Initialize and test file pointer in trace code.
1203 Prevent duplicate definition of LAST_EMED_REGNUM.
1205 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1207 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1209 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1211 * interp.c (SignalException): Check for explicit terminating
1213 * gencode.c: Pass instruction value through SignalException()
1214 calls for Trap, Breakpoint and Syscall.
1216 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1218 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1219 only used on those hosts that provide it.
1220 * configure.in: Add sqrt() to list of functions to be checked for.
1221 * config.in: Re-generated.
1222 * configure: Re-generated.
1224 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1226 * gencode.c (process_instructions): Call build_endian_shift when
1227 expanding STORE RIGHT, to fix swr.
1228 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1229 clear the high bits.
1230 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1231 Fix float to int conversions to produce signed values.
1233 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1235 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1236 (process_instructions): Correct handling of nor instruction.
1237 Correct shift count for 32 bit shift instructions. Correct sign
1238 extension for arithmetic shifts to not shift the number of bits in
1239 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1240 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1242 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1243 It's OK to have a mult follow a mult. What's not OK is to have a
1244 mult follow an mfhi.
1245 (Convert): Comment out incorrect rounding code.
1247 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1249 * interp.c (sim_monitor): Improved monitor printf
1250 simulation. Tidied up simulator warnings, and added "--log" option
1251 for directing warning message output.
1252 * gencode.c: Use sim_warning() rather than WARNING macro.
1254 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1256 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1257 getopt1.o, rather than on gencode.c. Link objects together.
1258 Don't link against -liberty.
1259 (gencode.o, getopt.o, getopt1.o): New targets.
1260 * gencode.c: Include <ctype.h> and "ansidecl.h".
1261 (AND): Undefine after including "ansidecl.h".
1262 (ULONG_MAX): Define if not defined.
1263 (OP_*): Don't define macros; now defined in opcode/mips.h.
1264 (main): Call my_strtoul rather than strtoul.
1265 (my_strtoul): New static function.
1267 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1269 * gencode.c (process_instructions): Generate word64 and uword64
1270 instead of `long long' and `unsigned long long' data types.
1271 * interp.c: #include sysdep.h to get signals, and define default
1273 * (Convert): Work around for Visual-C++ compiler bug with type
1275 * support.h: Make things compile under Visual-C++ by using
1276 __int64 instead of `long long'. Change many refs to long long
1277 into word64/uword64 typedefs.
1279 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1281 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1282 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1284 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1285 (AC_PROG_INSTALL): Added.
1286 (AC_PROG_CC): Moved to before configure.host call.
1287 * configure: Rebuilt.
1289 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1291 * configure.in: Define @SIMCONF@ depending on mips target.
1292 * configure: Rebuild.
1293 * Makefile.in (run): Add @SIMCONF@ to control simulator
1295 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1296 * interp.c: Remove some debugging, provide more detailed error
1297 messages, update memory accesses to use LOADDRMASK.
1299 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1301 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1302 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1304 * configure: Rebuild.
1305 * config.in: New file, generated by autoheader.
1306 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1307 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1308 HAVE_ANINT and HAVE_AINT, as appropriate.
1309 * Makefile.in (run): Use @LIBS@ rather than -lm.
1310 (interp.o): Depend upon config.h.
1311 (Makefile): Just rebuild Makefile.
1312 (clean): Remove stamp-h.
1313 (mostlyclean): Make the same as clean, not as distclean.
1314 (config.h, stamp-h): New targets.
1316 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1318 * interp.c (ColdReset): Fix boolean test. Make all simulator
1321 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1323 * interp.c (xfer_direct_word, xfer_direct_long,
1324 swap_direct_word, swap_direct_long, xfer_big_word,
1325 xfer_big_long, xfer_little_word, xfer_little_long,
1326 swap_word,swap_long): Added.
1327 * interp.c (ColdReset): Provide function indirection to
1328 host<->simulated_target transfer routines.
1329 * interp.c (sim_store_register, sim_fetch_register): Updated to
1330 make use of indirected transfer routines.
1332 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1334 * gencode.c (process_instructions): Ensure FP ABS instruction
1336 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1337 system call support.
1339 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1341 * interp.c (sim_do_command): Complain if callback structure not
1344 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1346 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1347 support for Sun hosts.
1348 * Makefile.in (gencode): Ensure the host compiler and libraries
1349 used for cross-hosted build.
1351 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1353 * interp.c, gencode.c: Some more (TODO) tidying.
1355 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1357 * gencode.c, interp.c: Replaced explicit long long references with
1358 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1359 * support.h (SET64LO, SET64HI): Macros added.
1361 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1363 * configure: Regenerate with autoconf 2.7.
1365 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1367 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1368 * support.h: Remove superfluous "1" from #if.
1369 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1371 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1373 * interp.c (StoreFPR): Control UndefinedResult() call on
1374 WARN_RESULT manifest.
1376 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1378 * gencode.c: Tidied instruction decoding, and added FP instruction
1381 * interp.c: Added dineroIII, and BSD profiling support. Also
1382 run-time FP handling.
1384 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1386 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1387 gencode.c, interp.c, support.h: created.