sim/mips/ChangeLog

   1 start-sanitize-sky
   2 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
   5         instead of QUADWORD.
   6
   7         * sim-main.h: Removed attempt at allowing 128-bit access.
   8
   9 end-sanitize-sky
  10 start-sanitize-sky
  11         Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
  12
  13         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
  14
  15         * interp.c (decode_coproc): Refer to VU CIA as a "special"
  16         register, not as a "misc" register.  Aha.  Add activity
  17         assertions after VCALLMS* instructions.
  18
  19 end-sanitize-sky
  20 start-sanitize-sky
  21         Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
  22
  23         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
  24         to upper code of generated VU instruction.
  25
  26 end-sanitize-sky
  27 start-sanitize-sky
  28 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
  29
  30         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
  31
  32         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
  33         for TARGET_SKY.
  34
  35         * r5900.igen (SQC2): Thinko.
  36
  37 end-sanitize-sky
  38 start-sanitize-sky
  39 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
  40
  41         * interp.c (*): Adapt code to merged VU device & state structs.
  42         (decode_coproc): Execute COP2 each macroinstruction without
  43         pipelining, by stepping VU to completion state.  Adapted to
  44         read_vu_*_reg style of register access.
  45
  46         * mips.igen ([SL]QC2): Removed these COP2 instructions.
  47
  48         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
  49
  50         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
  51
  52 end-sanitize-sky
  53 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  54
  55         * Makefile.in (SIM_OBJS): Add sim-main.o.
  56
  57         * sim-main.h (address_translation, load_memory, store_memory,
  58         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
  59         as INLINE_SIM_MAIN.
  60         (pr_addr, pr_uword64): Declare.
  61         (sim-main.c): Include when H_REVEALS_MODULE_P.
  62
  63         * interp.c (address_translation, load_memory, store_memory,
  64         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
  65         from here.
  66         * sim-main.c: To here. Fix compilation problems.
  67
  68         * configure.in: Enable inlining.
  69         * configure: Re-config.
  70
  71 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  72
  73         * configure: Regenerated to track ../common/aclocal.m4 changes.
  74
  75 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  76
  77         * mips.igen: Include tx.igen.
  78         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
  79         * tx.igen: New file, contains MADD and MADDU.
  80
  81         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
  82         the hardwired constant `7'.
  83         (store_memory): Ditto.
  84         (LOADDRMASK): Move definition to sim-main.h.
  85
  86         mips.igen (MTC0): Enable for r3900.
  87         (ADDU): Add trace.
  88
  89         mips.igen (do_load_byte): Delete.
  90         (do_load, do_store, do_load_left, do_load_write, do_store_left,
  91         do_store_right): New functions.
  92         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
  93
  94         configure.in: Let the tx39 use igen again.
  95         configure: Update.
  96
  97 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  98
  99         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 100         not an address sized quantity.  Return zero for cache sizes.
 101
 102 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 103
 104         * mips.igen (r3900): r3900 does not support 64 bit integer
 105         operations.
 106
 107 start-sanitize-sky
 108 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 109
 110         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 111
 112 end-sanitize-sky
 113 start-sanitize-sky
 114 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 115
 116         * interp.c (decode_coproc): Continuing COP2 work.
 117         (cop_[ls]q): Make sky-target-only.
 118
 119         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 120 end-sanitize-sky
 121 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 122
 123         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 124         than igen one.
 125         * configure : Rebuild.
 126
 127 start-sanitize-sky
 128 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 129
 130         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 131         around COP2 implementation skeleton.
 132
 133 end-sanitize-sky
 134 start-sanitize-sky
 135 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 136
 137         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 138
 139         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 140         static to access VU registers.
 141         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 142         decoding.  Work in progress.
 143
 144         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 145         overlapping/redundant bit pattern.
 146         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 147         progress.
 148
 149         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 150         status register.
 151
 152         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 153         access to coprocessor registers.
 154
 155         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 156 end-sanitize-sky
 157 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 158
 159         * configure: Regenerated to track ../common/aclocal.m4 changes.
 160
 161 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 162
 163         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 164
 165 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 166
 167         * configure: Regenerated to track ../common/aclocal.m4 changes.
 168         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 169
 170 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 171
 172         * configure: Regenerated to track ../common/aclocal.m4 changes.
 173
 174 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 175
 176         * interp.c (Max, Min): Comment out functions. Not yet used.
 177
 178 start-sanitize-vr4320
 179 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 180
 181         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 182
 183 end-sanitize-vr4320
 184 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 185
 186         * configure: Regenerated to track ../common/aclocal.m4 changes.
 187
 188 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 189
 190         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 191         configurable settings for stand-alone simulator.
 192
 193 start-sanitize-sky
 194         * configure.in: Added --with-sim-gpu2 option to specify path of
 195         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 196         links/compiles stand-alone simulator with this library.
 197
 198         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 199 end-sanitize-sky
 200         * configure.in: Added X11 search, just in case.
 201
 202         * configure: Regenerated.
 203
 204 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 205
 206         * interp.c (sim_write, sim_read, load_memory, store_memory):
 207         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 208
 209 start-sanitize-vr4320
 210 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 211
 212         * vr4320.igen (clz,dclz) : Added.
 213         (dmac): Replaced 99, with LO.
 214
 215 end-sanitize-vr4320
 216 start-sanitize-vr5400
 217 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 218
 219         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 220
 221 end-sanitize-vr5400
 222 start-sanitize-vr4320
 223 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 224
 225         * vr4320.igen: New file.
 226         * Makefile.in (vr4320.igen) : Added.
 227         * configure.in (mips64vr4320-*-*): Added.
 228         * configure : Rebuilt.
 229         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 230         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 231
 232 end-sanitize-vr4320
 233 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 234
 235         * sim-main.h (GETFCC): Return an unsigned value.
 236
 237 start-sanitize-r5900
 238         * r5900.igen: Use an unsigned array index variable `i'.
 239         (QFSRV): Ditto for variable bytes.
 240
 241 end-sanitize-r5900
 242 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 245         (DADD): Result destination is RD not RT.
 246
 247 start-sanitize-r5900
 248         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 249         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 250         divide.
 251
 252 end-sanitize-r5900
 253 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 254
 255         * sim-main.h (HIACCESS, LOACCESS): Always define.
 256
 257         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 258
 259         * interp.c (sim_info): Delete.
 260
 261 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 262
 263         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 264         (mips_option_handler): New argument `cpu'.
 265         (sim_open): Update call to sim_add_option_table.
 266
 267 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 268
 269         * mips.igen (CxC1): Add tracing.
 270
 271 start-sanitize-r5900
 272 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 273
 274         * r5900.igen (StoreFP): Delete.
 275         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 276         New functions.
 277         (rsqrt.s, sqrt.s): Implement.
 278         (r59cond): New function.
 279         (C.COND.S): Call r59cond in assembler line.
 280         (cvt.w.s, cvt.s.w): Implement.
 281
 282         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 283         instruction set.
 284
 285         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 286
 287 end-sanitize-r5900
 288 start-sanitize-r5900
 289 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 290
 291         * r5900.igen: Add tracing to all p* instructions.
 292
 293 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 294
 295         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 296         to get gdb talking to re-aranged sim_cpu register structure.
 297
 298 end-sanitize-r5900
 299 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 300
 301         * sim-main.h (Max, Min): Declare.
 302
 303         * interp.c (Max, Min): New functions.
 304
 305         * mips.igen (BC1): Add tracing.
 306
 307 start-sanitize-vr5400
 308 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 309
 310         * mdmx.igen: Tag all functions as requiring either with mdmx or
 311         vr5400 processor.
 312
 313 end-sanitize-vr5400
 314 start-sanitize-r5900
 315 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 316
 317         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 318         to 32.
 319         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 320
 321         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 322
 323         * r5900.igen: Rewrite.
 324
 325         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 326         struct.
 327         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 328         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 329
 330 end-sanitize-r5900
 331 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 332
 333         * interp.c Added memory map for stack in vr4100
 334
 335 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 336
 337         * interp.c (load_memory): Add missing "break"'s.
 338
 339 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 340
 341         * interp.c (sim_store_register, sim_fetch_register): Pass in
 342         length parameter.  Return -1.
 343
 344 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 345
 346         * interp.c: Added hardware init hook, fixed warnings.
 347
 348 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 349
 350         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 351
 352 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 353
 354         * interp.c (ifetch16): New function.
 355
 356         * sim-main.h (IMEM32): Rename IMEM.
 357         (IMEM16_IMMED): Define.
 358         (IMEM16): Define.
 359         (DELAY_SLOT): Update.
 360
 361         * m16run.c (sim_engine_run): New file.
 362
 363         * m16.igen: All instructions except LB.
 364         (LB): Call do_load_byte.
 365         * mips.igen (do_load_byte): New function.
 366         (LB): Call do_load_byte.
 367
 368         * mips.igen: Move spec for insn bit size and high bit from here.
 369         * Makefile.in (tmp-igen, tmp-m16): To here.
 370
 371         * m16.dc: New file, decode mips16 instructions.
 372
 373         * Makefile.in (SIM_NO_ALL): Define.
 374         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 375
 376 start-sanitize-tx19
 377         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 378         set.
 379
 380 end-sanitize-tx19
 381 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 382
 383         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 384         point unit to 32 bit registers.
 385         * configure: Re-generate.
 386
 387 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 388
 389         * configure.in (sim_use_gen): Make IGEN the default simulator
 390         generator for generic 32 and 64 bit mips targets.
 391         * configure: Re-generate.
 392
 393 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 394
 395         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 396         bitsize.
 397
 398         * interp.c (sim_fetch_register, sim_store_register): Read/write
 399         FGR from correct location.
 400         (sim_open): Set size of FGR's according to
 401         WITH_TARGET_FLOATING_POINT_BITSIZE.
 402
 403         * sim-main.h (FGR): Store floating point registers in a separate
 404         array.
 405
 406 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 407
 408         * configure: Regenerated to track ../common/aclocal.m4 changes.
 409
 410 start-sanitize-vr5400
 411         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 412
 413 end-sanitize-vr5400
 414 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 415
 416         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 417
 418         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 419
 420         * interp.c (pending_tick): New function.  Deliver pending writes.
 421
 422         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 423         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 424         it can handle mixed sized quantites and single bits.
 425
 426 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 427
 428         * interp.c (oengine.h): Do not include when building with IGEN.
 429         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 430         (sim_info): Ditto for PROCESSOR_64BIT.
 431         (sim_monitor): Replace ut_reg with unsigned_word.
 432         (*): Ditto for t_reg.
 433         (LOADDRMASK): Define.
 434         (sim_open): Remove defunct check that host FP is IEEE compliant,
 435         using software to emulate floating point.
 436         (value_fpr, ...): Always compile, was conditional on HASFPU.
 437
 438 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 439
 440         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 441         size.
 442
 443         * interp.c (SD, CPU): Define.
 444         (mips_option_handler): Set flags in each CPU.
 445         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 446         (sim_close): Do not clear STATE, deleted anyway.
 447         (sim_write, sim_read): Assume CPU zero's vm should be used for
 448         data transfers.
 449         (sim_create_inferior): Set the PC for all processors.
 450         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 451         argument.
 452         (mips16_entry): Pass correct nr of args to store_word, load_word.
 453         (ColdReset): Cold reset all cpu's.
 454         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 455         (sim_monitor, load_memory, store_memory, signal_exception): Use
 456         `CPU' instead of STATE_CPU.
 457
 458
 459         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 460         SD or CPU_.
 461
 462         * sim-main.h (signal_exception): Add sim_cpu arg.
 463         (SignalException*): Pass both SD and CPU to signal_exception.
 464         * interp.c (signal_exception): Update.
 465
 466         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 467         Ditto
 468         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 469         address_translation): Ditto
 470         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 471
 472 start-sanitize-vr5400
 473         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 474         `sd'.
 475         (ByteAlign): Use StoreFPR, pass args in correct order.
 476
 477 end-sanitize-vr5400
 478 start-sanitize-r5900
 479 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 480
 481         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 482
 483 end-sanitize-r5900
 484 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 485
 486         * configure: Regenerated to track ../common/aclocal.m4 changes.
 487
 488 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 489
 490 start-sanitize-r5900
 491         * configure.in (sim_igen_filter): For r5900, use igen.
 492         * configure: Re-generate.
 493
 494 end-sanitize-r5900
 495         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 496
 497         * mips.igen (model): Map processor names onto BFD name.
 498
 499         * sim-main.h (CPU_CIA): Delete.
 500         (SET_CIA, GET_CIA): Define
 501
 502 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 503
 504         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 505         regiser.
 506
 507         * configure.in (default_endian): Configure a big-endian simulator
 508         by default.
 509         * configure: Re-generate.
 510
 511 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 512
 513         * configure: Regenerated to track ../common/aclocal.m4 changes.
 514
 515 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 516
 517         * interp.c (sim_monitor): Handle Densan monitor outbyte
 518         and inbyte functions.
 519
 520 1997-12-29  Felix Lee  <flee@cygnus.com>
 521
 522         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 523
 524 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 525
 526         * Makefile.in (tmp-igen): Arrange for $zero to always be
 527         reset to zero after every instruction.
 528
 529 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 530
 531         * configure: Regenerated to track ../common/aclocal.m4 changes.
 532         * config.in: Ditto.
 533
 534 start-sanitize-vr5400
 535 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 536
 537         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 538         bit values.
 539
 540 end-sanitize-vr5400
 541 start-sanitize-vr5400
 542 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 543
 544         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 545         vr5400 with the vr5000 as the default.
 546
 547 end-sanitize-vr5400
 548 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 549
 550         * mips.igen (MSUB): Fix to work like MADD.
 551         * gencode.c (MSUB): Similarly.
 552
 553 start-sanitize-vr5400
 554 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 555
 556         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 557         vr5400.
 558
 559 end-sanitize-vr5400
 560 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 561
 562         * configure: Regenerated to track ../common/aclocal.m4 changes.
 563
 564 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 565
 566         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 567
 568 start-sanitize-vr5400
 569         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 570         (value_cc, store_cc): Implement.
 571
 572         * sim-main.h: Add 8*3*8 bit accumulator.
 573
 574         * vr5400.igen: Move mdmx instructins from here
 575         * mdmx.igen: To here - new file. Add/fix missing instructions.
 576         * mips.igen: Include mdmx.igen.
 577         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 578
 579 end-sanitize-vr5400
 580 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 581
 582         * sim-main.h (sim-fpu.h): Include.
 583
 584         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 585         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 586         using host independant sim_fpu module.
 587
 588 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 589
 590         * interp.c (signal_exception): Report internal errors with SIGABRT
 591         not SIGQUIT.
 592
 593         * sim-main.h (C0_CONFIG): New register.
 594         (signal.h): No longer include.
 595
 596         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 597
 598 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 599
 600         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 601
 602 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 603
 604         * mips.igen: Tag vr5000 instructions.
 605         (ANDI): Was missing mipsIV model, fix assembler syntax.
 606         (do_c_cond_fmt): New function.
 607         (C.cond.fmt): Handle mips I-III which do not support CC field
 608         separatly.
 609         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 610         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 611         in IV3.2 spec.
 612         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 613         vr5000 which saves LO in a GPR separatly.
 614
 615         * configure.in (enable-sim-igen): For vr5000, select vr5000
 616         specific instructions.
 617         * configure: Re-generate.
 618
 619 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 620
 621         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 622
 623         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 624         fmt_uninterpreted_64 bit cases to switch.  Convert to
 625         fmt_formatted,
 626
 627         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 628
 629         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 630         as specified in IV3.2 spec.
 631         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 632
 633 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 634
 635         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 636         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 637         (start-sanitize-r5900):
 638         (LWXC1, SWXC1): Delete from r5900 instruction set.
 639         (end-sanitize-r5900):
 640         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 641         PENDING_FILL versions of instructions.  Simplify.
 642         (X): New function.
 643         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 644         instructions.
 645         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 646         a signed value.
 647         (MTHI, MFHI): Disable code checking HI-LO.
 648
 649         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 650         global.
 651         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 652
 653 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 654
 655         * gencode.c (build_mips16_operands): Replace IPC with cia.
 656
 657         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 658         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 659         IPC to `cia'.
 660         (UndefinedResult): Replace function with macro/function
 661         combination.
 662         (sim_engine_run): Don't save PC in IPC.
 663
 664         * sim-main.h (IPC): Delete.
 665
 666         start-sanitize-vr5400
 667         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 668         (do_select): Rename function select.
 669         end-sanitize-vr5400
 670
 671         * interp.c (signal_exception, store_word, load_word,
 672         address_translation, load_memory, store_memory, cache_op,
 673         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 674         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 675         current instruction address - cia - argument.
 676         (sim_read, sim_write): Call address_translation directly.
 677         (sim_engine_run): Rename variable vaddr to cia.
 678         (signal_exception): Pass cia to sim_monitor
 679
 680         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 681         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 682         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 683
 684         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 685         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 686         SIM_ASSERT.
 687
 688         * interp.c (signal_exception): Pass restart address to
 689         sim_engine_restart.
 690
 691         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 692         idecode.o): Add dependency.
 693
 694         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 695         Delete definitions
 696         (DELAY_SLOT): Update NIA not PC with branch address.
 697         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 698
 699         * mips.igen: Use CIA not PC in branch calculations.
 700         (illegal): Call SignalException.
 701         (BEQ, ADDIU): Fix assembler.
 702
 703 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 704
 705         * m16.igen (JALX): Was missing.
 706
 707         * configure.in (enable-sim-igen): New configuration option.
 708         * configure: Re-generate.
 709
 710         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 711
 712         * interp.c (load_memory, store_memory): Delete parameter RAW.
 713         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 714         bypassing {load,store}_memory.
 715
 716         * sim-main.h (ByteSwapMem): Delete definition.
 717
 718         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 719
 720         * interp.c (sim_do_command, sim_commands): Delete mips specific
 721         commands.  Handled by module sim-options.
 722
 723         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 724         (WITH_MODULO_MEMORY): Define.
 725
 726         * interp.c (sim_info): Delete code printing memory size.
 727
 728         * interp.c (mips_size): Nee sim_size, delete function.
 729         (power2): Delete.
 730         (monitor, monitor_base, monitor_size): Delete global variables.
 731         (sim_open, sim_close): Delete code creating monitor and other
 732         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 733         manage memory regions.
 734         (load_memory, store_memory): Use sim-core for memory model.
 735
 736         * interp.c (address_translation): Delete all memory map code
 737         except line forcing 32 bit addresses.
 738
 739 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 740
 741         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 742         trace options.
 743
 744         * interp.c (logfh, logfile): Delete globals.
 745         (sim_open, sim_close): Delete code opening & closing log file.
 746         (mips_option_handler): Delete -l and -n options.
 747         (OPTION mips_options): Ditto.
 748
 749         * interp.c (OPTION mips_options): Rename option trace to dinero.
 750         (mips_option_handler): Update.
 751
 752 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 753
 754         * interp.c (fetch_str): New function.
 755         (sim_monitor): Rewrite using sim_read & sim_write.
 756         (sim_open): Check magic number.
 757         (sim_open): Write monitor vectors into memory using sim_write.
 758         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 759         (sim_read, sim_write): Simplify - transfer data one byte at a
 760         time.
 761         (load_memory, store_memory): Clarify meaning of parameter RAW.
 762
 763         * sim-main.h (isHOST): Defete definition.
 764         (isTARGET): Mark as depreciated.
 765         (address_translation): Delete parameter HOST.
 766
 767         * interp.c (address_translation): Delete parameter HOST.
 768
 769 start-sanitize-tx49
 770 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 771
 772         * gencode.c: Add tx49 configury and insns.
 773         * configure.in: Add tx49 configury.
 774         * configure: Update.
 775
 776 end-sanitize-tx49
 777 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 778
 779         * mips.igen:
 780
 781         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 782         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 783
 784 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 785
 786         * mips.igen: Add model filter field to records.
 787
 788 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 789
 790         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 791
 792         interp.c (sim_engine_run): Do not compile function sim_engine_run
 793         when WITH_IGEN == 1.
 794
 795         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 796         target architecture.
 797
 798         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 799         igen. Replace with configuration variables sim_igen_flags /
 800         sim_m16_flags.
 801
 802         start-sanitize-r5900
 803         * r5900.igen: New file. Copy r5900 insns here.
 804         end-sanitize-r5900
 805         start-sanitize-vr5400
 806         * vr5400.igen: New file.
 807         end-sanitize-vr5400
 808         * m16.igen: New file.  Copy mips16 insns here.
 809         * mips.igen: From here.
 810
 811 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 812
 813         start-sanitize-vr5400
 814         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 815
 816         * configure.in: Add mips64vr5400 target.
 817         * configure: Re-generate.
 818
 819         end-sanitize-vr5400
 820         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 821         to top.
 822         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 823
 824 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 825
 826         * gencode.c (build_instruction): Follow sim_write's lead in using
 827         BigEndianMem instead of !ByteSwapMem.
 828
 829 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 830
 831         * configure.in (sim_gen): Dependent on target, select type of
 832         generator.  Always select old style generator.
 833
 834         configure: Re-generate.
 835
 836         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 837         targets.
 838         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 839         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 840         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 841         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 842         SIM_@sim_gen@_*, set by autoconf.
 843
 844 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 845
 846         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 847
 848         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 849         CURRENT_FLOATING_POINT instead.
 850
 851         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 852         (address_translation): Raise exception InstructionFetch when
 853         translation fails and isINSTRUCTION.
 854
 855         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 856         sim_engine_run): Change type of of vaddr and paddr to
 857         address_word.
 858         (address_translation, prefetch, load_memory, store_memory,
 859         cache_op): Change type of vAddr and pAddr to address_word.
 860
 861         * gencode.c (build_instruction): Change type of vaddr and paddr to
 862         address_word.
 863
 864 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 865
 866         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 867         macro to obtain result of ALU op.
 868
 869 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 870
 871         * interp.c (sim_info): Call profile_print.
 872
 873 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 874
 875         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 876
 877         * sim-main.h (WITH_PROFILE): Do not define, defined in
 878         common/sim-config.h.  Use sim-profile module.
 879         (simPROFILE): Delete defintion.
 880
 881         * interp.c (PROFILE): Delete definition.
 882         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 883         (sim_close): Delete code writing profile histogram.
 884         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 885         Delete.
 886         (sim_engine_run): Delete code profiling the PC.
 887
 888 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 889
 890         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 891
 892         * interp.c (sim_monitor): Make register pointers of type
 893         unsigned_word*.
 894
 895         * sim-main.h: Make registers of type unsigned_word not
 896         signed_word.
 897
 898 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 899
 900 start-sanitize-r5900
 901         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 902         ...): Move to sim-main.h
 903
 904 end-sanitize-r5900
 905         * interp.c (sync_operation): Rename from SyncOperation, make
 906         global, add SD argument.
 907         (prefetch): Rename from Prefetch, make global, add SD argument.
 908         (decode_coproc): Make global.
 909
 910         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 911
 912         * gencode.c (build_instruction): Generate DecodeCoproc not
 913         decode_coproc calls.
 914
 915         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 916         (SizeFGR): Move to sim-main.h
 917         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 918         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 919         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 920         sim-main.h.
 921         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 922         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 923         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 924         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 925         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 926         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 927
 928         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 929         exception.
 930         (sim-alu.h): Include.
 931         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 932         (sim_cia): Typedef to instruction_address.
 933
 934 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 935
 936         * Makefile.in (interp.o): Rename generated file engine.c to
 937         oengine.c.
 938
 939         * interp.c: Update.
 940
 941 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 942
 943         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 944
 945 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 946
 947         * gencode.c (build_instruction): For "FPSQRT", output correct
 948         number of arguments to Recip.
 949
 950 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 951
 952         * Makefile.in (interp.o): Depends on sim-main.h
 953
 954         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 955
 956         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 957         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 958         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 959         STATE, DSSTATE): Define
 960         (GPR, FGRIDX, ..): Define.
 961
 962         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 963         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 964         (GPR, FGRIDX, ...): Delete macros.
 965
 966         * interp.c: Update names to match defines from sim-main.h
 967
 968 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 969
 970         * interp.c (sim_monitor): Add SD argument.
 971         (sim_warning): Delete.  Replace calls with calls to
 972         sim_io_eprintf.
 973         (sim_error): Delete. Replace calls with sim_io_error.
 974         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 975         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 976         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 977         argument.
 978         (mips_size): Rename from sim_size. Add SD argument.
 979
 980         * interp.c (simulator): Delete global variable.
 981         (callback): Delete global variable.
 982         (mips_option_handler, sim_open, sim_write, sim_read,
 983         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 984         sim_size,sim_monitor): Use sim_io_* not callback->*.
 985         (sim_open): ZALLOC simulator struct.
 986         (PROFILE): Do not define.
 987
 988 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 989
 990         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 991         support.h with corresponding code.
 992
 993         * sim-main.h (word64, uword64), support.h: Move definition to
 994         sim-main.h.
 995         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 996
 997         * support.h: Delete
 998         * Makefile.in: Update dependencies
 999         * interp.c: Do not include.
1000
1001 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1002
1003         * interp.c (address_translation, load_memory, store_memory,
1004         cache_op): Rename to from AddressTranslation et.al., make global,
1005         add SD argument
1006
1007         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1008         CacheOp): Define.
1009
1010         * interp.c (SignalException): Rename to signal_exception, make
1011         global.
1012
1013         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1014
1015         * sim-main.h (SignalException, SignalExceptionInterrupt,
1016         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1017         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1018         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1019         Define.
1020
1021         * interp.c, support.h: Use.
1022
1023 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1024
1025         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1026         to value_fpr / store_fpr. Add SD argument.
1027         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1028         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1029
1030         * sim-main.h (ValueFPR, StoreFPR): Define.
1031
1032 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1033
1034         * interp.c (sim_engine_run): Check consistency between configure
1035         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1036         and HASFPU.
1037
1038         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1039         (mips_fpu): Configure WITH_FLOATING_POINT.
1040         (mips_endian): Configure WITH_TARGET_ENDIAN.
1041         * configure: Update.
1042
1043 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1044
1045         * configure: Regenerated to track ../common/aclocal.m4 changes.
1046
1047 start-sanitize-r5900
1048 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1049
1050         * interp.c (MAX_REG): Allow up-to 128 registers.
1051         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1052         (REGISTER_SA): Ditto.
1053         (sim_open): Initialize register_widths for r5900 specific
1054         registers.
1055         (sim_fetch_register, sim_store_register): Check for request of
1056         r5900 specific SA register.  Check for request for hi 64 bits of
1057         r5900 specific registers.
1058
1059 end-sanitize-r5900
1060 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1061
1062         * configure: Regenerated.
1063
1064 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1065
1066         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1067
1068 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1069
1070         * gencode.c (print_igen_insn_models): Assume certain architectures
1071         include all mips* instructions.
1072         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1073         instruction.
1074
1075         * Makefile.in (tmp.igen): Add target. Generate igen input from
1076         gencode file.
1077
1078         * gencode.c (FEATURE_IGEN): Define.
1079         (main): Add --igen option.  Generate output in igen format.
1080         (process_instructions): Format output according to igen option.
1081         (print_igen_insn_format): New function.
1082         (print_igen_insn_models): New function.
1083         (process_instructions): Only issue warnings and ignore
1084         instructions when no FEATURE_IGEN.
1085
1086 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1087
1088         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1089         MIPS targets.
1090
1091 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1092
1093         * configure: Regenerated to track ../common/aclocal.m4 changes.
1094
1095 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1096
1097         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1098         SIM_RESERVED_BITS): Delete, moved to common.
1099         (SIM_EXTRA_CFLAGS): Update.
1100
1101 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1102
1103         * configure.in: Configure non-strict memory alignment.
1104         * configure: Regenerated to track ../common/aclocal.m4 changes.
1105
1106 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1107
1108         * configure: Regenerated to track ../common/aclocal.m4 changes.
1109
1110 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1111
1112         * gencode.c (SDBBP,DERET): Added (3900) insns.
1113         (RFE): Turn on for 3900.
1114         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1115         (dsstate): Made global.
1116         (SUBTARGET_R3900): Added.
1117         (CANCELDELAYSLOT): New.
1118         (SignalException): Ignore SystemCall rather than ignore and
1119         terminate.  Add DebugBreakPoint handling.
1120         (decode_coproc): New insns RFE, DERET; and new registers Debug
1121         and DEPC protected by SUBTARGET_R3900.
1122         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1123         bits explicitly.
1124         * Makefile.in,configure.in: Add mips subtarget option.
1125         * configure: Update.
1126
1127 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1128
1129         * gencode.c: Add r3900 (tx39).
1130
1131 start-sanitize-tx19
1132         * gencode.c: Fix some configuration problems by improving
1133         the relationship between tx19 and tx39.
1134 end-sanitize-tx19
1135
1136 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1137
1138         * gencode.c (build_instruction): Don't need to subtract 4 for
1139         JALR, just 2.
1140
1141 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1142
1143         * interp.c: Correct some HASFPU problems.
1144
1145 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1146
1147         * configure: Regenerated to track ../common/aclocal.m4 changes.
1148
1149 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1150
1151         * interp.c (mips_options): Fix samples option short form, should
1152         be `x'.
1153
1154 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1155
1156         * interp.c (sim_info): Enable info code.  Was just returning.
1157
1158 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1159
1160         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1161         MFC0.
1162
1163 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1164
1165         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1166         constants.
1167         (build_instruction): Ditto for LL.
1168
1169 start-sanitize-tx19
1170 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1171
1172         * mips/configure.in, mips/gencode: Add tx19/r1900.
1173
1174 end-sanitize-tx19
1175 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1176
1177         * configure: Regenerated to track ../common/aclocal.m4 changes.
1178
1179 start-sanitize-r5900
1180 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1181
1182         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1183         for overflow due to ABS of MININT, set result to MAXINT.
1184         (build_instruction): For "psrlvw", signextend bit 31.
1185
1186 end-sanitize-r5900
1187 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1188
1189         * configure: Regenerated to track ../common/aclocal.m4 changes.
1190         * config.in: Ditto.
1191
1192 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1193
1194         * interp.c (sim_open): Add call to sim_analyze_program, update
1195         call to sim_config.
1196
1197 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1198
1199         * interp.c (sim_kill): Delete.
1200         (sim_create_inferior): Add ABFD argument. Set PC from same.
1201         (sim_load): Move code initializing trap handlers from here.
1202         (sim_open): To here.
1203         (sim_load): Delete, use sim-hload.c.
1204
1205         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1206
1207 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1208
1209         * configure: Regenerated to track ../common/aclocal.m4 changes.
1210         * config.in: Ditto.
1211
1212 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1213
1214         * interp.c (sim_open): Add ABFD argument.
1215         (sim_load): Move call to sim_config from here.
1216         (sim_open): To here.  Check return status.
1217
1218 start-sanitize-r5900
1219         * gencode.c (build_instruction): Do not define x8000000000000000,
1220         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1221
1222 end-sanitize-r5900
1223 start-sanitize-r5900
1224 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1225
1226         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1227         "pdivuw" check for overflow due to signed divide by -1.
1228
1229 end-sanitize-r5900
1230 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1231
1232         * gencode.c (build_instruction): Two arg MADD should
1233         not assign result to $0.
1234
1235 start-sanitize-r5900
1236 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1237
1238         * gencode.c (build_instruction): For "ppac5" use unsigned
1239         arrithmetic so that the sign bit doesn't smear when right shifted.
1240         (build_instruction): For "pdiv" perform sign extension when
1241         storing results in HI and LO.
1242         (build_instructions): For "pdiv" and "pdivbw" check for
1243         divide-by-zero.
1244         (build_instruction): For "pmfhl.slw" update hi part of dest
1245         register as well as low part.
1246         (build_instruction): For "pmfhl" portably handle long long values.
1247         (build_instruction): For "pmfhl.sh" correctly negative values.
1248         Store half words 2 and three in the correct place.
1249         (build_instruction): For "psllvw", sign extend value after shift.
1250
1251 end-sanitize-r5900
1252 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1253
1254         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1255         * sim/mips/configure.in: Regenerate.
1256
1257 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1258
1259         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1260         signed8, unsigned8 et.al. types.
1261
1262 start-sanitize-r5900
1263         * gencode.c (build_instruction): For PMULTU* do not sign extend
1264         registers.  Make generated code easier to debug.
1265
1266 end-sanitize-r5900
1267         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1268         hosts when selecting subreg.
1269
1270 start-sanitize-r5900
1271 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1272
1273         * gencode.c (type_for_data_len): For 32bit operations concerned
1274         with overflow, perform op using 64bits.
1275         (build_instruction): For PADD, always compute operation using type
1276         returned by type_for_data_len.
1277         (build_instruction): For PSUBU, when overflow, saturate to zero as
1278         actually underflow.
1279
1280 end-sanitize-r5900
1281 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1282
1283 start-sanitize-r5900
1284         * gencode.c (build_instruction): Handle "pext5" according to
1285         version 1.95 of the r5900 ISA.
1286
1287         * gencode.c (build_instruction): Handle "ppac5" according to
1288         version 1.95 of the r5900 ISA.
1289
1290 end-sanitize-r5900
1291         * interp.c (sim_engine_run): Reset the ZERO register to zero
1292         regardless of FEATURE_WARN_ZERO.
1293         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1294
1295 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1296
1297         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1298         (SignalException): For BreakPoints ignore any mode bits and just
1299         save the PC.
1300         (SignalException): Always set the CAUSE register.
1301
1302 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1303
1304         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1305         exception has been taken.
1306
1307         * interp.c: Implement the ERET and mt/f sr instructions.
1308
1309 start-sanitize-r5900
1310 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1311
1312         * gencode.c (build_instruction): For paddu, extract unsigned
1313         sub-fields.
1314
1315         * gencode.c (build_instruction): Saturate padds instead of padd
1316         instructions.
1317
1318 end-sanitize-r5900
1319 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1320
1321         * interp.c (SignalException): Don't bother restarting an
1322         interrupt.
1323
1324 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1325
1326         * interp.c (SignalException): Really take an interrupt.
1327         (interrupt_event): Only deliver interrupts when enabled.
1328
1329 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1330
1331         * interp.c (sim_info): Only print info when verbose.
1332         (sim_info) Use sim_io_printf for output.
1333
1334 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1335
1336         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1337         mips architectures.
1338
1339 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1340
1341         * interp.c (sim_do_command): Check for common commands if a
1342         simulator specific command fails.
1343
1344 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1345
1346         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1347         and simBE when DEBUG is defined.
1348
1349 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1350
1351         * interp.c (interrupt_event): New function.  Pass exception event
1352         onto exception handler.
1353
1354         * configure.in: Check for stdlib.h.
1355         * configure: Regenerate.
1356
1357         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1358         variable declaration.
1359         (build_instruction): Initialize memval1.
1360         (build_instruction): Add UNUSED attribute to byte, bigend,
1361         reverse.
1362         (build_operands): Ditto.
1363
1364         * interp.c: Fix GCC warnings.
1365         (sim_get_quit_code): Delete.
1366
1367         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1368         * Makefile.in: Ditto.
1369         * configure: Re-generate.
1370
1371         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1372
1373 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1374
1375         * interp.c (mips_option_handler): New function parse argumes using
1376         sim-options.
1377         (myname): Replace with STATE_MY_NAME.
1378         (sim_open): Delete check for host endianness - performed by
1379         sim_config.
1380         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1381         (sim_open): Move much of the initialization from here.
1382         (sim_load): To here.  After the image has been loaded and
1383         endianness set.
1384         (sim_open): Move ColdReset from here.
1385         (sim_create_inferior): To here.
1386         (sim_open): Make FP check less dependant on host endianness.
1387
1388         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1389         run.
1390         * interp.c (sim_set_callbacks): Delete.
1391
1392         * interp.c (membank, membank_base, membank_size): Replace with
1393         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1394         (sim_open): Remove call to callback->init. gdb/run do this.
1395
1396         * interp.c: Update
1397
1398         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1399
1400         * interp.c (big_endian_p): Delete, replaced by
1401         current_target_byte_order.
1402
1403 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1404
1405         * interp.c (host_read_long, host_read_word, host_swap_word,
1406         host_swap_long): Delete. Using common sim-endian.
1407         (sim_fetch_register, sim_store_register): Use H2T.
1408         (pipeline_ticks): Delete.  Handled by sim-events.
1409         (sim_info): Update.
1410         (sim_engine_run): Update.
1411
1412 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1413
1414         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1415         reason from here.
1416         (SignalException): To here. Signal using sim_engine_halt.
1417         (sim_stop_reason): Delete, moved to common.
1418
1419 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1420
1421         * interp.c (sim_open): Add callback argument.
1422         (sim_set_callbacks): Delete SIM_DESC argument.
1423         (sim_size): Ditto.
1424
1425 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1426
1427         * Makefile.in (SIM_OBJS): Add common modules.
1428
1429         * interp.c (sim_set_callbacks): Also set SD callback.
1430         (set_endianness, xfer_*, swap_*): Delete.
1431         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1432         Change to functions using sim-endian macros.
1433         (control_c, sim_stop): Delete, use common version.
1434         (simulate): Convert into.
1435         (sim_engine_run): This function.
1436         (sim_resume): Delete.
1437
1438         * interp.c (simulation): New variable - the simulator object.
1439         (sim_kind): Delete global - merged into simulation.
1440         (sim_load): Cleanup.  Move PC assignment from here.
1441         (sim_create_inferior): To here.
1442
1443         * sim-main.h: New file.
1444         * interp.c (sim-main.h): Include.
1445
1446 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1447
1448         * configure: Regenerated to track ../common/aclocal.m4 changes.
1449
1450 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1451
1452         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1453
1454 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1455
1456         * gencode.c (build_instruction): DIV instructions: check
1457         for division by zero and integer overflow before using
1458         host's division operation.
1459
1460 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1461
1462         * Makefile.in (SIM_OBJS): Add sim-load.o.
1463         * interp.c: #include bfd.h.
1464         (target_byte_order): Delete.
1465         (sim_kind, myname, big_endian_p): New static locals.
1466         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1467         after argument parsing.  Recognize -E arg, set endianness accordingly.
1468         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1469         load file into simulator.  Set PC from bfd.
1470         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1471         (set_endianness): Use big_endian_p instead of target_byte_order.
1472
1473 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1474
1475         * interp.c (sim_size): Delete prototype - conflicts with
1476         definition in remote-sim.h.  Correct definition.
1477
1478 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1479
1480         * configure: Regenerated to track ../common/aclocal.m4 changes.
1481         * config.in: Ditto.
1482
1483 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1484
1485         * interp.c (sim_open): New arg `kind'.
1486
1487         * configure: Regenerated to track ../common/aclocal.m4 changes.
1488
1489 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1490
1491         * configure: Regenerated to track ../common/aclocal.m4 changes.
1492
1493 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1494
1495         * interp.c (sim_open): Set optind to 0 before calling getopt.
1496
1497 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1498
1499         * configure: Regenerated to track ../common/aclocal.m4 changes.
1500
1501 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1502
1503         * interp.c : Replace uses of pr_addr with pr_uword64
1504         where the bit length is always 64 independent of SIM_ADDR.
1505         (pr_uword64) : added.
1506
1507 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1508
1509         * configure: Re-generate.
1510
1511 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1512
1513         * configure: Regenerate to track ../common/aclocal.m4 changes.
1514
1515 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1516
1517         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1518         in argv form.
1519         (other sim_*): New SIM_DESC argument.
1520
1521 start-sanitize-r5900
1522 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1523
1524         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1525         Change values to avoid overloading DOUBLEWORD which is tested
1526         for all insns.
1527         * gencode.c: reinstate "offending code".
1528
1529 end-sanitize-r5900
1530 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1531
1532         * interp.c: Fix printing of addresses for non-64-bit targets.
1533         (pr_addr): Add function to print address based on size.
1534 start-sanitize-r5900
1535         * gencode.c: #ifdef out offending code until a permanent fix
1536         can be added.  Code is causing build errors for non-5900 mips targets.
1537 end-sanitize-r5900
1538
1539 start-sanitize-r5900
1540 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1541
1542         * gencode.c (process_instructions): Correct test for ISA dependent
1543         architecture bits in isa field of MIPS_DECODE.
1544
1545 end-sanitize-r5900
1546 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1547
1548         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1549
1550 start-sanitize-r5900
1551 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1552
1553         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1554         PMADDUW.
1555
1556 end-sanitize-r5900
1557 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1558
1559         * gencode.c (build_mips16_operands): Correct computation of base
1560         address for extended PC relative instruction.
1561
1562 start-sanitize-r5900
1563 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1564
1565         * Makefile.in, configure, configure.in, gencode.c,
1566         interp.c, support.h: add r5900.
1567
1568 end-sanitize-r5900
1569 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1570
1571         * interp.c (mips16_entry): Add support for floating point cases.
1572         (SignalException): Pass floating point cases to mips16_entry.
1573         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1574         registers.
1575         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1576         or fmt_word.
1577         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1578         and then set the state to fmt_uninterpreted.
1579         (COP_SW): Temporarily set the state to fmt_word while calling
1580         ValueFPR.
1581
1582 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1583
1584         * gencode.c (build_instruction): The high order may be set in the
1585         comparison flags at any ISA level, not just ISA 4.
1586
1587 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1588
1589         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1590         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1591         * configure.in: sinclude ../common/aclocal.m4.
1592         * configure: Regenerated.
1593
1594 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1595
1596         * configure: Rebuild after change to aclocal.m4.
1597
1598 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1599
1600         * configure configure.in Makefile.in:  Update to new configure
1601         scheme which is more compatible with WinGDB builds.
1602         * configure.in:  Improve comment on how to run autoconf.
1603         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1604         * Makefile.in:  Use autoconf substitution to install common
1605         makefile fragment.
1606
1607 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1608
1609         * gencode.c (build_instruction): Use BigEndianCPU instead of
1610         ByteSwapMem.
1611
1612 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1613
1614         * interp.c (sim_monitor): Make output to stdout visible in
1615         wingdb's I/O log window.
1616
1617 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1618
1619         * support.h: Undo previous change to SIGTRAP
1620         and SIGQUIT values.
1621
1622 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1623
1624         * interp.c (store_word, load_word): New static functions.
1625         (mips16_entry): New static function.
1626         (SignalException): Look for mips16 entry and exit instructions.
1627         (simulate): Use the correct index when setting fpr_state after
1628         doing a pending move.
1629
1630 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1631
1632         * interp.c: Fix byte-swapping code throughout to work on
1633         both little- and big-endian hosts.
1634
1635 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1636
1637         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1638         with gdb/config/i386/xm-windows.h.
1639
1640 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1641
1642         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1643         that messes up arithmetic shifts.
1644
1645 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1646
1647         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1648         SIGTRAP and SIGQUIT for _WIN32.
1649
1650 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1651
1652         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1653         force a 64 bit multiplication.
1654         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1655         destination register is 0, since that is the default mips16 nop
1656         instruction.
1657
1658 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1659
1660         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1661         (build_endian_shift): Don't check proc64.
1662         (build_instruction): Always set memval to uword64.  Cast op2 to
1663         uword64 when shifting it left in memory instructions.  Always use
1664         the same code for stores--don't special case proc64.
1665
1666         * gencode.c (build_mips16_operands): Fix base PC value for PC
1667         relative operands.
1668         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1669         jal instruction.
1670         * interp.c (simJALDELAYSLOT): Define.
1671         (JALDELAYSLOT): Define.
1672         (INDELAYSLOT, INJALDELAYSLOT): Define.
1673         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1674
1675 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1676
1677         * interp.c (sim_open): add flush_cache as a PMON routine
1678         (sim_monitor): handle flush_cache by ignoring it
1679
1680 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1681
1682         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1683         BigEndianMem.
1684         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1685         (BigEndianMem): Rename to ByteSwapMem and change sense.
1686         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1687         BigEndianMem references to !ByteSwapMem.
1688         (set_endianness): New function, with prototype.
1689         (sim_open): Call set_endianness.
1690         (sim_info): Use simBE instead of BigEndianMem.
1691         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1692         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1693         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1694         ifdefs, keeping the prototype declaration.
1695         (swap_word): Rewrite correctly.
1696         (ColdReset): Delete references to CONFIG.  Delete endianness related
1697         code; moved to set_endianness.
1698
1699 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1700
1701         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1702         * interp.c (CHECKHILO): Define away.
1703         (simSIGINT): New macro.
1704         (membank_size): Increase from 1MB to 2MB.
1705         (control_c): New function.
1706         (sim_resume): Rename parameter signal to signal_number.  Add local
1707         variable prev.  Call signal before and after simulate.
1708         (sim_stop_reason): Add simSIGINT support.
1709         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1710         functions always.
1711         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1712         if logfh is NULL.
1713         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1714         a call to sim_warning.
1715
1716 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1717
1718         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1719         16 bit instructions.
1720
1721 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1722
1723         Add support for mips16 (16 bit MIPS implementation):
1724         * gencode.c (inst_type): Add mips16 instruction encoding types.
1725         (GETDATASIZEINSN): Define.
1726         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1727         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1728         mtlo.
1729         (MIPS16_DECODE): New table, for mips16 instructions.
1730         (bitmap_val): New static function.
1731         (struct mips16_op): Define.
1732         (mips16_op_table): New table, for mips16 operands.
1733         (build_mips16_operands): New static function.
1734         (process_instructions): If PC is odd, decode a mips16
1735         instruction.  Break out instruction handling into new
1736         build_instruction function.
1737         (build_instruction): New static function, broken out of
1738         process_instructions.  Check modifiers rather than flags for SHIFT
1739         bit count and m[ft]{hi,lo} direction.
1740         (usage): Pass program name to fprintf.
1741         (main): Remove unused variable this_option_optind.  Change
1742         ``*loptarg++'' to ``loptarg++''.
1743         (my_strtoul): Parenthesize && within ||.
1744         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1745         (simulate): If PC is odd, fetch a 16 bit instruction, and
1746         increment PC by 2 rather than 4.
1747         * configure.in: Add case for mips16*-*-*.
1748         * configure: Rebuild.
1749
1750 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1751
1752         * interp.c: Allow -t to enable tracing in standalone simulator.
1753         Fix garbage output in trace file and error messages.
1754
1755 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1756
1757         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1758         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1759         * configure.in: Simplify using macros in ../common/aclocal.m4.
1760         * configure: Regenerated.
1761         * tconfig.in: New file.
1762
1763 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1764
1765         * interp.c: Fix bugs in 64-bit port.
1766         Use ansi function declarations for msvc compiler.
1767         Initialize and test file pointer in trace code.
1768         Prevent duplicate definition of LAST_EMED_REGNUM.
1769
1770 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1771
1772         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1773
1774 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1775
1776         * interp.c (SignalException): Check for explicit terminating
1777         breakpoint value.
1778         * gencode.c: Pass instruction value through SignalException()
1779         calls for Trap, Breakpoint and Syscall.
1780
1781 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1782
1783         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1784         only used on those hosts that provide it.
1785         * configure.in: Add sqrt() to list of functions to be checked for.
1786         * config.in: Re-generated.
1787         * configure: Re-generated.
1788
1789 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1790
1791         * gencode.c (process_instructions): Call build_endian_shift when
1792         expanding STORE RIGHT, to fix swr.
1793         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1794         clear the high bits.
1795         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1796         Fix float to int conversions to produce signed values.
1797
1798 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1799
1800         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1801         (process_instructions): Correct handling of nor instruction.
1802         Correct shift count for 32 bit shift instructions. Correct sign
1803         extension for arithmetic shifts to not shift the number of bits in
1804         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1805         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1806         Fix madd.
1807         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1808         It's OK to have a mult follow a mult.  What's not OK is to have a
1809         mult follow an mfhi.
1810         (Convert): Comment out incorrect rounding code.
1811
1812 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1813
1814         * interp.c (sim_monitor): Improved monitor printf
1815         simulation. Tidied up simulator warnings, and added "--log" option
1816         for directing warning message output.
1817         * gencode.c: Use sim_warning() rather than WARNING macro.
1818
1819 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1820
1821         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1822         getopt1.o, rather than on gencode.c.  Link objects together.
1823         Don't link against -liberty.
1824         (gencode.o, getopt.o, getopt1.o): New targets.
1825         * gencode.c: Include <ctype.h> and "ansidecl.h".
1826         (AND): Undefine after including "ansidecl.h".
1827         (ULONG_MAX): Define if not defined.
1828         (OP_*): Don't define macros; now defined in opcode/mips.h.
1829         (main): Call my_strtoul rather than strtoul.
1830         (my_strtoul): New static function.
1831
1832 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1833
1834         * gencode.c (process_instructions):  Generate word64 and uword64
1835         instead of `long long' and `unsigned long long' data types.
1836         * interp.c:  #include sysdep.h to get signals, and define default
1837         for SIGBUS.
1838         * (Convert):  Work around for Visual-C++ compiler bug with type
1839         conversion.
1840         * support.h:  Make things compile under Visual-C++ by using
1841         __int64 instead of `long long'.  Change many refs to long long
1842         into word64/uword64 typedefs.
1843
1844 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1845
1846         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1847         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1848         (docdir): Removed.
1849         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1850         (AC_PROG_INSTALL): Added.
1851         (AC_PROG_CC): Moved to before configure.host call.
1852         * configure: Rebuilt.
1853
1854 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1855
1856         * configure.in: Define @SIMCONF@ depending on mips target.
1857         * configure: Rebuild.
1858         * Makefile.in (run): Add @SIMCONF@ to control simulator
1859         construction.
1860         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1861         * interp.c: Remove some debugging, provide more detailed error
1862         messages, update memory accesses to use LOADDRMASK.
1863
1864 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1865
1866         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1867         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1868         stamp-h.
1869         * configure: Rebuild.
1870         * config.in: New file, generated by autoheader.
1871         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1872         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1873         HAVE_ANINT and HAVE_AINT, as appropriate.
1874         * Makefile.in (run): Use @LIBS@ rather than -lm.
1875         (interp.o): Depend upon config.h.
1876         (Makefile): Just rebuild Makefile.
1877         (clean): Remove stamp-h.
1878         (mostlyclean): Make the same as clean, not as distclean.
1879         (config.h, stamp-h): New targets.
1880
1881 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1882
1883         * interp.c (ColdReset): Fix boolean test. Make all simulator
1884         globals static.
1885
1886 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1887
1888         * interp.c (xfer_direct_word, xfer_direct_long,
1889         swap_direct_word, swap_direct_long, xfer_big_word,
1890         xfer_big_long, xfer_little_word, xfer_little_long,
1891         swap_word,swap_long): Added.
1892         * interp.c (ColdReset): Provide function indirection to
1893         host<->simulated_target transfer routines.
1894         * interp.c (sim_store_register, sim_fetch_register): Updated to
1895         make use of indirected transfer routines.
1896
1897 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1898
1899         * gencode.c (process_instructions): Ensure FP ABS instruction
1900         recognised.
1901         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1902         system call support.
1903
1904 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1905
1906         * interp.c (sim_do_command): Complain if callback structure not
1907         initialised.
1908
1909 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1910
1911         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1912         support for Sun hosts.
1913         * Makefile.in (gencode): Ensure the host compiler and libraries
1914         used for cross-hosted build.
1915
1916 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1917
1918         * interp.c, gencode.c: Some more (TODO) tidying.
1919
1920 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1921
1922         * gencode.c, interp.c: Replaced explicit long long references with
1923         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1924         * support.h (SET64LO, SET64HI): Macros added.
1925
1926 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1927
1928         * configure: Regenerate with autoconf 2.7.
1929
1930 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1931
1932         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1933         * support.h: Remove superfluous "1" from #if.
1934         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1935
1936 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1937
1938         * interp.c (StoreFPR): Control UndefinedResult() call on
1939         WARN_RESULT manifest.
1940
1941 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1942
1943         * gencode.c: Tidied instruction decoding, and added FP instruction
1944         support.
1945
1946         * interp.c: Added dineroIII, and BSD profiling support. Also
1947         run-time FP handling.
1948
1949 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1950
1951         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1952         gencode.c, interp.c, support.h: created.