1 2016-01-02 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
4 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
5 * configure: Regenerate.
6 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
8 2016-01-02 Mike Frysinger <vapier@gentoo.org>
10 * dv-tx3904cpu.c (CPU, SD): Delete.
12 2015-12-30 Mike Frysinger <vapier@gentoo.org>
14 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
15 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
16 (sim_store_register): Rename to ...
17 (mips_reg_store): ... this. Delete local cpu var.
18 Update sim_io_eprintf calls.
19 (sim_fetch_register): Rename to ...
20 (mips_reg_fetch): ... this. Delete local cpu var.
21 Update sim_io_eprintf calls.
23 2015-12-27 Mike Frysinger <vapier@gentoo.org>
25 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
27 2015-12-26 Mike Frysinger <vapier@gentoo.org>
29 * config.in, configure: Regenerate.
31 2015-12-26 Mike Frysinger <vapier@gentoo.org>
33 * interp.c (sim_write, sim_read): Delete.
34 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
35 (load_word): Likewise.
36 * micromips.igen (cache): Likewise.
37 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
38 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
39 do_store_left, do_store_right, do_load_double, do_store_double):
41 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
43 * sim-main.c (address_translation, prefetch): Delete.
44 (ifetch32, ifetch16): Delete call to AddressTranslation and set
46 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
47 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
48 (LoadMemory, StoreMemory): Delete CCA arg.
50 2015-12-24 Mike Frysinger <vapier@gentoo.org>
52 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
53 * configure: Regenerated.
55 2015-12-24 Mike Frysinger <vapier@gentoo.org>
57 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
60 2015-12-24 Mike Frysinger <vapier@gentoo.org>
62 * tconfig.h (SIM_HANDLES_LMA): Delete.
64 2015-12-24 Mike Frysinger <vapier@gentoo.org>
66 * sim-main.h (WITH_WATCHPOINTS): Delete.
68 2015-12-24 Mike Frysinger <vapier@gentoo.org>
70 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
72 2015-12-24 Mike Frysinger <vapier@gentoo.org>
74 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
76 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
78 * micromips.igen (process_isa_mode): Fix left shift of negative
81 2015-11-17 Mike Frysinger <vapier@gentoo.org>
83 * sim-main.h (WITH_MODULO_MEMORY): Delete.
85 2015-11-15 Mike Frysinger <vapier@gentoo.org>
87 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
89 2015-11-14 Mike Frysinger <vapier@gentoo.org>
91 * interp.c (sim_close): Rename to ...
92 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
94 * sim-main.h (mips_sim_close): Declare.
95 (SIM_CLOSE_HOOK): Define.
97 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
98 Ali Lown <ali.lown@imgtec.com>
100 * Makefile.in (tmp-micromips): New rule.
101 (tmp-mach-multi): Add support for micromips.
102 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
103 that works for both mips64 and micromips64.
104 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
106 Add build support for micromips.
107 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
108 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
109 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
110 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
111 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
112 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
113 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
114 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
115 Refactored instruction code to use these functions.
116 * dsp2.igen: Refactored instruction code to use the new functions.
117 * interp.c (decode_coproc): Refactored to work with any instruction
119 (isa_mode): New variable
120 (RSVD_INSTRUCTION): Changed to 0x00000039.
121 * m16.igen (BREAK16): Refactored instruction to use do_break16.
122 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
123 * micromips.dc: New file.
124 * micromips.igen: New file.
125 * micromips16.dc: New file.
126 * micromipsdsp.igen: New file.
127 * micromipsrun.c: New file.
128 * mips.igen (do_swc1): Changed to work with any instruction encoding.
129 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
130 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
131 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
132 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
133 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
134 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
135 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
136 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
137 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
138 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
139 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
140 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
141 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
142 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
143 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
144 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
145 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
146 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
148 Refactored instruction code to use these functions.
149 (RSVD): Changed to use new reserved instruction.
150 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
151 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
152 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
153 do_store_double): Added micromips32 and micromips64 models.
154 Added include for micromips.igen and micromipsdsp.igen
155 Add micromips32 and micromips64 models.
156 (DecodeCoproc): Updated to use new macro definition.
157 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
158 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
159 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
160 Refactored instruction code to use these functions.
161 * sim-main.h (CP0_operation): New enum.
162 (DecodeCoproc): Updated macro.
163 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
164 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
165 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
166 ISA_MODE_MICROMIPS): New defines.
167 (sim_state): Add isa_mode field.
169 2015-06-23 Mike Frysinger <vapier@gentoo.org>
171 * configure: Regenerate.
173 2015-06-12 Mike Frysinger <vapier@gentoo.org>
175 * configure.ac: Change configure.in to configure.ac.
176 * configure: Regenerate.
178 2015-06-12 Mike Frysinger <vapier@gentoo.org>
180 * configure: Regenerate.
182 2015-06-12 Mike Frysinger <vapier@gentoo.org>
184 * interp.c [TRACE]: Delete.
185 (TRACE): Change to WITH_TRACE_ANY_P.
186 [!WITH_TRACE_ANY_P] (open_trace): Define.
187 (mips_option_handler, open_trace, sim_close, dotrace):
188 Change defined(TRACE) to WITH_TRACE_ANY_P.
189 (sim_open): Delete TRACE ifdef check.
190 * sim-main.c (load_memory): Delete TRACE ifdef check.
191 (store_memory): Likewise.
192 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
193 [!WITH_TRACE_ANY_P] (dotrace): Define.
195 2015-04-18 Mike Frysinger <vapier@gentoo.org>
197 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
200 2015-04-18 Mike Frysinger <vapier@gentoo.org>
202 * sim-main.h (SIM_CPU): Delete.
204 2015-04-18 Mike Frysinger <vapier@gentoo.org>
206 * sim-main.h (sim_cia): Delete.
208 2015-04-17 Mike Frysinger <vapier@gentoo.org>
210 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
212 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
213 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
214 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
215 CIA_SET to CPU_PC_SET.
216 * sim-main.h (CIA_GET, CIA_SET): Delete.
218 2015-04-15 Mike Frysinger <vapier@gentoo.org>
220 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
221 * sim-main.h (STATE_CPU): Delete.
223 2015-04-13 Mike Frysinger <vapier@gentoo.org>
225 * configure: Regenerate.
227 2015-04-13 Mike Frysinger <vapier@gentoo.org>
229 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
230 * interp.c (mips_pc_get, mips_pc_set): New functions.
231 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
232 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
233 (sim_pc_get): Delete.
234 * sim-main.h (SIM_CPU): Define.
235 (struct sim_state): Change cpu to an array of pointers.
238 2015-04-13 Mike Frysinger <vapier@gentoo.org>
240 * interp.c (mips_option_handler, open_trace, sim_close,
241 sim_write, sim_read, sim_store_register, sim_fetch_register,
242 sim_create_inferior, pr_addr, pr_uword64): Convert old style
244 (sim_open): Convert old style prototype. Change casts with
245 sim_write to unsigned char *.
246 (fetch_str): Change null to unsigned char, and change cast to
248 (sim_monitor): Change c & ch to unsigned char. Change cast to
251 2015-04-12 Mike Frysinger <vapier@gentoo.org>
253 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
255 2015-04-06 Mike Frysinger <vapier@gentoo.org>
257 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
259 2015-04-01 Mike Frysinger <vapier@gentoo.org>
261 * tconfig.h (SIM_HAVE_PROFILE): Delete.
263 2015-03-31 Mike Frysinger <vapier@gentoo.org>
265 * config.in, configure: Regenerate.
267 2015-03-24 Mike Frysinger <vapier@gentoo.org>
269 * interp.c (sim_pc_get): New function.
271 2015-03-24 Mike Frysinger <vapier@gentoo.org>
273 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
274 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
276 2015-03-24 Mike Frysinger <vapier@gentoo.org>
278 * configure: Regenerate.
280 2015-03-23 Mike Frysinger <vapier@gentoo.org>
282 * configure: Regenerate.
284 2015-03-23 Mike Frysinger <vapier@gentoo.org>
286 * configure: Regenerate.
287 * configure.ac (mips_extra_objs): Delete.
288 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
289 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
291 2015-03-23 Mike Frysinger <vapier@gentoo.org>
293 * configure: Regenerate.
294 * configure.ac: Delete sim_hw checks for dv-sockser.
296 2015-03-16 Mike Frysinger <vapier@gentoo.org>
298 * config.in, configure: Regenerate.
299 * tconfig.in: Rename file ...
300 * tconfig.h: ... here.
302 2015-03-15 Mike Frysinger <vapier@gentoo.org>
304 * tconfig.in: Delete includes.
305 [HAVE_DV_SOCKSER]: Delete.
307 2015-03-14 Mike Frysinger <vapier@gentoo.org>
309 * Makefile.in (SIM_RUN_OBJS): Delete.
311 2015-03-14 Mike Frysinger <vapier@gentoo.org>
313 * configure.ac (AC_CHECK_HEADERS): Delete.
314 * aclocal.m4, configure: Regenerate.
316 2014-08-19 Alan Modra <amodra@gmail.com>
318 * configure: Regenerate.
320 2014-08-15 Roland McGrath <mcgrathr@google.com>
322 * configure: Regenerate.
323 * config.in: Regenerate.
325 2014-03-04 Mike Frysinger <vapier@gentoo.org>
327 * configure: Regenerate.
329 2013-09-23 Alan Modra <amodra@gmail.com>
331 * configure: Regenerate.
333 2013-06-03 Mike Frysinger <vapier@gentoo.org>
335 * aclocal.m4, configure: Regenerate.
337 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
339 * configure: Rebuild.
341 2013-03-26 Mike Frysinger <vapier@gentoo.org>
343 * configure: Regenerate.
345 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
347 * configure.ac: Address use of dv-sockser.o.
348 * tconfig.in: Conditionalize use of dv_sockser_install.
349 * configure: Regenerated.
350 * config.in: Regenerated.
352 2012-10-04 Chao-ying Fu <fu@mips.com>
353 Steve Ellcey <sellcey@mips.com>
355 * mips/mips3264r2.igen (rdhwr): New.
357 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
359 * configure.ac: Always link against dv-sockser.o.
360 * configure: Regenerate.
362 2012-06-15 Joel Brobecker <brobecker@adacore.com>
364 * config.in, configure: Regenerate.
366 2012-05-18 Nick Clifton <nickc@redhat.com>
369 * interp.c: Include config.h before system header files.
371 2012-03-24 Mike Frysinger <vapier@gentoo.org>
373 * aclocal.m4, config.in, configure: Regenerate.
375 2011-12-03 Mike Frysinger <vapier@gentoo.org>
377 * aclocal.m4: New file.
378 * configure: Regenerate.
380 2011-10-19 Mike Frysinger <vapier@gentoo.org>
382 * configure: Regenerate after common/acinclude.m4 update.
384 2011-10-17 Mike Frysinger <vapier@gentoo.org>
386 * configure.ac: Change include to common/acinclude.m4.
388 2011-10-17 Mike Frysinger <vapier@gentoo.org>
390 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
391 call. Replace common.m4 include with SIM_AC_COMMON.
392 * configure: Regenerate.
394 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
396 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
398 (tmp-mach-multi): Exit early when igen fails.
400 2011-07-05 Mike Frysinger <vapier@gentoo.org>
402 * interp.c (sim_do_command): Delete.
404 2011-02-14 Mike Frysinger <vapier@gentoo.org>
406 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
407 (tx3904sio_fifo_reset): Likewise.
408 * interp.c (sim_monitor): Likewise.
410 2010-04-14 Mike Frysinger <vapier@gentoo.org>
412 * interp.c (sim_write): Add const to buffer arg.
414 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
416 * interp.c: Don't include sysdep.h
418 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
420 * configure: Regenerate.
422 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
424 * config.in: Regenerate.
425 * configure: Likewise.
427 * configure: Regenerate.
429 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
431 * configure: Regenerate to track ../common/common.m4 changes.
434 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
435 Daniel Jacobowitz <dan@codesourcery.com>
436 Joseph Myers <joseph@codesourcery.com>
438 * configure: Regenerate.
440 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
442 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
443 that unconditionally allows fmt_ps.
444 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
445 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
446 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
447 filter from 64,f to 32,f.
448 (PREFX): Change filter from 64 to 32.
449 (LDXC1, LUXC1): Provide separate mips32r2 implementations
450 that use do_load_double instead of do_load. Make both LUXC1
451 versions unpredictable if SizeFGR () != 64.
452 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
453 instead of do_store. Remove unused variable. Make both SUXC1
454 versions unpredictable if SizeFGR () != 64.
456 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
458 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
459 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
460 shifts for that case.
462 2007-09-04 Nick Clifton <nickc@redhat.com>
464 * interp.c (options enum): Add OPTION_INFO_MEMORY.
465 (display_mem_info): New static variable.
466 (mips_option_handler): Handle OPTION_INFO_MEMORY.
467 (mips_options): Add info-memory and memory-info.
468 (sim_open): After processing the command line and board
469 specification, check display_mem_info. If it is set then
470 call the real handler for the --memory-info command line
473 2007-08-24 Joel Brobecker <brobecker@adacore.com>
475 * configure.ac: Change license of multi-run.c to GPL version 3.
476 * configure: Regenerate.
478 2007-06-28 Richard Sandiford <richard@codesourcery.com>
480 * configure.ac, configure: Revert last patch.
482 2007-06-26 Richard Sandiford <richard@codesourcery.com>
484 * configure.ac (sim_mipsisa3264_configs): New variable.
485 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
486 every configuration support all four targets, using the triplet to
487 determine the default.
488 * configure: Regenerate.
490 2007-06-25 Richard Sandiford <richard@codesourcery.com>
492 * Makefile.in (m16run.o): New rule.
494 2007-05-15 Thiemo Seufer <ths@mips.com>
496 * mips3264r2.igen (DSHD): Fix compile warning.
498 2007-05-14 Thiemo Seufer <ths@mips.com>
500 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
501 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
502 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
503 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
506 2007-03-01 Thiemo Seufer <ths@mips.com>
508 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
511 2007-02-20 Thiemo Seufer <ths@mips.com>
513 * dsp.igen: Update copyright notice.
514 * dsp2.igen: Fix copyright notice.
516 2007-02-20 Thiemo Seufer <ths@mips.com>
517 Chao-Ying Fu <fu@mips.com>
519 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
520 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
521 Add dsp2 to sim_igen_machine.
522 * configure: Regenerate.
523 * dsp.igen (do_ph_op): Add MUL support when op = 2.
524 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
525 (mulq_rs.ph): Use do_ph_mulq.
526 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
527 * mips.igen: Add dsp2 model and include dsp2.igen.
528 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
529 for *mips32r2, *mips64r2, *dsp.
530 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
531 for *mips32r2, *mips64r2, *dsp2.
532 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
534 2007-02-19 Thiemo Seufer <ths@mips.com>
535 Nigel Stephens <nigel@mips.com>
537 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
538 jumps with hazard barrier.
540 2007-02-19 Thiemo Seufer <ths@mips.com>
541 Nigel Stephens <nigel@mips.com>
543 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
544 after each call to sim_io_write.
546 2007-02-19 Thiemo Seufer <ths@mips.com>
547 Nigel Stephens <nigel@mips.com>
549 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
550 supported by this simulator.
551 (decode_coproc): Recognise additional CP0 Config registers
554 2007-02-19 Thiemo Seufer <ths@mips.com>
555 Nigel Stephens <nigel@mips.com>
556 David Ung <davidu@mips.com>
558 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
559 uninterpreted formats. If fmt is one of the uninterpreted types
560 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
561 fmt_word, and fmt_uninterpreted_64 like fmt_long.
562 (store_fpr): When writing an invalid odd register, set the
563 matching even register to fmt_unknown, not the following register.
564 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
565 the the memory window at offset 0 set by --memory-size command
567 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
569 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
571 (sim_monitor): When returning the memory size to the MIPS
572 application, use the value in STATE_MEM_SIZE, not an arbitrary
574 (cop_lw): Don' mess around with FPR_STATE, just pass
575 fmt_uninterpreted_32 to StoreFPR.
577 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
579 * mips.igen (not_word_value): Single version for mips32, mips64
582 2007-02-19 Thiemo Seufer <ths@mips.com>
583 Nigel Stephens <nigel@mips.com>
585 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
588 2007-02-17 Thiemo Seufer <ths@mips.com>
590 * configure.ac (mips*-sde-elf*): Move in front of generic machine
592 * configure: Regenerate.
594 2007-02-17 Thiemo Seufer <ths@mips.com>
596 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
597 Add mdmx to sim_igen_machine.
598 (mipsisa64*-*-*): Likewise. Remove dsp.
599 (mipsisa32*-*-*): Remove dsp.
600 * configure: Regenerate.
602 2007-02-13 Thiemo Seufer <ths@mips.com>
604 * configure.ac: Add mips*-sde-elf* target.
605 * configure: Regenerate.
607 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
609 * acconfig.h: Remove.
610 * config.in, configure: Regenerate.
612 2006-11-07 Thiemo Seufer <ths@mips.com>
614 * dsp.igen (do_w_op): Fix compiler warning.
616 2006-08-29 Thiemo Seufer <ths@mips.com>
617 David Ung <davidu@mips.com>
619 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
621 * configure: Regenerate.
622 * mips.igen (model): Add smartmips.
623 (MADDU): Increment ACX if carry.
624 (do_mult): Clear ACX.
625 (ROR,RORV): Add smartmips.
626 (include): Include smartmips.igen.
627 * sim-main.h (ACX): Set to REGISTERS[89].
628 * smartmips.igen: New file.
630 2006-08-29 Thiemo Seufer <ths@mips.com>
631 David Ung <davidu@mips.com>
633 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
634 mips3264r2.igen. Add missing dependency rules.
635 * m16e.igen: Support for mips16e save/restore instructions.
637 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
639 * configure: Regenerated.
641 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
643 * configure: Regenerated.
645 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
647 * configure: Regenerated.
649 2006-05-15 Chao-ying Fu <fu@mips.com>
651 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
653 2006-04-18 Nick Clifton <nickc@redhat.com>
655 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
658 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
660 * configure: Regenerate.
662 2005-12-14 Chao-ying Fu <fu@mips.com>
664 * Makefile.in (SIM_OBJS): Add dsp.o.
665 (dsp.o): New dependency.
666 (IGEN_INCLUDE): Add dsp.igen.
667 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
668 mipsisa64*-*-*): Add dsp to sim_igen_machine.
669 * configure: Regenerate.
670 * mips.igen: Add dsp model and include dsp.igen.
671 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
672 because these instructions are extended in DSP ASE.
673 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
674 adding 6 DSP accumulator registers and 1 DSP control register.
675 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
676 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
677 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
678 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
679 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
680 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
681 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
682 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
683 DSPCR_CCOND_SMASK): New define.
684 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
685 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
687 2005-07-08 Ian Lance Taylor <ian@airs.com>
689 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
691 2005-06-16 David Ung <davidu@mips.com>
692 Nigel Stephens <nigel@mips.com>
694 * mips.igen: New mips16e model and include m16e.igen.
695 (check_u64): Add mips16e tag.
696 * m16e.igen: New file for MIPS16e instructions.
697 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
698 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
700 * configure: Regenerate.
702 2005-05-26 David Ung <davidu@mips.com>
704 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
705 tags to all instructions which are applicable to the new ISAs.
706 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
708 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
710 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
712 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
713 * configure: Regenerate.
715 2005-03-23 Mark Kettenis <kettenis@gnu.org>
717 * configure: Regenerate.
719 2005-01-14 Andrew Cagney <cagney@gnu.org>
721 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
722 explicit call to AC_CONFIG_HEADER.
723 * configure: Regenerate.
725 2005-01-12 Andrew Cagney <cagney@gnu.org>
727 * configure.ac: Update to use ../common/common.m4.
728 * configure: Re-generate.
730 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
732 * configure: Regenerated to track ../common/aclocal.m4 changes.
734 2005-01-07 Andrew Cagney <cagney@gnu.org>
736 * configure.ac: Rename configure.in, require autoconf 2.59.
737 * configure: Re-generate.
739 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
741 * configure: Regenerate for ../common/aclocal.m4 update.
743 2004-09-24 Monika Chaddha <monika@acmet.com>
745 Committed by Andrew Cagney.
746 * m16.igen (CMP, CMPI): Fix assembler.
748 2004-08-18 Chris Demetriou <cgd@broadcom.com>
750 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
751 * configure: Regenerate.
753 2004-06-25 Chris Demetriou <cgd@broadcom.com>
755 * configure.in (sim_m16_machine): Include mipsIII.
756 * configure: Regenerate.
758 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
760 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
762 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
764 2004-04-10 Chris Demetriou <cgd@broadcom.com>
766 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
768 2004-04-09 Chris Demetriou <cgd@broadcom.com>
770 * mips.igen (check_fmt): Remove.
771 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
772 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
773 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
774 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
775 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
776 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
777 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
778 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
779 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
780 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
782 2004-04-09 Chris Demetriou <cgd@broadcom.com>
784 * sb1.igen (check_sbx): New function.
785 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
787 2004-03-29 Chris Demetriou <cgd@broadcom.com>
788 Richard Sandiford <rsandifo@redhat.com>
790 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
791 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
792 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
793 separate implementations for mipsIV and mipsV. Use new macros to
794 determine whether the restrictions apply.
796 2004-01-19 Chris Demetriou <cgd@broadcom.com>
798 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
799 (check_mult_hilo): Improve comments.
800 (check_div_hilo): Likewise. Also, fork off a new version
801 to handle mips32/mips64 (since there are no hazards to check
804 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
806 * mips.igen (do_dmultx): Fix check for negative operands.
808 2003-05-16 Ian Lance Taylor <ian@airs.com>
810 * Makefile.in (SHELL): Make sure this is defined.
811 (various): Use $(SHELL) whenever we invoke move-if-change.
813 2003-05-03 Chris Demetriou <cgd@broadcom.com>
815 * cp1.c: Tweak attribution slightly.
818 * mdmx.igen: Likewise.
819 * mips3d.igen: Likewise.
820 * sb1.igen: Likewise.
822 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
824 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
827 2003-02-27 Andrew Cagney <cagney@redhat.com>
829 * interp.c (sim_open): Rename _bfd to bfd.
830 (sim_create_inferior): Ditto.
832 2003-01-14 Chris Demetriou <cgd@broadcom.com>
834 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
836 2003-01-14 Chris Demetriou <cgd@broadcom.com>
838 * mips.igen (EI, DI): Remove.
840 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
842 * Makefile.in (tmp-run-multi): Fix mips16 filter.
844 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
845 Andrew Cagney <ac131313@redhat.com>
846 Gavin Romig-Koch <gavin@redhat.com>
847 Graydon Hoare <graydon@redhat.com>
848 Aldy Hernandez <aldyh@redhat.com>
849 Dave Brolley <brolley@redhat.com>
850 Chris Demetriou <cgd@broadcom.com>
852 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
853 (sim_mach_default): New variable.
854 (mips64vr-*-*, mips64vrel-*-*): New configurations.
855 Add a new simulator generator, MULTI.
856 * configure: Regenerate.
857 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
858 (multi-run.o): New dependency.
859 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
860 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
861 (tmp-multi): Combine them.
862 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
863 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
864 (distclean-extra): New rule.
865 * sim-main.h: Include bfd.h.
866 (MIPS_MACH): New macro.
867 * mips.igen (vr4120, vr5400, vr5500): New models.
868 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
869 * vr.igen: Replace with new version.
871 2003-01-04 Chris Demetriou <cgd@broadcom.com>
873 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
874 * configure: Regenerate.
876 2002-12-31 Chris Demetriou <cgd@broadcom.com>
878 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
879 * mips.igen: Remove all invocations of check_branch_bug and
882 2002-12-16 Chris Demetriou <cgd@broadcom.com>
884 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
886 2002-07-30 Chris Demetriou <cgd@broadcom.com>
888 * mips.igen (do_load_double, do_store_double): New functions.
889 (LDC1, SDC1): Rename to...
890 (LDC1b, SDC1b): respectively.
891 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
893 2002-07-29 Michael Snyder <msnyder@redhat.com>
895 * cp1.c (fp_recip2): Modify initialization expression so that
896 GCC will recognize it as constant.
898 2002-06-18 Chris Demetriou <cgd@broadcom.com>
900 * mdmx.c (SD_): Delete.
901 (Unpredictable): Re-define, for now, to directly invoke
902 unpredictable_action().
903 (mdmx_acc_op): Fix error in .ob immediate handling.
905 2002-06-18 Andrew Cagney <cagney@redhat.com>
907 * interp.c (sim_firmware_command): Initialize `address'.
909 2002-06-16 Andrew Cagney <ac131313@redhat.com>
911 * configure: Regenerated to track ../common/aclocal.m4 changes.
913 2002-06-14 Chris Demetriou <cgd@broadcom.com>
914 Ed Satterthwaite <ehs@broadcom.com>
916 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
917 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
918 * mips.igen: Include mips3d.igen.
919 (mips3d): New model name for MIPS-3D ASE instructions.
920 (CVT.W.fmt): Don't use this instruction for word (source) format
922 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
923 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
924 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
925 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
926 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
927 (RSquareRoot1, RSquareRoot2): New macros.
928 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
929 (fp_rsqrt2): New functions.
930 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
931 * configure: Regenerate.
933 2002-06-13 Chris Demetriou <cgd@broadcom.com>
934 Ed Satterthwaite <ehs@broadcom.com>
936 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
937 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
938 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
939 (convert): Note that this function is not used for paired-single
941 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
942 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
943 (check_fmt_p): Enable paired-single support.
944 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
945 (PUU.PS): New instructions.
946 (CVT.S.fmt): Don't use this instruction for paired-single format
948 * sim-main.h (FP_formats): New value 'fmt_ps.'
949 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
950 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
952 2002-06-12 Chris Demetriou <cgd@broadcom.com>
954 * mips.igen: Fix formatting of function calls in
957 2002-06-12 Chris Demetriou <cgd@broadcom.com>
959 * mips.igen (MOVN, MOVZ): Trace result.
960 (TNEI): Print "tnei" as the opcode name in traces.
961 (CEIL.W): Add disassembly string for traces.
962 (RSQRT.fmt): Make location of disassembly string consistent
963 with other instructions.
965 2002-06-12 Chris Demetriou <cgd@broadcom.com>
967 * mips.igen (X): Delete unused function.
969 2002-06-08 Andrew Cagney <cagney@redhat.com>
971 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
973 2002-06-07 Chris Demetriou <cgd@broadcom.com>
974 Ed Satterthwaite <ehs@broadcom.com>
976 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
977 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
978 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
979 (fp_nmsub): New prototypes.
980 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
981 (NegMultiplySub): New defines.
982 * mips.igen (RSQRT.fmt): Use RSquareRoot().
983 (MADD.D, MADD.S): Replace with...
984 (MADD.fmt): New instruction.
985 (MSUB.D, MSUB.S): Replace with...
986 (MSUB.fmt): New instruction.
987 (NMADD.D, NMADD.S): Replace with...
988 (NMADD.fmt): New instruction.
989 (NMSUB.D, MSUB.S): Replace with...
990 (NMSUB.fmt): New instruction.
992 2002-06-07 Chris Demetriou <cgd@broadcom.com>
993 Ed Satterthwaite <ehs@broadcom.com>
995 * cp1.c: Fix more comment spelling and formatting.
996 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
997 (denorm_mode): New function.
998 (fpu_unary, fpu_binary): Round results after operation, collect
999 status from rounding operations, and update the FCSR.
1000 (convert): Collect status from integer conversions and rounding
1001 operations, and update the FCSR. Adjust NaN values that result
1002 from conversions. Convert to use sim_io_eprintf rather than
1003 fprintf, and remove some debugging code.
1004 * cp1.h (fenr_FS): New define.
1006 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1008 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1009 rounding mode to sim FP rounding mode flag conversion code into...
1010 (rounding_mode): New function.
1012 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1014 * cp1.c: Clean up formatting of a few comments.
1015 (value_fpr): Reformat switch statement.
1017 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1018 Ed Satterthwaite <ehs@broadcom.com>
1021 * sim-main.h: Include cp1.h.
1022 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1023 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1024 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1025 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1026 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1027 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1028 * cp1.c: Don't include sim-fpu.h; already included by
1029 sim-main.h. Clean up formatting of some comments.
1030 (NaN, Equal, Less): Remove.
1031 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1032 (fp_cmp): New functions.
1033 * mips.igen (do_c_cond_fmt): Remove.
1034 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1035 Compare. Add result tracing.
1036 (CxC1): Remove, replace with...
1037 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1038 (DMxC1): Remove, replace with...
1039 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1040 (MxC1): Remove, replace with...
1041 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1043 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1045 * sim-main.h (FGRIDX): Remove, replace all uses with...
1046 (FGR_BASE): New macro.
1047 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1048 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1049 (NR_FGR, FGR): Likewise.
1050 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1051 * mips.igen: Likewise.
1053 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1055 * cp1.c: Add an FSF Copyright notice to this file.
1057 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1058 Ed Satterthwaite <ehs@broadcom.com>
1060 * cp1.c (Infinity): Remove.
1061 * sim-main.h (Infinity): Likewise.
1063 * cp1.c (fp_unary, fp_binary): New functions.
1064 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1065 (fp_sqrt): New functions, implemented in terms of the above.
1066 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1067 (Recip, SquareRoot): Remove (replaced by functions above).
1068 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1069 (fp_recip, fp_sqrt): New prototypes.
1070 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1071 (Recip, SquareRoot): Replace prototypes with #defines which
1072 invoke the functions above.
1074 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1076 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1077 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1078 file, remove PARAMS from prototypes.
1079 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1080 simulator state arguments.
1081 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1082 pass simulator state arguments.
1083 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1084 (store_fpr, convert): Remove 'sd' argument.
1085 (value_fpr): Likewise. Convert to use 'SD' instead.
1087 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1089 * cp1.c (Min, Max): Remove #if 0'd functions.
1090 * sim-main.h (Min, Max): Remove.
1092 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1094 * cp1.c: fix formatting of switch case and default labels.
1095 * interp.c: Likewise.
1096 * sim-main.c: Likewise.
1098 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1100 * cp1.c: Clean up comments which describe FP formats.
1101 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1103 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1104 Ed Satterthwaite <ehs@broadcom.com>
1106 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1107 Broadcom SiByte SB-1 processor configurations.
1108 * configure: Regenerate.
1109 * sb1.igen: New file.
1110 * mips.igen: Include sb1.igen.
1112 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1113 * mdmx.igen: Add "sb1" model to all appropriate functions and
1115 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1116 (ob_func, ob_acc): Reference the above.
1117 (qh_acc): Adjust to keep the same size as ob_acc.
1118 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1119 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1121 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1123 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1125 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1126 Ed Satterthwaite <ehs@broadcom.com>
1128 * mips.igen (mdmx): New (pseudo-)model.
1129 * mdmx.c, mdmx.igen: New files.
1130 * Makefile.in (SIM_OBJS): Add mdmx.o.
1131 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1133 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1134 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1135 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1136 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1137 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1138 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1139 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1140 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1141 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1142 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1143 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1144 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1145 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1146 (qh_fmtsel): New macros.
1147 (_sim_cpu): New member "acc".
1148 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1149 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1151 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1153 * interp.c: Use 'deprecated' rather than 'depreciated.'
1154 * sim-main.h: Likewise.
1156 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1158 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1159 which wouldn't compile anyway.
1160 * sim-main.h (unpredictable_action): New function prototype.
1161 (Unpredictable): Define to call igen function unpredictable().
1162 (NotWordValue): New macro to call igen function not_word_value().
1163 (UndefinedResult): Remove.
1164 * interp.c (undefined_result): Remove.
1165 (unpredictable_action): New function.
1166 * mips.igen (not_word_value, unpredictable): New functions.
1167 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1168 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1169 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1170 NotWordValue() to check for unpredictable inputs, then
1171 Unpredictable() to handle them.
1173 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1175 * mips.igen: Fix formatting of calls to Unpredictable().
1177 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1179 * interp.c (sim_open): Revert previous change.
1181 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1183 * interp.c (sim_open): Disable chunk of code that wrote code in
1184 vector table entries.
1186 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1188 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1189 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1192 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1194 * cp1.c: Fix many formatting issues.
1196 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1198 * cp1.c (fpu_format_name): New function to replace...
1199 (DOFMT): This. Delete, and update all callers.
1200 (fpu_rounding_mode_name): New function to replace...
1201 (RMMODE): This. Delete, and update all callers.
1203 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1205 * interp.c: Move FPU support routines from here to...
1206 * cp1.c: Here. New file.
1207 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1208 (cp1.o): New target.
1210 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1212 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1213 * mips.igen (mips32, mips64): New models, add to all instructions
1214 and functions as appropriate.
1215 (loadstore_ea, check_u64): New variant for model mips64.
1216 (check_fmt_p): New variant for models mipsV and mips64, remove
1217 mipsV model marking fro other variant.
1220 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1221 for mips32 and mips64.
1222 (DCLO, DCLZ): New instructions for mips64.
1224 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1226 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1227 immediate or code as a hex value with the "%#lx" format.
1228 (ANDI): Likewise, and fix printed instruction name.
1230 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1232 * sim-main.h (UndefinedResult, Unpredictable): New macros
1233 which currently do nothing.
1235 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1237 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1238 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1239 (status_CU3): New definitions.
1241 * sim-main.h (ExceptionCause): Add new values for MIPS32
1242 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1243 for DebugBreakPoint and NMIReset to note their status in
1245 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1246 (SignalExceptionCacheErr): New exception macros.
1248 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1250 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1251 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1253 (SignalExceptionCoProcessorUnusable): Take as argument the
1254 unusable coprocessor number.
1256 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1258 * mips.igen: Fix formatting of all SignalException calls.
1260 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1262 * sim-main.h (SIGNEXTEND): Remove.
1264 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1266 * mips.igen: Remove gencode comment from top of file, fix
1267 spelling in another comment.
1269 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1271 * mips.igen (check_fmt, check_fmt_p): New functions to check
1272 whether specific floating point formats are usable.
1273 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1274 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1275 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1276 Use the new functions.
1277 (do_c_cond_fmt): Remove format checks...
1278 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1280 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1282 * mips.igen: Fix formatting of check_fpu calls.
1284 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1286 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1288 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1290 * mips.igen: Remove whitespace at end of lines.
1292 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1294 * mips.igen (loadstore_ea): New function to do effective
1295 address calculations.
1296 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1297 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1298 CACHE): Use loadstore_ea to do effective address computations.
1300 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1302 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1303 * mips.igen (LL, CxC1, MxC1): Likewise.
1305 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1307 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1308 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1309 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1310 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1311 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1312 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1313 Don't split opcode fields by hand, use the opcode field values
1316 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1318 * mips.igen (do_divu): Fix spacing.
1320 * mips.igen (do_dsllv): Move to be right before DSLLV,
1321 to match the rest of the do_<shift> functions.
1323 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1326 DSRL32, do_dsrlv): Trace inputs and results.
1328 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen (CACHE): Provide instruction-printing string.
1332 * interp.c (signal_exception): Comment tokens after #endif.
1334 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1336 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1337 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1338 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1339 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1340 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1341 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1342 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1343 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1345 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1347 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1348 instruction-printing string.
1349 (LWU): Use '64' as the filter flag.
1351 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1353 * mips.igen (SDXC1): Fix instruction-printing string.
1355 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1357 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1358 filter flags "32,f".
1360 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1362 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1365 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1367 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1368 add a comma) so that it more closely match the MIPS ISA
1369 documentation opcode partitioning.
1370 (PREF): Put useful names on opcode fields, and include
1371 instruction-printing string.
1373 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen (check_u64): New function which in the future will
1376 check whether 64-bit instructions are usable and signal an
1377 exception if not. Currently a no-op.
1378 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1379 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1380 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1381 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1383 * mips.igen (check_fpu): New function which in the future will
1384 check whether FPU instructions are usable and signal an exception
1385 if not. Currently a no-op.
1386 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1387 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1388 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1389 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1390 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1391 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1392 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1393 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1395 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (do_load_left, do_load_right): Move to be immediately
1399 (do_store_left, do_store_right): Move to be immediately following
1402 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1404 * mips.igen (mipsV): New model name. Also, add it to
1405 all instructions and functions where it is appropriate.
1407 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1409 * mips.igen: For all functions and instructions, list model
1410 names that support that instruction one per line.
1412 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1414 * mips.igen: Add some additional comments about supported
1415 models, and about which instructions go where.
1416 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1417 order as is used in the rest of the file.
1419 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1421 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1422 indicating that ALU32_END or ALU64_END are there to check
1424 (DADD): Likewise, but also remove previous comment about
1427 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1429 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1430 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1431 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1432 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1433 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1434 fields (i.e., add and move commas) so that they more closely
1435 match the MIPS ISA documentation opcode partitioning.
1437 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1439 * mips.igen (ADDI): Print immediate value.
1440 (BREAK): Print code.
1441 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1442 (SLL): Print "nop" specially, and don't run the code
1443 that does the shift for the "nop" case.
1445 2001-11-17 Fred Fish <fnf@redhat.com>
1447 * sim-main.h (float_operation): Move enum declaration outside
1448 of _sim_cpu struct declaration.
1450 2001-04-12 Jim Blandy <jimb@redhat.com>
1452 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1453 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1455 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1456 PENDING_FILL, and you can get the intended effect gracefully by
1457 calling PENDING_SCHED directly.
1459 2001-02-23 Ben Elliston <bje@redhat.com>
1461 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1462 already defined elsewhere.
1464 2001-02-19 Ben Elliston <bje@redhat.com>
1466 * sim-main.h (sim_monitor): Return an int.
1467 * interp.c (sim_monitor): Add return values.
1468 (signal_exception): Handle error conditions from sim_monitor.
1470 2001-02-08 Ben Elliston <bje@redhat.com>
1472 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1473 (store_memory): Likewise, pass cia to sim_core_write*.
1475 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1477 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1478 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1480 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1482 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1483 * Makefile.in: Don't delete *.igen when cleaning directory.
1485 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1487 * m16.igen (break): Call SignalException not sim_engine_halt.
1489 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1491 From Jason Eckhardt:
1492 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1494 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1496 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1498 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1500 * mips.igen (do_dmultx): Fix typo.
1502 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1504 * configure: Regenerated to track ../common/aclocal.m4 changes.
1506 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1508 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1510 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1512 * sim-main.h (GPR_CLEAR): Define macro.
1514 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1516 * interp.c (decode_coproc): Output long using %lx and not %s.
1518 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1520 * interp.c (sim_open): Sort & extend dummy memory regions for
1521 --board=jmr3904 for eCos.
1523 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1525 * configure: Regenerated.
1527 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1529 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1530 calls, conditional on the simulator being in verbose mode.
1532 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1534 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1535 cache don't get ReservedInstruction traps.
1537 1999-11-29 Mark Salter <msalter@cygnus.com>
1539 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1540 to clear status bits in sdisr register. This is how the hardware works.
1542 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1543 being used by cygmon.
1545 1999-11-11 Andrew Haley <aph@cygnus.com>
1547 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1550 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1552 * mips.igen (MULT): Correct previous mis-applied patch.
1554 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1556 * mips.igen (delayslot32): Handle sequence like
1557 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1558 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1559 (MULT): Actually pass the third register...
1561 1999-09-03 Mark Salter <msalter@cygnus.com>
1563 * interp.c (sim_open): Added more memory aliases for additional
1564 hardware being touched by cygmon on jmr3904 board.
1566 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1568 * configure: Regenerated to track ../common/aclocal.m4 changes.
1570 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1572 * interp.c (sim_store_register): Handle case where client - GDB -
1573 specifies that a 4 byte register is 8 bytes in size.
1574 (sim_fetch_register): Ditto.
1576 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1578 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1579 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1580 (idt_monitor_base): Base address for IDT monitor traps.
1581 (pmon_monitor_base): Ditto for PMON.
1582 (lsipmon_monitor_base): Ditto for LSI PMON.
1583 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1584 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1585 (sim_firmware_command): New function.
1586 (mips_option_handler): Call it for OPTION_FIRMWARE.
1587 (sim_open): Allocate memory for idt_monitor region. If "--board"
1588 option was given, add no monitor by default. Add BREAK hooks only if
1589 monitors are also there.
1591 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1593 * interp.c (sim_monitor): Flush output before reading input.
1595 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1597 * tconfig.in (SIM_HANDLES_LMA): Always define.
1599 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1601 From Mark Salter <msalter@cygnus.com>:
1602 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1603 (sim_open): Add setup for BSP board.
1605 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1607 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1608 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1609 them as unimplemented.
1611 1999-05-08 Felix Lee <flee@cygnus.com>
1613 * configure: Regenerated to track ../common/aclocal.m4 changes.
1615 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1617 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1619 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1621 * configure.in: Any mips64vr5*-*-* target should have
1622 -DTARGET_ENABLE_FR=1.
1623 (default_endian): Any mips64vr*el-*-* target should default to
1625 * configure: Re-generate.
1627 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1629 * mips.igen (ldl): Extend from _16_, not 32.
1631 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1633 * interp.c (sim_store_register): Force registers written to by GDB
1634 into an un-interpreted state.
1636 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1638 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1639 CPU, start periodic background I/O polls.
1640 (tx3904sio_poll): New function: periodic I/O poller.
1642 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1644 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1646 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1648 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1651 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1653 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1654 (load_word): Call SIM_CORE_SIGNAL hook on error.
1655 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1656 starting. For exception dispatching, pass PC instead of NULL_CIA.
1657 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1658 * sim-main.h (COP0_BADVADDR): Define.
1659 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1660 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1661 (_sim_cpu): Add exc_* fields to store register value snapshots.
1662 * mips.igen (*): Replace memory-related SignalException* calls
1663 with references to SIM_CORE_SIGNAL hook.
1665 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1667 * sim-main.c (*): Minor warning cleanups.
1669 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1671 * m16.igen (DADDIU5): Correct type-o.
1673 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1675 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1678 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1680 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1682 (interp.o): Add dependency on itable.h
1683 (oengine.c, gencode): Delete remaining references.
1684 (BUILT_SRC_FROM_GEN): Clean up.
1686 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1689 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1690 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1691 tmp-run-hack) : New.
1692 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1693 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1694 Drop the "64" qualifier to get the HACK generator working.
1695 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1696 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1697 qualifier to get the hack generator working.
1698 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1699 (DSLL): Use do_dsll.
1700 (DSLLV): Use do_dsllv.
1701 (DSRA): Use do_dsra.
1702 (DSRL): Use do_dsrl.
1703 (DSRLV): Use do_dsrlv.
1704 (BC1): Move *vr4100 to get the HACK generator working.
1705 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1706 get the HACK generator working.
1707 (MACC) Rename to get the HACK generator working.
1708 (DMACC,MACCS,DMACCS): Add the 64.
1710 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1712 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1713 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1715 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1717 * mips/interp.c (DEBUG): Cleanups.
1719 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1721 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1722 (tx3904sio_tickle): fflush after a stdout character output.
1724 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1726 * interp.c (sim_close): Uninstall modules.
1728 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1730 * sim-main.h, interp.c (sim_monitor): Change to global
1733 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1735 * configure.in (vr4100): Only include vr4100 instructions in
1737 * configure: Re-generate.
1738 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1740 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1742 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1743 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1746 * configure.in (sim_default_gen, sim_use_gen): Replace with
1748 (--enable-sim-igen): Delete config option. Always using IGEN.
1749 * configure: Re-generate.
1751 * Makefile.in (gencode): Kill, kill, kill.
1754 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1756 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1757 bit mips16 igen simulator.
1758 * configure: Re-generate.
1760 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1761 as part of vr4100 ISA.
1762 * vr.igen: Mark all instructions as 64 bit only.
1764 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1766 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1769 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1771 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1772 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1773 * configure: Re-generate.
1775 * m16.igen (BREAK): Define breakpoint instruction.
1776 (JALX32): Mark instruction as mips16 and not r3900.
1777 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1779 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1781 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1783 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1784 insn as a debug breakpoint.
1786 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1788 (PENDING_SCHED): Clean up trace statement.
1789 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1790 (PENDING_FILL): Delay write by only one cycle.
1791 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1793 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1795 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1797 (pending_tick): Move incrementing of index to FOR statement.
1798 (pending_tick): Only update PENDING_OUT after a write has occured.
1800 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1802 * configure: Re-generate.
1804 * interp.c (sim_engine_run OLD): Delete explicit call to
1805 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1807 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1809 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1810 interrupt level number to match changed SignalExceptionInterrupt
1813 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1815 * interp.c: #include "itable.h" if WITH_IGEN.
1816 (get_insn_name): New function.
1817 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1818 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1820 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1822 * configure: Rebuilt to inhale new common/aclocal.m4.
1824 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1826 * dv-tx3904sio.c: Include sim-assert.h.
1828 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1830 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1831 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1832 Reorganize target-specific sim-hardware checks.
1833 * configure: rebuilt.
1834 * interp.c (sim_open): For tx39 target boards, set
1835 OPERATING_ENVIRONMENT, add tx3904sio devices.
1836 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1837 ROM executables. Install dv-sockser into sim-modules list.
1839 * dv-tx3904irc.c: Compiler warning clean-up.
1840 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1841 frequent hw-trace messages.
1843 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1845 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1847 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1849 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1851 * vr.igen: New file.
1852 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1853 * mips.igen: Define vr4100 model. Include vr.igen.
1854 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1856 * mips.igen (check_mf_hilo): Correct check.
1858 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1860 * sim-main.h (interrupt_event): Add prototype.
1862 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1863 register_ptr, register_value.
1864 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1866 * sim-main.h (tracefh): Make extern.
1868 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1870 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1871 Reduce unnecessarily high timer event frequency.
1872 * dv-tx3904cpu.c: Ditto for interrupt event.
1874 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1876 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1878 (interrupt_event): Made non-static.
1880 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1881 interchange of configuration values for external vs. internal
1884 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1886 * mips.igen (BREAK): Moved code to here for
1887 simulator-reserved break instructions.
1888 * gencode.c (build_instruction): Ditto.
1889 * interp.c (signal_exception): Code moved from here. Non-
1890 reserved instructions now use exception vector, rather
1892 * sim-main.h: Moved magic constants to here.
1894 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1896 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1897 register upon non-zero interrupt event level, clear upon zero
1899 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1900 by passing zero event value.
1901 (*_io_{read,write}_buffer): Endianness fixes.
1902 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1903 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1905 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1906 serial I/O and timer module at base address 0xFFFF0000.
1908 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1910 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1913 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1915 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1917 * configure: Update.
1919 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1921 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1922 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1923 * configure.in: Include tx3904tmr in hw_device list.
1924 * configure: Rebuilt.
1925 * interp.c (sim_open): Instantiate three timer instances.
1926 Fix address typo of tx3904irc instance.
1928 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1930 * interp.c (signal_exception): SystemCall exception now uses
1931 the exception vector.
1933 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1935 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1938 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1940 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1942 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1944 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1946 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1947 sim-main.h. Declare a struct hw_descriptor instead of struct
1948 hw_device_descriptor.
1950 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1952 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1953 right bits and then re-align left hand bytes to correct byte
1954 lanes. Fix incorrect computation in do_store_left when loading
1955 bytes from second word.
1957 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1959 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1960 * interp.c (sim_open): Only create a device tree when HW is
1963 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1964 * interp.c (signal_exception): Ditto.
1966 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1968 * gencode.c: Mark BEGEZALL as LIKELY.
1970 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1973 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1975 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1977 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1978 modules. Recognize TX39 target with "mips*tx39" pattern.
1979 * configure: Rebuilt.
1980 * sim-main.h (*): Added many macros defining bits in
1981 TX39 control registers.
1982 (SignalInterrupt): Send actual PC instead of NULL.
1983 (SignalNMIReset): New exception type.
1984 * interp.c (board): New variable for future use to identify
1985 a particular board being simulated.
1986 (mips_option_handler,mips_options): Added "--board" option.
1987 (interrupt_event): Send actual PC.
1988 (sim_open): Make memory layout conditional on board setting.
1989 (signal_exception): Initial implementation of hardware interrupt
1990 handling. Accept another break instruction variant for simulator
1992 (decode_coproc): Implement RFE instruction for TX39.
1993 (mips.igen): Decode RFE instruction as such.
1994 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1995 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1996 bbegin to implement memory map.
1997 * dv-tx3904cpu.c: New file.
1998 * dv-tx3904irc.c: New file.
2000 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2002 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2004 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2006 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2007 with calls to check_div_hilo.
2009 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2011 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2012 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2013 Add special r3900 version of do_mult_hilo.
2014 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2015 with calls to check_mult_hilo.
2016 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2017 with calls to check_div_hilo.
2019 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2021 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2022 Document a replacement.
2024 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2026 * interp.c (sim_monitor): Make mon_printf work.
2028 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2030 * sim-main.h (INSN_NAME): New arg `cpu'.
2032 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2034 * configure: Regenerated to track ../common/aclocal.m4 changes.
2036 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2038 * configure: Regenerated to track ../common/aclocal.m4 changes.
2041 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2043 * acconfig.h: New file.
2044 * configure.in: Reverted change of Apr 24; use sinclude again.
2046 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2048 * configure: Regenerated to track ../common/aclocal.m4 changes.
2051 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2053 * configure.in: Don't call sinclude.
2055 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2057 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2059 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2061 * mips.igen (ERET): Implement.
2063 * interp.c (decode_coproc): Return sign-extended EPC.
2065 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2067 * interp.c (signal_exception): Do not ignore Trap.
2068 (signal_exception): On TRAP, restart at exception address.
2069 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2070 (signal_exception): Update.
2071 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2072 so that TRAP instructions are caught.
2074 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2076 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2077 contains HI/LO access history.
2078 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2079 (HIACCESS, LOACCESS): Delete, replace with
2080 (HIHISTORY, LOHISTORY): New macros.
2081 (CHECKHILO): Delete all, moved to mips.igen
2083 * gencode.c (build_instruction): Do not generate checks for
2084 correct HI/LO register usage.
2086 * interp.c (old_engine_run): Delete checks for correct HI/LO
2089 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2090 check_mf_cycles): New functions.
2091 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2092 do_divu, domultx, do_mult, do_multu): Use.
2094 * tx.igen ("madd", "maddu"): Use.
2096 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2098 * mips.igen (DSRAV): Use function do_dsrav.
2099 (SRAV): Use new function do_srav.
2101 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2102 (B): Sign extend 11 bit immediate.
2103 (EXT-B*): Shift 16 bit immediate left by 1.
2104 (ADDIU*): Don't sign extend immediate value.
2106 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2108 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2110 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2113 * mips.igen (delayslot32, nullify_next_insn): New functions.
2114 (m16.igen): Always include.
2115 (do_*): Add more tracing.
2117 * m16.igen (delayslot16): Add NIA argument, could be called by a
2118 32 bit MIPS16 instruction.
2120 * interp.c (ifetch16): Move function from here.
2121 * sim-main.c (ifetch16): To here.
2123 * sim-main.c (ifetch16, ifetch32): Update to match current
2124 implementations of LH, LW.
2125 (signal_exception): Don't print out incorrect hex value of illegal
2128 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2130 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2133 * m16.igen: Implement MIPS16 instructions.
2135 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2136 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2137 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2138 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2139 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2140 bodies of corresponding code from 32 bit insn to these. Also used
2141 by MIPS16 versions of functions.
2143 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2144 (IMEM16): Drop NR argument from macro.
2146 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * Makefile.in (SIM_OBJS): Add sim-main.o.
2150 * sim-main.h (address_translation, load_memory, store_memory,
2151 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2153 (pr_addr, pr_uword64): Declare.
2154 (sim-main.c): Include when H_REVEALS_MODULE_P.
2156 * interp.c (address_translation, load_memory, store_memory,
2157 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2159 * sim-main.c: To here. Fix compilation problems.
2161 * configure.in: Enable inlining.
2162 * configure: Re-config.
2164 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2166 * configure: Regenerated to track ../common/aclocal.m4 changes.
2168 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * mips.igen: Include tx.igen.
2171 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2172 * tx.igen: New file, contains MADD and MADDU.
2174 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2175 the hardwired constant `7'.
2176 (store_memory): Ditto.
2177 (LOADDRMASK): Move definition to sim-main.h.
2179 mips.igen (MTC0): Enable for r3900.
2182 mips.igen (do_load_byte): Delete.
2183 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2184 do_store_right): New functions.
2185 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2187 configure.in: Let the tx39 use igen again.
2190 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2192 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2193 not an address sized quantity. Return zero for cache sizes.
2195 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2197 * mips.igen (r3900): r3900 does not support 64 bit integer
2200 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2202 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2204 * configure : Rebuild.
2206 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2208 * configure: Regenerated to track ../common/aclocal.m4 changes.
2210 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2212 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2214 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2216 * configure: Regenerated to track ../common/aclocal.m4 changes.
2217 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2219 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2221 * configure: Regenerated to track ../common/aclocal.m4 changes.
2223 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2225 * interp.c (Max, Min): Comment out functions. Not yet used.
2227 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2229 * configure: Regenerated to track ../common/aclocal.m4 changes.
2231 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2233 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2234 configurable settings for stand-alone simulator.
2236 * configure.in: Added X11 search, just in case.
2238 * configure: Regenerated.
2240 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2242 * interp.c (sim_write, sim_read, load_memory, store_memory):
2243 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2245 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * sim-main.h (GETFCC): Return an unsigned value.
2249 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2251 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2252 (DADD): Result destination is RD not RT.
2254 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2256 * sim-main.h (HIACCESS, LOACCESS): Always define.
2258 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2260 * interp.c (sim_info): Delete.
2262 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2264 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2265 (mips_option_handler): New argument `cpu'.
2266 (sim_open): Update call to sim_add_option_table.
2268 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2270 * mips.igen (CxC1): Add tracing.
2272 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2274 * sim-main.h (Max, Min): Declare.
2276 * interp.c (Max, Min): New functions.
2278 * mips.igen (BC1): Add tracing.
2280 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2282 * interp.c Added memory map for stack in vr4100
2284 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2286 * interp.c (load_memory): Add missing "break"'s.
2288 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2290 * interp.c (sim_store_register, sim_fetch_register): Pass in
2291 length parameter. Return -1.
2293 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2295 * interp.c: Added hardware init hook, fixed warnings.
2297 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2299 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2301 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2303 * interp.c (ifetch16): New function.
2305 * sim-main.h (IMEM32): Rename IMEM.
2306 (IMEM16_IMMED): Define.
2308 (DELAY_SLOT): Update.
2310 * m16run.c (sim_engine_run): New file.
2312 * m16.igen: All instructions except LB.
2313 (LB): Call do_load_byte.
2314 * mips.igen (do_load_byte): New function.
2315 (LB): Call do_load_byte.
2317 * mips.igen: Move spec for insn bit size and high bit from here.
2318 * Makefile.in (tmp-igen, tmp-m16): To here.
2320 * m16.dc: New file, decode mips16 instructions.
2322 * Makefile.in (SIM_NO_ALL): Define.
2323 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2325 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2327 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2328 point unit to 32 bit registers.
2329 * configure: Re-generate.
2331 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2333 * configure.in (sim_use_gen): Make IGEN the default simulator
2334 generator for generic 32 and 64 bit mips targets.
2335 * configure: Re-generate.
2337 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2339 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2342 * interp.c (sim_fetch_register, sim_store_register): Read/write
2343 FGR from correct location.
2344 (sim_open): Set size of FGR's according to
2345 WITH_TARGET_FLOATING_POINT_BITSIZE.
2347 * sim-main.h (FGR): Store floating point registers in a separate
2350 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2352 * configure: Regenerated to track ../common/aclocal.m4 changes.
2354 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2356 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2358 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2360 * interp.c (pending_tick): New function. Deliver pending writes.
2362 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2363 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2364 it can handle mixed sized quantites and single bits.
2366 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2368 * interp.c (oengine.h): Do not include when building with IGEN.
2369 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2370 (sim_info): Ditto for PROCESSOR_64BIT.
2371 (sim_monitor): Replace ut_reg with unsigned_word.
2372 (*): Ditto for t_reg.
2373 (LOADDRMASK): Define.
2374 (sim_open): Remove defunct check that host FP is IEEE compliant,
2375 using software to emulate floating point.
2376 (value_fpr, ...): Always compile, was conditional on HASFPU.
2378 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2380 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2383 * interp.c (SD, CPU): Define.
2384 (mips_option_handler): Set flags in each CPU.
2385 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2386 (sim_close): Do not clear STATE, deleted anyway.
2387 (sim_write, sim_read): Assume CPU zero's vm should be used for
2389 (sim_create_inferior): Set the PC for all processors.
2390 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2392 (mips16_entry): Pass correct nr of args to store_word, load_word.
2393 (ColdReset): Cold reset all cpu's.
2394 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2395 (sim_monitor, load_memory, store_memory, signal_exception): Use
2396 `CPU' instead of STATE_CPU.
2399 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2402 * sim-main.h (signal_exception): Add sim_cpu arg.
2403 (SignalException*): Pass both SD and CPU to signal_exception.
2404 * interp.c (signal_exception): Update.
2406 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2408 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2409 address_translation): Ditto
2410 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2412 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2414 * configure: Regenerated to track ../common/aclocal.m4 changes.
2416 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2418 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2420 * mips.igen (model): Map processor names onto BFD name.
2422 * sim-main.h (CPU_CIA): Delete.
2423 (SET_CIA, GET_CIA): Define
2425 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2427 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2430 * configure.in (default_endian): Configure a big-endian simulator
2432 * configure: Re-generate.
2434 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2436 * configure: Regenerated to track ../common/aclocal.m4 changes.
2438 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2440 * interp.c (sim_monitor): Handle Densan monitor outbyte
2441 and inbyte functions.
2443 1997-12-29 Felix Lee <flee@cygnus.com>
2445 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2447 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2449 * Makefile.in (tmp-igen): Arrange for $zero to always be
2450 reset to zero after every instruction.
2452 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2454 * configure: Regenerated to track ../common/aclocal.m4 changes.
2457 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2459 * mips.igen (MSUB): Fix to work like MADD.
2460 * gencode.c (MSUB): Similarly.
2462 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2464 * configure: Regenerated to track ../common/aclocal.m4 changes.
2466 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2468 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2470 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2472 * sim-main.h (sim-fpu.h): Include.
2474 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2475 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2476 using host independant sim_fpu module.
2478 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2480 * interp.c (signal_exception): Report internal errors with SIGABRT
2483 * sim-main.h (C0_CONFIG): New register.
2484 (signal.h): No longer include.
2486 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2488 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2490 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2492 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2494 * mips.igen: Tag vr5000 instructions.
2495 (ANDI): Was missing mipsIV model, fix assembler syntax.
2496 (do_c_cond_fmt): New function.
2497 (C.cond.fmt): Handle mips I-III which do not support CC field
2499 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2500 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2502 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2503 vr5000 which saves LO in a GPR separatly.
2505 * configure.in (enable-sim-igen): For vr5000, select vr5000
2506 specific instructions.
2507 * configure: Re-generate.
2509 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2511 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2513 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2514 fmt_uninterpreted_64 bit cases to switch. Convert to
2517 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2519 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2520 as specified in IV3.2 spec.
2521 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2523 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2526 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2527 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2528 PENDING_FILL versions of instructions. Simplify.
2530 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2532 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2534 (MTHI, MFHI): Disable code checking HI-LO.
2536 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2538 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2540 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2542 * gencode.c (build_mips16_operands): Replace IPC with cia.
2544 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2545 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2547 (UndefinedResult): Replace function with macro/function
2549 (sim_engine_run): Don't save PC in IPC.
2551 * sim-main.h (IPC): Delete.
2554 * interp.c (signal_exception, store_word, load_word,
2555 address_translation, load_memory, store_memory, cache_op,
2556 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2557 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2558 current instruction address - cia - argument.
2559 (sim_read, sim_write): Call address_translation directly.
2560 (sim_engine_run): Rename variable vaddr to cia.
2561 (signal_exception): Pass cia to sim_monitor
2563 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2564 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2565 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2567 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2568 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2571 * interp.c (signal_exception): Pass restart address to
2574 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2575 idecode.o): Add dependency.
2577 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2579 (DELAY_SLOT): Update NIA not PC with branch address.
2580 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2582 * mips.igen: Use CIA not PC in branch calculations.
2583 (illegal): Call SignalException.
2584 (BEQ, ADDIU): Fix assembler.
2586 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2588 * m16.igen (JALX): Was missing.
2590 * configure.in (enable-sim-igen): New configuration option.
2591 * configure: Re-generate.
2593 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2595 * interp.c (load_memory, store_memory): Delete parameter RAW.
2596 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2597 bypassing {load,store}_memory.
2599 * sim-main.h (ByteSwapMem): Delete definition.
2601 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2603 * interp.c (sim_do_command, sim_commands): Delete mips specific
2604 commands. Handled by module sim-options.
2606 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2607 (WITH_MODULO_MEMORY): Define.
2609 * interp.c (sim_info): Delete code printing memory size.
2611 * interp.c (mips_size): Nee sim_size, delete function.
2613 (monitor, monitor_base, monitor_size): Delete global variables.
2614 (sim_open, sim_close): Delete code creating monitor and other
2615 memory regions. Use sim-memopts module, via sim_do_commandf, to
2616 manage memory regions.
2617 (load_memory, store_memory): Use sim-core for memory model.
2619 * interp.c (address_translation): Delete all memory map code
2620 except line forcing 32 bit addresses.
2622 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2624 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2627 * interp.c (logfh, logfile): Delete globals.
2628 (sim_open, sim_close): Delete code opening & closing log file.
2629 (mips_option_handler): Delete -l and -n options.
2630 (OPTION mips_options): Ditto.
2632 * interp.c (OPTION mips_options): Rename option trace to dinero.
2633 (mips_option_handler): Update.
2635 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2637 * interp.c (fetch_str): New function.
2638 (sim_monitor): Rewrite using sim_read & sim_write.
2639 (sim_open): Check magic number.
2640 (sim_open): Write monitor vectors into memory using sim_write.
2641 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2642 (sim_read, sim_write): Simplify - transfer data one byte at a
2644 (load_memory, store_memory): Clarify meaning of parameter RAW.
2646 * sim-main.h (isHOST): Defete definition.
2647 (isTARGET): Mark as depreciated.
2648 (address_translation): Delete parameter HOST.
2650 * interp.c (address_translation): Delete parameter HOST.
2652 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2656 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2657 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2659 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2661 * mips.igen: Add model filter field to records.
2663 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2665 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2667 interp.c (sim_engine_run): Do not compile function sim_engine_run
2668 when WITH_IGEN == 1.
2670 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2671 target architecture.
2673 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2674 igen. Replace with configuration variables sim_igen_flags /
2677 * m16.igen: New file. Copy mips16 insns here.
2678 * mips.igen: From here.
2680 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2684 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2686 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2688 * gencode.c (build_instruction): Follow sim_write's lead in using
2689 BigEndianMem instead of !ByteSwapMem.
2691 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2693 * configure.in (sim_gen): Dependent on target, select type of
2694 generator. Always select old style generator.
2696 configure: Re-generate.
2698 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2700 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2701 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2702 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2703 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2704 SIM_@sim_gen@_*, set by autoconf.
2706 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2708 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2710 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2711 CURRENT_FLOATING_POINT instead.
2713 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2714 (address_translation): Raise exception InstructionFetch when
2715 translation fails and isINSTRUCTION.
2717 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2718 sim_engine_run): Change type of of vaddr and paddr to
2720 (address_translation, prefetch, load_memory, store_memory,
2721 cache_op): Change type of vAddr and pAddr to address_word.
2723 * gencode.c (build_instruction): Change type of vaddr and paddr to
2726 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2728 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2729 macro to obtain result of ALU op.
2731 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * interp.c (sim_info): Call profile_print.
2735 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2739 * sim-main.h (WITH_PROFILE): Do not define, defined in
2740 common/sim-config.h. Use sim-profile module.
2741 (simPROFILE): Delete defintion.
2743 * interp.c (PROFILE): Delete definition.
2744 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2745 (sim_close): Delete code writing profile histogram.
2746 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2748 (sim_engine_run): Delete code profiling the PC.
2750 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2752 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2754 * interp.c (sim_monitor): Make register pointers of type
2757 * sim-main.h: Make registers of type unsigned_word not
2760 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2762 * interp.c (sync_operation): Rename from SyncOperation, make
2763 global, add SD argument.
2764 (prefetch): Rename from Prefetch, make global, add SD argument.
2765 (decode_coproc): Make global.
2767 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2769 * gencode.c (build_instruction): Generate DecodeCoproc not
2770 decode_coproc calls.
2772 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2773 (SizeFGR): Move to sim-main.h
2774 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2775 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2776 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2778 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2779 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2780 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2781 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2782 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2783 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2785 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2787 (sim-alu.h): Include.
2788 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2789 (sim_cia): Typedef to instruction_address.
2791 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * Makefile.in (interp.o): Rename generated file engine.c to
2798 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2800 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2802 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2804 * gencode.c (build_instruction): For "FPSQRT", output correct
2805 number of arguments to Recip.
2807 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2809 * Makefile.in (interp.o): Depends on sim-main.h
2811 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2813 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2814 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2815 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2816 STATE, DSSTATE): Define
2817 (GPR, FGRIDX, ..): Define.
2819 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2820 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2821 (GPR, FGRIDX, ...): Delete macros.
2823 * interp.c: Update names to match defines from sim-main.h
2825 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2827 * interp.c (sim_monitor): Add SD argument.
2828 (sim_warning): Delete. Replace calls with calls to
2830 (sim_error): Delete. Replace calls with sim_io_error.
2831 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2832 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2833 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2835 (mips_size): Rename from sim_size. Add SD argument.
2837 * interp.c (simulator): Delete global variable.
2838 (callback): Delete global variable.
2839 (mips_option_handler, sim_open, sim_write, sim_read,
2840 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2841 sim_size,sim_monitor): Use sim_io_* not callback->*.
2842 (sim_open): ZALLOC simulator struct.
2843 (PROFILE): Do not define.
2845 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2847 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2848 support.h with corresponding code.
2850 * sim-main.h (word64, uword64), support.h: Move definition to
2852 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2855 * Makefile.in: Update dependencies
2856 * interp.c: Do not include.
2858 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2860 * interp.c (address_translation, load_memory, store_memory,
2861 cache_op): Rename to from AddressTranslation et.al., make global,
2864 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2867 * interp.c (SignalException): Rename to signal_exception, make
2870 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2872 * sim-main.h (SignalException, SignalExceptionInterrupt,
2873 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2874 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2875 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2878 * interp.c, support.h: Use.
2880 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2883 to value_fpr / store_fpr. Add SD argument.
2884 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2885 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2887 * sim-main.h (ValueFPR, StoreFPR): Define.
2889 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2891 * interp.c (sim_engine_run): Check consistency between configure
2892 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2895 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2896 (mips_fpu): Configure WITH_FLOATING_POINT.
2897 (mips_endian): Configure WITH_TARGET_ENDIAN.
2898 * configure: Update.
2900 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2902 * configure: Regenerated to track ../common/aclocal.m4 changes.
2904 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2906 * configure: Regenerated.
2908 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2910 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2912 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2914 * gencode.c (print_igen_insn_models): Assume certain architectures
2915 include all mips* instructions.
2916 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2919 * Makefile.in (tmp.igen): Add target. Generate igen input from
2922 * gencode.c (FEATURE_IGEN): Define.
2923 (main): Add --igen option. Generate output in igen format.
2924 (process_instructions): Format output according to igen option.
2925 (print_igen_insn_format): New function.
2926 (print_igen_insn_models): New function.
2927 (process_instructions): Only issue warnings and ignore
2928 instructions when no FEATURE_IGEN.
2930 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2932 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2935 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2937 * configure: Regenerated to track ../common/aclocal.m4 changes.
2939 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2941 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2942 SIM_RESERVED_BITS): Delete, moved to common.
2943 (SIM_EXTRA_CFLAGS): Update.
2945 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2947 * configure.in: Configure non-strict memory alignment.
2948 * configure: Regenerated to track ../common/aclocal.m4 changes.
2950 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2952 * configure: Regenerated to track ../common/aclocal.m4 changes.
2954 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2956 * gencode.c (SDBBP,DERET): Added (3900) insns.
2957 (RFE): Turn on for 3900.
2958 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2959 (dsstate): Made global.
2960 (SUBTARGET_R3900): Added.
2961 (CANCELDELAYSLOT): New.
2962 (SignalException): Ignore SystemCall rather than ignore and
2963 terminate. Add DebugBreakPoint handling.
2964 (decode_coproc): New insns RFE, DERET; and new registers Debug
2965 and DEPC protected by SUBTARGET_R3900.
2966 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2968 * Makefile.in,configure.in: Add mips subtarget option.
2969 * configure: Update.
2971 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2973 * gencode.c: Add r3900 (tx39).
2976 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2978 * gencode.c (build_instruction): Don't need to subtract 4 for
2981 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2983 * interp.c: Correct some HASFPU problems.
2985 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2987 * configure: Regenerated to track ../common/aclocal.m4 changes.
2989 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2991 * interp.c (mips_options): Fix samples option short form, should
2994 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2996 * interp.c (sim_info): Enable info code. Was just returning.
2998 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3000 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3003 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3005 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3007 (build_instruction): Ditto for LL.
3009 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3011 * configure: Regenerated to track ../common/aclocal.m4 changes.
3013 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3015 * configure: Regenerated to track ../common/aclocal.m4 changes.
3018 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3020 * interp.c (sim_open): Add call to sim_analyze_program, update
3023 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3025 * interp.c (sim_kill): Delete.
3026 (sim_create_inferior): Add ABFD argument. Set PC from same.
3027 (sim_load): Move code initializing trap handlers from here.
3028 (sim_open): To here.
3029 (sim_load): Delete, use sim-hload.c.
3031 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3033 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * configure: Regenerated to track ../common/aclocal.m4 changes.
3038 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * interp.c (sim_open): Add ABFD argument.
3041 (sim_load): Move call to sim_config from here.
3042 (sim_open): To here. Check return status.
3044 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3046 * gencode.c (build_instruction): Two arg MADD should
3047 not assign result to $0.
3049 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3051 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3052 * sim/mips/configure.in: Regenerate.
3054 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3056 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3057 signed8, unsigned8 et.al. types.
3059 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3060 hosts when selecting subreg.
3062 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3064 * interp.c (sim_engine_run): Reset the ZERO register to zero
3065 regardless of FEATURE_WARN_ZERO.
3066 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3068 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3070 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3071 (SignalException): For BreakPoints ignore any mode bits and just
3073 (SignalException): Always set the CAUSE register.
3075 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3077 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3078 exception has been taken.
3080 * interp.c: Implement the ERET and mt/f sr instructions.
3082 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3084 * interp.c (SignalException): Don't bother restarting an
3087 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3089 * interp.c (SignalException): Really take an interrupt.
3090 (interrupt_event): Only deliver interrupts when enabled.
3092 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3094 * interp.c (sim_info): Only print info when verbose.
3095 (sim_info) Use sim_io_printf for output.
3097 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3099 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3102 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3104 * interp.c (sim_do_command): Check for common commands if a
3105 simulator specific command fails.
3107 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3109 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3110 and simBE when DEBUG is defined.
3112 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3114 * interp.c (interrupt_event): New function. Pass exception event
3115 onto exception handler.
3117 * configure.in: Check for stdlib.h.
3118 * configure: Regenerate.
3120 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3121 variable declaration.
3122 (build_instruction): Initialize memval1.
3123 (build_instruction): Add UNUSED attribute to byte, bigend,
3125 (build_operands): Ditto.
3127 * interp.c: Fix GCC warnings.
3128 (sim_get_quit_code): Delete.
3130 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3131 * Makefile.in: Ditto.
3132 * configure: Re-generate.
3134 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3136 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3138 * interp.c (mips_option_handler): New function parse argumes using
3140 (myname): Replace with STATE_MY_NAME.
3141 (sim_open): Delete check for host endianness - performed by
3143 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3144 (sim_open): Move much of the initialization from here.
3145 (sim_load): To here. After the image has been loaded and
3147 (sim_open): Move ColdReset from here.
3148 (sim_create_inferior): To here.
3149 (sim_open): Make FP check less dependant on host endianness.
3151 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3153 * interp.c (sim_set_callbacks): Delete.
3155 * interp.c (membank, membank_base, membank_size): Replace with
3156 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3157 (sim_open): Remove call to callback->init. gdb/run do this.
3161 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3163 * interp.c (big_endian_p): Delete, replaced by
3164 current_target_byte_order.
3166 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3168 * interp.c (host_read_long, host_read_word, host_swap_word,
3169 host_swap_long): Delete. Using common sim-endian.
3170 (sim_fetch_register, sim_store_register): Use H2T.
3171 (pipeline_ticks): Delete. Handled by sim-events.
3173 (sim_engine_run): Update.
3175 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3177 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3179 (SignalException): To here. Signal using sim_engine_halt.
3180 (sim_stop_reason): Delete, moved to common.
3182 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3184 * interp.c (sim_open): Add callback argument.
3185 (sim_set_callbacks): Delete SIM_DESC argument.
3188 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3190 * Makefile.in (SIM_OBJS): Add common modules.
3192 * interp.c (sim_set_callbacks): Also set SD callback.
3193 (set_endianness, xfer_*, swap_*): Delete.
3194 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3195 Change to functions using sim-endian macros.
3196 (control_c, sim_stop): Delete, use common version.
3197 (simulate): Convert into.
3198 (sim_engine_run): This function.
3199 (sim_resume): Delete.
3201 * interp.c (simulation): New variable - the simulator object.
3202 (sim_kind): Delete global - merged into simulation.
3203 (sim_load): Cleanup. Move PC assignment from here.
3204 (sim_create_inferior): To here.
3206 * sim-main.h: New file.
3207 * interp.c (sim-main.h): Include.
3209 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3211 * configure: Regenerated to track ../common/aclocal.m4 changes.
3213 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3215 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3217 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3219 * gencode.c (build_instruction): DIV instructions: check
3220 for division by zero and integer overflow before using
3221 host's division operation.
3223 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3225 * Makefile.in (SIM_OBJS): Add sim-load.o.
3226 * interp.c: #include bfd.h.
3227 (target_byte_order): Delete.
3228 (sim_kind, myname, big_endian_p): New static locals.
3229 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3230 after argument parsing. Recognize -E arg, set endianness accordingly.
3231 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3232 load file into simulator. Set PC from bfd.
3233 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3234 (set_endianness): Use big_endian_p instead of target_byte_order.
3236 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3238 * interp.c (sim_size): Delete prototype - conflicts with
3239 definition in remote-sim.h. Correct definition.
3241 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3243 * configure: Regenerated to track ../common/aclocal.m4 changes.
3246 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3248 * interp.c (sim_open): New arg `kind'.
3250 * configure: Regenerated to track ../common/aclocal.m4 changes.
3252 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3254 * configure: Regenerated to track ../common/aclocal.m4 changes.
3256 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3258 * interp.c (sim_open): Set optind to 0 before calling getopt.
3260 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3262 * configure: Regenerated to track ../common/aclocal.m4 changes.
3264 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3266 * interp.c : Replace uses of pr_addr with pr_uword64
3267 where the bit length is always 64 independent of SIM_ADDR.
3268 (pr_uword64) : added.
3270 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3272 * configure: Re-generate.
3274 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3276 * configure: Regenerate to track ../common/aclocal.m4 changes.
3278 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3280 * interp.c (sim_open): New SIM_DESC result. Argument is now
3282 (other sim_*): New SIM_DESC argument.
3284 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3286 * interp.c: Fix printing of addresses for non-64-bit targets.
3287 (pr_addr): Add function to print address based on size.
3289 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3291 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3293 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3295 * gencode.c (build_mips16_operands): Correct computation of base
3296 address for extended PC relative instruction.
3298 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3300 * interp.c (mips16_entry): Add support for floating point cases.
3301 (SignalException): Pass floating point cases to mips16_entry.
3302 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3304 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3306 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3307 and then set the state to fmt_uninterpreted.
3308 (COP_SW): Temporarily set the state to fmt_word while calling
3311 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3313 * gencode.c (build_instruction): The high order may be set in the
3314 comparison flags at any ISA level, not just ISA 4.
3316 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3318 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3319 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3320 * configure.in: sinclude ../common/aclocal.m4.
3321 * configure: Regenerated.
3323 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3325 * configure: Rebuild after change to aclocal.m4.
3327 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3329 * configure configure.in Makefile.in: Update to new configure
3330 scheme which is more compatible with WinGDB builds.
3331 * configure.in: Improve comment on how to run autoconf.
3332 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3333 * Makefile.in: Use autoconf substitution to install common
3336 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3338 * gencode.c (build_instruction): Use BigEndianCPU instead of
3341 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3343 * interp.c (sim_monitor): Make output to stdout visible in
3344 wingdb's I/O log window.
3346 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3348 * support.h: Undo previous change to SIGTRAP
3351 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3353 * interp.c (store_word, load_word): New static functions.
3354 (mips16_entry): New static function.
3355 (SignalException): Look for mips16 entry and exit instructions.
3356 (simulate): Use the correct index when setting fpr_state after
3357 doing a pending move.
3359 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3361 * interp.c: Fix byte-swapping code throughout to work on
3362 both little- and big-endian hosts.
3364 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3366 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3367 with gdb/config/i386/xm-windows.h.
3369 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3371 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3372 that messes up arithmetic shifts.
3374 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3376 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3377 SIGTRAP and SIGQUIT for _WIN32.
3379 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3381 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3382 force a 64 bit multiplication.
3383 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3384 destination register is 0, since that is the default mips16 nop
3387 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3389 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3390 (build_endian_shift): Don't check proc64.
3391 (build_instruction): Always set memval to uword64. Cast op2 to
3392 uword64 when shifting it left in memory instructions. Always use
3393 the same code for stores--don't special case proc64.
3395 * gencode.c (build_mips16_operands): Fix base PC value for PC
3397 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3399 * interp.c (simJALDELAYSLOT): Define.
3400 (JALDELAYSLOT): Define.
3401 (INDELAYSLOT, INJALDELAYSLOT): Define.
3402 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3404 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3406 * interp.c (sim_open): add flush_cache as a PMON routine
3407 (sim_monitor): handle flush_cache by ignoring it
3409 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3411 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3413 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3414 (BigEndianMem): Rename to ByteSwapMem and change sense.
3415 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3416 BigEndianMem references to !ByteSwapMem.
3417 (set_endianness): New function, with prototype.
3418 (sim_open): Call set_endianness.
3419 (sim_info): Use simBE instead of BigEndianMem.
3420 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3421 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3422 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3423 ifdefs, keeping the prototype declaration.
3424 (swap_word): Rewrite correctly.
3425 (ColdReset): Delete references to CONFIG. Delete endianness related
3426 code; moved to set_endianness.
3428 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3430 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3431 * interp.c (CHECKHILO): Define away.
3432 (simSIGINT): New macro.
3433 (membank_size): Increase from 1MB to 2MB.
3434 (control_c): New function.
3435 (sim_resume): Rename parameter signal to signal_number. Add local
3436 variable prev. Call signal before and after simulate.
3437 (sim_stop_reason): Add simSIGINT support.
3438 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3440 (sim_warning): Delete call to SignalException. Do call printf_filtered
3442 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3443 a call to sim_warning.
3445 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3447 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3448 16 bit instructions.
3450 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3452 Add support for mips16 (16 bit MIPS implementation):
3453 * gencode.c (inst_type): Add mips16 instruction encoding types.
3454 (GETDATASIZEINSN): Define.
3455 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3456 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3458 (MIPS16_DECODE): New table, for mips16 instructions.
3459 (bitmap_val): New static function.
3460 (struct mips16_op): Define.
3461 (mips16_op_table): New table, for mips16 operands.
3462 (build_mips16_operands): New static function.
3463 (process_instructions): If PC is odd, decode a mips16
3464 instruction. Break out instruction handling into new
3465 build_instruction function.
3466 (build_instruction): New static function, broken out of
3467 process_instructions. Check modifiers rather than flags for SHIFT
3468 bit count and m[ft]{hi,lo} direction.
3469 (usage): Pass program name to fprintf.
3470 (main): Remove unused variable this_option_optind. Change
3471 ``*loptarg++'' to ``loptarg++''.
3472 (my_strtoul): Parenthesize && within ||.
3473 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3474 (simulate): If PC is odd, fetch a 16 bit instruction, and
3475 increment PC by 2 rather than 4.
3476 * configure.in: Add case for mips16*-*-*.
3477 * configure: Rebuild.
3479 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3481 * interp.c: Allow -t to enable tracing in standalone simulator.
3482 Fix garbage output in trace file and error messages.
3484 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3486 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3487 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3488 * configure.in: Simplify using macros in ../common/aclocal.m4.
3489 * configure: Regenerated.
3490 * tconfig.in: New file.
3492 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3494 * interp.c: Fix bugs in 64-bit port.
3495 Use ansi function declarations for msvc compiler.
3496 Initialize and test file pointer in trace code.
3497 Prevent duplicate definition of LAST_EMED_REGNUM.
3499 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3501 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3503 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3505 * interp.c (SignalException): Check for explicit terminating
3507 * gencode.c: Pass instruction value through SignalException()
3508 calls for Trap, Breakpoint and Syscall.
3510 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3512 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3513 only used on those hosts that provide it.
3514 * configure.in: Add sqrt() to list of functions to be checked for.
3515 * config.in: Re-generated.
3516 * configure: Re-generated.
3518 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3520 * gencode.c (process_instructions): Call build_endian_shift when
3521 expanding STORE RIGHT, to fix swr.
3522 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3523 clear the high bits.
3524 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3525 Fix float to int conversions to produce signed values.
3527 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3529 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3530 (process_instructions): Correct handling of nor instruction.
3531 Correct shift count for 32 bit shift instructions. Correct sign
3532 extension for arithmetic shifts to not shift the number of bits in
3533 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3534 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3536 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3537 It's OK to have a mult follow a mult. What's not OK is to have a
3538 mult follow an mfhi.
3539 (Convert): Comment out incorrect rounding code.
3541 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3543 * interp.c (sim_monitor): Improved monitor printf
3544 simulation. Tidied up simulator warnings, and added "--log" option
3545 for directing warning message output.
3546 * gencode.c: Use sim_warning() rather than WARNING macro.
3548 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3550 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3551 getopt1.o, rather than on gencode.c. Link objects together.
3552 Don't link against -liberty.
3553 (gencode.o, getopt.o, getopt1.o): New targets.
3554 * gencode.c: Include <ctype.h> and "ansidecl.h".
3555 (AND): Undefine after including "ansidecl.h".
3556 (ULONG_MAX): Define if not defined.
3557 (OP_*): Don't define macros; now defined in opcode/mips.h.
3558 (main): Call my_strtoul rather than strtoul.
3559 (my_strtoul): New static function.
3561 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3563 * gencode.c (process_instructions): Generate word64 and uword64
3564 instead of `long long' and `unsigned long long' data types.
3565 * interp.c: #include sysdep.h to get signals, and define default
3567 * (Convert): Work around for Visual-C++ compiler bug with type
3569 * support.h: Make things compile under Visual-C++ by using
3570 __int64 instead of `long long'. Change many refs to long long
3571 into word64/uword64 typedefs.
3573 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3575 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3576 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3578 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3579 (AC_PROG_INSTALL): Added.
3580 (AC_PROG_CC): Moved to before configure.host call.
3581 * configure: Rebuilt.
3583 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3585 * configure.in: Define @SIMCONF@ depending on mips target.
3586 * configure: Rebuild.
3587 * Makefile.in (run): Add @SIMCONF@ to control simulator
3589 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3590 * interp.c: Remove some debugging, provide more detailed error
3591 messages, update memory accesses to use LOADDRMASK.
3593 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3595 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3596 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3598 * configure: Rebuild.
3599 * config.in: New file, generated by autoheader.
3600 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3601 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3602 HAVE_ANINT and HAVE_AINT, as appropriate.
3603 * Makefile.in (run): Use @LIBS@ rather than -lm.
3604 (interp.o): Depend upon config.h.
3605 (Makefile): Just rebuild Makefile.
3606 (clean): Remove stamp-h.
3607 (mostlyclean): Make the same as clean, not as distclean.
3608 (config.h, stamp-h): New targets.
3610 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3612 * interp.c (ColdReset): Fix boolean test. Make all simulator
3615 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3617 * interp.c (xfer_direct_word, xfer_direct_long,
3618 swap_direct_word, swap_direct_long, xfer_big_word,
3619 xfer_big_long, xfer_little_word, xfer_little_long,
3620 swap_word,swap_long): Added.
3621 * interp.c (ColdReset): Provide function indirection to
3622 host<->simulated_target transfer routines.
3623 * interp.c (sim_store_register, sim_fetch_register): Updated to
3624 make use of indirected transfer routines.
3626 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3628 * gencode.c (process_instructions): Ensure FP ABS instruction
3630 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3631 system call support.
3633 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3635 * interp.c (sim_do_command): Complain if callback structure not
3638 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3640 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3641 support for Sun hosts.
3642 * Makefile.in (gencode): Ensure the host compiler and libraries
3643 used for cross-hosted build.
3645 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3647 * interp.c, gencode.c: Some more (TODO) tidying.
3649 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3651 * gencode.c, interp.c: Replaced explicit long long references with
3652 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3653 * support.h (SET64LO, SET64HI): Macros added.
3655 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3657 * configure: Regenerate with autoconf 2.7.
3659 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3661 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3662 * support.h: Remove superfluous "1" from #if.
3663 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3665 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3667 * interp.c (StoreFPR): Control UndefinedResult() call on
3668 WARN_RESULT manifest.
3670 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3672 * gencode.c: Tidied instruction decoding, and added FP instruction
3675 * interp.c: Added dineroIII, and BSD profiling support. Also
3676 run-time FP handling.
3678 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3680 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3681 gencode.c, interp.c, support.h: created.
projects / deliverable / binutils-gdb.git / blob