1 2015-04-13 Mike Frysinger <vapier@gentoo.org>
3 * interp.c (mips_option_handler, open_trace, sim_close,
4 sim_write, sim_read, sim_store_register, sim_fetch_register,
5 sim_create_inferior, pr_addr, pr_uword64): Convert old style
7 (sim_open): Convert old style prototype. Change casts with
8 sim_write to unsigned char *.
9 (fetch_str): Change null to unsigned char, and change cast to
11 (sim_monitor): Change c & ch to unsigned char. Change cast to
14 2015-04-12 Mike Frysinger <vapier@gentoo.org>
16 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
18 2015-04-06 Mike Frysinger <vapier@gentoo.org>
20 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
22 2015-04-01 Mike Frysinger <vapier@gentoo.org>
24 * tconfig.h (SIM_HAVE_PROFILE): Delete.
26 2015-03-31 Mike Frysinger <vapier@gentoo.org>
28 * config.in, configure: Regenerate.
30 2015-03-24 Mike Frysinger <vapier@gentoo.org>
32 * interp.c (sim_pc_get): New function.
34 2015-03-24 Mike Frysinger <vapier@gentoo.org>
36 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
37 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
39 2015-03-24 Mike Frysinger <vapier@gentoo.org>
41 * configure: Regenerate.
43 2015-03-23 Mike Frysinger <vapier@gentoo.org>
45 * configure: Regenerate.
47 2015-03-23 Mike Frysinger <vapier@gentoo.org>
49 * configure: Regenerate.
50 * configure.ac (mips_extra_objs): Delete.
51 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
52 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
54 2015-03-23 Mike Frysinger <vapier@gentoo.org>
56 * configure: Regenerate.
57 * configure.ac: Delete sim_hw checks for dv-sockser.
59 2015-03-16 Mike Frysinger <vapier@gentoo.org>
61 * config.in, configure: Regenerate.
62 * tconfig.in: Rename file ...
63 * tconfig.h: ... here.
65 2015-03-15 Mike Frysinger <vapier@gentoo.org>
67 * tconfig.in: Delete includes.
68 [HAVE_DV_SOCKSER]: Delete.
70 2015-03-14 Mike Frysinger <vapier@gentoo.org>
72 * Makefile.in (SIM_RUN_OBJS): Delete.
74 2015-03-14 Mike Frysinger <vapier@gentoo.org>
76 * configure.ac (AC_CHECK_HEADERS): Delete.
77 * aclocal.m4, configure: Regenerate.
79 2014-08-19 Alan Modra <amodra@gmail.com>
81 * configure: Regenerate.
83 2014-08-15 Roland McGrath <mcgrathr@google.com>
85 * configure: Regenerate.
86 * config.in: Regenerate.
88 2014-03-04 Mike Frysinger <vapier@gentoo.org>
90 * configure: Regenerate.
92 2013-09-23 Alan Modra <amodra@gmail.com>
94 * configure: Regenerate.
96 2013-06-03 Mike Frysinger <vapier@gentoo.org>
98 * aclocal.m4, configure: Regenerate.
100 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
102 * configure: Rebuild.
104 2013-03-26 Mike Frysinger <vapier@gentoo.org>
106 * configure: Regenerate.
108 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
110 * configure.ac: Address use of dv-sockser.o.
111 * tconfig.in: Conditionalize use of dv_sockser_install.
112 * configure: Regenerated.
113 * config.in: Regenerated.
115 2012-10-04 Chao-ying Fu <fu@mips.com>
116 Steve Ellcey <sellcey@mips.com>
118 * mips/mips3264r2.igen (rdhwr): New.
120 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
122 * configure.ac: Always link against dv-sockser.o.
123 * configure: Regenerate.
125 2012-06-15 Joel Brobecker <brobecker@adacore.com>
127 * config.in, configure: Regenerate.
129 2012-05-18 Nick Clifton <nickc@redhat.com>
132 * interp.c: Include config.h before system header files.
134 2012-03-24 Mike Frysinger <vapier@gentoo.org>
136 * aclocal.m4, config.in, configure: Regenerate.
138 2011-12-03 Mike Frysinger <vapier@gentoo.org>
140 * aclocal.m4: New file.
141 * configure: Regenerate.
143 2011-10-19 Mike Frysinger <vapier@gentoo.org>
145 * configure: Regenerate after common/acinclude.m4 update.
147 2011-10-17 Mike Frysinger <vapier@gentoo.org>
149 * configure.ac: Change include to common/acinclude.m4.
151 2011-10-17 Mike Frysinger <vapier@gentoo.org>
153 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
154 call. Replace common.m4 include with SIM_AC_COMMON.
155 * configure: Regenerate.
157 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
159 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
161 (tmp-mach-multi): Exit early when igen fails.
163 2011-07-05 Mike Frysinger <vapier@gentoo.org>
165 * interp.c (sim_do_command): Delete.
167 2011-02-14 Mike Frysinger <vapier@gentoo.org>
169 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
170 (tx3904sio_fifo_reset): Likewise.
171 * interp.c (sim_monitor): Likewise.
173 2010-04-14 Mike Frysinger <vapier@gentoo.org>
175 * interp.c (sim_write): Add const to buffer arg.
177 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
179 * interp.c: Don't include sysdep.h
181 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
183 * configure: Regenerate.
185 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
187 * config.in: Regenerate.
188 * configure: Likewise.
190 * configure: Regenerate.
192 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
194 * configure: Regenerate to track ../common/common.m4 changes.
197 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
198 Daniel Jacobowitz <dan@codesourcery.com>
199 Joseph Myers <joseph@codesourcery.com>
201 * configure: Regenerate.
203 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
205 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
206 that unconditionally allows fmt_ps.
207 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
208 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
209 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
210 filter from 64,f to 32,f.
211 (PREFX): Change filter from 64 to 32.
212 (LDXC1, LUXC1): Provide separate mips32r2 implementations
213 that use do_load_double instead of do_load. Make both LUXC1
214 versions unpredictable if SizeFGR () != 64.
215 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
216 instead of do_store. Remove unused variable. Make both SUXC1
217 versions unpredictable if SizeFGR () != 64.
219 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
221 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
222 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
223 shifts for that case.
225 2007-09-04 Nick Clifton <nickc@redhat.com>
227 * interp.c (options enum): Add OPTION_INFO_MEMORY.
228 (display_mem_info): New static variable.
229 (mips_option_handler): Handle OPTION_INFO_MEMORY.
230 (mips_options): Add info-memory and memory-info.
231 (sim_open): After processing the command line and board
232 specification, check display_mem_info. If it is set then
233 call the real handler for the --memory-info command line
236 2007-08-24 Joel Brobecker <brobecker@adacore.com>
238 * configure.ac: Change license of multi-run.c to GPL version 3.
239 * configure: Regenerate.
241 2007-06-28 Richard Sandiford <richard@codesourcery.com>
243 * configure.ac, configure: Revert last patch.
245 2007-06-26 Richard Sandiford <richard@codesourcery.com>
247 * configure.ac (sim_mipsisa3264_configs): New variable.
248 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
249 every configuration support all four targets, using the triplet to
250 determine the default.
251 * configure: Regenerate.
253 2007-06-25 Richard Sandiford <richard@codesourcery.com>
255 * Makefile.in (m16run.o): New rule.
257 2007-05-15 Thiemo Seufer <ths@mips.com>
259 * mips3264r2.igen (DSHD): Fix compile warning.
261 2007-05-14 Thiemo Seufer <ths@mips.com>
263 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
264 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
265 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
266 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
269 2007-03-01 Thiemo Seufer <ths@mips.com>
271 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
274 2007-02-20 Thiemo Seufer <ths@mips.com>
276 * dsp.igen: Update copyright notice.
277 * dsp2.igen: Fix copyright notice.
279 2007-02-20 Thiemo Seufer <ths@mips.com>
280 Chao-Ying Fu <fu@mips.com>
282 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
283 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
284 Add dsp2 to sim_igen_machine.
285 * configure: Regenerate.
286 * dsp.igen (do_ph_op): Add MUL support when op = 2.
287 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
288 (mulq_rs.ph): Use do_ph_mulq.
289 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
290 * mips.igen: Add dsp2 model and include dsp2.igen.
291 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
292 for *mips32r2, *mips64r2, *dsp.
293 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
294 for *mips32r2, *mips64r2, *dsp2.
295 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
297 2007-02-19 Thiemo Seufer <ths@mips.com>
298 Nigel Stephens <nigel@mips.com>
300 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
301 jumps with hazard barrier.
303 2007-02-19 Thiemo Seufer <ths@mips.com>
304 Nigel Stephens <nigel@mips.com>
306 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
307 after each call to sim_io_write.
309 2007-02-19 Thiemo Seufer <ths@mips.com>
310 Nigel Stephens <nigel@mips.com>
312 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
313 supported by this simulator.
314 (decode_coproc): Recognise additional CP0 Config registers
317 2007-02-19 Thiemo Seufer <ths@mips.com>
318 Nigel Stephens <nigel@mips.com>
319 David Ung <davidu@mips.com>
321 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
322 uninterpreted formats. If fmt is one of the uninterpreted types
323 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
324 fmt_word, and fmt_uninterpreted_64 like fmt_long.
325 (store_fpr): When writing an invalid odd register, set the
326 matching even register to fmt_unknown, not the following register.
327 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
328 the the memory window at offset 0 set by --memory-size command
330 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
332 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
334 (sim_monitor): When returning the memory size to the MIPS
335 application, use the value in STATE_MEM_SIZE, not an arbitrary
337 (cop_lw): Don' mess around with FPR_STATE, just pass
338 fmt_uninterpreted_32 to StoreFPR.
340 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
342 * mips.igen (not_word_value): Single version for mips32, mips64
345 2007-02-19 Thiemo Seufer <ths@mips.com>
346 Nigel Stephens <nigel@mips.com>
348 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
351 2007-02-17 Thiemo Seufer <ths@mips.com>
353 * configure.ac (mips*-sde-elf*): Move in front of generic machine
355 * configure: Regenerate.
357 2007-02-17 Thiemo Seufer <ths@mips.com>
359 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
360 Add mdmx to sim_igen_machine.
361 (mipsisa64*-*-*): Likewise. Remove dsp.
362 (mipsisa32*-*-*): Remove dsp.
363 * configure: Regenerate.
365 2007-02-13 Thiemo Seufer <ths@mips.com>
367 * configure.ac: Add mips*-sde-elf* target.
368 * configure: Regenerate.
370 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
372 * acconfig.h: Remove.
373 * config.in, configure: Regenerate.
375 2006-11-07 Thiemo Seufer <ths@mips.com>
377 * dsp.igen (do_w_op): Fix compiler warning.
379 2006-08-29 Thiemo Seufer <ths@mips.com>
380 David Ung <davidu@mips.com>
382 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
384 * configure: Regenerate.
385 * mips.igen (model): Add smartmips.
386 (MADDU): Increment ACX if carry.
387 (do_mult): Clear ACX.
388 (ROR,RORV): Add smartmips.
389 (include): Include smartmips.igen.
390 * sim-main.h (ACX): Set to REGISTERS[89].
391 * smartmips.igen: New file.
393 2006-08-29 Thiemo Seufer <ths@mips.com>
394 David Ung <davidu@mips.com>
396 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
397 mips3264r2.igen. Add missing dependency rules.
398 * m16e.igen: Support for mips16e save/restore instructions.
400 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
402 * configure: Regenerated.
404 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
406 * configure: Regenerated.
408 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
410 * configure: Regenerated.
412 2006-05-15 Chao-ying Fu <fu@mips.com>
414 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
416 2006-04-18 Nick Clifton <nickc@redhat.com>
418 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
421 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
423 * configure: Regenerate.
425 2005-12-14 Chao-ying Fu <fu@mips.com>
427 * Makefile.in (SIM_OBJS): Add dsp.o.
428 (dsp.o): New dependency.
429 (IGEN_INCLUDE): Add dsp.igen.
430 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
431 mipsisa64*-*-*): Add dsp to sim_igen_machine.
432 * configure: Regenerate.
433 * mips.igen: Add dsp model and include dsp.igen.
434 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
435 because these instructions are extended in DSP ASE.
436 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
437 adding 6 DSP accumulator registers and 1 DSP control register.
438 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
439 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
440 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
441 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
442 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
443 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
444 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
445 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
446 DSPCR_CCOND_SMASK): New define.
447 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
448 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
450 2005-07-08 Ian Lance Taylor <ian@airs.com>
452 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
454 2005-06-16 David Ung <davidu@mips.com>
455 Nigel Stephens <nigel@mips.com>
457 * mips.igen: New mips16e model and include m16e.igen.
458 (check_u64): Add mips16e tag.
459 * m16e.igen: New file for MIPS16e instructions.
460 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
461 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
463 * configure: Regenerate.
465 2005-05-26 David Ung <davidu@mips.com>
467 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
468 tags to all instructions which are applicable to the new ISAs.
469 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
471 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
473 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
475 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
476 * configure: Regenerate.
478 2005-03-23 Mark Kettenis <kettenis@gnu.org>
480 * configure: Regenerate.
482 2005-01-14 Andrew Cagney <cagney@gnu.org>
484 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
485 explicit call to AC_CONFIG_HEADER.
486 * configure: Regenerate.
488 2005-01-12 Andrew Cagney <cagney@gnu.org>
490 * configure.ac: Update to use ../common/common.m4.
491 * configure: Re-generate.
493 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
495 * configure: Regenerated to track ../common/aclocal.m4 changes.
497 2005-01-07 Andrew Cagney <cagney@gnu.org>
499 * configure.ac: Rename configure.in, require autoconf 2.59.
500 * configure: Re-generate.
502 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
504 * configure: Regenerate for ../common/aclocal.m4 update.
506 2004-09-24 Monika Chaddha <monika@acmet.com>
508 Committed by Andrew Cagney.
509 * m16.igen (CMP, CMPI): Fix assembler.
511 2004-08-18 Chris Demetriou <cgd@broadcom.com>
513 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
514 * configure: Regenerate.
516 2004-06-25 Chris Demetriou <cgd@broadcom.com>
518 * configure.in (sim_m16_machine): Include mipsIII.
519 * configure: Regenerate.
521 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
523 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
525 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
527 2004-04-10 Chris Demetriou <cgd@broadcom.com>
529 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
531 2004-04-09 Chris Demetriou <cgd@broadcom.com>
533 * mips.igen (check_fmt): Remove.
534 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
535 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
536 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
537 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
538 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
539 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
540 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
541 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
542 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
543 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
545 2004-04-09 Chris Demetriou <cgd@broadcom.com>
547 * sb1.igen (check_sbx): New function.
548 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
550 2004-03-29 Chris Demetriou <cgd@broadcom.com>
551 Richard Sandiford <rsandifo@redhat.com>
553 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
554 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
555 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
556 separate implementations for mipsIV and mipsV. Use new macros to
557 determine whether the restrictions apply.
559 2004-01-19 Chris Demetriou <cgd@broadcom.com>
561 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
562 (check_mult_hilo): Improve comments.
563 (check_div_hilo): Likewise. Also, fork off a new version
564 to handle mips32/mips64 (since there are no hazards to check
567 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
569 * mips.igen (do_dmultx): Fix check for negative operands.
571 2003-05-16 Ian Lance Taylor <ian@airs.com>
573 * Makefile.in (SHELL): Make sure this is defined.
574 (various): Use $(SHELL) whenever we invoke move-if-change.
576 2003-05-03 Chris Demetriou <cgd@broadcom.com>
578 * cp1.c: Tweak attribution slightly.
581 * mdmx.igen: Likewise.
582 * mips3d.igen: Likewise.
583 * sb1.igen: Likewise.
585 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
587 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
590 2003-02-27 Andrew Cagney <cagney@redhat.com>
592 * interp.c (sim_open): Rename _bfd to bfd.
593 (sim_create_inferior): Ditto.
595 2003-01-14 Chris Demetriou <cgd@broadcom.com>
597 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
599 2003-01-14 Chris Demetriou <cgd@broadcom.com>
601 * mips.igen (EI, DI): Remove.
603 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
605 * Makefile.in (tmp-run-multi): Fix mips16 filter.
607 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
608 Andrew Cagney <ac131313@redhat.com>
609 Gavin Romig-Koch <gavin@redhat.com>
610 Graydon Hoare <graydon@redhat.com>
611 Aldy Hernandez <aldyh@redhat.com>
612 Dave Brolley <brolley@redhat.com>
613 Chris Demetriou <cgd@broadcom.com>
615 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
616 (sim_mach_default): New variable.
617 (mips64vr-*-*, mips64vrel-*-*): New configurations.
618 Add a new simulator generator, MULTI.
619 * configure: Regenerate.
620 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
621 (multi-run.o): New dependency.
622 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
623 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
624 (tmp-multi): Combine them.
625 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
626 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
627 (distclean-extra): New rule.
628 * sim-main.h: Include bfd.h.
629 (MIPS_MACH): New macro.
630 * mips.igen (vr4120, vr5400, vr5500): New models.
631 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
632 * vr.igen: Replace with new version.
634 2003-01-04 Chris Demetriou <cgd@broadcom.com>
636 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
637 * configure: Regenerate.
639 2002-12-31 Chris Demetriou <cgd@broadcom.com>
641 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
642 * mips.igen: Remove all invocations of check_branch_bug and
645 2002-12-16 Chris Demetriou <cgd@broadcom.com>
647 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
649 2002-07-30 Chris Demetriou <cgd@broadcom.com>
651 * mips.igen (do_load_double, do_store_double): New functions.
652 (LDC1, SDC1): Rename to...
653 (LDC1b, SDC1b): respectively.
654 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
656 2002-07-29 Michael Snyder <msnyder@redhat.com>
658 * cp1.c (fp_recip2): Modify initialization expression so that
659 GCC will recognize it as constant.
661 2002-06-18 Chris Demetriou <cgd@broadcom.com>
663 * mdmx.c (SD_): Delete.
664 (Unpredictable): Re-define, for now, to directly invoke
665 unpredictable_action().
666 (mdmx_acc_op): Fix error in .ob immediate handling.
668 2002-06-18 Andrew Cagney <cagney@redhat.com>
670 * interp.c (sim_firmware_command): Initialize `address'.
672 2002-06-16 Andrew Cagney <ac131313@redhat.com>
674 * configure: Regenerated to track ../common/aclocal.m4 changes.
676 2002-06-14 Chris Demetriou <cgd@broadcom.com>
677 Ed Satterthwaite <ehs@broadcom.com>
679 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
680 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
681 * mips.igen: Include mips3d.igen.
682 (mips3d): New model name for MIPS-3D ASE instructions.
683 (CVT.W.fmt): Don't use this instruction for word (source) format
685 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
686 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
687 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
688 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
689 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
690 (RSquareRoot1, RSquareRoot2): New macros.
691 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
692 (fp_rsqrt2): New functions.
693 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
694 * configure: Regenerate.
696 2002-06-13 Chris Demetriou <cgd@broadcom.com>
697 Ed Satterthwaite <ehs@broadcom.com>
699 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
700 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
701 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
702 (convert): Note that this function is not used for paired-single
704 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
705 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
706 (check_fmt_p): Enable paired-single support.
707 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
708 (PUU.PS): New instructions.
709 (CVT.S.fmt): Don't use this instruction for paired-single format
711 * sim-main.h (FP_formats): New value 'fmt_ps.'
712 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
713 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
715 2002-06-12 Chris Demetriou <cgd@broadcom.com>
717 * mips.igen: Fix formatting of function calls in
720 2002-06-12 Chris Demetriou <cgd@broadcom.com>
722 * mips.igen (MOVN, MOVZ): Trace result.
723 (TNEI): Print "tnei" as the opcode name in traces.
724 (CEIL.W): Add disassembly string for traces.
725 (RSQRT.fmt): Make location of disassembly string consistent
726 with other instructions.
728 2002-06-12 Chris Demetriou <cgd@broadcom.com>
730 * mips.igen (X): Delete unused function.
732 2002-06-08 Andrew Cagney <cagney@redhat.com>
734 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
736 2002-06-07 Chris Demetriou <cgd@broadcom.com>
737 Ed Satterthwaite <ehs@broadcom.com>
739 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
740 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
741 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
742 (fp_nmsub): New prototypes.
743 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
744 (NegMultiplySub): New defines.
745 * mips.igen (RSQRT.fmt): Use RSquareRoot().
746 (MADD.D, MADD.S): Replace with...
747 (MADD.fmt): New instruction.
748 (MSUB.D, MSUB.S): Replace with...
749 (MSUB.fmt): New instruction.
750 (NMADD.D, NMADD.S): Replace with...
751 (NMADD.fmt): New instruction.
752 (NMSUB.D, MSUB.S): Replace with...
753 (NMSUB.fmt): New instruction.
755 2002-06-07 Chris Demetriou <cgd@broadcom.com>
756 Ed Satterthwaite <ehs@broadcom.com>
758 * cp1.c: Fix more comment spelling and formatting.
759 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
760 (denorm_mode): New function.
761 (fpu_unary, fpu_binary): Round results after operation, collect
762 status from rounding operations, and update the FCSR.
763 (convert): Collect status from integer conversions and rounding
764 operations, and update the FCSR. Adjust NaN values that result
765 from conversions. Convert to use sim_io_eprintf rather than
766 fprintf, and remove some debugging code.
767 * cp1.h (fenr_FS): New define.
769 2002-06-07 Chris Demetriou <cgd@broadcom.com>
771 * cp1.c (convert): Remove unusable debugging code, and move MIPS
772 rounding mode to sim FP rounding mode flag conversion code into...
773 (rounding_mode): New function.
775 2002-06-07 Chris Demetriou <cgd@broadcom.com>
777 * cp1.c: Clean up formatting of a few comments.
778 (value_fpr): Reformat switch statement.
780 2002-06-06 Chris Demetriou <cgd@broadcom.com>
781 Ed Satterthwaite <ehs@broadcom.com>
784 * sim-main.h: Include cp1.h.
785 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
786 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
787 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
788 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
789 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
790 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
791 * cp1.c: Don't include sim-fpu.h; already included by
792 sim-main.h. Clean up formatting of some comments.
793 (NaN, Equal, Less): Remove.
794 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
795 (fp_cmp): New functions.
796 * mips.igen (do_c_cond_fmt): Remove.
797 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
798 Compare. Add result tracing.
799 (CxC1): Remove, replace with...
800 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
801 (DMxC1): Remove, replace with...
802 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
803 (MxC1): Remove, replace with...
804 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
806 2002-06-04 Chris Demetriou <cgd@broadcom.com>
808 * sim-main.h (FGRIDX): Remove, replace all uses with...
809 (FGR_BASE): New macro.
810 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
811 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
812 (NR_FGR, FGR): Likewise.
813 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
814 * mips.igen: Likewise.
816 2002-06-04 Chris Demetriou <cgd@broadcom.com>
818 * cp1.c: Add an FSF Copyright notice to this file.
820 2002-06-04 Chris Demetriou <cgd@broadcom.com>
821 Ed Satterthwaite <ehs@broadcom.com>
823 * cp1.c (Infinity): Remove.
824 * sim-main.h (Infinity): Likewise.
826 * cp1.c (fp_unary, fp_binary): New functions.
827 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
828 (fp_sqrt): New functions, implemented in terms of the above.
829 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
830 (Recip, SquareRoot): Remove (replaced by functions above).
831 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
832 (fp_recip, fp_sqrt): New prototypes.
833 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
834 (Recip, SquareRoot): Replace prototypes with #defines which
835 invoke the functions above.
837 2002-06-03 Chris Demetriou <cgd@broadcom.com>
839 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
840 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
841 file, remove PARAMS from prototypes.
842 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
843 simulator state arguments.
844 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
845 pass simulator state arguments.
846 * cp1.c (SD): Redefine as CPU_STATE(cpu).
847 (store_fpr, convert): Remove 'sd' argument.
848 (value_fpr): Likewise. Convert to use 'SD' instead.
850 2002-06-03 Chris Demetriou <cgd@broadcom.com>
852 * cp1.c (Min, Max): Remove #if 0'd functions.
853 * sim-main.h (Min, Max): Remove.
855 2002-06-03 Chris Demetriou <cgd@broadcom.com>
857 * cp1.c: fix formatting of switch case and default labels.
858 * interp.c: Likewise.
859 * sim-main.c: Likewise.
861 2002-06-03 Chris Demetriou <cgd@broadcom.com>
863 * cp1.c: Clean up comments which describe FP formats.
864 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
866 2002-06-03 Chris Demetriou <cgd@broadcom.com>
867 Ed Satterthwaite <ehs@broadcom.com>
869 * configure.in (mipsisa64sb1*-*-*): New target for supporting
870 Broadcom SiByte SB-1 processor configurations.
871 * configure: Regenerate.
872 * sb1.igen: New file.
873 * mips.igen: Include sb1.igen.
875 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
876 * mdmx.igen: Add "sb1" model to all appropriate functions and
878 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
879 (ob_func, ob_acc): Reference the above.
880 (qh_acc): Adjust to keep the same size as ob_acc.
881 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
882 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
884 2002-06-03 Chris Demetriou <cgd@broadcom.com>
886 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
888 2002-06-02 Chris Demetriou <cgd@broadcom.com>
889 Ed Satterthwaite <ehs@broadcom.com>
891 * mips.igen (mdmx): New (pseudo-)model.
892 * mdmx.c, mdmx.igen: New files.
893 * Makefile.in (SIM_OBJS): Add mdmx.o.
894 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
896 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
897 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
898 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
899 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
900 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
901 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
902 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
903 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
904 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
905 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
906 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
907 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
908 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
909 (qh_fmtsel): New macros.
910 (_sim_cpu): New member "acc".
911 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
912 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
914 2002-05-01 Chris Demetriou <cgd@broadcom.com>
916 * interp.c: Use 'deprecated' rather than 'depreciated.'
917 * sim-main.h: Likewise.
919 2002-05-01 Chris Demetriou <cgd@broadcom.com>
921 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
922 which wouldn't compile anyway.
923 * sim-main.h (unpredictable_action): New function prototype.
924 (Unpredictable): Define to call igen function unpredictable().
925 (NotWordValue): New macro to call igen function not_word_value().
926 (UndefinedResult): Remove.
927 * interp.c (undefined_result): Remove.
928 (unpredictable_action): New function.
929 * mips.igen (not_word_value, unpredictable): New functions.
930 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
931 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
932 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
933 NotWordValue() to check for unpredictable inputs, then
934 Unpredictable() to handle them.
936 2002-02-24 Chris Demetriou <cgd@broadcom.com>
938 * mips.igen: Fix formatting of calls to Unpredictable().
940 2002-04-20 Andrew Cagney <ac131313@redhat.com>
942 * interp.c (sim_open): Revert previous change.
944 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
946 * interp.c (sim_open): Disable chunk of code that wrote code in
947 vector table entries.
949 2002-03-19 Chris Demetriou <cgd@broadcom.com>
951 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
952 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
955 2002-03-19 Chris Demetriou <cgd@broadcom.com>
957 * cp1.c: Fix many formatting issues.
959 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
961 * cp1.c (fpu_format_name): New function to replace...
962 (DOFMT): This. Delete, and update all callers.
963 (fpu_rounding_mode_name): New function to replace...
964 (RMMODE): This. Delete, and update all callers.
966 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
968 * interp.c: Move FPU support routines from here to...
969 * cp1.c: Here. New file.
970 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
973 2002-03-12 Chris Demetriou <cgd@broadcom.com>
975 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
976 * mips.igen (mips32, mips64): New models, add to all instructions
977 and functions as appropriate.
978 (loadstore_ea, check_u64): New variant for model mips64.
979 (check_fmt_p): New variant for models mipsV and mips64, remove
980 mipsV model marking fro other variant.
983 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
984 for mips32 and mips64.
985 (DCLO, DCLZ): New instructions for mips64.
987 2002-03-07 Chris Demetriou <cgd@broadcom.com>
989 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
990 immediate or code as a hex value with the "%#lx" format.
991 (ANDI): Likewise, and fix printed instruction name.
993 2002-03-05 Chris Demetriou <cgd@broadcom.com>
995 * sim-main.h (UndefinedResult, Unpredictable): New macros
996 which currently do nothing.
998 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1000 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1001 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1002 (status_CU3): New definitions.
1004 * sim-main.h (ExceptionCause): Add new values for MIPS32
1005 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1006 for DebugBreakPoint and NMIReset to note their status in
1008 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1009 (SignalExceptionCacheErr): New exception macros.
1011 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1013 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1014 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1016 (SignalExceptionCoProcessorUnusable): Take as argument the
1017 unusable coprocessor number.
1019 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1021 * mips.igen: Fix formatting of all SignalException calls.
1023 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1025 * sim-main.h (SIGNEXTEND): Remove.
1027 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1029 * mips.igen: Remove gencode comment from top of file, fix
1030 spelling in another comment.
1032 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1034 * mips.igen (check_fmt, check_fmt_p): New functions to check
1035 whether specific floating point formats are usable.
1036 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1037 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1038 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1039 Use the new functions.
1040 (do_c_cond_fmt): Remove format checks...
1041 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1043 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1045 * mips.igen: Fix formatting of check_fpu calls.
1047 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1049 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1051 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1053 * mips.igen: Remove whitespace at end of lines.
1055 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1057 * mips.igen (loadstore_ea): New function to do effective
1058 address calculations.
1059 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1060 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1061 CACHE): Use loadstore_ea to do effective address computations.
1063 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1065 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1066 * mips.igen (LL, CxC1, MxC1): Likewise.
1068 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1070 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1071 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1072 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1073 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1074 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1075 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1076 Don't split opcode fields by hand, use the opcode field values
1079 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1081 * mips.igen (do_divu): Fix spacing.
1083 * mips.igen (do_dsllv): Move to be right before DSLLV,
1084 to match the rest of the do_<shift> functions.
1086 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1088 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1089 DSRL32, do_dsrlv): Trace inputs and results.
1091 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1093 * mips.igen (CACHE): Provide instruction-printing string.
1095 * interp.c (signal_exception): Comment tokens after #endif.
1097 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1099 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1100 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1101 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1102 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1103 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1104 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1105 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1106 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1108 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1110 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1111 instruction-printing string.
1112 (LWU): Use '64' as the filter flag.
1114 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1116 * mips.igen (SDXC1): Fix instruction-printing string.
1118 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1120 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1121 filter flags "32,f".
1123 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1125 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1128 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1130 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1131 add a comma) so that it more closely match the MIPS ISA
1132 documentation opcode partitioning.
1133 (PREF): Put useful names on opcode fields, and include
1134 instruction-printing string.
1136 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1138 * mips.igen (check_u64): New function which in the future will
1139 check whether 64-bit instructions are usable and signal an
1140 exception if not. Currently a no-op.
1141 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1142 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1143 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1144 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1146 * mips.igen (check_fpu): New function which in the future will
1147 check whether FPU instructions are usable and signal an exception
1148 if not. Currently a no-op.
1149 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1150 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1151 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1152 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1153 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1154 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1155 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1156 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1158 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1160 * mips.igen (do_load_left, do_load_right): Move to be immediately
1162 (do_store_left, do_store_right): Move to be immediately following
1165 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1167 * mips.igen (mipsV): New model name. Also, add it to
1168 all instructions and functions where it is appropriate.
1170 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1172 * mips.igen: For all functions and instructions, list model
1173 names that support that instruction one per line.
1175 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1177 * mips.igen: Add some additional comments about supported
1178 models, and about which instructions go where.
1179 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1180 order as is used in the rest of the file.
1182 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1184 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1185 indicating that ALU32_END or ALU64_END are there to check
1187 (DADD): Likewise, but also remove previous comment about
1190 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1192 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1193 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1194 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1195 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1196 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1197 fields (i.e., add and move commas) so that they more closely
1198 match the MIPS ISA documentation opcode partitioning.
1200 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1202 * mips.igen (ADDI): Print immediate value.
1203 (BREAK): Print code.
1204 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1205 (SLL): Print "nop" specially, and don't run the code
1206 that does the shift for the "nop" case.
1208 2001-11-17 Fred Fish <fnf@redhat.com>
1210 * sim-main.h (float_operation): Move enum declaration outside
1211 of _sim_cpu struct declaration.
1213 2001-04-12 Jim Blandy <jimb@redhat.com>
1215 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1216 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1218 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1219 PENDING_FILL, and you can get the intended effect gracefully by
1220 calling PENDING_SCHED directly.
1222 2001-02-23 Ben Elliston <bje@redhat.com>
1224 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1225 already defined elsewhere.
1227 2001-02-19 Ben Elliston <bje@redhat.com>
1229 * sim-main.h (sim_monitor): Return an int.
1230 * interp.c (sim_monitor): Add return values.
1231 (signal_exception): Handle error conditions from sim_monitor.
1233 2001-02-08 Ben Elliston <bje@redhat.com>
1235 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1236 (store_memory): Likewise, pass cia to sim_core_write*.
1238 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1240 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1241 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1243 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1245 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1246 * Makefile.in: Don't delete *.igen when cleaning directory.
1248 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1250 * m16.igen (break): Call SignalException not sim_engine_halt.
1252 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1254 From Jason Eckhardt:
1255 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1257 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1259 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1261 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1263 * mips.igen (do_dmultx): Fix typo.
1265 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1267 * configure: Regenerated to track ../common/aclocal.m4 changes.
1269 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1271 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1273 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1275 * sim-main.h (GPR_CLEAR): Define macro.
1277 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1279 * interp.c (decode_coproc): Output long using %lx and not %s.
1281 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1283 * interp.c (sim_open): Sort & extend dummy memory regions for
1284 --board=jmr3904 for eCos.
1286 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1288 * configure: Regenerated.
1290 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1292 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1293 calls, conditional on the simulator being in verbose mode.
1295 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1297 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1298 cache don't get ReservedInstruction traps.
1300 1999-11-29 Mark Salter <msalter@cygnus.com>
1302 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1303 to clear status bits in sdisr register. This is how the hardware works.
1305 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1306 being used by cygmon.
1308 1999-11-11 Andrew Haley <aph@cygnus.com>
1310 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1313 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1315 * mips.igen (MULT): Correct previous mis-applied patch.
1317 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1319 * mips.igen (delayslot32): Handle sequence like
1320 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1321 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1322 (MULT): Actually pass the third register...
1324 1999-09-03 Mark Salter <msalter@cygnus.com>
1326 * interp.c (sim_open): Added more memory aliases for additional
1327 hardware being touched by cygmon on jmr3904 board.
1329 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1331 * configure: Regenerated to track ../common/aclocal.m4 changes.
1333 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1335 * interp.c (sim_store_register): Handle case where client - GDB -
1336 specifies that a 4 byte register is 8 bytes in size.
1337 (sim_fetch_register): Ditto.
1339 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1341 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1342 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1343 (idt_monitor_base): Base address for IDT monitor traps.
1344 (pmon_monitor_base): Ditto for PMON.
1345 (lsipmon_monitor_base): Ditto for LSI PMON.
1346 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1347 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1348 (sim_firmware_command): New function.
1349 (mips_option_handler): Call it for OPTION_FIRMWARE.
1350 (sim_open): Allocate memory for idt_monitor region. If "--board"
1351 option was given, add no monitor by default. Add BREAK hooks only if
1352 monitors are also there.
1354 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1356 * interp.c (sim_monitor): Flush output before reading input.
1358 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1360 * tconfig.in (SIM_HANDLES_LMA): Always define.
1362 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1364 From Mark Salter <msalter@cygnus.com>:
1365 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1366 (sim_open): Add setup for BSP board.
1368 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1370 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1371 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1372 them as unimplemented.
1374 1999-05-08 Felix Lee <flee@cygnus.com>
1376 * configure: Regenerated to track ../common/aclocal.m4 changes.
1378 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1380 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1382 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1384 * configure.in: Any mips64vr5*-*-* target should have
1385 -DTARGET_ENABLE_FR=1.
1386 (default_endian): Any mips64vr*el-*-* target should default to
1388 * configure: Re-generate.
1390 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1392 * mips.igen (ldl): Extend from _16_, not 32.
1394 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1396 * interp.c (sim_store_register): Force registers written to by GDB
1397 into an un-interpreted state.
1399 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1401 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1402 CPU, start periodic background I/O polls.
1403 (tx3904sio_poll): New function: periodic I/O poller.
1405 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1407 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1409 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1411 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1414 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1416 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1417 (load_word): Call SIM_CORE_SIGNAL hook on error.
1418 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1419 starting. For exception dispatching, pass PC instead of NULL_CIA.
1420 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1421 * sim-main.h (COP0_BADVADDR): Define.
1422 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1423 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1424 (_sim_cpu): Add exc_* fields to store register value snapshots.
1425 * mips.igen (*): Replace memory-related SignalException* calls
1426 with references to SIM_CORE_SIGNAL hook.
1428 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1430 * sim-main.c (*): Minor warning cleanups.
1432 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1434 * m16.igen (DADDIU5): Correct type-o.
1436 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1438 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1441 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1443 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1445 (interp.o): Add dependency on itable.h
1446 (oengine.c, gencode): Delete remaining references.
1447 (BUILT_SRC_FROM_GEN): Clean up.
1449 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1452 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1453 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1454 tmp-run-hack) : New.
1455 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1456 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1457 Drop the "64" qualifier to get the HACK generator working.
1458 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1459 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1460 qualifier to get the hack generator working.
1461 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1462 (DSLL): Use do_dsll.
1463 (DSLLV): Use do_dsllv.
1464 (DSRA): Use do_dsra.
1465 (DSRL): Use do_dsrl.
1466 (DSRLV): Use do_dsrlv.
1467 (BC1): Move *vr4100 to get the HACK generator working.
1468 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1469 get the HACK generator working.
1470 (MACC) Rename to get the HACK generator working.
1471 (DMACC,MACCS,DMACCS): Add the 64.
1473 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1475 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1476 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1478 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1480 * mips/interp.c (DEBUG): Cleanups.
1482 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1484 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1485 (tx3904sio_tickle): fflush after a stdout character output.
1487 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1489 * interp.c (sim_close): Uninstall modules.
1491 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1493 * sim-main.h, interp.c (sim_monitor): Change to global
1496 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1498 * configure.in (vr4100): Only include vr4100 instructions in
1500 * configure: Re-generate.
1501 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1503 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1505 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1506 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1509 * configure.in (sim_default_gen, sim_use_gen): Replace with
1511 (--enable-sim-igen): Delete config option. Always using IGEN.
1512 * configure: Re-generate.
1514 * Makefile.in (gencode): Kill, kill, kill.
1517 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1519 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1520 bit mips16 igen simulator.
1521 * configure: Re-generate.
1523 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1524 as part of vr4100 ISA.
1525 * vr.igen: Mark all instructions as 64 bit only.
1527 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1529 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1532 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1534 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1535 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1536 * configure: Re-generate.
1538 * m16.igen (BREAK): Define breakpoint instruction.
1539 (JALX32): Mark instruction as mips16 and not r3900.
1540 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1542 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1544 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1546 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1547 insn as a debug breakpoint.
1549 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1551 (PENDING_SCHED): Clean up trace statement.
1552 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1553 (PENDING_FILL): Delay write by only one cycle.
1554 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1556 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1558 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1560 (pending_tick): Move incrementing of index to FOR statement.
1561 (pending_tick): Only update PENDING_OUT after a write has occured.
1563 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1565 * configure: Re-generate.
1567 * interp.c (sim_engine_run OLD): Delete explicit call to
1568 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1570 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1572 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1573 interrupt level number to match changed SignalExceptionInterrupt
1576 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1578 * interp.c: #include "itable.h" if WITH_IGEN.
1579 (get_insn_name): New function.
1580 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1581 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1583 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1585 * configure: Rebuilt to inhale new common/aclocal.m4.
1587 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1589 * dv-tx3904sio.c: Include sim-assert.h.
1591 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1593 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1594 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1595 Reorganize target-specific sim-hardware checks.
1596 * configure: rebuilt.
1597 * interp.c (sim_open): For tx39 target boards, set
1598 OPERATING_ENVIRONMENT, add tx3904sio devices.
1599 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1600 ROM executables. Install dv-sockser into sim-modules list.
1602 * dv-tx3904irc.c: Compiler warning clean-up.
1603 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1604 frequent hw-trace messages.
1606 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1608 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1610 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1612 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1614 * vr.igen: New file.
1615 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1616 * mips.igen: Define vr4100 model. Include vr.igen.
1617 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1619 * mips.igen (check_mf_hilo): Correct check.
1621 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1623 * sim-main.h (interrupt_event): Add prototype.
1625 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1626 register_ptr, register_value.
1627 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1629 * sim-main.h (tracefh): Make extern.
1631 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1633 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1634 Reduce unnecessarily high timer event frequency.
1635 * dv-tx3904cpu.c: Ditto for interrupt event.
1637 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1639 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1641 (interrupt_event): Made non-static.
1643 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1644 interchange of configuration values for external vs. internal
1647 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1649 * mips.igen (BREAK): Moved code to here for
1650 simulator-reserved break instructions.
1651 * gencode.c (build_instruction): Ditto.
1652 * interp.c (signal_exception): Code moved from here. Non-
1653 reserved instructions now use exception vector, rather
1655 * sim-main.h: Moved magic constants to here.
1657 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1659 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1660 register upon non-zero interrupt event level, clear upon zero
1662 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1663 by passing zero event value.
1664 (*_io_{read,write}_buffer): Endianness fixes.
1665 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1666 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1668 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1669 serial I/O and timer module at base address 0xFFFF0000.
1671 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1673 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1676 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1678 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1680 * configure: Update.
1682 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1684 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1685 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1686 * configure.in: Include tx3904tmr in hw_device list.
1687 * configure: Rebuilt.
1688 * interp.c (sim_open): Instantiate three timer instances.
1689 Fix address typo of tx3904irc instance.
1691 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1693 * interp.c (signal_exception): SystemCall exception now uses
1694 the exception vector.
1696 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1698 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1701 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1703 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1705 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1707 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1709 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1710 sim-main.h. Declare a struct hw_descriptor instead of struct
1711 hw_device_descriptor.
1713 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1715 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1716 right bits and then re-align left hand bytes to correct byte
1717 lanes. Fix incorrect computation in do_store_left when loading
1718 bytes from second word.
1720 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1722 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1723 * interp.c (sim_open): Only create a device tree when HW is
1726 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1727 * interp.c (signal_exception): Ditto.
1729 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1731 * gencode.c: Mark BEGEZALL as LIKELY.
1733 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1735 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1736 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1738 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1740 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1741 modules. Recognize TX39 target with "mips*tx39" pattern.
1742 * configure: Rebuilt.
1743 * sim-main.h (*): Added many macros defining bits in
1744 TX39 control registers.
1745 (SignalInterrupt): Send actual PC instead of NULL.
1746 (SignalNMIReset): New exception type.
1747 * interp.c (board): New variable for future use to identify
1748 a particular board being simulated.
1749 (mips_option_handler,mips_options): Added "--board" option.
1750 (interrupt_event): Send actual PC.
1751 (sim_open): Make memory layout conditional on board setting.
1752 (signal_exception): Initial implementation of hardware interrupt
1753 handling. Accept another break instruction variant for simulator
1755 (decode_coproc): Implement RFE instruction for TX39.
1756 (mips.igen): Decode RFE instruction as such.
1757 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1758 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1759 bbegin to implement memory map.
1760 * dv-tx3904cpu.c: New file.
1761 * dv-tx3904irc.c: New file.
1763 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1765 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1767 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1769 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1770 with calls to check_div_hilo.
1772 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1774 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1775 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1776 Add special r3900 version of do_mult_hilo.
1777 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1778 with calls to check_mult_hilo.
1779 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1780 with calls to check_div_hilo.
1782 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1784 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1785 Document a replacement.
1787 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1789 * interp.c (sim_monitor): Make mon_printf work.
1791 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1793 * sim-main.h (INSN_NAME): New arg `cpu'.
1795 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1797 * configure: Regenerated to track ../common/aclocal.m4 changes.
1799 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1801 * configure: Regenerated to track ../common/aclocal.m4 changes.
1804 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1806 * acconfig.h: New file.
1807 * configure.in: Reverted change of Apr 24; use sinclude again.
1809 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1811 * configure: Regenerated to track ../common/aclocal.m4 changes.
1814 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1816 * configure.in: Don't call sinclude.
1818 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1820 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1822 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1824 * mips.igen (ERET): Implement.
1826 * interp.c (decode_coproc): Return sign-extended EPC.
1828 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1830 * interp.c (signal_exception): Do not ignore Trap.
1831 (signal_exception): On TRAP, restart at exception address.
1832 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1833 (signal_exception): Update.
1834 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1835 so that TRAP instructions are caught.
1837 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1839 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1840 contains HI/LO access history.
1841 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1842 (HIACCESS, LOACCESS): Delete, replace with
1843 (HIHISTORY, LOHISTORY): New macros.
1844 (CHECKHILO): Delete all, moved to mips.igen
1846 * gencode.c (build_instruction): Do not generate checks for
1847 correct HI/LO register usage.
1849 * interp.c (old_engine_run): Delete checks for correct HI/LO
1852 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1853 check_mf_cycles): New functions.
1854 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1855 do_divu, domultx, do_mult, do_multu): Use.
1857 * tx.igen ("madd", "maddu"): Use.
1859 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1861 * mips.igen (DSRAV): Use function do_dsrav.
1862 (SRAV): Use new function do_srav.
1864 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1865 (B): Sign extend 11 bit immediate.
1866 (EXT-B*): Shift 16 bit immediate left by 1.
1867 (ADDIU*): Don't sign extend immediate value.
1869 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1871 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1873 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1876 * mips.igen (delayslot32, nullify_next_insn): New functions.
1877 (m16.igen): Always include.
1878 (do_*): Add more tracing.
1880 * m16.igen (delayslot16): Add NIA argument, could be called by a
1881 32 bit MIPS16 instruction.
1883 * interp.c (ifetch16): Move function from here.
1884 * sim-main.c (ifetch16): To here.
1886 * sim-main.c (ifetch16, ifetch32): Update to match current
1887 implementations of LH, LW.
1888 (signal_exception): Don't print out incorrect hex value of illegal
1891 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1893 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1896 * m16.igen: Implement MIPS16 instructions.
1898 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1899 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1900 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1901 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1902 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1903 bodies of corresponding code from 32 bit insn to these. Also used
1904 by MIPS16 versions of functions.
1906 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1907 (IMEM16): Drop NR argument from macro.
1909 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1911 * Makefile.in (SIM_OBJS): Add sim-main.o.
1913 * sim-main.h (address_translation, load_memory, store_memory,
1914 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1916 (pr_addr, pr_uword64): Declare.
1917 (sim-main.c): Include when H_REVEALS_MODULE_P.
1919 * interp.c (address_translation, load_memory, store_memory,
1920 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1922 * sim-main.c: To here. Fix compilation problems.
1924 * configure.in: Enable inlining.
1925 * configure: Re-config.
1927 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1929 * configure: Regenerated to track ../common/aclocal.m4 changes.
1931 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * mips.igen: Include tx.igen.
1934 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1935 * tx.igen: New file, contains MADD and MADDU.
1937 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1938 the hardwired constant `7'.
1939 (store_memory): Ditto.
1940 (LOADDRMASK): Move definition to sim-main.h.
1942 mips.igen (MTC0): Enable for r3900.
1945 mips.igen (do_load_byte): Delete.
1946 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1947 do_store_right): New functions.
1948 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1950 configure.in: Let the tx39 use igen again.
1953 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1955 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1956 not an address sized quantity. Return zero for cache sizes.
1958 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1960 * mips.igen (r3900): r3900 does not support 64 bit integer
1963 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1965 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1967 * configure : Rebuild.
1969 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1971 * configure: Regenerated to track ../common/aclocal.m4 changes.
1973 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1977 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1979 * configure: Regenerated to track ../common/aclocal.m4 changes.
1980 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1982 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1984 * configure: Regenerated to track ../common/aclocal.m4 changes.
1986 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1988 * interp.c (Max, Min): Comment out functions. Not yet used.
1990 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1992 * configure: Regenerated to track ../common/aclocal.m4 changes.
1994 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1996 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1997 configurable settings for stand-alone simulator.
1999 * configure.in: Added X11 search, just in case.
2001 * configure: Regenerated.
2003 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2005 * interp.c (sim_write, sim_read, load_memory, store_memory):
2006 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2008 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2010 * sim-main.h (GETFCC): Return an unsigned value.
2012 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2014 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2015 (DADD): Result destination is RD not RT.
2017 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2019 * sim-main.h (HIACCESS, LOACCESS): Always define.
2021 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2023 * interp.c (sim_info): Delete.
2025 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2027 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2028 (mips_option_handler): New argument `cpu'.
2029 (sim_open): Update call to sim_add_option_table.
2031 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2033 * mips.igen (CxC1): Add tracing.
2035 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2037 * sim-main.h (Max, Min): Declare.
2039 * interp.c (Max, Min): New functions.
2041 * mips.igen (BC1): Add tracing.
2043 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2045 * interp.c Added memory map for stack in vr4100
2047 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2049 * interp.c (load_memory): Add missing "break"'s.
2051 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2053 * interp.c (sim_store_register, sim_fetch_register): Pass in
2054 length parameter. Return -1.
2056 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2058 * interp.c: Added hardware init hook, fixed warnings.
2060 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2062 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2064 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2066 * interp.c (ifetch16): New function.
2068 * sim-main.h (IMEM32): Rename IMEM.
2069 (IMEM16_IMMED): Define.
2071 (DELAY_SLOT): Update.
2073 * m16run.c (sim_engine_run): New file.
2075 * m16.igen: All instructions except LB.
2076 (LB): Call do_load_byte.
2077 * mips.igen (do_load_byte): New function.
2078 (LB): Call do_load_byte.
2080 * mips.igen: Move spec for insn bit size and high bit from here.
2081 * Makefile.in (tmp-igen, tmp-m16): To here.
2083 * m16.dc: New file, decode mips16 instructions.
2085 * Makefile.in (SIM_NO_ALL): Define.
2086 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2088 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2090 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2091 point unit to 32 bit registers.
2092 * configure: Re-generate.
2094 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2096 * configure.in (sim_use_gen): Make IGEN the default simulator
2097 generator for generic 32 and 64 bit mips targets.
2098 * configure: Re-generate.
2100 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2102 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2105 * interp.c (sim_fetch_register, sim_store_register): Read/write
2106 FGR from correct location.
2107 (sim_open): Set size of FGR's according to
2108 WITH_TARGET_FLOATING_POINT_BITSIZE.
2110 * sim-main.h (FGR): Store floating point registers in a separate
2113 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2115 * configure: Regenerated to track ../common/aclocal.m4 changes.
2117 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2119 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2121 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2123 * interp.c (pending_tick): New function. Deliver pending writes.
2125 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2126 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2127 it can handle mixed sized quantites and single bits.
2129 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2131 * interp.c (oengine.h): Do not include when building with IGEN.
2132 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2133 (sim_info): Ditto for PROCESSOR_64BIT.
2134 (sim_monitor): Replace ut_reg with unsigned_word.
2135 (*): Ditto for t_reg.
2136 (LOADDRMASK): Define.
2137 (sim_open): Remove defunct check that host FP is IEEE compliant,
2138 using software to emulate floating point.
2139 (value_fpr, ...): Always compile, was conditional on HASFPU.
2141 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2146 * interp.c (SD, CPU): Define.
2147 (mips_option_handler): Set flags in each CPU.
2148 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2149 (sim_close): Do not clear STATE, deleted anyway.
2150 (sim_write, sim_read): Assume CPU zero's vm should be used for
2152 (sim_create_inferior): Set the PC for all processors.
2153 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2155 (mips16_entry): Pass correct nr of args to store_word, load_word.
2156 (ColdReset): Cold reset all cpu's.
2157 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2158 (sim_monitor, load_memory, store_memory, signal_exception): Use
2159 `CPU' instead of STATE_CPU.
2162 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2165 * sim-main.h (signal_exception): Add sim_cpu arg.
2166 (SignalException*): Pass both SD and CPU to signal_exception.
2167 * interp.c (signal_exception): Update.
2169 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2171 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2172 address_translation): Ditto
2173 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2175 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2177 * configure: Regenerated to track ../common/aclocal.m4 changes.
2179 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2181 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2183 * mips.igen (model): Map processor names onto BFD name.
2185 * sim-main.h (CPU_CIA): Delete.
2186 (SET_CIA, GET_CIA): Define
2188 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2190 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2193 * configure.in (default_endian): Configure a big-endian simulator
2195 * configure: Re-generate.
2197 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2199 * configure: Regenerated to track ../common/aclocal.m4 changes.
2201 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2203 * interp.c (sim_monitor): Handle Densan monitor outbyte
2204 and inbyte functions.
2206 1997-12-29 Felix Lee <flee@cygnus.com>
2208 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2210 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2212 * Makefile.in (tmp-igen): Arrange for $zero to always be
2213 reset to zero after every instruction.
2215 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2217 * configure: Regenerated to track ../common/aclocal.m4 changes.
2220 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2222 * mips.igen (MSUB): Fix to work like MADD.
2223 * gencode.c (MSUB): Similarly.
2225 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2227 * configure: Regenerated to track ../common/aclocal.m4 changes.
2229 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2231 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2233 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2235 * sim-main.h (sim-fpu.h): Include.
2237 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2238 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2239 using host independant sim_fpu module.
2241 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2243 * interp.c (signal_exception): Report internal errors with SIGABRT
2246 * sim-main.h (C0_CONFIG): New register.
2247 (signal.h): No longer include.
2249 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2251 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2253 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2255 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2257 * mips.igen: Tag vr5000 instructions.
2258 (ANDI): Was missing mipsIV model, fix assembler syntax.
2259 (do_c_cond_fmt): New function.
2260 (C.cond.fmt): Handle mips I-III which do not support CC field
2262 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2263 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2265 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2266 vr5000 which saves LO in a GPR separatly.
2268 * configure.in (enable-sim-igen): For vr5000, select vr5000
2269 specific instructions.
2270 * configure: Re-generate.
2272 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2274 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2276 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2277 fmt_uninterpreted_64 bit cases to switch. Convert to
2280 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2282 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2283 as specified in IV3.2 spec.
2284 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2286 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2288 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2289 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2290 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2291 PENDING_FILL versions of instructions. Simplify.
2293 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2295 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2297 (MTHI, MFHI): Disable code checking HI-LO.
2299 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2301 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2303 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2305 * gencode.c (build_mips16_operands): Replace IPC with cia.
2307 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2308 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2310 (UndefinedResult): Replace function with macro/function
2312 (sim_engine_run): Don't save PC in IPC.
2314 * sim-main.h (IPC): Delete.
2317 * interp.c (signal_exception, store_word, load_word,
2318 address_translation, load_memory, store_memory, cache_op,
2319 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2320 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2321 current instruction address - cia - argument.
2322 (sim_read, sim_write): Call address_translation directly.
2323 (sim_engine_run): Rename variable vaddr to cia.
2324 (signal_exception): Pass cia to sim_monitor
2326 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2327 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2328 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2330 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2331 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2334 * interp.c (signal_exception): Pass restart address to
2337 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2338 idecode.o): Add dependency.
2340 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2342 (DELAY_SLOT): Update NIA not PC with branch address.
2343 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2345 * mips.igen: Use CIA not PC in branch calculations.
2346 (illegal): Call SignalException.
2347 (BEQ, ADDIU): Fix assembler.
2349 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2351 * m16.igen (JALX): Was missing.
2353 * configure.in (enable-sim-igen): New configuration option.
2354 * configure: Re-generate.
2356 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2358 * interp.c (load_memory, store_memory): Delete parameter RAW.
2359 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2360 bypassing {load,store}_memory.
2362 * sim-main.h (ByteSwapMem): Delete definition.
2364 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2366 * interp.c (sim_do_command, sim_commands): Delete mips specific
2367 commands. Handled by module sim-options.
2369 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2370 (WITH_MODULO_MEMORY): Define.
2372 * interp.c (sim_info): Delete code printing memory size.
2374 * interp.c (mips_size): Nee sim_size, delete function.
2376 (monitor, monitor_base, monitor_size): Delete global variables.
2377 (sim_open, sim_close): Delete code creating monitor and other
2378 memory regions. Use sim-memopts module, via sim_do_commandf, to
2379 manage memory regions.
2380 (load_memory, store_memory): Use sim-core for memory model.
2382 * interp.c (address_translation): Delete all memory map code
2383 except line forcing 32 bit addresses.
2385 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2387 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2390 * interp.c (logfh, logfile): Delete globals.
2391 (sim_open, sim_close): Delete code opening & closing log file.
2392 (mips_option_handler): Delete -l and -n options.
2393 (OPTION mips_options): Ditto.
2395 * interp.c (OPTION mips_options): Rename option trace to dinero.
2396 (mips_option_handler): Update.
2398 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2400 * interp.c (fetch_str): New function.
2401 (sim_monitor): Rewrite using sim_read & sim_write.
2402 (sim_open): Check magic number.
2403 (sim_open): Write monitor vectors into memory using sim_write.
2404 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2405 (sim_read, sim_write): Simplify - transfer data one byte at a
2407 (load_memory, store_memory): Clarify meaning of parameter RAW.
2409 * sim-main.h (isHOST): Defete definition.
2410 (isTARGET): Mark as depreciated.
2411 (address_translation): Delete parameter HOST.
2413 * interp.c (address_translation): Delete parameter HOST.
2415 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2419 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2420 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2422 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2424 * mips.igen: Add model filter field to records.
2426 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2428 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2430 interp.c (sim_engine_run): Do not compile function sim_engine_run
2431 when WITH_IGEN == 1.
2433 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2434 target architecture.
2436 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2437 igen. Replace with configuration variables sim_igen_flags /
2440 * m16.igen: New file. Copy mips16 insns here.
2441 * mips.igen: From here.
2443 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2445 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2447 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2449 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2451 * gencode.c (build_instruction): Follow sim_write's lead in using
2452 BigEndianMem instead of !ByteSwapMem.
2454 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2456 * configure.in (sim_gen): Dependent on target, select type of
2457 generator. Always select old style generator.
2459 configure: Re-generate.
2461 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2463 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2464 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2465 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2466 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2467 SIM_@sim_gen@_*, set by autoconf.
2469 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2471 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2473 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2474 CURRENT_FLOATING_POINT instead.
2476 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2477 (address_translation): Raise exception InstructionFetch when
2478 translation fails and isINSTRUCTION.
2480 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2481 sim_engine_run): Change type of of vaddr and paddr to
2483 (address_translation, prefetch, load_memory, store_memory,
2484 cache_op): Change type of vAddr and pAddr to address_word.
2486 * gencode.c (build_instruction): Change type of vaddr and paddr to
2489 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2491 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2492 macro to obtain result of ALU op.
2494 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2496 * interp.c (sim_info): Call profile_print.
2498 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2500 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2502 * sim-main.h (WITH_PROFILE): Do not define, defined in
2503 common/sim-config.h. Use sim-profile module.
2504 (simPROFILE): Delete defintion.
2506 * interp.c (PROFILE): Delete definition.
2507 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2508 (sim_close): Delete code writing profile histogram.
2509 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2511 (sim_engine_run): Delete code profiling the PC.
2513 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2515 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2517 * interp.c (sim_monitor): Make register pointers of type
2520 * sim-main.h: Make registers of type unsigned_word not
2523 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * interp.c (sync_operation): Rename from SyncOperation, make
2526 global, add SD argument.
2527 (prefetch): Rename from Prefetch, make global, add SD argument.
2528 (decode_coproc): Make global.
2530 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2532 * gencode.c (build_instruction): Generate DecodeCoproc not
2533 decode_coproc calls.
2535 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2536 (SizeFGR): Move to sim-main.h
2537 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2538 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2539 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2541 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2542 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2543 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2544 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2545 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2546 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2548 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2550 (sim-alu.h): Include.
2551 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2552 (sim_cia): Typedef to instruction_address.
2554 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2556 * Makefile.in (interp.o): Rename generated file engine.c to
2561 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2563 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2565 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2567 * gencode.c (build_instruction): For "FPSQRT", output correct
2568 number of arguments to Recip.
2570 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2572 * Makefile.in (interp.o): Depends on sim-main.h
2574 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2576 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2577 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2578 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2579 STATE, DSSTATE): Define
2580 (GPR, FGRIDX, ..): Define.
2582 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2583 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2584 (GPR, FGRIDX, ...): Delete macros.
2586 * interp.c: Update names to match defines from sim-main.h
2588 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * interp.c (sim_monitor): Add SD argument.
2591 (sim_warning): Delete. Replace calls with calls to
2593 (sim_error): Delete. Replace calls with sim_io_error.
2594 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2595 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2596 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2598 (mips_size): Rename from sim_size. Add SD argument.
2600 * interp.c (simulator): Delete global variable.
2601 (callback): Delete global variable.
2602 (mips_option_handler, sim_open, sim_write, sim_read,
2603 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2604 sim_size,sim_monitor): Use sim_io_* not callback->*.
2605 (sim_open): ZALLOC simulator struct.
2606 (PROFILE): Do not define.
2608 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2610 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2611 support.h with corresponding code.
2613 * sim-main.h (word64, uword64), support.h: Move definition to
2615 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2618 * Makefile.in: Update dependencies
2619 * interp.c: Do not include.
2621 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * interp.c (address_translation, load_memory, store_memory,
2624 cache_op): Rename to from AddressTranslation et.al., make global,
2627 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2630 * interp.c (SignalException): Rename to signal_exception, make
2633 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2635 * sim-main.h (SignalException, SignalExceptionInterrupt,
2636 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2637 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2638 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2641 * interp.c, support.h: Use.
2643 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2645 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2646 to value_fpr / store_fpr. Add SD argument.
2647 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2648 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2650 * sim-main.h (ValueFPR, StoreFPR): Define.
2652 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2654 * interp.c (sim_engine_run): Check consistency between configure
2655 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2658 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2659 (mips_fpu): Configure WITH_FLOATING_POINT.
2660 (mips_endian): Configure WITH_TARGET_ENDIAN.
2661 * configure: Update.
2663 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2665 * configure: Regenerated to track ../common/aclocal.m4 changes.
2667 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2669 * configure: Regenerated.
2671 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2673 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2675 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * gencode.c (print_igen_insn_models): Assume certain architectures
2678 include all mips* instructions.
2679 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2682 * Makefile.in (tmp.igen): Add target. Generate igen input from
2685 * gencode.c (FEATURE_IGEN): Define.
2686 (main): Add --igen option. Generate output in igen format.
2687 (process_instructions): Format output according to igen option.
2688 (print_igen_insn_format): New function.
2689 (print_igen_insn_models): New function.
2690 (process_instructions): Only issue warnings and ignore
2691 instructions when no FEATURE_IGEN.
2693 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2695 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2698 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2700 * configure: Regenerated to track ../common/aclocal.m4 changes.
2702 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2704 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2705 SIM_RESERVED_BITS): Delete, moved to common.
2706 (SIM_EXTRA_CFLAGS): Update.
2708 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2710 * configure.in: Configure non-strict memory alignment.
2711 * configure: Regenerated to track ../common/aclocal.m4 changes.
2713 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2715 * configure: Regenerated to track ../common/aclocal.m4 changes.
2717 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2719 * gencode.c (SDBBP,DERET): Added (3900) insns.
2720 (RFE): Turn on for 3900.
2721 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2722 (dsstate): Made global.
2723 (SUBTARGET_R3900): Added.
2724 (CANCELDELAYSLOT): New.
2725 (SignalException): Ignore SystemCall rather than ignore and
2726 terminate. Add DebugBreakPoint handling.
2727 (decode_coproc): New insns RFE, DERET; and new registers Debug
2728 and DEPC protected by SUBTARGET_R3900.
2729 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2731 * Makefile.in,configure.in: Add mips subtarget option.
2732 * configure: Update.
2734 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2736 * gencode.c: Add r3900 (tx39).
2739 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2741 * gencode.c (build_instruction): Don't need to subtract 4 for
2744 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2746 * interp.c: Correct some HASFPU problems.
2748 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * configure: Regenerated to track ../common/aclocal.m4 changes.
2752 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2754 * interp.c (mips_options): Fix samples option short form, should
2757 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2759 * interp.c (sim_info): Enable info code. Was just returning.
2761 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2763 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2766 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2768 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2770 (build_instruction): Ditto for LL.
2772 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2774 * configure: Regenerated to track ../common/aclocal.m4 changes.
2776 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2778 * configure: Regenerated to track ../common/aclocal.m4 changes.
2781 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2783 * interp.c (sim_open): Add call to sim_analyze_program, update
2786 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2788 * interp.c (sim_kill): Delete.
2789 (sim_create_inferior): Add ABFD argument. Set PC from same.
2790 (sim_load): Move code initializing trap handlers from here.
2791 (sim_open): To here.
2792 (sim_load): Delete, use sim-hload.c.
2794 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2796 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * configure: Regenerated to track ../common/aclocal.m4 changes.
2801 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2803 * interp.c (sim_open): Add ABFD argument.
2804 (sim_load): Move call to sim_config from here.
2805 (sim_open): To here. Check return status.
2807 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2809 * gencode.c (build_instruction): Two arg MADD should
2810 not assign result to $0.
2812 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2814 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2815 * sim/mips/configure.in: Regenerate.
2817 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2819 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2820 signed8, unsigned8 et.al. types.
2822 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2823 hosts when selecting subreg.
2825 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2827 * interp.c (sim_engine_run): Reset the ZERO register to zero
2828 regardless of FEATURE_WARN_ZERO.
2829 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2831 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2833 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2834 (SignalException): For BreakPoints ignore any mode bits and just
2836 (SignalException): Always set the CAUSE register.
2838 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2841 exception has been taken.
2843 * interp.c: Implement the ERET and mt/f sr instructions.
2845 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2847 * interp.c (SignalException): Don't bother restarting an
2850 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2852 * interp.c (SignalException): Really take an interrupt.
2853 (interrupt_event): Only deliver interrupts when enabled.
2855 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2857 * interp.c (sim_info): Only print info when verbose.
2858 (sim_info) Use sim_io_printf for output.
2860 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2862 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2865 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (sim_do_command): Check for common commands if a
2868 simulator specific command fails.
2870 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2872 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2873 and simBE when DEBUG is defined.
2875 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2877 * interp.c (interrupt_event): New function. Pass exception event
2878 onto exception handler.
2880 * configure.in: Check for stdlib.h.
2881 * configure: Regenerate.
2883 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2884 variable declaration.
2885 (build_instruction): Initialize memval1.
2886 (build_instruction): Add UNUSED attribute to byte, bigend,
2888 (build_operands): Ditto.
2890 * interp.c: Fix GCC warnings.
2891 (sim_get_quit_code): Delete.
2893 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2894 * Makefile.in: Ditto.
2895 * configure: Re-generate.
2897 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2899 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2901 * interp.c (mips_option_handler): New function parse argumes using
2903 (myname): Replace with STATE_MY_NAME.
2904 (sim_open): Delete check for host endianness - performed by
2906 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2907 (sim_open): Move much of the initialization from here.
2908 (sim_load): To here. After the image has been loaded and
2910 (sim_open): Move ColdReset from here.
2911 (sim_create_inferior): To here.
2912 (sim_open): Make FP check less dependant on host endianness.
2914 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2916 * interp.c (sim_set_callbacks): Delete.
2918 * interp.c (membank, membank_base, membank_size): Replace with
2919 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2920 (sim_open): Remove call to callback->init. gdb/run do this.
2924 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2926 * interp.c (big_endian_p): Delete, replaced by
2927 current_target_byte_order.
2929 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2931 * interp.c (host_read_long, host_read_word, host_swap_word,
2932 host_swap_long): Delete. Using common sim-endian.
2933 (sim_fetch_register, sim_store_register): Use H2T.
2934 (pipeline_ticks): Delete. Handled by sim-events.
2936 (sim_engine_run): Update.
2938 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2940 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2942 (SignalException): To here. Signal using sim_engine_halt.
2943 (sim_stop_reason): Delete, moved to common.
2945 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2947 * interp.c (sim_open): Add callback argument.
2948 (sim_set_callbacks): Delete SIM_DESC argument.
2951 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2953 * Makefile.in (SIM_OBJS): Add common modules.
2955 * interp.c (sim_set_callbacks): Also set SD callback.
2956 (set_endianness, xfer_*, swap_*): Delete.
2957 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2958 Change to functions using sim-endian macros.
2959 (control_c, sim_stop): Delete, use common version.
2960 (simulate): Convert into.
2961 (sim_engine_run): This function.
2962 (sim_resume): Delete.
2964 * interp.c (simulation): New variable - the simulator object.
2965 (sim_kind): Delete global - merged into simulation.
2966 (sim_load): Cleanup. Move PC assignment from here.
2967 (sim_create_inferior): To here.
2969 * sim-main.h: New file.
2970 * interp.c (sim-main.h): Include.
2972 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2974 * configure: Regenerated to track ../common/aclocal.m4 changes.
2976 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2978 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2980 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2982 * gencode.c (build_instruction): DIV instructions: check
2983 for division by zero and integer overflow before using
2984 host's division operation.
2986 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2988 * Makefile.in (SIM_OBJS): Add sim-load.o.
2989 * interp.c: #include bfd.h.
2990 (target_byte_order): Delete.
2991 (sim_kind, myname, big_endian_p): New static locals.
2992 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2993 after argument parsing. Recognize -E arg, set endianness accordingly.
2994 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2995 load file into simulator. Set PC from bfd.
2996 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2997 (set_endianness): Use big_endian_p instead of target_byte_order.
2999 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3001 * interp.c (sim_size): Delete prototype - conflicts with
3002 definition in remote-sim.h. Correct definition.
3004 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3006 * configure: Regenerated to track ../common/aclocal.m4 changes.
3009 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3011 * interp.c (sim_open): New arg `kind'.
3013 * configure: Regenerated to track ../common/aclocal.m4 changes.
3015 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3017 * configure: Regenerated to track ../common/aclocal.m4 changes.
3019 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3021 * interp.c (sim_open): Set optind to 0 before calling getopt.
3023 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3025 * configure: Regenerated to track ../common/aclocal.m4 changes.
3027 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3029 * interp.c : Replace uses of pr_addr with pr_uword64
3030 where the bit length is always 64 independent of SIM_ADDR.
3031 (pr_uword64) : added.
3033 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3035 * configure: Re-generate.
3037 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3039 * configure: Regenerate to track ../common/aclocal.m4 changes.
3041 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3043 * interp.c (sim_open): New SIM_DESC result. Argument is now
3045 (other sim_*): New SIM_DESC argument.
3047 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3049 * interp.c: Fix printing of addresses for non-64-bit targets.
3050 (pr_addr): Add function to print address based on size.
3052 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3054 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3056 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3058 * gencode.c (build_mips16_operands): Correct computation of base
3059 address for extended PC relative instruction.
3061 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3063 * interp.c (mips16_entry): Add support for floating point cases.
3064 (SignalException): Pass floating point cases to mips16_entry.
3065 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3067 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3069 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3070 and then set the state to fmt_uninterpreted.
3071 (COP_SW): Temporarily set the state to fmt_word while calling
3074 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3076 * gencode.c (build_instruction): The high order may be set in the
3077 comparison flags at any ISA level, not just ISA 4.
3079 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3081 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3082 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3083 * configure.in: sinclude ../common/aclocal.m4.
3084 * configure: Regenerated.
3086 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3088 * configure: Rebuild after change to aclocal.m4.
3090 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3092 * configure configure.in Makefile.in: Update to new configure
3093 scheme which is more compatible with WinGDB builds.
3094 * configure.in: Improve comment on how to run autoconf.
3095 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3096 * Makefile.in: Use autoconf substitution to install common
3099 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3101 * gencode.c (build_instruction): Use BigEndianCPU instead of
3104 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3106 * interp.c (sim_monitor): Make output to stdout visible in
3107 wingdb's I/O log window.
3109 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3111 * support.h: Undo previous change to SIGTRAP
3114 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3116 * interp.c (store_word, load_word): New static functions.
3117 (mips16_entry): New static function.
3118 (SignalException): Look for mips16 entry and exit instructions.
3119 (simulate): Use the correct index when setting fpr_state after
3120 doing a pending move.
3122 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3124 * interp.c: Fix byte-swapping code throughout to work on
3125 both little- and big-endian hosts.
3127 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3129 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3130 with gdb/config/i386/xm-windows.h.
3132 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3134 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3135 that messes up arithmetic shifts.
3137 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3139 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3140 SIGTRAP and SIGQUIT for _WIN32.
3142 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3144 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3145 force a 64 bit multiplication.
3146 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3147 destination register is 0, since that is the default mips16 nop
3150 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3152 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3153 (build_endian_shift): Don't check proc64.
3154 (build_instruction): Always set memval to uword64. Cast op2 to
3155 uword64 when shifting it left in memory instructions. Always use
3156 the same code for stores--don't special case proc64.
3158 * gencode.c (build_mips16_operands): Fix base PC value for PC
3160 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3162 * interp.c (simJALDELAYSLOT): Define.
3163 (JALDELAYSLOT): Define.
3164 (INDELAYSLOT, INJALDELAYSLOT): Define.
3165 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3167 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3169 * interp.c (sim_open): add flush_cache as a PMON routine
3170 (sim_monitor): handle flush_cache by ignoring it
3172 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3174 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3176 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3177 (BigEndianMem): Rename to ByteSwapMem and change sense.
3178 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3179 BigEndianMem references to !ByteSwapMem.
3180 (set_endianness): New function, with prototype.
3181 (sim_open): Call set_endianness.
3182 (sim_info): Use simBE instead of BigEndianMem.
3183 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3184 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3185 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3186 ifdefs, keeping the prototype declaration.
3187 (swap_word): Rewrite correctly.
3188 (ColdReset): Delete references to CONFIG. Delete endianness related
3189 code; moved to set_endianness.
3191 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3193 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3194 * interp.c (CHECKHILO): Define away.
3195 (simSIGINT): New macro.
3196 (membank_size): Increase from 1MB to 2MB.
3197 (control_c): New function.
3198 (sim_resume): Rename parameter signal to signal_number. Add local
3199 variable prev. Call signal before and after simulate.
3200 (sim_stop_reason): Add simSIGINT support.
3201 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3203 (sim_warning): Delete call to SignalException. Do call printf_filtered
3205 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3206 a call to sim_warning.
3208 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3210 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3211 16 bit instructions.
3213 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3215 Add support for mips16 (16 bit MIPS implementation):
3216 * gencode.c (inst_type): Add mips16 instruction encoding types.
3217 (GETDATASIZEINSN): Define.
3218 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3219 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3221 (MIPS16_DECODE): New table, for mips16 instructions.
3222 (bitmap_val): New static function.
3223 (struct mips16_op): Define.
3224 (mips16_op_table): New table, for mips16 operands.
3225 (build_mips16_operands): New static function.
3226 (process_instructions): If PC is odd, decode a mips16
3227 instruction. Break out instruction handling into new
3228 build_instruction function.
3229 (build_instruction): New static function, broken out of
3230 process_instructions. Check modifiers rather than flags for SHIFT
3231 bit count and m[ft]{hi,lo} direction.
3232 (usage): Pass program name to fprintf.
3233 (main): Remove unused variable this_option_optind. Change
3234 ``*loptarg++'' to ``loptarg++''.
3235 (my_strtoul): Parenthesize && within ||.
3236 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3237 (simulate): If PC is odd, fetch a 16 bit instruction, and
3238 increment PC by 2 rather than 4.
3239 * configure.in: Add case for mips16*-*-*.
3240 * configure: Rebuild.
3242 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3244 * interp.c: Allow -t to enable tracing in standalone simulator.
3245 Fix garbage output in trace file and error messages.
3247 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3249 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3250 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3251 * configure.in: Simplify using macros in ../common/aclocal.m4.
3252 * configure: Regenerated.
3253 * tconfig.in: New file.
3255 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3257 * interp.c: Fix bugs in 64-bit port.
3258 Use ansi function declarations for msvc compiler.
3259 Initialize and test file pointer in trace code.
3260 Prevent duplicate definition of LAST_EMED_REGNUM.
3262 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3264 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3266 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3268 * interp.c (SignalException): Check for explicit terminating
3270 * gencode.c: Pass instruction value through SignalException()
3271 calls for Trap, Breakpoint and Syscall.
3273 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3275 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3276 only used on those hosts that provide it.
3277 * configure.in: Add sqrt() to list of functions to be checked for.
3278 * config.in: Re-generated.
3279 * configure: Re-generated.
3281 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3283 * gencode.c (process_instructions): Call build_endian_shift when
3284 expanding STORE RIGHT, to fix swr.
3285 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3286 clear the high bits.
3287 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3288 Fix float to int conversions to produce signed values.
3290 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3292 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3293 (process_instructions): Correct handling of nor instruction.
3294 Correct shift count for 32 bit shift instructions. Correct sign
3295 extension for arithmetic shifts to not shift the number of bits in
3296 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3297 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3299 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3300 It's OK to have a mult follow a mult. What's not OK is to have a
3301 mult follow an mfhi.
3302 (Convert): Comment out incorrect rounding code.
3304 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3306 * interp.c (sim_monitor): Improved monitor printf
3307 simulation. Tidied up simulator warnings, and added "--log" option
3308 for directing warning message output.
3309 * gencode.c: Use sim_warning() rather than WARNING macro.
3311 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3313 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3314 getopt1.o, rather than on gencode.c. Link objects together.
3315 Don't link against -liberty.
3316 (gencode.o, getopt.o, getopt1.o): New targets.
3317 * gencode.c: Include <ctype.h> and "ansidecl.h".
3318 (AND): Undefine after including "ansidecl.h".
3319 (ULONG_MAX): Define if not defined.
3320 (OP_*): Don't define macros; now defined in opcode/mips.h.
3321 (main): Call my_strtoul rather than strtoul.
3322 (my_strtoul): New static function.
3324 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3326 * gencode.c (process_instructions): Generate word64 and uword64
3327 instead of `long long' and `unsigned long long' data types.
3328 * interp.c: #include sysdep.h to get signals, and define default
3330 * (Convert): Work around for Visual-C++ compiler bug with type
3332 * support.h: Make things compile under Visual-C++ by using
3333 __int64 instead of `long long'. Change many refs to long long
3334 into word64/uword64 typedefs.
3336 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3338 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3339 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3341 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3342 (AC_PROG_INSTALL): Added.
3343 (AC_PROG_CC): Moved to before configure.host call.
3344 * configure: Rebuilt.
3346 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3348 * configure.in: Define @SIMCONF@ depending on mips target.
3349 * configure: Rebuild.
3350 * Makefile.in (run): Add @SIMCONF@ to control simulator
3352 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3353 * interp.c: Remove some debugging, provide more detailed error
3354 messages, update memory accesses to use LOADDRMASK.
3356 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3358 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3359 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3361 * configure: Rebuild.
3362 * config.in: New file, generated by autoheader.
3363 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3364 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3365 HAVE_ANINT and HAVE_AINT, as appropriate.
3366 * Makefile.in (run): Use @LIBS@ rather than -lm.
3367 (interp.o): Depend upon config.h.
3368 (Makefile): Just rebuild Makefile.
3369 (clean): Remove stamp-h.
3370 (mostlyclean): Make the same as clean, not as distclean.
3371 (config.h, stamp-h): New targets.
3373 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3375 * interp.c (ColdReset): Fix boolean test. Make all simulator
3378 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3380 * interp.c (xfer_direct_word, xfer_direct_long,
3381 swap_direct_word, swap_direct_long, xfer_big_word,
3382 xfer_big_long, xfer_little_word, xfer_little_long,
3383 swap_word,swap_long): Added.
3384 * interp.c (ColdReset): Provide function indirection to
3385 host<->simulated_target transfer routines.
3386 * interp.c (sim_store_register, sim_fetch_register): Updated to
3387 make use of indirected transfer routines.
3389 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3391 * gencode.c (process_instructions): Ensure FP ABS instruction
3393 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3394 system call support.
3396 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3398 * interp.c (sim_do_command): Complain if callback structure not
3401 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3403 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3404 support for Sun hosts.
3405 * Makefile.in (gencode): Ensure the host compiler and libraries
3406 used for cross-hosted build.
3408 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3410 * interp.c, gencode.c: Some more (TODO) tidying.
3412 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3414 * gencode.c, interp.c: Replaced explicit long long references with
3415 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3416 * support.h (SET64LO, SET64HI): Macros added.
3418 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3420 * configure: Regenerate with autoconf 2.7.
3422 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3424 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3425 * support.h: Remove superfluous "1" from #if.
3426 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3428 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3430 * interp.c (StoreFPR): Control UndefinedResult() call on
3431 WARN_RESULT manifest.
3433 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3435 * gencode.c: Tidied instruction decoding, and added FP instruction
3438 * interp.c: Added dineroIII, and BSD profiling support. Also
3439 run-time FP handling.
3441 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3443 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3444 gencode.c, interp.c, support.h: created.