sim/mips/ChangeLog

   1 start-sanitize-sky
   2 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
   5 end-sanitize-sky
   6
   7 start-sanitize-sky
   8 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
   9
  10         * interp.c (decode_coproc): Continuing COP2 work.
  11         (cop_[ls]q): Make sky-target-only.
  12
  13         * sim-main.h (COP_[LS]Q): Make sky-target-only.
  14 end-sanitize-sky
  15
  16 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
  17
  18         * configure.in (mipstx39*-*-*): Use gencode simulator rather
  19         than igen one.
  20         * configure : Rebuild.
  21
  22 start-sanitize-sky
  23 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
  24
  25         * interp.c (decode_coproc): Added a missing TARGET_SKY check
  26         around COP2 implementation skeleton.
  27
  28 end-sanitize-sky
  29
  30 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
  31
  32 start-sanitize-sky
  33         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
  34
  35         * interp.c (sim_{load,store}_register): Use new vu[01]_device
  36         static to access VU registers.
  37         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
  38         decoding.  Work in progress.
  39
  40         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
  41         overlapping/redundant bit pattern.
  42         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
  43         progress.
  44
  45         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
  46         status register.
  47
  48         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
  49         access to coprocessor registers.
  50
  51         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
  52 end-sanitize-sky
  53
  54 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  55
  56         * configure: Regenerated to track ../common/aclocal.m4 changes.
  57
  58 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  59
  60         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
  61
  62 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
  63
  64         * configure: Regenerated to track ../common/aclocal.m4 changes.
  65         * config.in: Regenerated to track ../common/aclocal.m4 changes.
  66
  67 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  68
  69         * configure: Regenerated to track ../common/aclocal.m4 changes.
  70
  71 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  72
  73         * interp.c (Max, Min): Comment out functions. Not yet used.
  74
  75 start-sanitize-vr4320
  76 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  77
  78         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
  79
  80 end-sanitize-vr4320
  81 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  82
  83         * configure: Regenerated to track ../common/aclocal.m4 changes.
  84
  85 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
  86
  87         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
  88         configurable settings for stand-alone simulator.
  89
  90 start-sanitize-sky
  91         * configure.in: Added --with-sim-gpu2 option to specify path of
  92         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
  93         links/compiles stand-alone simulator with this library.
  94
  95         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
  96 end-sanitize-sky
  97
  98         * configure.in: Added X11 search, just in case.
  99
 100         * configure: Regenerated.
 101
 102 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 103
 104         * interp.c (sim_write, sim_read, load_memory, store_memory):
 105         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 106
 107 start-sanitize-vr4320
 108 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 109
 110         * vr4320.igen (clz,dclz) : Added.
 111         (dmac): Replaced 99, with LO.
 112
 113 end-sanitize-vr4320
 114 start-sanitize-vr5400
 115 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 116
 117         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 118
 119 end-sanitize-vr5400
 120 start-sanitize-vr4320
 121 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 122
 123         * vr4320.igen: New file.
 124         * Makefile.in (vr4320.igen) : Added.
 125         * configure.in (mips64vr4320-*-*): Added.
 126         * configure : Rebuilt.
 127         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 128         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 129
 130 end-sanitize-vr4320
 131 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 132
 133         * sim-main.h (GETFCC): Return an unsigned value.
 134
 135 start-sanitize-r5900
 136         * r5900.igen: Use an unsigned array index variable `i'.
 137         (QFSRV): Ditto for variable bytes.
 138
 139 end-sanitize-r5900
 140 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 141
 142         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 143         (DADD): Result destination is RD not RT.
 144
 145 start-sanitize-r5900
 146         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 147         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 148         divide.
 149
 150 end-sanitize-r5900
 151 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 152
 153         * sim-main.h (HIACCESS, LOACCESS): Always define.
 154
 155         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 156
 157         * interp.c (sim_info): Delete.
 158
 159 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 160
 161         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 162         (mips_option_handler): New argument `cpu'.
 163         (sim_open): Update call to sim_add_option_table.
 164
 165 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 166
 167         * mips.igen (CxC1): Add tracing.
 168
 169 start-sanitize-r5900
 170 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 171
 172         * r5900.igen (StoreFP): Delete.
 173         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 174         New functions.
 175         (rsqrt.s, sqrt.s): Implement.
 176         (r59cond): New function.
 177         (C.COND.S): Call r59cond in assembler line.
 178         (cvt.w.s, cvt.s.w): Implement.
 179
 180         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 181         instruction set.
 182
 183         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 184
 185 end-sanitize-r5900
 186 start-sanitize-r5900
 187 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 188
 189         * r5900.igen: Add tracing to all p* instructions.
 190
 191 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 192
 193         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 194         to get gdb talking to re-aranged sim_cpu register structure.
 195
 196 end-sanitize-r5900
 197 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 198
 199         * sim-main.h (Max, Min): Declare.
 200
 201         * interp.c (Max, Min): New functions.
 202
 203         * mips.igen (BC1): Add tracing.
 204
 205 start-sanitize-vr5400
 206 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 207
 208         * mdmx.igen: Tag all functions as requiring either with mdmx or
 209         vr5400 processor.
 210
 211 end-sanitize-vr5400
 212 start-sanitize-r5900
 213 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 214
 215         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 216         to 32.
 217         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 218
 219         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 220
 221         * r5900.igen: Rewrite.
 222
 223         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 224         struct.
 225         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 226         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 227
 228 end-sanitize-r5900
 229 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 230
 231         * interp.c Added memory map for stack in vr4100
 232
 233 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 234
 235         * interp.c (load_memory): Add missing "break"'s.
 236
 237 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 238
 239         * interp.c (sim_store_register, sim_fetch_register): Pass in
 240         length parameter.  Return -1.
 241
 242 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 243
 244         * interp.c: Added hardware init hook, fixed warnings.
 245
 246 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 247
 248         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 249
 250 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 251
 252         * interp.c (ifetch16): New function.
 253
 254         * sim-main.h (IMEM32): Rename IMEM.
 255         (IMEM16_IMMED): Define.
 256         (IMEM16): Define.
 257         (DELAY_SLOT): Update.
 258
 259         * m16run.c (sim_engine_run): New file.
 260
 261         * m16.igen: All instructions except LB.
 262         (LB): Call do_load_byte.
 263         * mips.igen (do_load_byte): New function.
 264         (LB): Call do_load_byte.
 265
 266         * mips.igen: Move spec for insn bit size and high bit from here.
 267         * Makefile.in (tmp-igen, tmp-m16): To here.
 268
 269         * m16.dc: New file, decode mips16 instructions.
 270
 271         * Makefile.in (SIM_NO_ALL): Define.
 272         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 273
 274 start-sanitize-tx19
 275         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 276         set.
 277
 278 end-sanitize-tx19
 279 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 280
 281         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 282         point unit to 32 bit registers.
 283         * configure: Re-generate.
 284
 285 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 286
 287         * configure.in (sim_use_gen): Make IGEN the default simulator
 288         generator for generic 32 and 64 bit mips targets.
 289         * configure: Re-generate.
 290
 291 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 292
 293         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 294         bitsize.
 295
 296         * interp.c (sim_fetch_register, sim_store_register): Read/write
 297         FGR from correct location.
 298         (sim_open): Set size of FGR's according to
 299         WITH_TARGET_FLOATING_POINT_BITSIZE.
 300
 301         * sim-main.h (FGR): Store floating point registers in a separate
 302         array.
 303
 304 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 305
 306         * configure: Regenerated to track ../common/aclocal.m4 changes.
 307
 308 start-sanitize-vr5400
 309         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 310
 311 end-sanitize-vr5400
 312 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 313
 314         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 315
 316         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 317
 318         * interp.c (pending_tick): New function.  Deliver pending writes.
 319
 320         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 321         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 322         it can handle mixed sized quantites and single bits.
 323
 324 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 325
 326         * interp.c (oengine.h): Do not include when building with IGEN.
 327         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 328         (sim_info): Ditto for PROCESSOR_64BIT.
 329         (sim_monitor): Replace ut_reg with unsigned_word.
 330         (*): Ditto for t_reg.
 331         (LOADDRMASK): Define.
 332         (sim_open): Remove defunct check that host FP is IEEE compliant,
 333         using software to emulate floating point.
 334         (value_fpr, ...): Always compile, was conditional on HASFPU.
 335
 336 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 337
 338         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 339         size.
 340
 341         * interp.c (SD, CPU): Define.
 342         (mips_option_handler): Set flags in each CPU.
 343         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 344         (sim_close): Do not clear STATE, deleted anyway.
 345         (sim_write, sim_read): Assume CPU zero's vm should be used for
 346         data transfers.
 347         (sim_create_inferior): Set the PC for all processors.
 348         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 349         argument.
 350         (mips16_entry): Pass correct nr of args to store_word, load_word.
 351         (ColdReset): Cold reset all cpu's.
 352         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 353         (sim_monitor, load_memory, store_memory, signal_exception): Use
 354         `CPU' instead of STATE_CPU.
 355
 356
 357         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 358         SD or CPU_.
 359
 360         * sim-main.h (signal_exception): Add sim_cpu arg.
 361         (SignalException*): Pass both SD and CPU to signal_exception.
 362         * interp.c (signal_exception): Update.
 363
 364         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 365         Ditto
 366         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 367         address_translation): Ditto
 368         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 369
 370 start-sanitize-vr5400
 371         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 372         `sd'.
 373         (ByteAlign): Use StoreFPR, pass args in correct order.
 374
 375 end-sanitize-vr5400
 376 start-sanitize-r5900
 377 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 378
 379         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 380
 381 end-sanitize-r5900
 382 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 383
 384         * configure: Regenerated to track ../common/aclocal.m4 changes.
 385
 386 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 387
 388 start-sanitize-r5900
 389         * configure.in (sim_igen_filter): For r5900, use igen.
 390         * configure: Re-generate.
 391
 392 end-sanitize-r5900
 393         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 394
 395         * mips.igen (model): Map processor names onto BFD name.
 396
 397         * sim-main.h (CPU_CIA): Delete.
 398         (SET_CIA, GET_CIA): Define
 399
 400 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 401
 402         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 403         regiser.
 404
 405         * configure.in (default_endian): Configure a big-endian simulator
 406         by default.
 407         * configure: Re-generate.
 408
 409 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 410
 411         * configure: Regenerated to track ../common/aclocal.m4 changes.
 412
 413 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 414
 415         * interp.c (sim_monitor): Handle Densan monitor outbyte
 416         and inbyte functions.
 417
 418 1997-12-29  Felix Lee  <flee@cygnus.com>
 419
 420         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 421
 422 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 423
 424         * Makefile.in (tmp-igen): Arrange for $zero to always be
 425         reset to zero after every instruction.
 426
 427 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 428
 429         * configure: Regenerated to track ../common/aclocal.m4 changes.
 430         * config.in: Ditto.
 431
 432 start-sanitize-vr5400
 433 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 434
 435         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 436         bit values.
 437
 438 end-sanitize-vr5400
 439 start-sanitize-vr5400
 440 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 441
 442         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 443         vr5400 with the vr5000 as the default.
 444
 445 end-sanitize-vr5400
 446 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 447
 448         * mips.igen (MSUB): Fix to work like MADD.
 449         * gencode.c (MSUB): Similarly.
 450
 451 start-sanitize-vr5400
 452 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 453
 454         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 455         vr5400.
 456
 457 end-sanitize-vr5400
 458 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 459
 460         * configure: Regenerated to track ../common/aclocal.m4 changes.
 461
 462 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 463
 464         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 465
 466 start-sanitize-vr5400
 467         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 468         (value_cc, store_cc): Implement.
 469
 470         * sim-main.h: Add 8*3*8 bit accumulator.
 471
 472         * vr5400.igen: Move mdmx instructins from here
 473         * mdmx.igen: To here - new file. Add/fix missing instructions.
 474         * mips.igen: Include mdmx.igen.
 475         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 476
 477 end-sanitize-vr5400
 478 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 479
 480         * sim-main.h (sim-fpu.h): Include.
 481
 482         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 483         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 484         using host independant sim_fpu module.
 485
 486 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 487
 488         * interp.c (signal_exception): Report internal errors with SIGABRT
 489         not SIGQUIT.
 490
 491         * sim-main.h (C0_CONFIG): New register.
 492         (signal.h): No longer include.
 493
 494         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 495
 496 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 497
 498         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 499
 500 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 501
 502         * mips.igen: Tag vr5000 instructions.
 503         (ANDI): Was missing mipsIV model, fix assembler syntax.
 504         (do_c_cond_fmt): New function.
 505         (C.cond.fmt): Handle mips I-III which do not support CC field
 506         separatly.
 507         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 508         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 509         in IV3.2 spec.
 510         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 511         vr5000 which saves LO in a GPR separatly.
 512
 513         * configure.in (enable-sim-igen): For vr5000, select vr5000
 514         specific instructions.
 515         * configure: Re-generate.
 516
 517 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 518
 519         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 520
 521         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 522         fmt_uninterpreted_64 bit cases to switch.  Convert to
 523         fmt_formatted,
 524
 525         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 526
 527         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 528         as specified in IV3.2 spec.
 529         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 530
 531 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 532
 533         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 534         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 535         (start-sanitize-r5900):
 536         (LWXC1, SWXC1): Delete from r5900 instruction set.
 537         (end-sanitize-r5900):
 538         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 539         PENDING_FILL versions of instructions.  Simplify.
 540         (X): New function.
 541         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 542         instructions.
 543         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 544         a signed value.
 545         (MTHI, MFHI): Disable code checking HI-LO.
 546
 547         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 548         global.
 549         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 550
 551 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 552
 553         * gencode.c (build_mips16_operands): Replace IPC with cia.
 554
 555         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 556         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 557         IPC to `cia'.
 558         (UndefinedResult): Replace function with macro/function
 559         combination.
 560         (sim_engine_run): Don't save PC in IPC.
 561
 562         * sim-main.h (IPC): Delete.
 563
 564         start-sanitize-vr5400
 565         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 566         (do_select): Rename function select.
 567         end-sanitize-vr5400
 568
 569         * interp.c (signal_exception, store_word, load_word,
 570         address_translation, load_memory, store_memory, cache_op,
 571         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 572         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 573         current instruction address - cia - argument.
 574         (sim_read, sim_write): Call address_translation directly.
 575         (sim_engine_run): Rename variable vaddr to cia.
 576         (signal_exception): Pass cia to sim_monitor
 577
 578         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 579         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 580         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 581
 582         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 583         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 584         SIM_ASSERT.
 585
 586         * interp.c (signal_exception): Pass restart address to
 587         sim_engine_restart.
 588
 589         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 590         idecode.o): Add dependency.
 591
 592         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 593         Delete definitions
 594         (DELAY_SLOT): Update NIA not PC with branch address.
 595         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 596
 597         * mips.igen: Use CIA not PC in branch calculations.
 598         (illegal): Call SignalException.
 599         (BEQ, ADDIU): Fix assembler.
 600
 601 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 602
 603         * m16.igen (JALX): Was missing.
 604
 605         * configure.in (enable-sim-igen): New configuration option.
 606         * configure: Re-generate.
 607
 608         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 609
 610         * interp.c (load_memory, store_memory): Delete parameter RAW.
 611         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 612         bypassing {load,store}_memory.
 613
 614         * sim-main.h (ByteSwapMem): Delete definition.
 615
 616         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 617
 618         * interp.c (sim_do_command, sim_commands): Delete mips specific
 619         commands.  Handled by module sim-options.
 620
 621         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 622         (WITH_MODULO_MEMORY): Define.
 623
 624         * interp.c (sim_info): Delete code printing memory size.
 625
 626         * interp.c (mips_size): Nee sim_size, delete function.
 627         (power2): Delete.
 628         (monitor, monitor_base, monitor_size): Delete global variables.
 629         (sim_open, sim_close): Delete code creating monitor and other
 630         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 631         manage memory regions.
 632         (load_memory, store_memory): Use sim-core for memory model.
 633
 634         * interp.c (address_translation): Delete all memory map code
 635         except line forcing 32 bit addresses.
 636
 637 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 638
 639         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 640         trace options.
 641
 642         * interp.c (logfh, logfile): Delete globals.
 643         (sim_open, sim_close): Delete code opening & closing log file.
 644         (mips_option_handler): Delete -l and -n options.
 645         (OPTION mips_options): Ditto.
 646
 647         * interp.c (OPTION mips_options): Rename option trace to dinero.
 648         (mips_option_handler): Update.
 649
 650 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 651
 652         * interp.c (fetch_str): New function.
 653         (sim_monitor): Rewrite using sim_read & sim_write.
 654         (sim_open): Check magic number.
 655         (sim_open): Write monitor vectors into memory using sim_write.
 656         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 657         (sim_read, sim_write): Simplify - transfer data one byte at a
 658         time.
 659         (load_memory, store_memory): Clarify meaning of parameter RAW.
 660
 661         * sim-main.h (isHOST): Defete definition.
 662         (isTARGET): Mark as depreciated.
 663         (address_translation): Delete parameter HOST.
 664
 665         * interp.c (address_translation): Delete parameter HOST.
 666
 667 start-sanitize-tx49
 668 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 669
 670         * gencode.c: Add tx49 configury and insns.
 671         * configure.in: Add tx49 configury.
 672         * configure: Update.
 673
 674 end-sanitize-tx49
 675 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 676
 677         * mips.igen:
 678
 679         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 680         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 681
 682 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 683
 684         * mips.igen: Add model filter field to records.
 685
 686 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 687
 688         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 689
 690         interp.c (sim_engine_run): Do not compile function sim_engine_run
 691         when WITH_IGEN == 1.
 692
 693         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 694         target architecture.
 695
 696         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 697         igen. Replace with configuration variables sim_igen_flags /
 698         sim_m16_flags.
 699
 700         start-sanitize-r5900
 701         * r5900.igen: New file. Copy r5900 insns here.
 702         end-sanitize-r5900
 703         start-sanitize-vr5400
 704         * vr5400.igen: New file.
 705         end-sanitize-vr5400
 706         * m16.igen: New file.  Copy mips16 insns here.
 707         * mips.igen: From here.
 708
 709 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 710
 711         start-sanitize-vr5400
 712         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 713
 714         * configure.in: Add mips64vr5400 target.
 715         * configure: Re-generate.
 716
 717         end-sanitize-vr5400
 718         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 719         to top.
 720         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 721
 722 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 723
 724         * gencode.c (build_instruction): Follow sim_write's lead in using
 725         BigEndianMem instead of !ByteSwapMem.
 726
 727 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 728
 729         * configure.in (sim_gen): Dependent on target, select type of
 730         generator.  Always select old style generator.
 731
 732         configure: Re-generate.
 733
 734         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 735         targets.
 736         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 737         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 738         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 739         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 740         SIM_@sim_gen@_*, set by autoconf.
 741
 742 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 743
 744         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 745
 746         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 747         CURRENT_FLOATING_POINT instead.
 748
 749         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 750         (address_translation): Raise exception InstructionFetch when
 751         translation fails and isINSTRUCTION.
 752
 753         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 754         sim_engine_run): Change type of of vaddr and paddr to
 755         address_word.
 756         (address_translation, prefetch, load_memory, store_memory,
 757         cache_op): Change type of vAddr and pAddr to address_word.
 758
 759         * gencode.c (build_instruction): Change type of vaddr and paddr to
 760         address_word.
 761
 762 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 763
 764         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 765         macro to obtain result of ALU op.
 766
 767 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 768
 769         * interp.c (sim_info): Call profile_print.
 770
 771 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 774
 775         * sim-main.h (WITH_PROFILE): Do not define, defined in
 776         common/sim-config.h.  Use sim-profile module.
 777         (simPROFILE): Delete defintion.
 778
 779         * interp.c (PROFILE): Delete definition.
 780         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 781         (sim_close): Delete code writing profile histogram.
 782         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 783         Delete.
 784         (sim_engine_run): Delete code profiling the PC.
 785
 786 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 787
 788         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 789
 790         * interp.c (sim_monitor): Make register pointers of type
 791         unsigned_word*.
 792
 793         * sim-main.h: Make registers of type unsigned_word not
 794         signed_word.
 795
 796 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 797
 798 start-sanitize-r5900
 799         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 800         ...): Move to sim-main.h
 801
 802 end-sanitize-r5900
 803         * interp.c (sync_operation): Rename from SyncOperation, make
 804         global, add SD argument.
 805         (prefetch): Rename from Prefetch, make global, add SD argument.
 806         (decode_coproc): Make global.
 807
 808         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 809
 810         * gencode.c (build_instruction): Generate DecodeCoproc not
 811         decode_coproc calls.
 812
 813         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 814         (SizeFGR): Move to sim-main.h
 815         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 816         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 817         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 818         sim-main.h.
 819         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 820         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 821         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 822         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 823         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 824         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 825
 826         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 827         exception.
 828         (sim-alu.h): Include.
 829         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 830         (sim_cia): Typedef to instruction_address.
 831
 832 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 833
 834         * Makefile.in (interp.o): Rename generated file engine.c to
 835         oengine.c.
 836
 837         * interp.c: Update.
 838
 839 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 840
 841         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 842
 843 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 844
 845         * gencode.c (build_instruction): For "FPSQRT", output correct
 846         number of arguments to Recip.
 847
 848 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 849
 850         * Makefile.in (interp.o): Depends on sim-main.h
 851
 852         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 853
 854         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 855         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 856         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 857         STATE, DSSTATE): Define
 858         (GPR, FGRIDX, ..): Define.
 859
 860         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 861         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 862         (GPR, FGRIDX, ...): Delete macros.
 863
 864         * interp.c: Update names to match defines from sim-main.h
 865
 866 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 867
 868         * interp.c (sim_monitor): Add SD argument.
 869         (sim_warning): Delete.  Replace calls with calls to
 870         sim_io_eprintf.
 871         (sim_error): Delete. Replace calls with sim_io_error.
 872         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 873         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 874         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 875         argument.
 876         (mips_size): Rename from sim_size. Add SD argument.
 877
 878         * interp.c (simulator): Delete global variable.
 879         (callback): Delete global variable.
 880         (mips_option_handler, sim_open, sim_write, sim_read,
 881         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 882         sim_size,sim_monitor): Use sim_io_* not callback->*.
 883         (sim_open): ZALLOC simulator struct.
 884         (PROFILE): Do not define.
 885
 886 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 887
 888         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 889         support.h with corresponding code.
 890
 891         * sim-main.h (word64, uword64), support.h: Move definition to
 892         sim-main.h.
 893         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 894
 895         * support.h: Delete
 896         * Makefile.in: Update dependencies
 897         * interp.c: Do not include.
 898
 899 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 900
 901         * interp.c (address_translation, load_memory, store_memory,
 902         cache_op): Rename to from AddressTranslation et.al., make global,
 903         add SD argument
 904
 905         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 906         CacheOp): Define.
 907
 908         * interp.c (SignalException): Rename to signal_exception, make
 909         global.
 910
 911         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 912
 913         * sim-main.h (SignalException, SignalExceptionInterrupt,
 914         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 915         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 916         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 917         Define.
 918
 919         * interp.c, support.h: Use.
 920
 921 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 922
 923         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 924         to value_fpr / store_fpr. Add SD argument.
 925         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 926         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 927
 928         * sim-main.h (ValueFPR, StoreFPR): Define.
 929
 930 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 931
 932         * interp.c (sim_engine_run): Check consistency between configure
 933         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 934         and HASFPU.
 935
 936         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 937         (mips_fpu): Configure WITH_FLOATING_POINT.
 938         (mips_endian): Configure WITH_TARGET_ENDIAN.
 939         * configure: Update.
 940
 941 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 942
 943         * configure: Regenerated to track ../common/aclocal.m4 changes.
 944
 945 start-sanitize-r5900
 946 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 947
 948         * interp.c (MAX_REG): Allow up-to 128 registers.
 949         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 950         (REGISTER_SA): Ditto.
 951         (sim_open): Initialize register_widths for r5900 specific
 952         registers.
 953         (sim_fetch_register, sim_store_register): Check for request of
 954         r5900 specific SA register.  Check for request for hi 64 bits of
 955         r5900 specific registers.
 956
 957 end-sanitize-r5900
 958 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 959
 960         * configure: Regenerated.
 961
 962 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 963
 964         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 965
 966 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968         * gencode.c (print_igen_insn_models): Assume certain architectures
 969         include all mips* instructions.
 970         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 971         instruction.
 972
 973         * Makefile.in (tmp.igen): Add target. Generate igen input from
 974         gencode file.
 975
 976         * gencode.c (FEATURE_IGEN): Define.
 977         (main): Add --igen option.  Generate output in igen format.
 978         (process_instructions): Format output according to igen option.
 979         (print_igen_insn_format): New function.
 980         (print_igen_insn_models): New function.
 981         (process_instructions): Only issue warnings and ignore
 982         instructions when no FEATURE_IGEN.
 983
 984 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 985
 986         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 987         MIPS targets.
 988
 989 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 990
 991         * configure: Regenerated to track ../common/aclocal.m4 changes.
 992
 993 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 994
 995         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 996         SIM_RESERVED_BITS): Delete, moved to common.
 997         (SIM_EXTRA_CFLAGS): Update.
 998
 999 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1000
1001         * configure.in: Configure non-strict memory alignment.
1002         * configure: Regenerated to track ../common/aclocal.m4 changes.
1003
1004 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1005
1006         * configure: Regenerated to track ../common/aclocal.m4 changes.
1007
1008 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1009
1010         * gencode.c (SDBBP,DERET): Added (3900) insns.
1011         (RFE): Turn on for 3900.
1012         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1013         (dsstate): Made global.
1014         (SUBTARGET_R3900): Added.
1015         (CANCELDELAYSLOT): New.
1016         (SignalException): Ignore SystemCall rather than ignore and
1017         terminate.  Add DebugBreakPoint handling.
1018         (decode_coproc): New insns RFE, DERET; and new registers Debug
1019         and DEPC protected by SUBTARGET_R3900.
1020         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1021         bits explicitly.
1022         * Makefile.in,configure.in: Add mips subtarget option.
1023         * configure: Update.
1024
1025 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1026
1027         * gencode.c: Add r3900 (tx39).
1028
1029 start-sanitize-tx19
1030         * gencode.c: Fix some configuration problems by improving
1031         the relationship between tx19 and tx39.
1032 end-sanitize-tx19
1033
1034 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1035
1036         * gencode.c (build_instruction): Don't need to subtract 4 for
1037         JALR, just 2.
1038
1039 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1040
1041         * interp.c: Correct some HASFPU problems.
1042
1043 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1044
1045         * configure: Regenerated to track ../common/aclocal.m4 changes.
1046
1047 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1048
1049         * interp.c (mips_options): Fix samples option short form, should
1050         be `x'.
1051
1052 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         * interp.c (sim_info): Enable info code.  Was just returning.
1055
1056 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1057
1058         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1059         MFC0.
1060
1061 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1062
1063         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1064         constants.
1065         (build_instruction): Ditto for LL.
1066
1067 start-sanitize-tx19
1068 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1069
1070         * mips/configure.in, mips/gencode: Add tx19/r1900.
1071
1072 end-sanitize-tx19
1073 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1074
1075         * configure: Regenerated to track ../common/aclocal.m4 changes.
1076
1077 start-sanitize-r5900
1078 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1079
1080         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1081         for overflow due to ABS of MININT, set result to MAXINT.
1082         (build_instruction): For "psrlvw", signextend bit 31.
1083
1084 end-sanitize-r5900
1085 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1086
1087         * configure: Regenerated to track ../common/aclocal.m4 changes.
1088         * config.in: Ditto.
1089
1090 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1091
1092         * interp.c (sim_open): Add call to sim_analyze_program, update
1093         call to sim_config.
1094
1095 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1096
1097         * interp.c (sim_kill): Delete.
1098         (sim_create_inferior): Add ABFD argument. Set PC from same.
1099         (sim_load): Move code initializing trap handlers from here.
1100         (sim_open): To here.
1101         (sim_load): Delete, use sim-hload.c.
1102
1103         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1104
1105 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1106
1107         * configure: Regenerated to track ../common/aclocal.m4 changes.
1108         * config.in: Ditto.
1109
1110 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1111
1112         * interp.c (sim_open): Add ABFD argument.
1113         (sim_load): Move call to sim_config from here.
1114         (sim_open): To here.  Check return status.
1115
1116 start-sanitize-r5900
1117         * gencode.c (build_instruction): Do not define x8000000000000000,
1118         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1119
1120 end-sanitize-r5900
1121 start-sanitize-r5900
1122 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1123
1124         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1125         "pdivuw" check for overflow due to signed divide by -1.
1126
1127 end-sanitize-r5900
1128 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1129
1130         * gencode.c (build_instruction): Two arg MADD should
1131         not assign result to $0.
1132
1133 start-sanitize-r5900
1134 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1135
1136         * gencode.c (build_instruction): For "ppac5" use unsigned
1137         arrithmetic so that the sign bit doesn't smear when right shifted.
1138         (build_instruction): For "pdiv" perform sign extension when
1139         storing results in HI and LO.
1140         (build_instructions): For "pdiv" and "pdivbw" check for
1141         divide-by-zero.
1142         (build_instruction): For "pmfhl.slw" update hi part of dest
1143         register as well as low part.
1144         (build_instruction): For "pmfhl" portably handle long long values.
1145         (build_instruction): For "pmfhl.sh" correctly negative values.
1146         Store half words 2 and three in the correct place.
1147         (build_instruction): For "psllvw", sign extend value after shift.
1148
1149 end-sanitize-r5900
1150 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1151
1152         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1153         * sim/mips/configure.in: Regenerate.
1154
1155 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1156
1157         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1158         signed8, unsigned8 et.al. types.
1159
1160 start-sanitize-r5900
1161         * gencode.c (build_instruction): For PMULTU* do not sign extend
1162         registers.  Make generated code easier to debug.
1163
1164 end-sanitize-r5900
1165         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1166         hosts when selecting subreg.
1167
1168 start-sanitize-r5900
1169 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1170
1171         * gencode.c (type_for_data_len): For 32bit operations concerned
1172         with overflow, perform op using 64bits.
1173         (build_instruction): For PADD, always compute operation using type
1174         returned by type_for_data_len.
1175         (build_instruction): For PSUBU, when overflow, saturate to zero as
1176         actually underflow.
1177
1178 end-sanitize-r5900
1179 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1180
1181 start-sanitize-r5900
1182         * gencode.c (build_instruction): Handle "pext5" according to
1183         version 1.95 of the r5900 ISA.
1184
1185         * gencode.c (build_instruction): Handle "ppac5" according to
1186         version 1.95 of the r5900 ISA.
1187
1188 end-sanitize-r5900
1189         * interp.c (sim_engine_run): Reset the ZERO register to zero
1190         regardless of FEATURE_WARN_ZERO.
1191         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1192
1193 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1194
1195         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1196         (SignalException): For BreakPoints ignore any mode bits and just
1197         save the PC.
1198         (SignalException): Always set the CAUSE register.
1199
1200 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1201
1202         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1203         exception has been taken.
1204
1205         * interp.c: Implement the ERET and mt/f sr instructions.
1206
1207 start-sanitize-r5900
1208 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1209
1210         * gencode.c (build_instruction): For paddu, extract unsigned
1211         sub-fields.
1212
1213         * gencode.c (build_instruction): Saturate padds instead of padd
1214         instructions.
1215
1216 end-sanitize-r5900
1217 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1218
1219         * interp.c (SignalException): Don't bother restarting an
1220         interrupt.
1221
1222 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1223
1224         * interp.c (SignalException): Really take an interrupt.
1225         (interrupt_event): Only deliver interrupts when enabled.
1226
1227 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1228
1229         * interp.c (sim_info): Only print info when verbose.
1230         (sim_info) Use sim_io_printf for output.
1231
1232 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1233
1234         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1235         mips architectures.
1236
1237 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1238
1239         * interp.c (sim_do_command): Check for common commands if a
1240         simulator specific command fails.
1241
1242 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1243
1244         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1245         and simBE when DEBUG is defined.
1246
1247 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1248
1249         * interp.c (interrupt_event): New function.  Pass exception event
1250         onto exception handler.
1251
1252         * configure.in: Check for stdlib.h.
1253         * configure: Regenerate.
1254
1255         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1256         variable declaration.
1257         (build_instruction): Initialize memval1.
1258         (build_instruction): Add UNUSED attribute to byte, bigend,
1259         reverse.
1260         (build_operands): Ditto.
1261
1262         * interp.c: Fix GCC warnings.
1263         (sim_get_quit_code): Delete.
1264
1265         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1266         * Makefile.in: Ditto.
1267         * configure: Re-generate.
1268
1269         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1270
1271 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1272
1273         * interp.c (mips_option_handler): New function parse argumes using
1274         sim-options.
1275         (myname): Replace with STATE_MY_NAME.
1276         (sim_open): Delete check for host endianness - performed by
1277         sim_config.
1278         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1279         (sim_open): Move much of the initialization from here.
1280         (sim_load): To here.  After the image has been loaded and
1281         endianness set.
1282         (sim_open): Move ColdReset from here.
1283         (sim_create_inferior): To here.
1284         (sim_open): Make FP check less dependant on host endianness.
1285
1286         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1287         run.
1288         * interp.c (sim_set_callbacks): Delete.
1289
1290         * interp.c (membank, membank_base, membank_size): Replace with
1291         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1292         (sim_open): Remove call to callback->init. gdb/run do this.
1293
1294         * interp.c: Update
1295
1296         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1297
1298         * interp.c (big_endian_p): Delete, replaced by
1299         current_target_byte_order.
1300
1301 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1302
1303         * interp.c (host_read_long, host_read_word, host_swap_word,
1304         host_swap_long): Delete. Using common sim-endian.
1305         (sim_fetch_register, sim_store_register): Use H2T.
1306         (pipeline_ticks): Delete.  Handled by sim-events.
1307         (sim_info): Update.
1308         (sim_engine_run): Update.
1309
1310 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1311
1312         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1313         reason from here.
1314         (SignalException): To here. Signal using sim_engine_halt.
1315         (sim_stop_reason): Delete, moved to common.
1316
1317 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1318
1319         * interp.c (sim_open): Add callback argument.
1320         (sim_set_callbacks): Delete SIM_DESC argument.
1321         (sim_size): Ditto.
1322
1323 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1324
1325         * Makefile.in (SIM_OBJS): Add common modules.
1326
1327         * interp.c (sim_set_callbacks): Also set SD callback.
1328         (set_endianness, xfer_*, swap_*): Delete.
1329         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1330         Change to functions using sim-endian macros.
1331         (control_c, sim_stop): Delete, use common version.
1332         (simulate): Convert into.
1333         (sim_engine_run): This function.
1334         (sim_resume): Delete.
1335
1336         * interp.c (simulation): New variable - the simulator object.
1337         (sim_kind): Delete global - merged into simulation.
1338         (sim_load): Cleanup.  Move PC assignment from here.
1339         (sim_create_inferior): To here.
1340
1341         * sim-main.h: New file.
1342         * interp.c (sim-main.h): Include.
1343
1344 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1345
1346         * configure: Regenerated to track ../common/aclocal.m4 changes.
1347
1348 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1349
1350         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1351
1352 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1353
1354         * gencode.c (build_instruction): DIV instructions: check
1355         for division by zero and integer overflow before using
1356         host's division operation.
1357
1358 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1359
1360         * Makefile.in (SIM_OBJS): Add sim-load.o.
1361         * interp.c: #include bfd.h.
1362         (target_byte_order): Delete.
1363         (sim_kind, myname, big_endian_p): New static locals.
1364         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1365         after argument parsing.  Recognize -E arg, set endianness accordingly.
1366         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1367         load file into simulator.  Set PC from bfd.
1368         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1369         (set_endianness): Use big_endian_p instead of target_byte_order.
1370
1371 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1372
1373         * interp.c (sim_size): Delete prototype - conflicts with
1374         definition in remote-sim.h.  Correct definition.
1375
1376 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1377
1378         * configure: Regenerated to track ../common/aclocal.m4 changes.
1379         * config.in: Ditto.
1380
1381 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1382
1383         * interp.c (sim_open): New arg `kind'.
1384
1385         * configure: Regenerated to track ../common/aclocal.m4 changes.
1386
1387 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1388
1389         * configure: Regenerated to track ../common/aclocal.m4 changes.
1390
1391 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1392
1393         * interp.c (sim_open): Set optind to 0 before calling getopt.
1394
1395 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1396
1397         * configure: Regenerated to track ../common/aclocal.m4 changes.
1398
1399 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1400
1401         * interp.c : Replace uses of pr_addr with pr_uword64
1402         where the bit length is always 64 independent of SIM_ADDR.
1403         (pr_uword64) : added.
1404
1405 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1406
1407         * configure: Re-generate.
1408
1409 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1410
1411         * configure: Regenerate to track ../common/aclocal.m4 changes.
1412
1413 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1414
1415         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1416         in argv form.
1417         (other sim_*): New SIM_DESC argument.
1418
1419 start-sanitize-r5900
1420 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1421
1422         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1423         Change values to avoid overloading DOUBLEWORD which is tested
1424         for all insns.
1425         * gencode.c: reinstate "offending code".
1426
1427 end-sanitize-r5900
1428 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1429
1430         * interp.c: Fix printing of addresses for non-64-bit targets.
1431         (pr_addr): Add function to print address based on size.
1432 start-sanitize-r5900
1433         * gencode.c: #ifdef out offending code until a permanent fix
1434         can be added.  Code is causing build errors for non-5900 mips targets.
1435 end-sanitize-r5900
1436
1437 start-sanitize-r5900
1438 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1439
1440         * gencode.c (process_instructions): Correct test for ISA dependent
1441         architecture bits in isa field of MIPS_DECODE.
1442
1443 end-sanitize-r5900
1444 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1445
1446         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1447
1448 start-sanitize-r5900
1449 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1450
1451         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1452         PMADDUW.
1453
1454 end-sanitize-r5900
1455 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1456
1457         * gencode.c (build_mips16_operands): Correct computation of base
1458         address for extended PC relative instruction.
1459
1460 start-sanitize-r5900
1461 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1462
1463         * Makefile.in, configure, configure.in, gencode.c,
1464         interp.c, support.h: add r5900.
1465
1466 end-sanitize-r5900
1467 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1468
1469         * interp.c (mips16_entry): Add support for floating point cases.
1470         (SignalException): Pass floating point cases to mips16_entry.
1471         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1472         registers.
1473         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1474         or fmt_word.
1475         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1476         and then set the state to fmt_uninterpreted.
1477         (COP_SW): Temporarily set the state to fmt_word while calling
1478         ValueFPR.
1479
1480 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1481
1482         * gencode.c (build_instruction): The high order may be set in the
1483         comparison flags at any ISA level, not just ISA 4.
1484
1485 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1486
1487         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1488         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1489         * configure.in: sinclude ../common/aclocal.m4.
1490         * configure: Regenerated.
1491
1492 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1493
1494         * configure: Rebuild after change to aclocal.m4.
1495
1496 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1497
1498         * configure configure.in Makefile.in:  Update to new configure
1499         scheme which is more compatible with WinGDB builds.
1500         * configure.in:  Improve comment on how to run autoconf.
1501         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1502         * Makefile.in:  Use autoconf substitution to install common
1503         makefile fragment.
1504
1505 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1506
1507         * gencode.c (build_instruction): Use BigEndianCPU instead of
1508         ByteSwapMem.
1509
1510 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1511
1512         * interp.c (sim_monitor): Make output to stdout visible in
1513         wingdb's I/O log window.
1514
1515 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1516
1517         * support.h: Undo previous change to SIGTRAP
1518         and SIGQUIT values.
1519
1520 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1521
1522         * interp.c (store_word, load_word): New static functions.
1523         (mips16_entry): New static function.
1524         (SignalException): Look for mips16 entry and exit instructions.
1525         (simulate): Use the correct index when setting fpr_state after
1526         doing a pending move.
1527
1528 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1529
1530         * interp.c: Fix byte-swapping code throughout to work on
1531         both little- and big-endian hosts.
1532
1533 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1534
1535         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1536         with gdb/config/i386/xm-windows.h.
1537
1538 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1539
1540         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1541         that messes up arithmetic shifts.
1542
1543 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1544
1545         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1546         SIGTRAP and SIGQUIT for _WIN32.
1547
1548 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1549
1550         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1551         force a 64 bit multiplication.
1552         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1553         destination register is 0, since that is the default mips16 nop
1554         instruction.
1555
1556 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1557
1558         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1559         (build_endian_shift): Don't check proc64.
1560         (build_instruction): Always set memval to uword64.  Cast op2 to
1561         uword64 when shifting it left in memory instructions.  Always use
1562         the same code for stores--don't special case proc64.
1563
1564         * gencode.c (build_mips16_operands): Fix base PC value for PC
1565         relative operands.
1566         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1567         jal instruction.
1568         * interp.c (simJALDELAYSLOT): Define.
1569         (JALDELAYSLOT): Define.
1570         (INDELAYSLOT, INJALDELAYSLOT): Define.
1571         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1572
1573 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1574
1575         * interp.c (sim_open): add flush_cache as a PMON routine
1576         (sim_monitor): handle flush_cache by ignoring it
1577
1578 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1579
1580         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1581         BigEndianMem.
1582         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1583         (BigEndianMem): Rename to ByteSwapMem and change sense.
1584         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1585         BigEndianMem references to !ByteSwapMem.
1586         (set_endianness): New function, with prototype.
1587         (sim_open): Call set_endianness.
1588         (sim_info): Use simBE instead of BigEndianMem.
1589         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1590         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1591         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1592         ifdefs, keeping the prototype declaration.
1593         (swap_word): Rewrite correctly.
1594         (ColdReset): Delete references to CONFIG.  Delete endianness related
1595         code; moved to set_endianness.
1596
1597 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1598
1599         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1600         * interp.c (CHECKHILO): Define away.
1601         (simSIGINT): New macro.
1602         (membank_size): Increase from 1MB to 2MB.
1603         (control_c): New function.
1604         (sim_resume): Rename parameter signal to signal_number.  Add local
1605         variable prev.  Call signal before and after simulate.
1606         (sim_stop_reason): Add simSIGINT support.
1607         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1608         functions always.
1609         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1610         if logfh is NULL.
1611         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1612         a call to sim_warning.
1613
1614 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1615
1616         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1617         16 bit instructions.
1618
1619 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1620
1621         Add support for mips16 (16 bit MIPS implementation):
1622         * gencode.c (inst_type): Add mips16 instruction encoding types.
1623         (GETDATASIZEINSN): Define.
1624         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1625         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1626         mtlo.
1627         (MIPS16_DECODE): New table, for mips16 instructions.
1628         (bitmap_val): New static function.
1629         (struct mips16_op): Define.
1630         (mips16_op_table): New table, for mips16 operands.
1631         (build_mips16_operands): New static function.
1632         (process_instructions): If PC is odd, decode a mips16
1633         instruction.  Break out instruction handling into new
1634         build_instruction function.
1635         (build_instruction): New static function, broken out of
1636         process_instructions.  Check modifiers rather than flags for SHIFT
1637         bit count and m[ft]{hi,lo} direction.
1638         (usage): Pass program name to fprintf.
1639         (main): Remove unused variable this_option_optind.  Change
1640         ``*loptarg++'' to ``loptarg++''.
1641         (my_strtoul): Parenthesize && within ||.
1642         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1643         (simulate): If PC is odd, fetch a 16 bit instruction, and
1644         increment PC by 2 rather than 4.
1645         * configure.in: Add case for mips16*-*-*.
1646         * configure: Rebuild.
1647
1648 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1649
1650         * interp.c: Allow -t to enable tracing in standalone simulator.
1651         Fix garbage output in trace file and error messages.
1652
1653 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1654
1655         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1656         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1657         * configure.in: Simplify using macros in ../common/aclocal.m4.
1658         * configure: Regenerated.
1659         * tconfig.in: New file.
1660
1661 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1662
1663         * interp.c: Fix bugs in 64-bit port.
1664         Use ansi function declarations for msvc compiler.
1665         Initialize and test file pointer in trace code.
1666         Prevent duplicate definition of LAST_EMED_REGNUM.
1667
1668 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1669
1670         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1671
1672 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1673
1674         * interp.c (SignalException): Check for explicit terminating
1675         breakpoint value.
1676         * gencode.c: Pass instruction value through SignalException()
1677         calls for Trap, Breakpoint and Syscall.
1678
1679 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1680
1681         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1682         only used on those hosts that provide it.
1683         * configure.in: Add sqrt() to list of functions to be checked for.
1684         * config.in: Re-generated.
1685         * configure: Re-generated.
1686
1687 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1688
1689         * gencode.c (process_instructions): Call build_endian_shift when
1690         expanding STORE RIGHT, to fix swr.
1691         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1692         clear the high bits.
1693         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1694         Fix float to int conversions to produce signed values.
1695
1696 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1697
1698         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1699         (process_instructions): Correct handling of nor instruction.
1700         Correct shift count for 32 bit shift instructions. Correct sign
1701         extension for arithmetic shifts to not shift the number of bits in
1702         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1703         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1704         Fix madd.
1705         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1706         It's OK to have a mult follow a mult.  What's not OK is to have a
1707         mult follow an mfhi.
1708         (Convert): Comment out incorrect rounding code.
1709
1710 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1711
1712         * interp.c (sim_monitor): Improved monitor printf
1713         simulation. Tidied up simulator warnings, and added "--log" option
1714         for directing warning message output.
1715         * gencode.c: Use sim_warning() rather than WARNING macro.
1716
1717 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1718
1719         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1720         getopt1.o, rather than on gencode.c.  Link objects together.
1721         Don't link against -liberty.
1722         (gencode.o, getopt.o, getopt1.o): New targets.
1723         * gencode.c: Include <ctype.h> and "ansidecl.h".
1724         (AND): Undefine after including "ansidecl.h".
1725         (ULONG_MAX): Define if not defined.
1726         (OP_*): Don't define macros; now defined in opcode/mips.h.
1727         (main): Call my_strtoul rather than strtoul.
1728         (my_strtoul): New static function.
1729
1730 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1731
1732         * gencode.c (process_instructions):  Generate word64 and uword64
1733         instead of `long long' and `unsigned long long' data types.
1734         * interp.c:  #include sysdep.h to get signals, and define default
1735         for SIGBUS.
1736         * (Convert):  Work around for Visual-C++ compiler bug with type
1737         conversion.
1738         * support.h:  Make things compile under Visual-C++ by using
1739         __int64 instead of `long long'.  Change many refs to long long
1740         into word64/uword64 typedefs.
1741
1742 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1743
1744         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1745         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1746         (docdir): Removed.
1747         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1748         (AC_PROG_INSTALL): Added.
1749         (AC_PROG_CC): Moved to before configure.host call.
1750         * configure: Rebuilt.
1751
1752 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1753
1754         * configure.in: Define @SIMCONF@ depending on mips target.
1755         * configure: Rebuild.
1756         * Makefile.in (run): Add @SIMCONF@ to control simulator
1757         construction.
1758         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1759         * interp.c: Remove some debugging, provide more detailed error
1760         messages, update memory accesses to use LOADDRMASK.
1761
1762 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1763
1764         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1765         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1766         stamp-h.
1767         * configure: Rebuild.
1768         * config.in: New file, generated by autoheader.
1769         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1770         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1771         HAVE_ANINT and HAVE_AINT, as appropriate.
1772         * Makefile.in (run): Use @LIBS@ rather than -lm.
1773         (interp.o): Depend upon config.h.
1774         (Makefile): Just rebuild Makefile.
1775         (clean): Remove stamp-h.
1776         (mostlyclean): Make the same as clean, not as distclean.
1777         (config.h, stamp-h): New targets.
1778
1779 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1780
1781         * interp.c (ColdReset): Fix boolean test. Make all simulator
1782         globals static.
1783
1784 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1785
1786         * interp.c (xfer_direct_word, xfer_direct_long,
1787         swap_direct_word, swap_direct_long, xfer_big_word,
1788         xfer_big_long, xfer_little_word, xfer_little_long,
1789         swap_word,swap_long): Added.
1790         * interp.c (ColdReset): Provide function indirection to
1791         host<->simulated_target transfer routines.
1792         * interp.c (sim_store_register, sim_fetch_register): Updated to
1793         make use of indirected transfer routines.
1794
1795 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1796
1797         * gencode.c (process_instructions): Ensure FP ABS instruction
1798         recognised.
1799         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1800         system call support.
1801
1802 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1803
1804         * interp.c (sim_do_command): Complain if callback structure not
1805         initialised.
1806
1807 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1808
1809         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1810         support for Sun hosts.
1811         * Makefile.in (gencode): Ensure the host compiler and libraries
1812         used for cross-hosted build.
1813
1814 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1815
1816         * interp.c, gencode.c: Some more (TODO) tidying.
1817
1818 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1819
1820         * gencode.c, interp.c: Replaced explicit long long references with
1821         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1822         * support.h (SET64LO, SET64HI): Macros added.
1823
1824 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1825
1826         * configure: Regenerate with autoconf 2.7.
1827
1828 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1829
1830         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1831         * support.h: Remove superfluous "1" from #if.
1832         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1833
1834 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1835
1836         * interp.c (StoreFPR): Control UndefinedResult() call on
1837         WARN_RESULT manifest.
1838
1839 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1840
1841         * gencode.c: Tidied instruction decoding, and added FP instruction
1842         support.
1843
1844         * interp.c: Added dineroIII, and BSD profiling support. Also
1845         run-time FP handling.
1846
1847 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1848
1849         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1850         gencode.c, interp.c, support.h: created.