sim/mips/ChangeLog

   1 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
   2
   3         * configure.ac: Change license of multi-run.c to GPL version 3.
   4         * configure: Regenerate.
   5
   6 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
   7
   8         * configure.ac, configure: Revert last patch.
   9
  10 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
  11
  12         * configure.ac (sim_mipsisa3264_configs): New variable.
  13         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
  14         every configuration support all four targets, using the triplet to
  15         determine the default.
  16         * configure: Regenerate.
  17
  18 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
  19
  20         * Makefile.in (m16run.o): New rule.
  21
  22 2007-05-15  Thiemo Seufer  <ths@mips.com>
  23
  24         * mips3264r2.igen (DSHD): Fix compile warning.
  25
  26 2007-05-14  Thiemo Seufer  <ths@mips.com>
  27
  28         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
  29         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
  30         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
  31         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
  32         for mips32r2.
  33
  34 2007-03-01  Thiemo Seufer  <ths@mips.com>
  35
  36         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
  37         and mips64.
  38
  39 2007-02-20  Thiemo Seufer  <ths@mips.com>
  40
  41         * dsp.igen: Update copyright notice.
  42         * dsp2.igen: Fix copyright notice.
  43
  44 2007-02-20  Thiemo Seufer  <ths@mips.com>
  45             Chao-Ying Fu  <fu@mips.com>
  46
  47         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
  48         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
  49         Add dsp2 to sim_igen_machine.
  50         * configure: Regenerate.
  51         * dsp.igen (do_ph_op): Add MUL support when op = 2.
  52         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
  53         (mulq_rs.ph): Use do_ph_mulq.
  54         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
  55         * mips.igen: Add dsp2 model and include dsp2.igen.
  56         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
  57         for *mips32r2, *mips64r2, *dsp.
  58         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
  59         for *mips32r2, *mips64r2, *dsp2.
  60         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
  61
  62 2007-02-19  Thiemo Seufer  <ths@mips.com>
  63             Nigel Stephens  <nigel@mips.com>
  64
  65         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
  66         jumps with hazard barrier.
  67
  68 2007-02-19  Thiemo Seufer  <ths@mips.com>
  69             Nigel Stephens  <nigel@mips.com>
  70
  71         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
  72         after each call to sim_io_write.
  73
  74 2007-02-19  Thiemo Seufer  <ths@mips.com>
  75             Nigel Stephens  <nigel@mips.com>
  76
  77         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
  78         supported by this simulator.
  79         (decode_coproc): Recognise additional CP0 Config registers
  80         correctly.
  81
  82 2007-02-19  Thiemo Seufer  <ths@mips.com>
  83             Nigel Stephens  <nigel@mips.com>
  84             David Ung  <davidu@mips.com>
  85
  86         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
  87         uninterpreted formats. If fmt is one of the uninterpreted types
  88         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
  89         fmt_word, and fmt_uninterpreted_64 like fmt_long.
  90         (store_fpr): When writing an invalid odd register, set the
  91         matching even register to fmt_unknown, not the following register.
  92         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
  93         the the memory window at offset 0 set by --memory-size command
  94         line option.
  95         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
  96         point register.
  97         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
  98         register.
  99         (sim_monitor): When returning the memory size to the MIPS
 100         application, use the value in STATE_MEM_SIZE, not an arbitrary
 101         hardcoded value.
 102         (cop_lw): Don' mess around with FPR_STATE, just pass
 103         fmt_uninterpreted_32 to StoreFPR.
 104         (cop_sw): Similarly.
 105         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 106         (cop_sd): Similarly.
 107         * mips.igen (not_word_value): Single version for mips32, mips64
 108         and mips16.
 109
 110 2007-02-19  Thiemo Seufer <ths@mips.com>
 111             Nigel Stephens  <nigel@mips.com>
 112
 113         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 114         MBytes.
 115
 116 2007-02-17  Thiemo Seufer  <ths@mips.com>
 117
 118         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 119         configuration.
 120         * configure: Regenerate.
 121
 122 2007-02-17  Thiemo Seufer  <ths@mips.com>
 123
 124         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 125         Add mdmx to sim_igen_machine.
 126         (mipsisa64*-*-*): Likewise. Remove dsp.
 127         (mipsisa32*-*-*): Remove dsp.
 128         * configure: Regenerate.
 129
 130 2007-02-13  Thiemo Seufer  <ths@mips.com>
 131
 132         * configure.ac: Add mips*-sde-elf* target.
 133         * configure: Regenerate.
 134
 135 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 136
 137         * acconfig.h: Remove.
 138         * config.in, configure: Regenerate.
 139
 140 2006-11-07  Thiemo Seufer  <ths@mips.com>
 141
 142         * dsp.igen (do_w_op): Fix compiler warning.
 143
 144 2006-08-29  Thiemo Seufer  <ths@mips.com>
 145             David Ung  <davidu@mips.com>
 146
 147         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 148         sim_igen_machine.
 149         * configure: Regenerate.
 150         * mips.igen (model): Add smartmips.
 151         (MADDU): Increment ACX if carry.
 152         (do_mult): Clear ACX.
 153         (ROR,RORV): Add smartmips.
 154         (include): Include smartmips.igen.
 155         * sim-main.h (ACX): Set to REGISTERS[89].
 156         * smartmips.igen: New file.
 157
 158 2006-08-29  Thiemo Seufer  <ths@mips.com>
 159             David Ung  <davidu@mips.com>
 160
 161         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 162         mips3264r2.igen. Add missing dependency rules.
 163         * m16e.igen: Support for mips16e save/restore instructions.
 164
 165 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 166
 167         * configure: Regenerated.
 168
 169 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 170
 171         * configure: Regenerated.
 172
 173 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 174
 175         * configure: Regenerated.
 176
 177 2006-05-15 Chao-ying Fu  <fu@mips.com>
 178
 179         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 180
 181 2006-04-18  Nick Clifton  <nickc@redhat.com>
 182
 183         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 184         statement.
 185
 186 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 187
 188         * configure: Regenerate.
 189
 190 2005-12-14  Chao-ying Fu  <fu@mips.com>
 191
 192         * Makefile.in (SIM_OBJS): Add dsp.o.
 193         (dsp.o): New dependency.
 194         (IGEN_INCLUDE): Add dsp.igen.
 195         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 196         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 197         * configure: Regenerate.
 198         * mips.igen: Add dsp model and include dsp.igen.
 199         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 200         because these instructions are extended in DSP ASE.
 201         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 202         adding 6 DSP accumulator registers and 1 DSP control register.
 203         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 204         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 205         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 206         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 207         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 208         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 209         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 210         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 211         DSPCR_CCOND_SMASK): New define.
 212         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 213         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 214
 215 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 216
 217         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 218
 219 2005-06-16  David Ung  <davidu@mips.com>
 220             Nigel Stephens  <nigel@mips.com>
 221
 222         * mips.igen: New mips16e model and include m16e.igen.
 223         (check_u64): Add mips16e tag.
 224         * m16e.igen: New file for MIPS16e instructions.
 225         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 226         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 227         models.
 228         * configure: Regenerate.
 229
 230 2005-05-26  David Ung  <davidu@mips.com>
 231
 232         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 233         tags to all instructions which are applicable to the new ISAs.
 234         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 235         vr.igen.
 236         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 237         instructions.
 238         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 239         to mips.igen.
 240         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 241         * configure: Regenerate.
 242
 243 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 244
 245         * configure: Regenerate.
 246
 247 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 248
 249         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 250         explicit call to AC_CONFIG_HEADER.
 251         * configure: Regenerate.
 252
 253 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 254
 255         * configure.ac: Update to use ../common/common.m4.
 256         * configure: Re-generate.
 257
 258 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 259
 260         * configure: Regenerated to track ../common/aclocal.m4 changes.
 261
 262 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 263
 264         * configure.ac: Rename configure.in, require autoconf 2.59.
 265         * configure: Re-generate.
 266
 267 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 268
 269         * configure: Regenerate for ../common/aclocal.m4 update.
 270
 271 2004-09-24  Monika Chaddha  <monika@acmet.com>
 272
 273         Committed by Andrew Cagney.
 274         * m16.igen (CMP, CMPI): Fix assembler.
 275
 276 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 277
 278         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 279         * configure: Regenerate.
 280
 281 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 282
 283         * configure.in (sim_m16_machine): Include mipsIII.
 284         * configure: Regenerate.
 285
 286 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 287
 288         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 289         from COP0_BADVADDR.
 290         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 291
 292 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 293
 294         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 295
 296 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 297
 298         * mips.igen (check_fmt): Remove.
 299         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 300         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 301         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 302         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 303         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 304         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 305         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 306         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 307         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 308         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 309
 310 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 311
 312         * sb1.igen (check_sbx): New function.
 313         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 314
 315 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 316             Richard Sandiford  <rsandifo@redhat.com>
 317
 318         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 319         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 320         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 321         separate implementations for mipsIV and mipsV.  Use new macros to
 322         determine whether the restrictions apply.
 323
 324 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 325
 326         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 327         (check_mult_hilo): Improve comments.
 328         (check_div_hilo): Likewise.  Also, fork off a new version
 329         to handle mips32/mips64 (since there are no hazards to check
 330         in MIPS32/MIPS64).
 331
 332 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 333
 334         * mips.igen (do_dmultx): Fix check for negative operands.
 335
 336 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 337
 338         * Makefile.in (SHELL): Make sure this is defined.
 339         (various): Use $(SHELL) whenever we invoke move-if-change.
 340
 341 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 342
 343         * cp1.c: Tweak attribution slightly.
 344         * cp1.h: Likewise.
 345         * mdmx.c: Likewise.
 346         * mdmx.igen: Likewise.
 347         * mips3d.igen: Likewise.
 348         * sb1.igen: Likewise.
 349
 350 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 351
 352         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 353         unsigned operands.
 354
 355 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 356
 357         * interp.c (sim_open): Rename _bfd to bfd.
 358         (sim_create_inferior): Ditto.
 359
 360 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 361
 362         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 363
 364 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 365
 366         * mips.igen (EI, DI): Remove.
 367
 368 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 369
 370         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 371
 372 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 373             Andrew Cagney  <ac131313@redhat.com>
 374             Gavin Romig-Koch  <gavin@redhat.com>
 375             Graydon Hoare  <graydon@redhat.com>
 376             Aldy Hernandez  <aldyh@redhat.com>
 377             Dave Brolley  <brolley@redhat.com>
 378             Chris Demetriou  <cgd@broadcom.com>
 379
 380         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 381         (sim_mach_default): New variable.
 382         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 383         Add a new simulator generator, MULTI.
 384         * configure: Regenerate.
 385         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 386         (multi-run.o): New dependency.
 387         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 388         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 389         (tmp-multi): Combine them.
 390         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 391         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 392         (distclean-extra): New rule.
 393         * sim-main.h: Include bfd.h.
 394         (MIPS_MACH): New macro.
 395         * mips.igen (vr4120, vr5400, vr5500): New models.
 396         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 397         * vr.igen: Replace with new version.
 398
 399 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 400
 401         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 402         * configure: Regenerate.
 403
 404 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 405
 406         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 407         * mips.igen: Remove all invocations of check_branch_bug and
 408         mark_branch_bug.
 409
 410 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 411
 412         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 413
 414 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 415
 416         * mips.igen (do_load_double, do_store_double): New functions.
 417         (LDC1, SDC1): Rename to...
 418         (LDC1b, SDC1b): respectively.
 419         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 420
 421 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 422
 423         * cp1.c (fp_recip2): Modify initialization expression so that
 424         GCC will recognize it as constant.
 425
 426 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 427
 428         * mdmx.c (SD_): Delete.
 429         (Unpredictable): Re-define, for now, to directly invoke
 430         unpredictable_action().
 431         (mdmx_acc_op): Fix error in .ob immediate handling.
 432
 433 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 434
 435         * interp.c (sim_firmware_command): Initialize `address'.
 436
 437 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 438
 439         * configure: Regenerated to track ../common/aclocal.m4 changes.
 440
 441 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 442             Ed Satterthwaite  <ehs@broadcom.com>
 443
 444         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 445         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 446         * mips.igen: Include mips3d.igen.
 447         (mips3d): New model name for MIPS-3D ASE instructions.
 448         (CVT.W.fmt): Don't use this instruction for word (source) format
 449         instructions.
 450         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 451         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 452         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 453         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 454         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 455         (RSquareRoot1, RSquareRoot2): New macros.
 456         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 457         (fp_rsqrt2): New functions.
 458         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 459         * configure: Regenerate.
 460
 461 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 462             Ed Satterthwaite  <ehs@broadcom.com>
 463
 464         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 465         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 466         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 467         (convert): Note that this function is not used for paired-single
 468         format conversions.
 469         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 470         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 471         (check_fmt_p): Enable paired-single support.
 472         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 473         (PUU.PS): New instructions.
 474         (CVT.S.fmt): Don't use this instruction for paired-single format
 475         destinations.
 476         * sim-main.h (FP_formats): New value 'fmt_ps.'
 477         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 478         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 479
 480 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 481
 482         * mips.igen: Fix formatting of function calls in
 483         many FP operations.
 484
 485 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 486
 487         * mips.igen (MOVN, MOVZ): Trace result.
 488         (TNEI): Print "tnei" as the opcode name in traces.
 489         (CEIL.W): Add disassembly string for traces.
 490         (RSQRT.fmt): Make location of disassembly string consistent
 491         with other instructions.
 492
 493 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 494
 495         * mips.igen (X): Delete unused function.
 496
 497 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 498
 499         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 500
 501 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 502             Ed Satterthwaite  <ehs@broadcom.com>
 503
 504         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 505         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 506         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 507         (fp_nmsub): New prototypes.
 508         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 509         (NegMultiplySub): New defines.
 510         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 511         (MADD.D, MADD.S): Replace with...
 512         (MADD.fmt): New instruction.
 513         (MSUB.D, MSUB.S): Replace with...
 514         (MSUB.fmt): New instruction.
 515         (NMADD.D, NMADD.S): Replace with...
 516         (NMADD.fmt): New instruction.
 517         (NMSUB.D, MSUB.S): Replace with...
 518         (NMSUB.fmt): New instruction.
 519
 520 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 521             Ed Satterthwaite  <ehs@broadcom.com>
 522
 523         * cp1.c: Fix more comment spelling and formatting.
 524         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 525         (denorm_mode): New function.
 526         (fpu_unary, fpu_binary): Round results after operation, collect
 527         status from rounding operations, and update the FCSR.
 528         (convert): Collect status from integer conversions and rounding
 529         operations, and update the FCSR.  Adjust NaN values that result
 530         from conversions.  Convert to use sim_io_eprintf rather than
 531         fprintf, and remove some debugging code.
 532         * cp1.h (fenr_FS): New define.
 533
 534 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 535
 536         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 537         rounding mode to sim FP rounding mode flag conversion code into...
 538         (rounding_mode): New function.
 539
 540 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 541
 542         * cp1.c: Clean up formatting of a few comments.
 543         (value_fpr): Reformat switch statement.
 544
 545 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 546             Ed Satterthwaite  <ehs@broadcom.com>
 547
 548         * cp1.h: New file.
 549         * sim-main.h: Include cp1.h.
 550         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 551         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 552         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 553         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 554         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 555         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 556         * cp1.c: Don't include sim-fpu.h; already included by
 557         sim-main.h.  Clean up formatting of some comments.
 558         (NaN, Equal, Less): Remove.
 559         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 560         (fp_cmp): New functions.
 561         * mips.igen (do_c_cond_fmt): Remove.
 562         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 563         Compare.  Add result tracing.
 564         (CxC1): Remove, replace with...
 565         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 566         (DMxC1): Remove, replace with...
 567         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 568         (MxC1): Remove, replace with...
 569         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 570
 571 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 572
 573         * sim-main.h (FGRIDX): Remove, replace all uses with...
 574         (FGR_BASE): New macro.
 575         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 576         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 577         (NR_FGR, FGR): Likewise.
 578         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 579         * mips.igen: Likewise.
 580
 581 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 582
 583         * cp1.c: Add an FSF Copyright notice to this file.
 584
 585 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 586             Ed Satterthwaite  <ehs@broadcom.com>
 587
 588         * cp1.c (Infinity): Remove.
 589         * sim-main.h (Infinity): Likewise.
 590
 591         * cp1.c (fp_unary, fp_binary): New functions.
 592         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 593         (fp_sqrt): New functions, implemented in terms of the above.
 594         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 595         (Recip, SquareRoot): Remove (replaced by functions above).
 596         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 597         (fp_recip, fp_sqrt): New prototypes.
 598         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 599         (Recip, SquareRoot): Replace prototypes with #defines which
 600         invoke the functions above.
 601
 602 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 603
 604         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 605         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 606         file, remove PARAMS from prototypes.
 607         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 608         simulator state arguments.
 609         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 610         pass simulator state arguments.
 611         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 612         (store_fpr, convert): Remove 'sd' argument.
 613         (value_fpr): Likewise.  Convert to use 'SD' instead.
 614
 615 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 616
 617         * cp1.c (Min, Max): Remove #if 0'd functions.
 618         * sim-main.h (Min, Max): Remove.
 619
 620 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 621
 622         * cp1.c: fix formatting of switch case and default labels.
 623         * interp.c: Likewise.
 624         * sim-main.c: Likewise.
 625
 626 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 627
 628         * cp1.c: Clean up comments which describe FP formats.
 629          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 630
 631 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 632             Ed Satterthwaite  <ehs@broadcom.com>
 633
 634         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 635         Broadcom SiByte SB-1 processor configurations.
 636         * configure: Regenerate.
 637         * sb1.igen: New file.
 638         * mips.igen: Include sb1.igen.
 639         (sb1): New model.
 640         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 641         * mdmx.igen: Add "sb1" model to all appropriate functions and
 642         instructions.
 643         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 644         (ob_func, ob_acc): Reference the above.
 645         (qh_acc): Adjust to keep the same size as ob_acc.
 646         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 647         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 648
 649 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 650
 651         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 652
 653 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 654             Ed Satterthwaite  <ehs@broadcom.com>
 655
 656         * mips.igen (mdmx): New (pseudo-)model.
 657         * mdmx.c, mdmx.igen: New files.
 658         * Makefile.in (SIM_OBJS): Add mdmx.o.
 659         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 660         New typedefs.
 661         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 662         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 663         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 664         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 665         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 666         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 667         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 668         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 669         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 670         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 671         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 672         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 673         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 674         (qh_fmtsel): New macros.
 675         (_sim_cpu): New member "acc".
 676         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 677         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 678
 679 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 680
 681         * interp.c: Use 'deprecated' rather than 'depreciated.'
 682         * sim-main.h: Likewise.
 683
 684 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 685
 686         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 687         which wouldn't compile anyway.
 688         * sim-main.h (unpredictable_action): New function prototype.
 689         (Unpredictable): Define to call igen function unpredictable().
 690         (NotWordValue): New macro to call igen function not_word_value().
 691         (UndefinedResult): Remove.
 692         * interp.c (undefined_result): Remove.
 693         (unpredictable_action): New function.
 694         * mips.igen (not_word_value, unpredictable): New functions.
 695         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 696         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 697         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 698         NotWordValue() to check for unpredictable inputs, then
 699         Unpredictable() to handle them.
 700
 701 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 702
 703         * mips.igen: Fix formatting of calls to Unpredictable().
 704
 705 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 706
 707         * interp.c (sim_open): Revert previous change.
 708
 709 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 710
 711         * interp.c (sim_open): Disable chunk of code that wrote code in
 712         vector table entries.
 713
 714 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 715
 716         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 717         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 718         unused definitions.
 719
 720 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 721
 722         * cp1.c: Fix many formatting issues.
 723
 724 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 725
 726         * cp1.c (fpu_format_name): New function to replace...
 727         (DOFMT): This.  Delete, and update all callers.
 728         (fpu_rounding_mode_name): New function to replace...
 729         (RMMODE): This.  Delete, and update all callers.
 730
 731 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 732
 733         * interp.c: Move FPU support routines from here to...
 734         * cp1.c: Here.  New file.
 735         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 736         (cp1.o): New target.
 737
 738 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 739
 740         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 741         * mips.igen (mips32, mips64): New models, add to all instructions
 742         and functions as appropriate.
 743         (loadstore_ea, check_u64): New variant for model mips64.
 744         (check_fmt_p): New variant for models mipsV and mips64, remove
 745         mipsV model marking fro other variant.
 746         (SLL) Rename to...
 747         (SLLa) this.
 748         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 749         for mips32 and mips64.
 750         (DCLO, DCLZ): New instructions for mips64.
 751
 752 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 753
 754         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 755         immediate or code as a hex value with the "%#lx" format.
 756         (ANDI): Likewise, and fix printed instruction name.
 757
 758 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 759
 760         * sim-main.h (UndefinedResult, Unpredictable): New macros
 761         which currently do nothing.
 762
 763 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 764
 765         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 766         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 767         (status_CU3): New definitions.
 768
 769         * sim-main.h (ExceptionCause): Add new values for MIPS32
 770         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 771         for DebugBreakPoint and NMIReset to note their status in
 772         MIPS32 and MIPS64.
 773         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 774         (SignalExceptionCacheErr): New exception macros.
 775
 776 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 777
 778         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 779         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 780         is always enabled.
 781         (SignalExceptionCoProcessorUnusable): Take as argument the
 782         unusable coprocessor number.
 783
 784 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 785
 786         * mips.igen: Fix formatting of all SignalException calls.
 787
 788 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 789
 790         * sim-main.h (SIGNEXTEND): Remove.
 791
 792 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 793
 794         * mips.igen: Remove gencode comment from top of file, fix
 795         spelling in another comment.
 796
 797 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 798
 799         * mips.igen (check_fmt, check_fmt_p): New functions to check
 800         whether specific floating point formats are usable.
 801         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 802         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 803         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 804         Use the new functions.
 805         (do_c_cond_fmt): Remove format checks...
 806         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 807
 808 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 809
 810         * mips.igen: Fix formatting of check_fpu calls.
 811
 812 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 813
 814         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 815
 816 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 817
 818         * mips.igen: Remove whitespace at end of lines.
 819
 820 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 821
 822         * mips.igen (loadstore_ea): New function to do effective
 823         address calculations.
 824         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 825         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 826         CACHE): Use loadstore_ea to do effective address computations.
 827
 828 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 829
 830         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 831         * mips.igen (LL, CxC1, MxC1): Likewise.
 832
 833 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 834
 835         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 836         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 837         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 838         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 839         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 840         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 841         Don't split opcode fields by hand, use the opcode field values
 842         provided by igen.
 843
 844 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 845
 846         * mips.igen (do_divu): Fix spacing.
 847
 848         * mips.igen (do_dsllv): Move to be right before DSLLV,
 849         to match the rest of the do_<shift> functions.
 850
 851 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 852
 853         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 854         DSRL32, do_dsrlv): Trace inputs and results.
 855
 856 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 857
 858         * mips.igen (CACHE): Provide instruction-printing string.
 859
 860         * interp.c (signal_exception): Comment tokens after #endif.
 861
 862 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 863
 864         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 865         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 866         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 867         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 868         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 869         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 870         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 871         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 872
 873 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 874
 875         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 876         instruction-printing string.
 877         (LWU): Use '64' as the filter flag.
 878
 879 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 880
 881         * mips.igen (SDXC1): Fix instruction-printing string.
 882
 883 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 884
 885         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 886         filter flags "32,f".
 887
 888 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 889
 890         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 891         as the filter flag.
 892
 893 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 894
 895         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 896         add a comma) so that it more closely match the MIPS ISA
 897         documentation opcode partitioning.
 898         (PREF): Put useful names on opcode fields, and include
 899         instruction-printing string.
 900
 901 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 902
 903         * mips.igen (check_u64): New function which in the future will
 904         check whether 64-bit instructions are usable and signal an
 905         exception if not.  Currently a no-op.
 906         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 907         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 908         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 909         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 910
 911         * mips.igen (check_fpu): New function which in the future will
 912         check whether FPU instructions are usable and signal an exception
 913         if not.  Currently a no-op.
 914         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 915         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 916         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 917         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 918         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 919         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 920         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 921         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 922
 923 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 924
 925         * mips.igen (do_load_left, do_load_right): Move to be immediately
 926         following do_load.
 927         (do_store_left, do_store_right): Move to be immediately following
 928         do_store.
 929
 930 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 931
 932         * mips.igen (mipsV): New model name.  Also, add it to
 933         all instructions and functions where it is appropriate.
 934
 935 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 936
 937         * mips.igen: For all functions and instructions, list model
 938         names that support that instruction one per line.
 939
 940 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 941
 942         * mips.igen: Add some additional comments about supported
 943         models, and about which instructions go where.
 944         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 945         order as is used in the rest of the file.
 946
 947 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 948
 949         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 950         indicating that ALU32_END or ALU64_END are there to check
 951         for overflow.
 952         (DADD): Likewise, but also remove previous comment about
 953         overflow checking.
 954
 955 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 956
 957         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 958         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 959         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 960         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 961         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 962         fields (i.e., add and move commas) so that they more closely
 963         match the MIPS ISA documentation opcode partitioning.
 964
 965 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 966
 967         * mips.igen (ADDI): Print immediate value.
 968         (BREAK): Print code.
 969         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 970         (SLL): Print "nop" specially, and don't run the code
 971         that does the shift for the "nop" case.
 972
 973 2001-11-17  Fred Fish  <fnf@redhat.com>
 974
 975         * sim-main.h (float_operation): Move enum declaration outside
 976         of _sim_cpu struct declaration.
 977
 978 2001-04-12  Jim Blandy  <jimb@redhat.com>
 979
 980         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 981         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 982         set of the FCSR.
 983         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 984         PENDING_FILL, and you can get the intended effect gracefully by
 985         calling PENDING_SCHED directly.
 986
 987 2001-02-23  Ben Elliston  <bje@redhat.com>
 988
 989         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 990         already defined elsewhere.
 991
 992 2001-02-19  Ben Elliston  <bje@redhat.com>
 993
 994         * sim-main.h (sim_monitor): Return an int.
 995         * interp.c (sim_monitor): Add return values.
 996         (signal_exception): Handle error conditions from sim_monitor.
 997
 998 2001-02-08  Ben Elliston  <bje@redhat.com>
 999
1000         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1001         (store_memory): Likewise, pass cia to sim_core_write*.
1002
1003 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1004
1005         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1006         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1007
1008 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1009
1010         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1011         * Makefile.in: Don't delete *.igen when cleaning directory.
1012
1013 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1014
1015         * m16.igen (break): Call SignalException not sim_engine_halt.
1016
1017 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1018
1019         From Jason Eckhardt:
1020         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1021
1022 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1023
1024         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1025
1026 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1027
1028         * mips.igen (do_dmultx): Fix typo.
1029
1030 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1031
1032         * configure: Regenerated to track ../common/aclocal.m4 changes.
1033
1034 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1035
1036         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1037
1038 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1039
1040         * sim-main.h (GPR_CLEAR): Define macro.
1041
1042 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1043
1044         * interp.c (decode_coproc): Output long using %lx and not %s.
1045
1046 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1047
1048         * interp.c (sim_open): Sort & extend dummy memory regions for
1049         --board=jmr3904 for eCos.
1050
1051 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1052
1053         * configure: Regenerated.
1054
1055 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1056
1057         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1058         calls, conditional on the simulator being in verbose mode.
1059
1060 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1061
1062         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1063         cache don't get ReservedInstruction traps.
1064
1065 1999-11-29  Mark Salter  <msalter@cygnus.com>
1066
1067         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1068         to clear status bits in sdisr register. This is how the hardware works.
1069
1070         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1071         being used by cygmon.
1072
1073 1999-11-11  Andrew Haley  <aph@cygnus.com>
1074
1075         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1076         instructions.
1077
1078 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1079
1080         * mips.igen (MULT): Correct previous mis-applied patch.
1081
1082 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1083
1084         * mips.igen (delayslot32): Handle sequence like
1085         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1086         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1087         (MULT): Actually pass the third register...
1088
1089 1999-09-03  Mark Salter  <msalter@cygnus.com>
1090
1091         * interp.c (sim_open): Added more memory aliases for additional
1092         hardware being touched by cygmon on jmr3904 board.
1093
1094 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1095
1096         * configure: Regenerated to track ../common/aclocal.m4 changes.
1097
1098 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1099
1100         * interp.c (sim_store_register): Handle case where client - GDB -
1101         specifies that a 4 byte register is 8 bytes in size.
1102         (sim_fetch_register): Ditto.
1103
1104 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1105
1106         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1107         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1108         (idt_monitor_base): Base address for IDT monitor traps.
1109         (pmon_monitor_base): Ditto for PMON.
1110         (lsipmon_monitor_base): Ditto for LSI PMON.
1111         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1112         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1113         (sim_firmware_command): New function.
1114         (mips_option_handler): Call it for OPTION_FIRMWARE.
1115         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1116         option was given, add no monitor by default.  Add BREAK hooks only if
1117         monitors are also there.
1118
1119 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1120
1121         * interp.c (sim_monitor): Flush output before reading input.
1122
1123 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1124
1125         * tconfig.in (SIM_HANDLES_LMA): Always define.
1126
1127 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1128
1129         From Mark Salter <msalter@cygnus.com>:
1130         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1131         (sim_open): Add setup for BSP board.
1132
1133 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1134
1135         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1136         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1137         them as unimplemented.
1138
1139 1999-05-08  Felix Lee  <flee@cygnus.com>
1140
1141         * configure: Regenerated to track ../common/aclocal.m4 changes.
1142
1143 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1144
1145         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1146
1147 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1148
1149         * configure.in: Any mips64vr5*-*-* target should have
1150         -DTARGET_ENABLE_FR=1.
1151         (default_endian): Any mips64vr*el-*-* target should default to
1152         LITTLE_ENDIAN.
1153         * configure: Re-generate.
1154
1155 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1156
1157         * mips.igen (ldl): Extend from _16_, not 32.
1158
1159 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1160
1161         * interp.c (sim_store_register): Force registers written to by GDB
1162         into an un-interpreted state.
1163
1164 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1165
1166         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1167         CPU, start periodic background I/O polls.
1168         (tx3904sio_poll): New function: periodic I/O poller.
1169
1170 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1171
1172         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1173
1174 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1175
1176         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1177         case statement.
1178
1179 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1180
1181         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1182         (load_word): Call SIM_CORE_SIGNAL hook on error.
1183         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1184         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1185         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1186         * sim-main.h (COP0_BADVADDR): Define.
1187         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1188         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1189         (_sim_cpu): Add exc_* fields to store register value snapshots.
1190         * mips.igen (*): Replace memory-related SignalException* calls
1191         with references to SIM_CORE_SIGNAL hook.
1192
1193         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1194         fix.
1195         * sim-main.c (*): Minor warning cleanups.
1196
1197 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1198
1199         * m16.igen (DADDIU5): Correct type-o.
1200
1201 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1202
1203         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1204         variables.
1205
1206 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1207
1208         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1209         to include path.
1210         (interp.o): Add dependency on itable.h
1211         (oengine.c, gencode): Delete remaining references.
1212         (BUILT_SRC_FROM_GEN): Clean up.
1213
1214 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1215
1216         * vr4run.c: New.
1217         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1218         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1219         tmp-run-hack) : New.
1220         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1221         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1222         Drop the "64" qualifier to get the HACK generator working.
1223         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1224         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1225         qualifier to get the hack generator working.
1226         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1227         (DSLL): Use do_dsll.
1228         (DSLLV): Use do_dsllv.
1229         (DSRA): Use do_dsra.
1230         (DSRL): Use do_dsrl.
1231         (DSRLV): Use do_dsrlv.
1232         (BC1): Move *vr4100 to get the HACK generator working.
1233         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1234         get the HACK generator working.
1235         (MACC) Rename to get the HACK generator working.
1236         (DMACC,MACCS,DMACCS): Add the 64.
1237
1238 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1239
1240         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1241         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1242
1243 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1244
1245     * mips/interp.c (DEBUG): Cleanups.
1246
1247 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1248
1249         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1250         (tx3904sio_tickle): fflush after a stdout character output.
1251
1252 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1253
1254         * interp.c (sim_close): Uninstall modules.
1255
1256 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1257
1258         * sim-main.h, interp.c (sim_monitor): Change to global
1259         function.
1260
1261 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1262
1263         * configure.in (vr4100): Only include vr4100 instructions in
1264         simulator.
1265         * configure: Re-generate.
1266         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1267
1268 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1269
1270         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1271         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1272         true alternative.
1273
1274         * configure.in (sim_default_gen, sim_use_gen): Replace with
1275         sim_gen.
1276         (--enable-sim-igen): Delete config option. Always using IGEN.
1277         * configure: Re-generate.
1278
1279         * Makefile.in (gencode): Kill, kill, kill.
1280         * gencode.c: Ditto.
1281
1282 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1283
1284         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1285         bit mips16 igen simulator.
1286         * configure: Re-generate.
1287
1288         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1289         as part of vr4100 ISA.
1290         * vr.igen: Mark all instructions as 64 bit only.
1291
1292 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1293
1294         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1295         Pacify GCC.
1296
1297 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1298
1299         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1300         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1301         * configure: Re-generate.
1302
1303         * m16.igen (BREAK): Define breakpoint instruction.
1304         (JALX32): Mark instruction as mips16 and not r3900.
1305         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1306
1307         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1308
1309 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1310
1311         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1312         insn as a debug breakpoint.
1313
1314         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1315         pending.slot_size.
1316         (PENDING_SCHED): Clean up trace statement.
1317         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1318         (PENDING_FILL): Delay write by only one cycle.
1319         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1320
1321         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1322         of pending writes.
1323         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1324         32 & 64.
1325         (pending_tick): Move incrementing of index to FOR statement.
1326         (pending_tick): Only update PENDING_OUT after a write has occured.
1327
1328         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1329         build simulator.
1330         * configure: Re-generate.
1331
1332         * interp.c (sim_engine_run OLD): Delete explicit call to
1333         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1334
1335 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1336
1337         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1338         interrupt level number to match changed SignalExceptionInterrupt
1339         macro.
1340
1341 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1342
1343         * interp.c: #include "itable.h" if WITH_IGEN.
1344         (get_insn_name): New function.
1345         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1346         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1347
1348 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1349
1350         * configure: Rebuilt to inhale new common/aclocal.m4.
1351
1352 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1353
1354         * dv-tx3904sio.c: Include sim-assert.h.
1355
1356 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1357
1358         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1359         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1360         Reorganize target-specific sim-hardware checks.
1361         * configure: rebuilt.
1362         * interp.c (sim_open): For tx39 target boards, set
1363         OPERATING_ENVIRONMENT, add tx3904sio devices.
1364         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1365         ROM executables.  Install dv-sockser into sim-modules list.
1366
1367         * dv-tx3904irc.c: Compiler warning clean-up.
1368         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1369         frequent hw-trace messages.
1370
1371 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1372
1373         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1374
1375 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1376
1377         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1378
1379         * vr.igen: New file.
1380         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1381         * mips.igen: Define vr4100 model. Include vr.igen.
1382 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1383
1384         * mips.igen (check_mf_hilo): Correct check.
1385
1386 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1387
1388         * sim-main.h (interrupt_event): Add prototype.
1389
1390         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1391         register_ptr, register_value.
1392         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1393
1394         * sim-main.h (tracefh): Make extern.
1395
1396 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1397
1398         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1399         Reduce unnecessarily high timer event frequency.
1400         * dv-tx3904cpu.c: Ditto for interrupt event.
1401
1402 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1403
1404         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1405         to allay warnings.
1406         (interrupt_event): Made non-static.
1407
1408         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1409         interchange of configuration values for external vs. internal
1410         clock dividers.
1411
1412 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1413
1414         * mips.igen (BREAK): Moved code to here for
1415         simulator-reserved break instructions.
1416         * gencode.c (build_instruction): Ditto.
1417         * interp.c (signal_exception): Code moved from here.  Non-
1418         reserved instructions now use exception vector, rather
1419         than halting sim.
1420         * sim-main.h: Moved magic constants to here.
1421
1422 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1423
1424         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1425         register upon non-zero interrupt event level, clear upon zero
1426         event value.
1427         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1428         by passing zero event value.
1429         (*_io_{read,write}_buffer): Endianness fixes.
1430         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1431         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1432
1433         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1434         serial I/O and timer module at base address 0xFFFF0000.
1435
1436 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1437
1438         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1439         and BigEndianCPU.
1440
1441 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1442
1443         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1444         parts.
1445         * configure: Update.
1446
1447 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1448
1449         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1450         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1451         * configure.in: Include tx3904tmr in hw_device list.
1452         * configure: Rebuilt.
1453         * interp.c (sim_open): Instantiate three timer instances.
1454         Fix address typo of tx3904irc instance.
1455
1456 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1457
1458         * interp.c (signal_exception): SystemCall exception now uses
1459         the exception vector.
1460
1461 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1462
1463         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1464         to allay warnings.
1465
1466 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1467
1468         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1469
1470 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1471
1472         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1473
1474         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1475         sim-main.h. Declare a struct hw_descriptor instead of struct
1476         hw_device_descriptor.
1477
1478 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1479
1480         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1481         right bits and then re-align left hand bytes to correct byte
1482         lanes.  Fix incorrect computation in do_store_left when loading
1483         bytes from second word.
1484
1485 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1486
1487         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1488         * interp.c (sim_open): Only create a device tree when HW is
1489         enabled.
1490
1491         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1492         * interp.c (signal_exception): Ditto.
1493
1494 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1495
1496         * gencode.c: Mark BEGEZALL as LIKELY.
1497
1498 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1499
1500         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1501         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1502
1503 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1504
1505         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1506         modules.  Recognize TX39 target with "mips*tx39" pattern.
1507         * configure: Rebuilt.
1508         * sim-main.h (*): Added many macros defining bits in
1509         TX39 control registers.
1510         (SignalInterrupt): Send actual PC instead of NULL.
1511         (SignalNMIReset): New exception type.
1512         * interp.c (board): New variable for future use to identify
1513         a particular board being simulated.
1514         (mips_option_handler,mips_options): Added "--board" option.
1515         (interrupt_event): Send actual PC.
1516         (sim_open): Make memory layout conditional on board setting.
1517         (signal_exception): Initial implementation of hardware interrupt
1518         handling.  Accept another break instruction variant for simulator
1519         exit.
1520         (decode_coproc): Implement RFE instruction for TX39.
1521         (mips.igen): Decode RFE instruction as such.
1522         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1523         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1524         bbegin to implement memory map.
1525         * dv-tx3904cpu.c: New file.
1526         * dv-tx3904irc.c: New file.
1527
1528 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1529
1530         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1531
1532 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1533
1534         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1535         with calls to check_div_hilo.
1536
1537 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1538
1539         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1540         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1541         Add special r3900 version of do_mult_hilo.
1542         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1543         with calls to check_mult_hilo.
1544         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1545         with calls to check_div_hilo.
1546
1547 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1548
1549         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1550         Document a replacement.
1551
1552 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1553
1554         * interp.c (sim_monitor): Make mon_printf work.
1555
1556 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1557
1558         * sim-main.h (INSN_NAME): New arg `cpu'.
1559
1560 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1561
1562         * configure: Regenerated to track ../common/aclocal.m4 changes.
1563
1564 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1565
1566         * configure: Regenerated to track ../common/aclocal.m4 changes.
1567         * config.in: Ditto.
1568
1569 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1570
1571         * acconfig.h: New file.
1572         * configure.in: Reverted change of Apr 24; use sinclude again.
1573
1574 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1575
1576         * configure: Regenerated to track ../common/aclocal.m4 changes.
1577         * config.in: Ditto.
1578
1579 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1580
1581         * configure.in: Don't call sinclude.
1582
1583 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1584
1585         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1586
1587 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1588
1589         * mips.igen (ERET): Implement.
1590
1591         * interp.c (decode_coproc): Return sign-extended EPC.
1592
1593         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1594
1595         * interp.c (signal_exception): Do not ignore Trap.
1596         (signal_exception): On TRAP, restart at exception address.
1597         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1598         (signal_exception): Update.
1599         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1600         so that TRAP instructions are caught.
1601
1602 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1603
1604         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1605         contains HI/LO access history.
1606         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1607         (HIACCESS, LOACCESS): Delete, replace with
1608         (HIHISTORY, LOHISTORY): New macros.
1609         (CHECKHILO): Delete all, moved to mips.igen
1610
1611         * gencode.c (build_instruction): Do not generate checks for
1612         correct HI/LO register usage.
1613
1614         * interp.c (old_engine_run): Delete checks for correct HI/LO
1615         register usage.
1616
1617         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1618         check_mf_cycles): New functions.
1619         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1620         do_divu, domultx, do_mult, do_multu): Use.
1621
1622         * tx.igen ("madd", "maddu"): Use.
1623
1624 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1625
1626         * mips.igen (DSRAV): Use function do_dsrav.
1627         (SRAV): Use new function do_srav.
1628
1629         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1630         (B): Sign extend 11 bit immediate.
1631         (EXT-B*): Shift 16 bit immediate left by 1.
1632         (ADDIU*): Don't sign extend immediate value.
1633
1634 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1635
1636         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1637
1638         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1639         functions.
1640
1641         * mips.igen (delayslot32, nullify_next_insn): New functions.
1642         (m16.igen): Always include.
1643         (do_*): Add more tracing.
1644
1645         * m16.igen (delayslot16): Add NIA argument, could be called by a
1646         32 bit MIPS16 instruction.
1647
1648         * interp.c (ifetch16): Move function from here.
1649         * sim-main.c (ifetch16): To here.
1650
1651         * sim-main.c (ifetch16, ifetch32): Update to match current
1652         implementations of LH, LW.
1653         (signal_exception): Don't print out incorrect hex value of illegal
1654         instruction.
1655
1656 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1657
1658         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1659         instruction.
1660
1661         * m16.igen: Implement MIPS16 instructions.
1662
1663         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1664         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1665         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1666         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1667         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1668         bodies of corresponding code from 32 bit insn to these.  Also used
1669         by MIPS16 versions of functions.
1670
1671         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1672         (IMEM16): Drop NR argument from macro.
1673
1674 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1675
1676         * Makefile.in (SIM_OBJS): Add sim-main.o.
1677
1678         * sim-main.h (address_translation, load_memory, store_memory,
1679         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1680         as INLINE_SIM_MAIN.
1681         (pr_addr, pr_uword64): Declare.
1682         (sim-main.c): Include when H_REVEALS_MODULE_P.
1683
1684         * interp.c (address_translation, load_memory, store_memory,
1685         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1686         from here.
1687         * sim-main.c: To here. Fix compilation problems.
1688
1689         * configure.in: Enable inlining.
1690         * configure: Re-config.
1691
1692 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1693
1694         * configure: Regenerated to track ../common/aclocal.m4 changes.
1695
1696 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1697
1698         * mips.igen: Include tx.igen.
1699         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1700         * tx.igen: New file, contains MADD and MADDU.
1701
1702         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1703         the hardwired constant `7'.
1704         (store_memory): Ditto.
1705         (LOADDRMASK): Move definition to sim-main.h.
1706
1707         mips.igen (MTC0): Enable for r3900.
1708         (ADDU): Add trace.
1709
1710         mips.igen (do_load_byte): Delete.
1711         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1712         do_store_right): New functions.
1713         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1714
1715         configure.in: Let the tx39 use igen again.
1716         configure: Update.
1717
1718 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1719
1720         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1721         not an address sized quantity.  Return zero for cache sizes.
1722
1723 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1724
1725         * mips.igen (r3900): r3900 does not support 64 bit integer
1726         operations.
1727
1728 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1729
1730         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1731         than igen one.
1732         * configure : Rebuild.
1733
1734 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1735
1736         * configure: Regenerated to track ../common/aclocal.m4 changes.
1737
1738 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1739
1740         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1741
1742 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1743
1744         * configure: Regenerated to track ../common/aclocal.m4 changes.
1745         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1746
1747 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1748
1749         * configure: Regenerated to track ../common/aclocal.m4 changes.
1750
1751 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1752
1753         * interp.c (Max, Min): Comment out functions. Not yet used.
1754
1755 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1756
1757         * configure: Regenerated to track ../common/aclocal.m4 changes.
1758
1759 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1760
1761         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1762         configurable settings for stand-alone simulator.
1763
1764         * configure.in: Added X11 search, just in case.
1765
1766         * configure: Regenerated.
1767
1768 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1769
1770         * interp.c (sim_write, sim_read, load_memory, store_memory):
1771         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1772
1773 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1774
1775         * sim-main.h (GETFCC): Return an unsigned value.
1776
1777 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1778
1779         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1780         (DADD): Result destination is RD not RT.
1781
1782 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1783
1784         * sim-main.h (HIACCESS, LOACCESS): Always define.
1785
1786         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1787
1788         * interp.c (sim_info): Delete.
1789
1790 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1791
1792         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1793         (mips_option_handler): New argument `cpu'.
1794         (sim_open): Update call to sim_add_option_table.
1795
1796 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1797
1798         * mips.igen (CxC1): Add tracing.
1799
1800 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1801
1802         * sim-main.h (Max, Min): Declare.
1803
1804         * interp.c (Max, Min): New functions.
1805
1806         * mips.igen (BC1): Add tracing.
1807
1808 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1809
1810         * interp.c Added memory map for stack in vr4100
1811
1812 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1813
1814         * interp.c (load_memory): Add missing "break"'s.
1815
1816 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1817
1818         * interp.c (sim_store_register, sim_fetch_register): Pass in
1819         length parameter.  Return -1.
1820
1821 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1822
1823         * interp.c: Added hardware init hook, fixed warnings.
1824
1825 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1826
1827         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1828
1829 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1830
1831         * interp.c (ifetch16): New function.
1832
1833         * sim-main.h (IMEM32): Rename IMEM.
1834         (IMEM16_IMMED): Define.
1835         (IMEM16): Define.
1836         (DELAY_SLOT): Update.
1837
1838         * m16run.c (sim_engine_run): New file.
1839
1840         * m16.igen: All instructions except LB.
1841         (LB): Call do_load_byte.
1842         * mips.igen (do_load_byte): New function.
1843         (LB): Call do_load_byte.
1844
1845         * mips.igen: Move spec for insn bit size and high bit from here.
1846         * Makefile.in (tmp-igen, tmp-m16): To here.
1847
1848         * m16.dc: New file, decode mips16 instructions.
1849
1850         * Makefile.in (SIM_NO_ALL): Define.
1851         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1852
1853 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1854
1855         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1856         point unit to 32 bit registers.
1857         * configure: Re-generate.
1858
1859 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1860
1861         * configure.in (sim_use_gen): Make IGEN the default simulator
1862         generator for generic 32 and 64 bit mips targets.
1863         * configure: Re-generate.
1864
1865 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1866
1867         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1868         bitsize.
1869
1870         * interp.c (sim_fetch_register, sim_store_register): Read/write
1871         FGR from correct location.
1872         (sim_open): Set size of FGR's according to
1873         WITH_TARGET_FLOATING_POINT_BITSIZE.
1874
1875         * sim-main.h (FGR): Store floating point registers in a separate
1876         array.
1877
1878 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1879
1880         * configure: Regenerated to track ../common/aclocal.m4 changes.
1881
1882 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1883
1884         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1885
1886         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1887
1888         * interp.c (pending_tick): New function.  Deliver pending writes.
1889
1890         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1891         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1892         it can handle mixed sized quantites and single bits.
1893
1894 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1895
1896         * interp.c (oengine.h): Do not include when building with IGEN.
1897         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1898         (sim_info): Ditto for PROCESSOR_64BIT.
1899         (sim_monitor): Replace ut_reg with unsigned_word.
1900         (*): Ditto for t_reg.
1901         (LOADDRMASK): Define.
1902         (sim_open): Remove defunct check that host FP is IEEE compliant,
1903         using software to emulate floating point.
1904         (value_fpr, ...): Always compile, was conditional on HASFPU.
1905
1906 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1907
1908         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1909         size.
1910
1911         * interp.c (SD, CPU): Define.
1912         (mips_option_handler): Set flags in each CPU.
1913         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1914         (sim_close): Do not clear STATE, deleted anyway.
1915         (sim_write, sim_read): Assume CPU zero's vm should be used for
1916         data transfers.
1917         (sim_create_inferior): Set the PC for all processors.
1918         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1919         argument.
1920         (mips16_entry): Pass correct nr of args to store_word, load_word.
1921         (ColdReset): Cold reset all cpu's.
1922         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1923         (sim_monitor, load_memory, store_memory, signal_exception): Use
1924         `CPU' instead of STATE_CPU.
1925
1926
1927         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1928         SD or CPU_.
1929
1930         * sim-main.h (signal_exception): Add sim_cpu arg.
1931         (SignalException*): Pass both SD and CPU to signal_exception.
1932         * interp.c (signal_exception): Update.
1933
1934         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1935         Ditto
1936         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1937         address_translation): Ditto
1938         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1939
1940 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1941
1942         * configure: Regenerated to track ../common/aclocal.m4 changes.
1943
1944 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1945
1946         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1947
1948         * mips.igen (model): Map processor names onto BFD name.
1949
1950         * sim-main.h (CPU_CIA): Delete.
1951         (SET_CIA, GET_CIA): Define
1952
1953 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1954
1955         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1956         regiser.
1957
1958         * configure.in (default_endian): Configure a big-endian simulator
1959         by default.
1960         * configure: Re-generate.
1961
1962 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1963
1964         * configure: Regenerated to track ../common/aclocal.m4 changes.
1965
1966 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1967
1968         * interp.c (sim_monitor): Handle Densan monitor outbyte
1969         and inbyte functions.
1970
1971 1997-12-29  Felix Lee  <flee@cygnus.com>
1972
1973         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1974
1975 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1976
1977         * Makefile.in (tmp-igen): Arrange for $zero to always be
1978         reset to zero after every instruction.
1979
1980 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1981
1982         * configure: Regenerated to track ../common/aclocal.m4 changes.
1983         * config.in: Ditto.
1984
1985 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1986
1987         * mips.igen (MSUB): Fix to work like MADD.
1988         * gencode.c (MSUB): Similarly.
1989
1990 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1991
1992         * configure: Regenerated to track ../common/aclocal.m4 changes.
1993
1994 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1995
1996         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1997
1998 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1999
2000         * sim-main.h (sim-fpu.h): Include.
2001
2002         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2003         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2004         using host independant sim_fpu module.
2005
2006 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2007
2008         * interp.c (signal_exception): Report internal errors with SIGABRT
2009         not SIGQUIT.
2010
2011         * sim-main.h (C0_CONFIG): New register.
2012         (signal.h): No longer include.
2013
2014         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2015
2016 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2017
2018         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2019
2020 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2021
2022         * mips.igen: Tag vr5000 instructions.
2023         (ANDI): Was missing mipsIV model, fix assembler syntax.
2024         (do_c_cond_fmt): New function.
2025         (C.cond.fmt): Handle mips I-III which do not support CC field
2026         separatly.
2027         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2028         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2029         in IV3.2 spec.
2030         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2031         vr5000 which saves LO in a GPR separatly.
2032
2033         * configure.in (enable-sim-igen): For vr5000, select vr5000
2034         specific instructions.
2035         * configure: Re-generate.
2036
2037 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2038
2039         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2040
2041         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2042         fmt_uninterpreted_64 bit cases to switch.  Convert to
2043         fmt_formatted,
2044
2045         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2046
2047         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2048         as specified in IV3.2 spec.
2049         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2050
2051 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2052
2053         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2054         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2055         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2056         PENDING_FILL versions of instructions.  Simplify.
2057         (X): New function.
2058         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2059         instructions.
2060         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2061         a signed value.
2062         (MTHI, MFHI): Disable code checking HI-LO.
2063
2064         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2065         global.
2066         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2067
2068 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2069
2070         * gencode.c (build_mips16_operands): Replace IPC with cia.
2071
2072         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2073         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2074         IPC to `cia'.
2075         (UndefinedResult): Replace function with macro/function
2076         combination.
2077         (sim_engine_run): Don't save PC in IPC.
2078
2079         * sim-main.h (IPC): Delete.
2080
2081
2082         * interp.c (signal_exception, store_word, load_word,
2083         address_translation, load_memory, store_memory, cache_op,
2084         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2085         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2086         current instruction address - cia - argument.
2087         (sim_read, sim_write): Call address_translation directly.
2088         (sim_engine_run): Rename variable vaddr to cia.
2089         (signal_exception): Pass cia to sim_monitor
2090
2091         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2092         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2093         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2094
2095         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2096         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2097         SIM_ASSERT.
2098
2099         * interp.c (signal_exception): Pass restart address to
2100         sim_engine_restart.
2101
2102         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2103         idecode.o): Add dependency.
2104
2105         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2106         Delete definitions
2107         (DELAY_SLOT): Update NIA not PC with branch address.
2108         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2109
2110         * mips.igen: Use CIA not PC in branch calculations.
2111         (illegal): Call SignalException.
2112         (BEQ, ADDIU): Fix assembler.
2113
2114 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2115
2116         * m16.igen (JALX): Was missing.
2117
2118         * configure.in (enable-sim-igen): New configuration option.
2119         * configure: Re-generate.
2120
2121         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2122
2123         * interp.c (load_memory, store_memory): Delete parameter RAW.
2124         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2125         bypassing {load,store}_memory.
2126
2127         * sim-main.h (ByteSwapMem): Delete definition.
2128
2129         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2130
2131         * interp.c (sim_do_command, sim_commands): Delete mips specific
2132         commands.  Handled by module sim-options.
2133
2134         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2135         (WITH_MODULO_MEMORY): Define.
2136
2137         * interp.c (sim_info): Delete code printing memory size.
2138
2139         * interp.c (mips_size): Nee sim_size, delete function.
2140         (power2): Delete.
2141         (monitor, monitor_base, monitor_size): Delete global variables.
2142         (sim_open, sim_close): Delete code creating monitor and other
2143         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2144         manage memory regions.
2145         (load_memory, store_memory): Use sim-core for memory model.
2146
2147         * interp.c (address_translation): Delete all memory map code
2148         except line forcing 32 bit addresses.
2149
2150 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2151
2152         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2153         trace options.
2154
2155         * interp.c (logfh, logfile): Delete globals.
2156         (sim_open, sim_close): Delete code opening & closing log file.
2157         (mips_option_handler): Delete -l and -n options.
2158         (OPTION mips_options): Ditto.
2159
2160         * interp.c (OPTION mips_options): Rename option trace to dinero.
2161         (mips_option_handler): Update.
2162
2163 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2164
2165         * interp.c (fetch_str): New function.
2166         (sim_monitor): Rewrite using sim_read & sim_write.
2167         (sim_open): Check magic number.
2168         (sim_open): Write monitor vectors into memory using sim_write.
2169         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2170         (sim_read, sim_write): Simplify - transfer data one byte at a
2171         time.
2172         (load_memory, store_memory): Clarify meaning of parameter RAW.
2173
2174         * sim-main.h (isHOST): Defete definition.
2175         (isTARGET): Mark as depreciated.
2176         (address_translation): Delete parameter HOST.
2177
2178         * interp.c (address_translation): Delete parameter HOST.
2179
2180 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2181
2182         * mips.igen:
2183
2184         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2185         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2186
2187 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2188
2189         * mips.igen: Add model filter field to records.
2190
2191 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2192
2193         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2194
2195         interp.c (sim_engine_run): Do not compile function sim_engine_run
2196         when WITH_IGEN == 1.
2197
2198         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2199         target architecture.
2200
2201         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2202         igen. Replace with configuration variables sim_igen_flags /
2203         sim_m16_flags.
2204
2205         * m16.igen: New file.  Copy mips16 insns here.
2206         * mips.igen: From here.
2207
2208 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2209
2210         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2211         to top.
2212         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2213
2214 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2215
2216         * gencode.c (build_instruction): Follow sim_write's lead in using
2217         BigEndianMem instead of !ByteSwapMem.
2218
2219 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2220
2221         * configure.in (sim_gen): Dependent on target, select type of
2222         generator.  Always select old style generator.
2223
2224         configure: Re-generate.
2225
2226         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2227         targets.
2228         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2229         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2230         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2231         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2232         SIM_@sim_gen@_*, set by autoconf.
2233
2234 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2235
2236         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2237
2238         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2239         CURRENT_FLOATING_POINT instead.
2240
2241         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2242         (address_translation): Raise exception InstructionFetch when
2243         translation fails and isINSTRUCTION.
2244
2245         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2246         sim_engine_run): Change type of of vaddr and paddr to
2247         address_word.
2248         (address_translation, prefetch, load_memory, store_memory,
2249         cache_op): Change type of vAddr and pAddr to address_word.
2250
2251         * gencode.c (build_instruction): Change type of vaddr and paddr to
2252         address_word.
2253
2254 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2255
2256         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2257         macro to obtain result of ALU op.
2258
2259 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2260
2261         * interp.c (sim_info): Call profile_print.
2262
2263 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2264
2265         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2266
2267         * sim-main.h (WITH_PROFILE): Do not define, defined in
2268         common/sim-config.h.  Use sim-profile module.
2269         (simPROFILE): Delete defintion.
2270
2271         * interp.c (PROFILE): Delete definition.
2272         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2273         (sim_close): Delete code writing profile histogram.
2274         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2275         Delete.
2276         (sim_engine_run): Delete code profiling the PC.
2277
2278 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2279
2280         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2281
2282         * interp.c (sim_monitor): Make register pointers of type
2283         unsigned_word*.
2284
2285         * sim-main.h: Make registers of type unsigned_word not
2286         signed_word.
2287
2288 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2289
2290         * interp.c (sync_operation): Rename from SyncOperation, make
2291         global, add SD argument.
2292         (prefetch): Rename from Prefetch, make global, add SD argument.
2293         (decode_coproc): Make global.
2294
2295         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2296
2297         * gencode.c (build_instruction): Generate DecodeCoproc not
2298         decode_coproc calls.
2299
2300         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2301         (SizeFGR): Move to sim-main.h
2302         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2303         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2304         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2305         sim-main.h.
2306         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2307         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2308         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2309         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2310         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2311         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2312
2313         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2314         exception.
2315         (sim-alu.h): Include.
2316         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2317         (sim_cia): Typedef to instruction_address.
2318
2319 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2320
2321         * Makefile.in (interp.o): Rename generated file engine.c to
2322         oengine.c.
2323
2324         * interp.c: Update.
2325
2326 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2327
2328         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2329
2330 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2331
2332         * gencode.c (build_instruction): For "FPSQRT", output correct
2333         number of arguments to Recip.
2334
2335 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2336
2337         * Makefile.in (interp.o): Depends on sim-main.h
2338
2339         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2340
2341         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2342         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2343         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2344         STATE, DSSTATE): Define
2345         (GPR, FGRIDX, ..): Define.
2346
2347         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2348         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2349         (GPR, FGRIDX, ...): Delete macros.
2350
2351         * interp.c: Update names to match defines from sim-main.h
2352
2353 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2354
2355         * interp.c (sim_monitor): Add SD argument.
2356         (sim_warning): Delete.  Replace calls with calls to
2357         sim_io_eprintf.
2358         (sim_error): Delete. Replace calls with sim_io_error.
2359         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2360         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2361         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2362         argument.
2363         (mips_size): Rename from sim_size. Add SD argument.
2364
2365         * interp.c (simulator): Delete global variable.
2366         (callback): Delete global variable.
2367         (mips_option_handler, sim_open, sim_write, sim_read,
2368         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2369         sim_size,sim_monitor): Use sim_io_* not callback->*.
2370         (sim_open): ZALLOC simulator struct.
2371         (PROFILE): Do not define.
2372
2373 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2374
2375         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2376         support.h with corresponding code.
2377
2378         * sim-main.h (word64, uword64), support.h: Move definition to
2379         sim-main.h.
2380         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2381
2382         * support.h: Delete
2383         * Makefile.in: Update dependencies
2384         * interp.c: Do not include.
2385
2386 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2387
2388         * interp.c (address_translation, load_memory, store_memory,
2389         cache_op): Rename to from AddressTranslation et.al., make global,
2390         add SD argument
2391
2392         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2393         CacheOp): Define.
2394
2395         * interp.c (SignalException): Rename to signal_exception, make
2396         global.
2397
2398         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2399
2400         * sim-main.h (SignalException, SignalExceptionInterrupt,
2401         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2402         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2403         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2404         Define.
2405
2406         * interp.c, support.h: Use.
2407
2408 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2409
2410         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2411         to value_fpr / store_fpr. Add SD argument.
2412         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2413         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2414
2415         * sim-main.h (ValueFPR, StoreFPR): Define.
2416
2417 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * interp.c (sim_engine_run): Check consistency between configure
2420         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2421         and HASFPU.
2422
2423         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2424         (mips_fpu): Configure WITH_FLOATING_POINT.
2425         (mips_endian): Configure WITH_TARGET_ENDIAN.
2426         * configure: Update.
2427
2428 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2429
2430         * configure: Regenerated to track ../common/aclocal.m4 changes.
2431
2432 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2433
2434         * configure: Regenerated.
2435
2436 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2437
2438         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2439
2440 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2441
2442         * gencode.c (print_igen_insn_models): Assume certain architectures
2443         include all mips* instructions.
2444         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2445         instruction.
2446
2447         * Makefile.in (tmp.igen): Add target. Generate igen input from
2448         gencode file.
2449
2450         * gencode.c (FEATURE_IGEN): Define.
2451         (main): Add --igen option.  Generate output in igen format.
2452         (process_instructions): Format output according to igen option.
2453         (print_igen_insn_format): New function.
2454         (print_igen_insn_models): New function.
2455         (process_instructions): Only issue warnings and ignore
2456         instructions when no FEATURE_IGEN.
2457
2458 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2459
2460         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2461         MIPS targets.
2462
2463 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2464
2465         * configure: Regenerated to track ../common/aclocal.m4 changes.
2466
2467 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2468
2469         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2470         SIM_RESERVED_BITS): Delete, moved to common.
2471         (SIM_EXTRA_CFLAGS): Update.
2472
2473 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2474
2475         * configure.in: Configure non-strict memory alignment.
2476         * configure: Regenerated to track ../common/aclocal.m4 changes.
2477
2478 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2479
2480         * configure: Regenerated to track ../common/aclocal.m4 changes.
2481
2482 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2483
2484         * gencode.c (SDBBP,DERET): Added (3900) insns.
2485         (RFE): Turn on for 3900.
2486         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2487         (dsstate): Made global.
2488         (SUBTARGET_R3900): Added.
2489         (CANCELDELAYSLOT): New.
2490         (SignalException): Ignore SystemCall rather than ignore and
2491         terminate.  Add DebugBreakPoint handling.
2492         (decode_coproc): New insns RFE, DERET; and new registers Debug
2493         and DEPC protected by SUBTARGET_R3900.
2494         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2495         bits explicitly.
2496         * Makefile.in,configure.in: Add mips subtarget option.
2497         * configure: Update.
2498
2499 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2500
2501         * gencode.c: Add r3900 (tx39).
2502
2503
2504 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2505
2506         * gencode.c (build_instruction): Don't need to subtract 4 for
2507         JALR, just 2.
2508
2509 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2510
2511         * interp.c: Correct some HASFPU problems.
2512
2513 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2514
2515         * configure: Regenerated to track ../common/aclocal.m4 changes.
2516
2517 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2518
2519         * interp.c (mips_options): Fix samples option short form, should
2520         be `x'.
2521
2522 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * interp.c (sim_info): Enable info code.  Was just returning.
2525
2526 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2527
2528         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2529         MFC0.
2530
2531 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2532
2533         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2534         constants.
2535         (build_instruction): Ditto for LL.
2536
2537 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2538
2539         * configure: Regenerated to track ../common/aclocal.m4 changes.
2540
2541 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2542
2543         * configure: Regenerated to track ../common/aclocal.m4 changes.
2544         * config.in: Ditto.
2545
2546 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2547
2548         * interp.c (sim_open): Add call to sim_analyze_program, update
2549         call to sim_config.
2550
2551 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2552
2553         * interp.c (sim_kill): Delete.
2554         (sim_create_inferior): Add ABFD argument. Set PC from same.
2555         (sim_load): Move code initializing trap handlers from here.
2556         (sim_open): To here.
2557         (sim_load): Delete, use sim-hload.c.
2558
2559         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2560
2561 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2562
2563         * configure: Regenerated to track ../common/aclocal.m4 changes.
2564         * config.in: Ditto.
2565
2566 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2567
2568         * interp.c (sim_open): Add ABFD argument.
2569         (sim_load): Move call to sim_config from here.
2570         (sim_open): To here.  Check return status.
2571
2572 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2573
2574         * gencode.c (build_instruction): Two arg MADD should
2575         not assign result to $0.
2576
2577 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2578
2579         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2580         * sim/mips/configure.in: Regenerate.
2581
2582 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2583
2584         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2585         signed8, unsigned8 et.al. types.
2586
2587         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2588         hosts when selecting subreg.
2589
2590 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2591
2592         * interp.c (sim_engine_run): Reset the ZERO register to zero
2593         regardless of FEATURE_WARN_ZERO.
2594         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2595
2596 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2597
2598         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2599         (SignalException): For BreakPoints ignore any mode bits and just
2600         save the PC.
2601         (SignalException): Always set the CAUSE register.
2602
2603 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2604
2605         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2606         exception has been taken.
2607
2608         * interp.c: Implement the ERET and mt/f sr instructions.
2609
2610 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2611
2612         * interp.c (SignalException): Don't bother restarting an
2613         interrupt.
2614
2615 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2616
2617         * interp.c (SignalException): Really take an interrupt.
2618         (interrupt_event): Only deliver interrupts when enabled.
2619
2620 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2621
2622         * interp.c (sim_info): Only print info when verbose.
2623         (sim_info) Use sim_io_printf for output.
2624
2625 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2626
2627         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2628         mips architectures.
2629
2630 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2631
2632         * interp.c (sim_do_command): Check for common commands if a
2633         simulator specific command fails.
2634
2635 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2636
2637         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2638         and simBE when DEBUG is defined.
2639
2640 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2641
2642         * interp.c (interrupt_event): New function.  Pass exception event
2643         onto exception handler.
2644
2645         * configure.in: Check for stdlib.h.
2646         * configure: Regenerate.
2647
2648         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2649         variable declaration.
2650         (build_instruction): Initialize memval1.
2651         (build_instruction): Add UNUSED attribute to byte, bigend,
2652         reverse.
2653         (build_operands): Ditto.
2654
2655         * interp.c: Fix GCC warnings.
2656         (sim_get_quit_code): Delete.
2657
2658         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2659         * Makefile.in: Ditto.
2660         * configure: Re-generate.
2661
2662         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2663
2664 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2665
2666         * interp.c (mips_option_handler): New function parse argumes using
2667         sim-options.
2668         (myname): Replace with STATE_MY_NAME.
2669         (sim_open): Delete check for host endianness - performed by
2670         sim_config.
2671         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2672         (sim_open): Move much of the initialization from here.
2673         (sim_load): To here.  After the image has been loaded and
2674         endianness set.
2675         (sim_open): Move ColdReset from here.
2676         (sim_create_inferior): To here.
2677         (sim_open): Make FP check less dependant on host endianness.
2678
2679         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2680         run.
2681         * interp.c (sim_set_callbacks): Delete.
2682
2683         * interp.c (membank, membank_base, membank_size): Replace with
2684         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2685         (sim_open): Remove call to callback->init. gdb/run do this.
2686
2687         * interp.c: Update
2688
2689         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2690
2691         * interp.c (big_endian_p): Delete, replaced by
2692         current_target_byte_order.
2693
2694 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2695
2696         * interp.c (host_read_long, host_read_word, host_swap_word,
2697         host_swap_long): Delete. Using common sim-endian.
2698         (sim_fetch_register, sim_store_register): Use H2T.
2699         (pipeline_ticks): Delete.  Handled by sim-events.
2700         (sim_info): Update.
2701         (sim_engine_run): Update.
2702
2703 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2704
2705         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2706         reason from here.
2707         (SignalException): To here. Signal using sim_engine_halt.
2708         (sim_stop_reason): Delete, moved to common.
2709
2710 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2711
2712         * interp.c (sim_open): Add callback argument.
2713         (sim_set_callbacks): Delete SIM_DESC argument.
2714         (sim_size): Ditto.
2715
2716 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2717
2718         * Makefile.in (SIM_OBJS): Add common modules.
2719
2720         * interp.c (sim_set_callbacks): Also set SD callback.
2721         (set_endianness, xfer_*, swap_*): Delete.
2722         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2723         Change to functions using sim-endian macros.
2724         (control_c, sim_stop): Delete, use common version.
2725         (simulate): Convert into.
2726         (sim_engine_run): This function.
2727         (sim_resume): Delete.
2728
2729         * interp.c (simulation): New variable - the simulator object.
2730         (sim_kind): Delete global - merged into simulation.
2731         (sim_load): Cleanup.  Move PC assignment from here.
2732         (sim_create_inferior): To here.
2733
2734         * sim-main.h: New file.
2735         * interp.c (sim-main.h): Include.
2736
2737 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2738
2739         * configure: Regenerated to track ../common/aclocal.m4 changes.
2740
2741 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2742
2743         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2744
2745 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2746
2747         * gencode.c (build_instruction): DIV instructions: check
2748         for division by zero and integer overflow before using
2749         host's division operation.
2750
2751 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2752
2753         * Makefile.in (SIM_OBJS): Add sim-load.o.
2754         * interp.c: #include bfd.h.
2755         (target_byte_order): Delete.
2756         (sim_kind, myname, big_endian_p): New static locals.
2757         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2758         after argument parsing.  Recognize -E arg, set endianness accordingly.
2759         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2760         load file into simulator.  Set PC from bfd.
2761         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2762         (set_endianness): Use big_endian_p instead of target_byte_order.
2763
2764 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2765
2766         * interp.c (sim_size): Delete prototype - conflicts with
2767         definition in remote-sim.h.  Correct definition.
2768
2769 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2770
2771         * configure: Regenerated to track ../common/aclocal.m4 changes.
2772         * config.in: Ditto.
2773
2774 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2775
2776         * interp.c (sim_open): New arg `kind'.
2777
2778         * configure: Regenerated to track ../common/aclocal.m4 changes.
2779
2780 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2781
2782         * configure: Regenerated to track ../common/aclocal.m4 changes.
2783
2784 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2785
2786         * interp.c (sim_open): Set optind to 0 before calling getopt.
2787
2788 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2789
2790         * configure: Regenerated to track ../common/aclocal.m4 changes.
2791
2792 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2793
2794         * interp.c : Replace uses of pr_addr with pr_uword64
2795         where the bit length is always 64 independent of SIM_ADDR.
2796         (pr_uword64) : added.
2797
2798 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2799
2800         * configure: Re-generate.
2801
2802 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2803
2804         * configure: Regenerate to track ../common/aclocal.m4 changes.
2805
2806 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2807
2808         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2809         in argv form.
2810         (other sim_*): New SIM_DESC argument.
2811
2812 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2813
2814         * interp.c: Fix printing of addresses for non-64-bit targets.
2815         (pr_addr): Add function to print address based on size.
2816
2817 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2818
2819         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2820
2821 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2822
2823         * gencode.c (build_mips16_operands): Correct computation of base
2824         address for extended PC relative instruction.
2825
2826 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2827
2828         * interp.c (mips16_entry): Add support for floating point cases.
2829         (SignalException): Pass floating point cases to mips16_entry.
2830         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2831         registers.
2832         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2833         or fmt_word.
2834         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2835         and then set the state to fmt_uninterpreted.
2836         (COP_SW): Temporarily set the state to fmt_word while calling
2837         ValueFPR.
2838
2839 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2840
2841         * gencode.c (build_instruction): The high order may be set in the
2842         comparison flags at any ISA level, not just ISA 4.
2843
2844 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2845
2846         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2847         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2848         * configure.in: sinclude ../common/aclocal.m4.
2849         * configure: Regenerated.
2850
2851 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2852
2853         * configure: Rebuild after change to aclocal.m4.
2854
2855 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2856
2857         * configure configure.in Makefile.in:  Update to new configure
2858         scheme which is more compatible with WinGDB builds.
2859         * configure.in:  Improve comment on how to run autoconf.
2860         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2861         * Makefile.in:  Use autoconf substitution to install common
2862         makefile fragment.
2863
2864 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2865
2866         * gencode.c (build_instruction): Use BigEndianCPU instead of
2867         ByteSwapMem.
2868
2869 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2870
2871         * interp.c (sim_monitor): Make output to stdout visible in
2872         wingdb's I/O log window.
2873
2874 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2875
2876         * support.h: Undo previous change to SIGTRAP
2877         and SIGQUIT values.
2878
2879 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2880
2881         * interp.c (store_word, load_word): New static functions.
2882         (mips16_entry): New static function.
2883         (SignalException): Look for mips16 entry and exit instructions.
2884         (simulate): Use the correct index when setting fpr_state after
2885         doing a pending move.
2886
2887 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2888
2889         * interp.c: Fix byte-swapping code throughout to work on
2890         both little- and big-endian hosts.
2891
2892 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2893
2894         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2895         with gdb/config/i386/xm-windows.h.
2896
2897 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2898
2899         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2900         that messes up arithmetic shifts.
2901
2902 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2903
2904         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2905         SIGTRAP and SIGQUIT for _WIN32.
2906
2907 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2908
2909         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2910         force a 64 bit multiplication.
2911         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2912         destination register is 0, since that is the default mips16 nop
2913         instruction.
2914
2915 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2916
2917         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2918         (build_endian_shift): Don't check proc64.
2919         (build_instruction): Always set memval to uword64.  Cast op2 to
2920         uword64 when shifting it left in memory instructions.  Always use
2921         the same code for stores--don't special case proc64.
2922
2923         * gencode.c (build_mips16_operands): Fix base PC value for PC
2924         relative operands.
2925         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2926         jal instruction.
2927         * interp.c (simJALDELAYSLOT): Define.
2928         (JALDELAYSLOT): Define.
2929         (INDELAYSLOT, INJALDELAYSLOT): Define.
2930         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2931
2932 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2933
2934         * interp.c (sim_open): add flush_cache as a PMON routine
2935         (sim_monitor): handle flush_cache by ignoring it
2936
2937 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2938
2939         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2940         BigEndianMem.
2941         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2942         (BigEndianMem): Rename to ByteSwapMem and change sense.
2943         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2944         BigEndianMem references to !ByteSwapMem.
2945         (set_endianness): New function, with prototype.
2946         (sim_open): Call set_endianness.
2947         (sim_info): Use simBE instead of BigEndianMem.
2948         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2949         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2950         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2951         ifdefs, keeping the prototype declaration.
2952         (swap_word): Rewrite correctly.
2953         (ColdReset): Delete references to CONFIG.  Delete endianness related
2954         code; moved to set_endianness.
2955
2956 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2957
2958         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2959         * interp.c (CHECKHILO): Define away.
2960         (simSIGINT): New macro.
2961         (membank_size): Increase from 1MB to 2MB.
2962         (control_c): New function.
2963         (sim_resume): Rename parameter signal to signal_number.  Add local
2964         variable prev.  Call signal before and after simulate.
2965         (sim_stop_reason): Add simSIGINT support.
2966         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2967         functions always.
2968         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2969         if logfh is NULL.
2970         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2971         a call to sim_warning.
2972
2973 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2974
2975         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2976         16 bit instructions.
2977
2978 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2979
2980         Add support for mips16 (16 bit MIPS implementation):
2981         * gencode.c (inst_type): Add mips16 instruction encoding types.
2982         (GETDATASIZEINSN): Define.
2983         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2984         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2985         mtlo.
2986         (MIPS16_DECODE): New table, for mips16 instructions.
2987         (bitmap_val): New static function.
2988         (struct mips16_op): Define.
2989         (mips16_op_table): New table, for mips16 operands.
2990         (build_mips16_operands): New static function.
2991         (process_instructions): If PC is odd, decode a mips16
2992         instruction.  Break out instruction handling into new
2993         build_instruction function.
2994         (build_instruction): New static function, broken out of
2995         process_instructions.  Check modifiers rather than flags for SHIFT
2996         bit count and m[ft]{hi,lo} direction.
2997         (usage): Pass program name to fprintf.
2998         (main): Remove unused variable this_option_optind.  Change
2999         ``*loptarg++'' to ``loptarg++''.
3000         (my_strtoul): Parenthesize && within ||.
3001         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3002         (simulate): If PC is odd, fetch a 16 bit instruction, and
3003         increment PC by 2 rather than 4.
3004         * configure.in: Add case for mips16*-*-*.
3005         * configure: Rebuild.
3006
3007 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3008
3009         * interp.c: Allow -t to enable tracing in standalone simulator.
3010         Fix garbage output in trace file and error messages.
3011
3012 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3013
3014         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3015         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3016         * configure.in: Simplify using macros in ../common/aclocal.m4.
3017         * configure: Regenerated.
3018         * tconfig.in: New file.
3019
3020 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3021
3022         * interp.c: Fix bugs in 64-bit port.
3023         Use ansi function declarations for msvc compiler.
3024         Initialize and test file pointer in trace code.
3025         Prevent duplicate definition of LAST_EMED_REGNUM.
3026
3027 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3028
3029         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3030
3031 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3032
3033         * interp.c (SignalException): Check for explicit terminating
3034         breakpoint value.
3035         * gencode.c: Pass instruction value through SignalException()
3036         calls for Trap, Breakpoint and Syscall.
3037
3038 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3039
3040         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3041         only used on those hosts that provide it.
3042         * configure.in: Add sqrt() to list of functions to be checked for.
3043         * config.in: Re-generated.
3044         * configure: Re-generated.
3045
3046 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3047
3048         * gencode.c (process_instructions): Call build_endian_shift when
3049         expanding STORE RIGHT, to fix swr.
3050         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3051         clear the high bits.
3052         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3053         Fix float to int conversions to produce signed values.
3054
3055 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3056
3057         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3058         (process_instructions): Correct handling of nor instruction.
3059         Correct shift count for 32 bit shift instructions. Correct sign
3060         extension for arithmetic shifts to not shift the number of bits in
3061         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3062         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3063         Fix madd.
3064         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3065         It's OK to have a mult follow a mult.  What's not OK is to have a
3066         mult follow an mfhi.
3067         (Convert): Comment out incorrect rounding code.
3068
3069 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3070
3071         * interp.c (sim_monitor): Improved monitor printf
3072         simulation. Tidied up simulator warnings, and added "--log" option
3073         for directing warning message output.
3074         * gencode.c: Use sim_warning() rather than WARNING macro.
3075
3076 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3077
3078         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3079         getopt1.o, rather than on gencode.c.  Link objects together.
3080         Don't link against -liberty.
3081         (gencode.o, getopt.o, getopt1.o): New targets.
3082         * gencode.c: Include <ctype.h> and "ansidecl.h".
3083         (AND): Undefine after including "ansidecl.h".
3084         (ULONG_MAX): Define if not defined.
3085         (OP_*): Don't define macros; now defined in opcode/mips.h.
3086         (main): Call my_strtoul rather than strtoul.
3087         (my_strtoul): New static function.
3088
3089 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3090
3091         * gencode.c (process_instructions):  Generate word64 and uword64
3092         instead of `long long' and `unsigned long long' data types.
3093         * interp.c:  #include sysdep.h to get signals, and define default
3094         for SIGBUS.
3095         * (Convert):  Work around for Visual-C++ compiler bug with type
3096         conversion.
3097         * support.h:  Make things compile under Visual-C++ by using
3098         __int64 instead of `long long'.  Change many refs to long long
3099         into word64/uword64 typedefs.
3100
3101 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3102
3103         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3104         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3105         (docdir): Removed.
3106         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3107         (AC_PROG_INSTALL): Added.
3108         (AC_PROG_CC): Moved to before configure.host call.
3109         * configure: Rebuilt.
3110
3111 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3112
3113         * configure.in: Define @SIMCONF@ depending on mips target.
3114         * configure: Rebuild.
3115         * Makefile.in (run): Add @SIMCONF@ to control simulator
3116         construction.
3117         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3118         * interp.c: Remove some debugging, provide more detailed error
3119         messages, update memory accesses to use LOADDRMASK.
3120
3121 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3122
3123         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3124         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3125         stamp-h.
3126         * configure: Rebuild.
3127         * config.in: New file, generated by autoheader.
3128         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3129         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3130         HAVE_ANINT and HAVE_AINT, as appropriate.
3131         * Makefile.in (run): Use @LIBS@ rather than -lm.
3132         (interp.o): Depend upon config.h.
3133         (Makefile): Just rebuild Makefile.
3134         (clean): Remove stamp-h.
3135         (mostlyclean): Make the same as clean, not as distclean.
3136         (config.h, stamp-h): New targets.
3137
3138 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3139
3140         * interp.c (ColdReset): Fix boolean test. Make all simulator
3141         globals static.
3142
3143 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3144
3145         * interp.c (xfer_direct_word, xfer_direct_long,
3146         swap_direct_word, swap_direct_long, xfer_big_word,
3147         xfer_big_long, xfer_little_word, xfer_little_long,
3148         swap_word,swap_long): Added.
3149         * interp.c (ColdReset): Provide function indirection to
3150         host<->simulated_target transfer routines.
3151         * interp.c (sim_store_register, sim_fetch_register): Updated to
3152         make use of indirected transfer routines.
3153
3154 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3155
3156         * gencode.c (process_instructions): Ensure FP ABS instruction
3157         recognised.
3158         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3159         system call support.
3160
3161 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3162
3163         * interp.c (sim_do_command): Complain if callback structure not
3164         initialised.
3165
3166 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3167
3168         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3169         support for Sun hosts.
3170         * Makefile.in (gencode): Ensure the host compiler and libraries
3171         used for cross-hosted build.
3172
3173 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3174
3175         * interp.c, gencode.c: Some more (TODO) tidying.
3176
3177 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3178
3179         * gencode.c, interp.c: Replaced explicit long long references with
3180         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3181         * support.h (SET64LO, SET64HI): Macros added.
3182
3183 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3184
3185         * configure: Regenerate with autoconf 2.7.
3186
3187 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3188
3189         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3190         * support.h: Remove superfluous "1" from #if.
3191         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3192
3193 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3194
3195         * interp.c (StoreFPR): Control UndefinedResult() call on
3196         WARN_RESULT manifest.
3197
3198 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3199
3200         * gencode.c: Tidied instruction decoding, and added FP instruction
3201         support.
3202
3203         * interp.c: Added dineroIII, and BSD profiling support. Also
3204         run-time FP handling.
3205
3206 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3207
3208         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3209         gencode.c, interp.c, support.h: created.