sim/mips/ChangeLog

   1 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
   4         not an address sized quantity.  Return zero for cache sizes.
   5
   6 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   7
   8         * mips.igen (r3900): r3900 does not support 64 bit integer
   9         operations.
  10
  11 start-sanitize-sky
  12 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
  13
  14         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
  15
  16 end-sanitize-sky
  17 start-sanitize-sky
  18 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
  19
  20         * interp.c (decode_coproc): Continuing COP2 work.
  21         (cop_[ls]q): Make sky-target-only.
  22
  23         * sim-main.h (COP_[LS]Q): Make sky-target-only.
  24 end-sanitize-sky
  25
  26 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
  27
  28         * configure.in (mipstx39*-*-*): Use gencode simulator rather
  29         than igen one.
  30         * configure : Rebuild.
  31
  32 start-sanitize-sky
  33 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
  34
  35         * interp.c (decode_coproc): Added a missing TARGET_SKY check
  36         around COP2 implementation skeleton.
  37
  38 end-sanitize-sky
  39
  40 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
  41
  42 start-sanitize-sky
  43         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
  44
  45         * interp.c (sim_{load,store}_register): Use new vu[01]_device
  46         static to access VU registers.
  47         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
  48         decoding.  Work in progress.
  49
  50         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
  51         overlapping/redundant bit pattern.
  52         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
  53         progress.
  54
  55         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
  56         status register.
  57
  58         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
  59         access to coprocessor registers.
  60
  61         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
  62 end-sanitize-sky
  63
  64 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  65
  66         * configure: Regenerated to track ../common/aclocal.m4 changes.
  67
  68 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  69
  70         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
  71
  72 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
  73
  74         * configure: Regenerated to track ../common/aclocal.m4 changes.
  75         * config.in: Regenerated to track ../common/aclocal.m4 changes.
  76
  77 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  78
  79         * configure: Regenerated to track ../common/aclocal.m4 changes.
  80
  81 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  82
  83         * interp.c (Max, Min): Comment out functions. Not yet used.
  84
  85 start-sanitize-vr4320
  86 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  87
  88         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
  89
  90 end-sanitize-vr4320
  91 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  92
  93         * configure: Regenerated to track ../common/aclocal.m4 changes.
  94
  95 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
  96
  97         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
  98         configurable settings for stand-alone simulator.
  99
 100 start-sanitize-sky
 101         * configure.in: Added --with-sim-gpu2 option to specify path of
 102         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 103         links/compiles stand-alone simulator with this library.
 104
 105         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 106 end-sanitize-sky
 107
 108         * configure.in: Added X11 search, just in case.
 109
 110         * configure: Regenerated.
 111
 112 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 113
 114         * interp.c (sim_write, sim_read, load_memory, store_memory):
 115         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 116
 117 start-sanitize-vr4320
 118 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 119
 120         * vr4320.igen (clz,dclz) : Added.
 121         (dmac): Replaced 99, with LO.
 122
 123 end-sanitize-vr4320
 124 start-sanitize-vr5400
 125 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 126
 127         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 128
 129 end-sanitize-vr5400
 130 start-sanitize-vr4320
 131 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 132
 133         * vr4320.igen: New file.
 134         * Makefile.in (vr4320.igen) : Added.
 135         * configure.in (mips64vr4320-*-*): Added.
 136         * configure : Rebuilt.
 137         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 138         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 139
 140 end-sanitize-vr4320
 141 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 142
 143         * sim-main.h (GETFCC): Return an unsigned value.
 144
 145 start-sanitize-r5900
 146         * r5900.igen: Use an unsigned array index variable `i'.
 147         (QFSRV): Ditto for variable bytes.
 148
 149 end-sanitize-r5900
 150 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 151
 152         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 153         (DADD): Result destination is RD not RT.
 154
 155 start-sanitize-r5900
 156         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 157         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 158         divide.
 159
 160 end-sanitize-r5900
 161 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 162
 163         * sim-main.h (HIACCESS, LOACCESS): Always define.
 164
 165         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 166
 167         * interp.c (sim_info): Delete.
 168
 169 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 170
 171         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 172         (mips_option_handler): New argument `cpu'.
 173         (sim_open): Update call to sim_add_option_table.
 174
 175 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 176
 177         * mips.igen (CxC1): Add tracing.
 178
 179 start-sanitize-r5900
 180 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 181
 182         * r5900.igen (StoreFP): Delete.
 183         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 184         New functions.
 185         (rsqrt.s, sqrt.s): Implement.
 186         (r59cond): New function.
 187         (C.COND.S): Call r59cond in assembler line.
 188         (cvt.w.s, cvt.s.w): Implement.
 189
 190         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 191         instruction set.
 192
 193         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 194
 195 end-sanitize-r5900
 196 start-sanitize-r5900
 197 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 198
 199         * r5900.igen: Add tracing to all p* instructions.
 200
 201 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 202
 203         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 204         to get gdb talking to re-aranged sim_cpu register structure.
 205
 206 end-sanitize-r5900
 207 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 208
 209         * sim-main.h (Max, Min): Declare.
 210
 211         * interp.c (Max, Min): New functions.
 212
 213         * mips.igen (BC1): Add tracing.
 214
 215 start-sanitize-vr5400
 216 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 217
 218         * mdmx.igen: Tag all functions as requiring either with mdmx or
 219         vr5400 processor.
 220
 221 end-sanitize-vr5400
 222 start-sanitize-r5900
 223 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 224
 225         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 226         to 32.
 227         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 228
 229         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 230
 231         * r5900.igen: Rewrite.
 232
 233         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 234         struct.
 235         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 236         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 237
 238 end-sanitize-r5900
 239 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 240
 241         * interp.c Added memory map for stack in vr4100
 242
 243 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 244
 245         * interp.c (load_memory): Add missing "break"'s.
 246
 247 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 248
 249         * interp.c (sim_store_register, sim_fetch_register): Pass in
 250         length parameter.  Return -1.
 251
 252 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 253
 254         * interp.c: Added hardware init hook, fixed warnings.
 255
 256 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 257
 258         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 259
 260 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 261
 262         * interp.c (ifetch16): New function.
 263
 264         * sim-main.h (IMEM32): Rename IMEM.
 265         (IMEM16_IMMED): Define.
 266         (IMEM16): Define.
 267         (DELAY_SLOT): Update.
 268
 269         * m16run.c (sim_engine_run): New file.
 270
 271         * m16.igen: All instructions except LB.
 272         (LB): Call do_load_byte.
 273         * mips.igen (do_load_byte): New function.
 274         (LB): Call do_load_byte.
 275
 276         * mips.igen: Move spec for insn bit size and high bit from here.
 277         * Makefile.in (tmp-igen, tmp-m16): To here.
 278
 279         * m16.dc: New file, decode mips16 instructions.
 280
 281         * Makefile.in (SIM_NO_ALL): Define.
 282         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 283
 284 start-sanitize-tx19
 285         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 286         set.
 287
 288 end-sanitize-tx19
 289 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 290
 291         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 292         point unit to 32 bit registers.
 293         * configure: Re-generate.
 294
 295 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 296
 297         * configure.in (sim_use_gen): Make IGEN the default simulator
 298         generator for generic 32 and 64 bit mips targets.
 299         * configure: Re-generate.
 300
 301 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 302
 303         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 304         bitsize.
 305
 306         * interp.c (sim_fetch_register, sim_store_register): Read/write
 307         FGR from correct location.
 308         (sim_open): Set size of FGR's according to
 309         WITH_TARGET_FLOATING_POINT_BITSIZE.
 310
 311         * sim-main.h (FGR): Store floating point registers in a separate
 312         array.
 313
 314 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 315
 316         * configure: Regenerated to track ../common/aclocal.m4 changes.
 317
 318 start-sanitize-vr5400
 319         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 320
 321 end-sanitize-vr5400
 322 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 323
 324         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 325
 326         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 327
 328         * interp.c (pending_tick): New function.  Deliver pending writes.
 329
 330         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 331         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 332         it can handle mixed sized quantites and single bits.
 333
 334 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 335
 336         * interp.c (oengine.h): Do not include when building with IGEN.
 337         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 338         (sim_info): Ditto for PROCESSOR_64BIT.
 339         (sim_monitor): Replace ut_reg with unsigned_word.
 340         (*): Ditto for t_reg.
 341         (LOADDRMASK): Define.
 342         (sim_open): Remove defunct check that host FP is IEEE compliant,
 343         using software to emulate floating point.
 344         (value_fpr, ...): Always compile, was conditional on HASFPU.
 345
 346 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 347
 348         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 349         size.
 350
 351         * interp.c (SD, CPU): Define.
 352         (mips_option_handler): Set flags in each CPU.
 353         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 354         (sim_close): Do not clear STATE, deleted anyway.
 355         (sim_write, sim_read): Assume CPU zero's vm should be used for
 356         data transfers.
 357         (sim_create_inferior): Set the PC for all processors.
 358         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 359         argument.
 360         (mips16_entry): Pass correct nr of args to store_word, load_word.
 361         (ColdReset): Cold reset all cpu's.
 362         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 363         (sim_monitor, load_memory, store_memory, signal_exception): Use
 364         `CPU' instead of STATE_CPU.
 365
 366
 367         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 368         SD or CPU_.
 369
 370         * sim-main.h (signal_exception): Add sim_cpu arg.
 371         (SignalException*): Pass both SD and CPU to signal_exception.
 372         * interp.c (signal_exception): Update.
 373
 374         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 375         Ditto
 376         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 377         address_translation): Ditto
 378         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 379
 380 start-sanitize-vr5400
 381         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 382         `sd'.
 383         (ByteAlign): Use StoreFPR, pass args in correct order.
 384
 385 end-sanitize-vr5400
 386 start-sanitize-r5900
 387 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 388
 389         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 390
 391 end-sanitize-r5900
 392 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 393
 394         * configure: Regenerated to track ../common/aclocal.m4 changes.
 395
 396 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 397
 398 start-sanitize-r5900
 399         * configure.in (sim_igen_filter): For r5900, use igen.
 400         * configure: Re-generate.
 401
 402 end-sanitize-r5900
 403         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 404
 405         * mips.igen (model): Map processor names onto BFD name.
 406
 407         * sim-main.h (CPU_CIA): Delete.
 408         (SET_CIA, GET_CIA): Define
 409
 410 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 411
 412         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 413         regiser.
 414
 415         * configure.in (default_endian): Configure a big-endian simulator
 416         by default.
 417         * configure: Re-generate.
 418
 419 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 420
 421         * configure: Regenerated to track ../common/aclocal.m4 changes.
 422
 423 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 424
 425         * interp.c (sim_monitor): Handle Densan monitor outbyte
 426         and inbyte functions.
 427
 428 1997-12-29  Felix Lee  <flee@cygnus.com>
 429
 430         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 431
 432 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 433
 434         * Makefile.in (tmp-igen): Arrange for $zero to always be
 435         reset to zero after every instruction.
 436
 437 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 438
 439         * configure: Regenerated to track ../common/aclocal.m4 changes.
 440         * config.in: Ditto.
 441
 442 start-sanitize-vr5400
 443 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 444
 445         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 446         bit values.
 447
 448 end-sanitize-vr5400
 449 start-sanitize-vr5400
 450 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 451
 452         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 453         vr5400 with the vr5000 as the default.
 454
 455 end-sanitize-vr5400
 456 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 457
 458         * mips.igen (MSUB): Fix to work like MADD.
 459         * gencode.c (MSUB): Similarly.
 460
 461 start-sanitize-vr5400
 462 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 463
 464         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 465         vr5400.
 466
 467 end-sanitize-vr5400
 468 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 469
 470         * configure: Regenerated to track ../common/aclocal.m4 changes.
 471
 472 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 473
 474         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 475
 476 start-sanitize-vr5400
 477         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 478         (value_cc, store_cc): Implement.
 479
 480         * sim-main.h: Add 8*3*8 bit accumulator.
 481
 482         * vr5400.igen: Move mdmx instructins from here
 483         * mdmx.igen: To here - new file. Add/fix missing instructions.
 484         * mips.igen: Include mdmx.igen.
 485         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 486
 487 end-sanitize-vr5400
 488 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 489
 490         * sim-main.h (sim-fpu.h): Include.
 491
 492         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 493         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 494         using host independant sim_fpu module.
 495
 496 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 497
 498         * interp.c (signal_exception): Report internal errors with SIGABRT
 499         not SIGQUIT.
 500
 501         * sim-main.h (C0_CONFIG): New register.
 502         (signal.h): No longer include.
 503
 504         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 505
 506 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 507
 508         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 509
 510 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 511
 512         * mips.igen: Tag vr5000 instructions.
 513         (ANDI): Was missing mipsIV model, fix assembler syntax.
 514         (do_c_cond_fmt): New function.
 515         (C.cond.fmt): Handle mips I-III which do not support CC field
 516         separatly.
 517         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 518         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 519         in IV3.2 spec.
 520         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 521         vr5000 which saves LO in a GPR separatly.
 522
 523         * configure.in (enable-sim-igen): For vr5000, select vr5000
 524         specific instructions.
 525         * configure: Re-generate.
 526
 527 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 528
 529         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 530
 531         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 532         fmt_uninterpreted_64 bit cases to switch.  Convert to
 533         fmt_formatted,
 534
 535         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 536
 537         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 538         as specified in IV3.2 spec.
 539         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 540
 541 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 542
 543         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 544         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 545         (start-sanitize-r5900):
 546         (LWXC1, SWXC1): Delete from r5900 instruction set.
 547         (end-sanitize-r5900):
 548         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 549         PENDING_FILL versions of instructions.  Simplify.
 550         (X): New function.
 551         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 552         instructions.
 553         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 554         a signed value.
 555         (MTHI, MFHI): Disable code checking HI-LO.
 556
 557         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 558         global.
 559         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 560
 561 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 562
 563         * gencode.c (build_mips16_operands): Replace IPC with cia.
 564
 565         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 566         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 567         IPC to `cia'.
 568         (UndefinedResult): Replace function with macro/function
 569         combination.
 570         (sim_engine_run): Don't save PC in IPC.
 571
 572         * sim-main.h (IPC): Delete.
 573
 574         start-sanitize-vr5400
 575         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 576         (do_select): Rename function select.
 577         end-sanitize-vr5400
 578
 579         * interp.c (signal_exception, store_word, load_word,
 580         address_translation, load_memory, store_memory, cache_op,
 581         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 582         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 583         current instruction address - cia - argument.
 584         (sim_read, sim_write): Call address_translation directly.
 585         (sim_engine_run): Rename variable vaddr to cia.
 586         (signal_exception): Pass cia to sim_monitor
 587
 588         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 589         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 590         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 591
 592         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 593         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 594         SIM_ASSERT.
 595
 596         * interp.c (signal_exception): Pass restart address to
 597         sim_engine_restart.
 598
 599         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 600         idecode.o): Add dependency.
 601
 602         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 603         Delete definitions
 604         (DELAY_SLOT): Update NIA not PC with branch address.
 605         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 606
 607         * mips.igen: Use CIA not PC in branch calculations.
 608         (illegal): Call SignalException.
 609         (BEQ, ADDIU): Fix assembler.
 610
 611 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 612
 613         * m16.igen (JALX): Was missing.
 614
 615         * configure.in (enable-sim-igen): New configuration option.
 616         * configure: Re-generate.
 617
 618         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 619
 620         * interp.c (load_memory, store_memory): Delete parameter RAW.
 621         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 622         bypassing {load,store}_memory.
 623
 624         * sim-main.h (ByteSwapMem): Delete definition.
 625
 626         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 627
 628         * interp.c (sim_do_command, sim_commands): Delete mips specific
 629         commands.  Handled by module sim-options.
 630
 631         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 632         (WITH_MODULO_MEMORY): Define.
 633
 634         * interp.c (sim_info): Delete code printing memory size.
 635
 636         * interp.c (mips_size): Nee sim_size, delete function.
 637         (power2): Delete.
 638         (monitor, monitor_base, monitor_size): Delete global variables.
 639         (sim_open, sim_close): Delete code creating monitor and other
 640         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 641         manage memory regions.
 642         (load_memory, store_memory): Use sim-core for memory model.
 643
 644         * interp.c (address_translation): Delete all memory map code
 645         except line forcing 32 bit addresses.
 646
 647 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 648
 649         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 650         trace options.
 651
 652         * interp.c (logfh, logfile): Delete globals.
 653         (sim_open, sim_close): Delete code opening & closing log file.
 654         (mips_option_handler): Delete -l and -n options.
 655         (OPTION mips_options): Ditto.
 656
 657         * interp.c (OPTION mips_options): Rename option trace to dinero.
 658         (mips_option_handler): Update.
 659
 660 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 661
 662         * interp.c (fetch_str): New function.
 663         (sim_monitor): Rewrite using sim_read & sim_write.
 664         (sim_open): Check magic number.
 665         (sim_open): Write monitor vectors into memory using sim_write.
 666         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 667         (sim_read, sim_write): Simplify - transfer data one byte at a
 668         time.
 669         (load_memory, store_memory): Clarify meaning of parameter RAW.
 670
 671         * sim-main.h (isHOST): Defete definition.
 672         (isTARGET): Mark as depreciated.
 673         (address_translation): Delete parameter HOST.
 674
 675         * interp.c (address_translation): Delete parameter HOST.
 676
 677 start-sanitize-tx49
 678 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 679
 680         * gencode.c: Add tx49 configury and insns.
 681         * configure.in: Add tx49 configury.
 682         * configure: Update.
 683
 684 end-sanitize-tx49
 685 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 686
 687         * mips.igen:
 688
 689         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 690         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 691
 692 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 693
 694         * mips.igen: Add model filter field to records.
 695
 696 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 697
 698         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 699
 700         interp.c (sim_engine_run): Do not compile function sim_engine_run
 701         when WITH_IGEN == 1.
 702
 703         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 704         target architecture.
 705
 706         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 707         igen. Replace with configuration variables sim_igen_flags /
 708         sim_m16_flags.
 709
 710         start-sanitize-r5900
 711         * r5900.igen: New file. Copy r5900 insns here.
 712         end-sanitize-r5900
 713         start-sanitize-vr5400
 714         * vr5400.igen: New file.
 715         end-sanitize-vr5400
 716         * m16.igen: New file.  Copy mips16 insns here.
 717         * mips.igen: From here.
 718
 719 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 720
 721         start-sanitize-vr5400
 722         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 723
 724         * configure.in: Add mips64vr5400 target.
 725         * configure: Re-generate.
 726
 727         end-sanitize-vr5400
 728         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 729         to top.
 730         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 731
 732 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 733
 734         * gencode.c (build_instruction): Follow sim_write's lead in using
 735         BigEndianMem instead of !ByteSwapMem.
 736
 737 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 738
 739         * configure.in (sim_gen): Dependent on target, select type of
 740         generator.  Always select old style generator.
 741
 742         configure: Re-generate.
 743
 744         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 745         targets.
 746         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 747         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 748         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 749         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 750         SIM_@sim_gen@_*, set by autoconf.
 751
 752 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 753
 754         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 755
 756         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 757         CURRENT_FLOATING_POINT instead.
 758
 759         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 760         (address_translation): Raise exception InstructionFetch when
 761         translation fails and isINSTRUCTION.
 762
 763         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 764         sim_engine_run): Change type of of vaddr and paddr to
 765         address_word.
 766         (address_translation, prefetch, load_memory, store_memory,
 767         cache_op): Change type of vAddr and pAddr to address_word.
 768
 769         * gencode.c (build_instruction): Change type of vaddr and paddr to
 770         address_word.
 771
 772 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 773
 774         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 775         macro to obtain result of ALU op.
 776
 777 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 778
 779         * interp.c (sim_info): Call profile_print.
 780
 781 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 782
 783         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 784
 785         * sim-main.h (WITH_PROFILE): Do not define, defined in
 786         common/sim-config.h.  Use sim-profile module.
 787         (simPROFILE): Delete defintion.
 788
 789         * interp.c (PROFILE): Delete definition.
 790         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 791         (sim_close): Delete code writing profile histogram.
 792         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 793         Delete.
 794         (sim_engine_run): Delete code profiling the PC.
 795
 796 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 797
 798         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 799
 800         * interp.c (sim_monitor): Make register pointers of type
 801         unsigned_word*.
 802
 803         * sim-main.h: Make registers of type unsigned_word not
 804         signed_word.
 805
 806 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 807
 808 start-sanitize-r5900
 809         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 810         ...): Move to sim-main.h
 811
 812 end-sanitize-r5900
 813         * interp.c (sync_operation): Rename from SyncOperation, make
 814         global, add SD argument.
 815         (prefetch): Rename from Prefetch, make global, add SD argument.
 816         (decode_coproc): Make global.
 817
 818         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 819
 820         * gencode.c (build_instruction): Generate DecodeCoproc not
 821         decode_coproc calls.
 822
 823         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 824         (SizeFGR): Move to sim-main.h
 825         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 826         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 827         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 828         sim-main.h.
 829         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 830         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 831         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 832         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 833         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 834         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 835
 836         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 837         exception.
 838         (sim-alu.h): Include.
 839         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 840         (sim_cia): Typedef to instruction_address.
 841
 842 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 843
 844         * Makefile.in (interp.o): Rename generated file engine.c to
 845         oengine.c.
 846
 847         * interp.c: Update.
 848
 849 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 850
 851         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 852
 853 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 854
 855         * gencode.c (build_instruction): For "FPSQRT", output correct
 856         number of arguments to Recip.
 857
 858 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 859
 860         * Makefile.in (interp.o): Depends on sim-main.h
 861
 862         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 863
 864         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 865         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 866         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 867         STATE, DSSTATE): Define
 868         (GPR, FGRIDX, ..): Define.
 869
 870         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 871         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 872         (GPR, FGRIDX, ...): Delete macros.
 873
 874         * interp.c: Update names to match defines from sim-main.h
 875
 876 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 877
 878         * interp.c (sim_monitor): Add SD argument.
 879         (sim_warning): Delete.  Replace calls with calls to
 880         sim_io_eprintf.
 881         (sim_error): Delete. Replace calls with sim_io_error.
 882         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 883         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 884         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 885         argument.
 886         (mips_size): Rename from sim_size. Add SD argument.
 887
 888         * interp.c (simulator): Delete global variable.
 889         (callback): Delete global variable.
 890         (mips_option_handler, sim_open, sim_write, sim_read,
 891         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 892         sim_size,sim_monitor): Use sim_io_* not callback->*.
 893         (sim_open): ZALLOC simulator struct.
 894         (PROFILE): Do not define.
 895
 896 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 897
 898         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 899         support.h with corresponding code.
 900
 901         * sim-main.h (word64, uword64), support.h: Move definition to
 902         sim-main.h.
 903         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 904
 905         * support.h: Delete
 906         * Makefile.in: Update dependencies
 907         * interp.c: Do not include.
 908
 909 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 910
 911         * interp.c (address_translation, load_memory, store_memory,
 912         cache_op): Rename to from AddressTranslation et.al., make global,
 913         add SD argument
 914
 915         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 916         CacheOp): Define.
 917
 918         * interp.c (SignalException): Rename to signal_exception, make
 919         global.
 920
 921         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 922
 923         * sim-main.h (SignalException, SignalExceptionInterrupt,
 924         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 925         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 926         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 927         Define.
 928
 929         * interp.c, support.h: Use.
 930
 931 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 932
 933         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 934         to value_fpr / store_fpr. Add SD argument.
 935         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 936         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 937
 938         * sim-main.h (ValueFPR, StoreFPR): Define.
 939
 940 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 941
 942         * interp.c (sim_engine_run): Check consistency between configure
 943         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 944         and HASFPU.
 945
 946         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 947         (mips_fpu): Configure WITH_FLOATING_POINT.
 948         (mips_endian): Configure WITH_TARGET_ENDIAN.
 949         * configure: Update.
 950
 951 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 952
 953         * configure: Regenerated to track ../common/aclocal.m4 changes.
 954
 955 start-sanitize-r5900
 956 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 957
 958         * interp.c (MAX_REG): Allow up-to 128 registers.
 959         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 960         (REGISTER_SA): Ditto.
 961         (sim_open): Initialize register_widths for r5900 specific
 962         registers.
 963         (sim_fetch_register, sim_store_register): Check for request of
 964         r5900 specific SA register.  Check for request for hi 64 bits of
 965         r5900 specific registers.
 966
 967 end-sanitize-r5900
 968 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 969
 970         * configure: Regenerated.
 971
 972 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 973
 974         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 975
 976 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 977
 978         * gencode.c (print_igen_insn_models): Assume certain architectures
 979         include all mips* instructions.
 980         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 981         instruction.
 982
 983         * Makefile.in (tmp.igen): Add target. Generate igen input from
 984         gencode file.
 985
 986         * gencode.c (FEATURE_IGEN): Define.
 987         (main): Add --igen option.  Generate output in igen format.
 988         (process_instructions): Format output according to igen option.
 989         (print_igen_insn_format): New function.
 990         (print_igen_insn_models): New function.
 991         (process_instructions): Only issue warnings and ignore
 992         instructions when no FEATURE_IGEN.
 993
 994 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 995
 996         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 997         MIPS targets.
 998
 999 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1000
1001         * configure: Regenerated to track ../common/aclocal.m4 changes.
1002
1003 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1004
1005         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1006         SIM_RESERVED_BITS): Delete, moved to common.
1007         (SIM_EXTRA_CFLAGS): Update.
1008
1009 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1010
1011         * configure.in: Configure non-strict memory alignment.
1012         * configure: Regenerated to track ../common/aclocal.m4 changes.
1013
1014 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1015
1016         * configure: Regenerated to track ../common/aclocal.m4 changes.
1017
1018 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1019
1020         * gencode.c (SDBBP,DERET): Added (3900) insns.
1021         (RFE): Turn on for 3900.
1022         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1023         (dsstate): Made global.
1024         (SUBTARGET_R3900): Added.
1025         (CANCELDELAYSLOT): New.
1026         (SignalException): Ignore SystemCall rather than ignore and
1027         terminate.  Add DebugBreakPoint handling.
1028         (decode_coproc): New insns RFE, DERET; and new registers Debug
1029         and DEPC protected by SUBTARGET_R3900.
1030         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1031         bits explicitly.
1032         * Makefile.in,configure.in: Add mips subtarget option.
1033         * configure: Update.
1034
1035 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1036
1037         * gencode.c: Add r3900 (tx39).
1038
1039 start-sanitize-tx19
1040         * gencode.c: Fix some configuration problems by improving
1041         the relationship between tx19 and tx39.
1042 end-sanitize-tx19
1043
1044 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1045
1046         * gencode.c (build_instruction): Don't need to subtract 4 for
1047         JALR, just 2.
1048
1049 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1050
1051         * interp.c: Correct some HASFPU problems.
1052
1053 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1054
1055         * configure: Regenerated to track ../common/aclocal.m4 changes.
1056
1057 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1058
1059         * interp.c (mips_options): Fix samples option short form, should
1060         be `x'.
1061
1062 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1063
1064         * interp.c (sim_info): Enable info code.  Was just returning.
1065
1066 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1067
1068         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1069         MFC0.
1070
1071 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1072
1073         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1074         constants.
1075         (build_instruction): Ditto for LL.
1076
1077 start-sanitize-tx19
1078 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1079
1080         * mips/configure.in, mips/gencode: Add tx19/r1900.
1081
1082 end-sanitize-tx19
1083 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1084
1085         * configure: Regenerated to track ../common/aclocal.m4 changes.
1086
1087 start-sanitize-r5900
1088 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1089
1090         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1091         for overflow due to ABS of MININT, set result to MAXINT.
1092         (build_instruction): For "psrlvw", signextend bit 31.
1093
1094 end-sanitize-r5900
1095 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1096
1097         * configure: Regenerated to track ../common/aclocal.m4 changes.
1098         * config.in: Ditto.
1099
1100 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1101
1102         * interp.c (sim_open): Add call to sim_analyze_program, update
1103         call to sim_config.
1104
1105 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1106
1107         * interp.c (sim_kill): Delete.
1108         (sim_create_inferior): Add ABFD argument. Set PC from same.
1109         (sim_load): Move code initializing trap handlers from here.
1110         (sim_open): To here.
1111         (sim_load): Delete, use sim-hload.c.
1112
1113         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1114
1115 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1116
1117         * configure: Regenerated to track ../common/aclocal.m4 changes.
1118         * config.in: Ditto.
1119
1120 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1121
1122         * interp.c (sim_open): Add ABFD argument.
1123         (sim_load): Move call to sim_config from here.
1124         (sim_open): To here.  Check return status.
1125
1126 start-sanitize-r5900
1127         * gencode.c (build_instruction): Do not define x8000000000000000,
1128         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1129
1130 end-sanitize-r5900
1131 start-sanitize-r5900
1132 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1133
1134         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1135         "pdivuw" check for overflow due to signed divide by -1.
1136
1137 end-sanitize-r5900
1138 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1139
1140         * gencode.c (build_instruction): Two arg MADD should
1141         not assign result to $0.
1142
1143 start-sanitize-r5900
1144 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1145
1146         * gencode.c (build_instruction): For "ppac5" use unsigned
1147         arrithmetic so that the sign bit doesn't smear when right shifted.
1148         (build_instruction): For "pdiv" perform sign extension when
1149         storing results in HI and LO.
1150         (build_instructions): For "pdiv" and "pdivbw" check for
1151         divide-by-zero.
1152         (build_instruction): For "pmfhl.slw" update hi part of dest
1153         register as well as low part.
1154         (build_instruction): For "pmfhl" portably handle long long values.
1155         (build_instruction): For "pmfhl.sh" correctly negative values.
1156         Store half words 2 and three in the correct place.
1157         (build_instruction): For "psllvw", sign extend value after shift.
1158
1159 end-sanitize-r5900
1160 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1161
1162         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1163         * sim/mips/configure.in: Regenerate.
1164
1165 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1166
1167         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1168         signed8, unsigned8 et.al. types.
1169
1170 start-sanitize-r5900
1171         * gencode.c (build_instruction): For PMULTU* do not sign extend
1172         registers.  Make generated code easier to debug.
1173
1174 end-sanitize-r5900
1175         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1176         hosts when selecting subreg.
1177
1178 start-sanitize-r5900
1179 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1180
1181         * gencode.c (type_for_data_len): For 32bit operations concerned
1182         with overflow, perform op using 64bits.
1183         (build_instruction): For PADD, always compute operation using type
1184         returned by type_for_data_len.
1185         (build_instruction): For PSUBU, when overflow, saturate to zero as
1186         actually underflow.
1187
1188 end-sanitize-r5900
1189 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1190
1191 start-sanitize-r5900
1192         * gencode.c (build_instruction): Handle "pext5" according to
1193         version 1.95 of the r5900 ISA.
1194
1195         * gencode.c (build_instruction): Handle "ppac5" according to
1196         version 1.95 of the r5900 ISA.
1197
1198 end-sanitize-r5900
1199         * interp.c (sim_engine_run): Reset the ZERO register to zero
1200         regardless of FEATURE_WARN_ZERO.
1201         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1202
1203 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1204
1205         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1206         (SignalException): For BreakPoints ignore any mode bits and just
1207         save the PC.
1208         (SignalException): Always set the CAUSE register.
1209
1210 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1211
1212         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1213         exception has been taken.
1214
1215         * interp.c: Implement the ERET and mt/f sr instructions.
1216
1217 start-sanitize-r5900
1218 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1219
1220         * gencode.c (build_instruction): For paddu, extract unsigned
1221         sub-fields.
1222
1223         * gencode.c (build_instruction): Saturate padds instead of padd
1224         instructions.
1225
1226 end-sanitize-r5900
1227 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1228
1229         * interp.c (SignalException): Don't bother restarting an
1230         interrupt.
1231
1232 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1233
1234         * interp.c (SignalException): Really take an interrupt.
1235         (interrupt_event): Only deliver interrupts when enabled.
1236
1237 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1238
1239         * interp.c (sim_info): Only print info when verbose.
1240         (sim_info) Use sim_io_printf for output.
1241
1242 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1243
1244         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1245         mips architectures.
1246
1247 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1248
1249         * interp.c (sim_do_command): Check for common commands if a
1250         simulator specific command fails.
1251
1252 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1253
1254         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1255         and simBE when DEBUG is defined.
1256
1257 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1258
1259         * interp.c (interrupt_event): New function.  Pass exception event
1260         onto exception handler.
1261
1262         * configure.in: Check for stdlib.h.
1263         * configure: Regenerate.
1264
1265         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1266         variable declaration.
1267         (build_instruction): Initialize memval1.
1268         (build_instruction): Add UNUSED attribute to byte, bigend,
1269         reverse.
1270         (build_operands): Ditto.
1271
1272         * interp.c: Fix GCC warnings.
1273         (sim_get_quit_code): Delete.
1274
1275         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1276         * Makefile.in: Ditto.
1277         * configure: Re-generate.
1278
1279         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1280
1281 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1282
1283         * interp.c (mips_option_handler): New function parse argumes using
1284         sim-options.
1285         (myname): Replace with STATE_MY_NAME.
1286         (sim_open): Delete check for host endianness - performed by
1287         sim_config.
1288         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1289         (sim_open): Move much of the initialization from here.
1290         (sim_load): To here.  After the image has been loaded and
1291         endianness set.
1292         (sim_open): Move ColdReset from here.
1293         (sim_create_inferior): To here.
1294         (sim_open): Make FP check less dependant on host endianness.
1295
1296         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1297         run.
1298         * interp.c (sim_set_callbacks): Delete.
1299
1300         * interp.c (membank, membank_base, membank_size): Replace with
1301         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1302         (sim_open): Remove call to callback->init. gdb/run do this.
1303
1304         * interp.c: Update
1305
1306         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1307
1308         * interp.c (big_endian_p): Delete, replaced by
1309         current_target_byte_order.
1310
1311 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1312
1313         * interp.c (host_read_long, host_read_word, host_swap_word,
1314         host_swap_long): Delete. Using common sim-endian.
1315         (sim_fetch_register, sim_store_register): Use H2T.
1316         (pipeline_ticks): Delete.  Handled by sim-events.
1317         (sim_info): Update.
1318         (sim_engine_run): Update.
1319
1320 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1321
1322         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1323         reason from here.
1324         (SignalException): To here. Signal using sim_engine_halt.
1325         (sim_stop_reason): Delete, moved to common.
1326
1327 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1328
1329         * interp.c (sim_open): Add callback argument.
1330         (sim_set_callbacks): Delete SIM_DESC argument.
1331         (sim_size): Ditto.
1332
1333 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1334
1335         * Makefile.in (SIM_OBJS): Add common modules.
1336
1337         * interp.c (sim_set_callbacks): Also set SD callback.
1338         (set_endianness, xfer_*, swap_*): Delete.
1339         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1340         Change to functions using sim-endian macros.
1341         (control_c, sim_stop): Delete, use common version.
1342         (simulate): Convert into.
1343         (sim_engine_run): This function.
1344         (sim_resume): Delete.
1345
1346         * interp.c (simulation): New variable - the simulator object.
1347         (sim_kind): Delete global - merged into simulation.
1348         (sim_load): Cleanup.  Move PC assignment from here.
1349         (sim_create_inferior): To here.
1350
1351         * sim-main.h: New file.
1352         * interp.c (sim-main.h): Include.
1353
1354 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1355
1356         * configure: Regenerated to track ../common/aclocal.m4 changes.
1357
1358 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1359
1360         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1361
1362 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1363
1364         * gencode.c (build_instruction): DIV instructions: check
1365         for division by zero and integer overflow before using
1366         host's division operation.
1367
1368 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1369
1370         * Makefile.in (SIM_OBJS): Add sim-load.o.
1371         * interp.c: #include bfd.h.
1372         (target_byte_order): Delete.
1373         (sim_kind, myname, big_endian_p): New static locals.
1374         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1375         after argument parsing.  Recognize -E arg, set endianness accordingly.
1376         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1377         load file into simulator.  Set PC from bfd.
1378         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1379         (set_endianness): Use big_endian_p instead of target_byte_order.
1380
1381 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1382
1383         * interp.c (sim_size): Delete prototype - conflicts with
1384         definition in remote-sim.h.  Correct definition.
1385
1386 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1387
1388         * configure: Regenerated to track ../common/aclocal.m4 changes.
1389         * config.in: Ditto.
1390
1391 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1392
1393         * interp.c (sim_open): New arg `kind'.
1394
1395         * configure: Regenerated to track ../common/aclocal.m4 changes.
1396
1397 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1398
1399         * configure: Regenerated to track ../common/aclocal.m4 changes.
1400
1401 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1402
1403         * interp.c (sim_open): Set optind to 0 before calling getopt.
1404
1405 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1406
1407         * configure: Regenerated to track ../common/aclocal.m4 changes.
1408
1409 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1410
1411         * interp.c : Replace uses of pr_addr with pr_uword64
1412         where the bit length is always 64 independent of SIM_ADDR.
1413         (pr_uword64) : added.
1414
1415 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1416
1417         * configure: Re-generate.
1418
1419 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1420
1421         * configure: Regenerate to track ../common/aclocal.m4 changes.
1422
1423 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1424
1425         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1426         in argv form.
1427         (other sim_*): New SIM_DESC argument.
1428
1429 start-sanitize-r5900
1430 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1431
1432         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1433         Change values to avoid overloading DOUBLEWORD which is tested
1434         for all insns.
1435         * gencode.c: reinstate "offending code".
1436
1437 end-sanitize-r5900
1438 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1439
1440         * interp.c: Fix printing of addresses for non-64-bit targets.
1441         (pr_addr): Add function to print address based on size.
1442 start-sanitize-r5900
1443         * gencode.c: #ifdef out offending code until a permanent fix
1444         can be added.  Code is causing build errors for non-5900 mips targets.
1445 end-sanitize-r5900
1446
1447 start-sanitize-r5900
1448 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1449
1450         * gencode.c (process_instructions): Correct test for ISA dependent
1451         architecture bits in isa field of MIPS_DECODE.
1452
1453 end-sanitize-r5900
1454 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1455
1456         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1457
1458 start-sanitize-r5900
1459 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1460
1461         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1462         PMADDUW.
1463
1464 end-sanitize-r5900
1465 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1466
1467         * gencode.c (build_mips16_operands): Correct computation of base
1468         address for extended PC relative instruction.
1469
1470 start-sanitize-r5900
1471 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1472
1473         * Makefile.in, configure, configure.in, gencode.c,
1474         interp.c, support.h: add r5900.
1475
1476 end-sanitize-r5900
1477 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1478
1479         * interp.c (mips16_entry): Add support for floating point cases.
1480         (SignalException): Pass floating point cases to mips16_entry.
1481         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1482         registers.
1483         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1484         or fmt_word.
1485         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1486         and then set the state to fmt_uninterpreted.
1487         (COP_SW): Temporarily set the state to fmt_word while calling
1488         ValueFPR.
1489
1490 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1491
1492         * gencode.c (build_instruction): The high order may be set in the
1493         comparison flags at any ISA level, not just ISA 4.
1494
1495 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1496
1497         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1498         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1499         * configure.in: sinclude ../common/aclocal.m4.
1500         * configure: Regenerated.
1501
1502 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1503
1504         * configure: Rebuild after change to aclocal.m4.
1505
1506 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1507
1508         * configure configure.in Makefile.in:  Update to new configure
1509         scheme which is more compatible with WinGDB builds.
1510         * configure.in:  Improve comment on how to run autoconf.
1511         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1512         * Makefile.in:  Use autoconf substitution to install common
1513         makefile fragment.
1514
1515 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1516
1517         * gencode.c (build_instruction): Use BigEndianCPU instead of
1518         ByteSwapMem.
1519
1520 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1521
1522         * interp.c (sim_monitor): Make output to stdout visible in
1523         wingdb's I/O log window.
1524
1525 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1526
1527         * support.h: Undo previous change to SIGTRAP
1528         and SIGQUIT values.
1529
1530 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1531
1532         * interp.c (store_word, load_word): New static functions.
1533         (mips16_entry): New static function.
1534         (SignalException): Look for mips16 entry and exit instructions.
1535         (simulate): Use the correct index when setting fpr_state after
1536         doing a pending move.
1537
1538 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1539
1540         * interp.c: Fix byte-swapping code throughout to work on
1541         both little- and big-endian hosts.
1542
1543 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1544
1545         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1546         with gdb/config/i386/xm-windows.h.
1547
1548 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1549
1550         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1551         that messes up arithmetic shifts.
1552
1553 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1554
1555         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1556         SIGTRAP and SIGQUIT for _WIN32.
1557
1558 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1559
1560         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1561         force a 64 bit multiplication.
1562         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1563         destination register is 0, since that is the default mips16 nop
1564         instruction.
1565
1566 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1567
1568         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1569         (build_endian_shift): Don't check proc64.
1570         (build_instruction): Always set memval to uword64.  Cast op2 to
1571         uword64 when shifting it left in memory instructions.  Always use
1572         the same code for stores--don't special case proc64.
1573
1574         * gencode.c (build_mips16_operands): Fix base PC value for PC
1575         relative operands.
1576         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1577         jal instruction.
1578         * interp.c (simJALDELAYSLOT): Define.
1579         (JALDELAYSLOT): Define.
1580         (INDELAYSLOT, INJALDELAYSLOT): Define.
1581         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1582
1583 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1584
1585         * interp.c (sim_open): add flush_cache as a PMON routine
1586         (sim_monitor): handle flush_cache by ignoring it
1587
1588 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1589
1590         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1591         BigEndianMem.
1592         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1593         (BigEndianMem): Rename to ByteSwapMem and change sense.
1594         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1595         BigEndianMem references to !ByteSwapMem.
1596         (set_endianness): New function, with prototype.
1597         (sim_open): Call set_endianness.
1598         (sim_info): Use simBE instead of BigEndianMem.
1599         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1600         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1601         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1602         ifdefs, keeping the prototype declaration.
1603         (swap_word): Rewrite correctly.
1604         (ColdReset): Delete references to CONFIG.  Delete endianness related
1605         code; moved to set_endianness.
1606
1607 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1608
1609         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1610         * interp.c (CHECKHILO): Define away.
1611         (simSIGINT): New macro.
1612         (membank_size): Increase from 1MB to 2MB.
1613         (control_c): New function.
1614         (sim_resume): Rename parameter signal to signal_number.  Add local
1615         variable prev.  Call signal before and after simulate.
1616         (sim_stop_reason): Add simSIGINT support.
1617         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1618         functions always.
1619         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1620         if logfh is NULL.
1621         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1622         a call to sim_warning.
1623
1624 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1625
1626         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1627         16 bit instructions.
1628
1629 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1630
1631         Add support for mips16 (16 bit MIPS implementation):
1632         * gencode.c (inst_type): Add mips16 instruction encoding types.
1633         (GETDATASIZEINSN): Define.
1634         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1635         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1636         mtlo.
1637         (MIPS16_DECODE): New table, for mips16 instructions.
1638         (bitmap_val): New static function.
1639         (struct mips16_op): Define.
1640         (mips16_op_table): New table, for mips16 operands.
1641         (build_mips16_operands): New static function.
1642         (process_instructions): If PC is odd, decode a mips16
1643         instruction.  Break out instruction handling into new
1644         build_instruction function.
1645         (build_instruction): New static function, broken out of
1646         process_instructions.  Check modifiers rather than flags for SHIFT
1647         bit count and m[ft]{hi,lo} direction.
1648         (usage): Pass program name to fprintf.
1649         (main): Remove unused variable this_option_optind.  Change
1650         ``*loptarg++'' to ``loptarg++''.
1651         (my_strtoul): Parenthesize && within ||.
1652         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1653         (simulate): If PC is odd, fetch a 16 bit instruction, and
1654         increment PC by 2 rather than 4.
1655         * configure.in: Add case for mips16*-*-*.
1656         * configure: Rebuild.
1657
1658 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1659
1660         * interp.c: Allow -t to enable tracing in standalone simulator.
1661         Fix garbage output in trace file and error messages.
1662
1663 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1664
1665         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1666         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1667         * configure.in: Simplify using macros in ../common/aclocal.m4.
1668         * configure: Regenerated.
1669         * tconfig.in: New file.
1670
1671 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1672
1673         * interp.c: Fix bugs in 64-bit port.
1674         Use ansi function declarations for msvc compiler.
1675         Initialize and test file pointer in trace code.
1676         Prevent duplicate definition of LAST_EMED_REGNUM.
1677
1678 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1679
1680         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1681
1682 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1683
1684         * interp.c (SignalException): Check for explicit terminating
1685         breakpoint value.
1686         * gencode.c: Pass instruction value through SignalException()
1687         calls for Trap, Breakpoint and Syscall.
1688
1689 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1690
1691         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1692         only used on those hosts that provide it.
1693         * configure.in: Add sqrt() to list of functions to be checked for.
1694         * config.in: Re-generated.
1695         * configure: Re-generated.
1696
1697 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1698
1699         * gencode.c (process_instructions): Call build_endian_shift when
1700         expanding STORE RIGHT, to fix swr.
1701         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1702         clear the high bits.
1703         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1704         Fix float to int conversions to produce signed values.
1705
1706 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1707
1708         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1709         (process_instructions): Correct handling of nor instruction.
1710         Correct shift count for 32 bit shift instructions. Correct sign
1711         extension for arithmetic shifts to not shift the number of bits in
1712         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1713         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1714         Fix madd.
1715         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1716         It's OK to have a mult follow a mult.  What's not OK is to have a
1717         mult follow an mfhi.
1718         (Convert): Comment out incorrect rounding code.
1719
1720 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1721
1722         * interp.c (sim_monitor): Improved monitor printf
1723         simulation. Tidied up simulator warnings, and added "--log" option
1724         for directing warning message output.
1725         * gencode.c: Use sim_warning() rather than WARNING macro.
1726
1727 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1728
1729         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1730         getopt1.o, rather than on gencode.c.  Link objects together.
1731         Don't link against -liberty.
1732         (gencode.o, getopt.o, getopt1.o): New targets.
1733         * gencode.c: Include <ctype.h> and "ansidecl.h".
1734         (AND): Undefine after including "ansidecl.h".
1735         (ULONG_MAX): Define if not defined.
1736         (OP_*): Don't define macros; now defined in opcode/mips.h.
1737         (main): Call my_strtoul rather than strtoul.
1738         (my_strtoul): New static function.
1739
1740 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1741
1742         * gencode.c (process_instructions):  Generate word64 and uword64
1743         instead of `long long' and `unsigned long long' data types.
1744         * interp.c:  #include sysdep.h to get signals, and define default
1745         for SIGBUS.
1746         * (Convert):  Work around for Visual-C++ compiler bug with type
1747         conversion.
1748         * support.h:  Make things compile under Visual-C++ by using
1749         __int64 instead of `long long'.  Change many refs to long long
1750         into word64/uword64 typedefs.
1751
1752 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1753
1754         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1755         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1756         (docdir): Removed.
1757         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1758         (AC_PROG_INSTALL): Added.
1759         (AC_PROG_CC): Moved to before configure.host call.
1760         * configure: Rebuilt.
1761
1762 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1763
1764         * configure.in: Define @SIMCONF@ depending on mips target.
1765         * configure: Rebuild.
1766         * Makefile.in (run): Add @SIMCONF@ to control simulator
1767         construction.
1768         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1769         * interp.c: Remove some debugging, provide more detailed error
1770         messages, update memory accesses to use LOADDRMASK.
1771
1772 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1773
1774         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1775         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1776         stamp-h.
1777         * configure: Rebuild.
1778         * config.in: New file, generated by autoheader.
1779         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1780         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1781         HAVE_ANINT and HAVE_AINT, as appropriate.
1782         * Makefile.in (run): Use @LIBS@ rather than -lm.
1783         (interp.o): Depend upon config.h.
1784         (Makefile): Just rebuild Makefile.
1785         (clean): Remove stamp-h.
1786         (mostlyclean): Make the same as clean, not as distclean.
1787         (config.h, stamp-h): New targets.
1788
1789 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1790
1791         * interp.c (ColdReset): Fix boolean test. Make all simulator
1792         globals static.
1793
1794 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1795
1796         * interp.c (xfer_direct_word, xfer_direct_long,
1797         swap_direct_word, swap_direct_long, xfer_big_word,
1798         xfer_big_long, xfer_little_word, xfer_little_long,
1799         swap_word,swap_long): Added.
1800         * interp.c (ColdReset): Provide function indirection to
1801         host<->simulated_target transfer routines.
1802         * interp.c (sim_store_register, sim_fetch_register): Updated to
1803         make use of indirected transfer routines.
1804
1805 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1806
1807         * gencode.c (process_instructions): Ensure FP ABS instruction
1808         recognised.
1809         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1810         system call support.
1811
1812 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1813
1814         * interp.c (sim_do_command): Complain if callback structure not
1815         initialised.
1816
1817 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1818
1819         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1820         support for Sun hosts.
1821         * Makefile.in (gencode): Ensure the host compiler and libraries
1822         used for cross-hosted build.
1823
1824 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1825
1826         * interp.c, gencode.c: Some more (TODO) tidying.
1827
1828 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1829
1830         * gencode.c, interp.c: Replaced explicit long long references with
1831         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1832         * support.h (SET64LO, SET64HI): Macros added.
1833
1834 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1835
1836         * configure: Regenerate with autoconf 2.7.
1837
1838 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1839
1840         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1841         * support.h: Remove superfluous "1" from #if.
1842         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1843
1844 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1845
1846         * interp.c (StoreFPR): Control UndefinedResult() call on
1847         WARN_RESULT manifest.
1848
1849 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1850
1851         * gencode.c: Tidied instruction decoding, and added FP instruction
1852         support.
1853
1854         * interp.c: Added dineroIII, and BSD profiling support. Also
1855         run-time FP handling.
1856
1857 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1858
1859         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1860         gencode.c, interp.c, support.h: created.