sim/mips/ChangeLog

   1 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
   4
   5 start-sanitize-vr5400
   6         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
   7         (value_cc, store_cc): Implement.
   8
   9         * sim-main.h: Add 8*3*8 bit accumulator.
  10
  11         * vr5400.igen: Move mdmx instructins from here
  12         * mdmx.igen: To here - new file. Add/fix missing instructions.
  13         * mips.igen: Include mdmx.igen.
  14         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
  15
  16 start-sanitize-vr5400
  17 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  18
  19         * sim-main.h (sim-fpu.h): Include.
  20
  21         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
  22         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
  23         using host independant sim_fpu module.
  24
  25 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  26
  27         * interp.c (signal_exception): Report internal errors with SIGABRT
  28         not SIGQUIT.
  29
  30         * sim-main.h (C0_CONFIG): New register.
  31         (signal.h): No longer include.
  32
  33         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
  34
  35 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
  36
  37         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
  38
  39 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  40
  41         * mips.igen: Tag vr5000 instructions.
  42         (ANDI): Was missing mipsIV model, fix assembler syntax.
  43         (do_c_cond_fmt): New function.
  44         (C.cond.fmt): Handle mips I-III which do not support CC field
  45         separatly.
  46         (bc1): Handle mips IV which do not have a delaed FCC separatly.
  47         (SDR): Mask paddr when BigEndianMem, not the converse as specified
  48         in IV3.2 spec.
  49         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
  50         vr5000 which saves LO in a GPR separatly.
  51
  52         * configure.in (enable-sim-igen): For vr5000, select vr5000
  53         specific instructions.
  54         * configure: Re-generate.
  55
  56 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  57
  58         * Makefile.in (SIM_OBJS): Add sim-fpu module.
  59
  60         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
  61         fmt_uninterpreted_64 bit cases to switch.  Convert to
  62         fmt_formatted,
  63
  64         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
  65
  66         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
  67         as specified in IV3.2 spec.
  68         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
  69
  70 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  71
  72         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
  73         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
  74         (start-sanitize-r5900):
  75         (LWXC1, SWXC1): Delete from r5900 instruction set.
  76         (end-sanitize-r5900):
  77         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
  78         PENDING_FILL versions of instructions.  Simplify.
  79         (X): New function.
  80         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
  81         instructions.
  82         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
  83         a signed value.
  84         (MTHI, MFHI): Disable code checking HI-LO.
  85
  86         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
  87         global.
  88         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
  89
  90 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  91
  92         * gencode.c (build_mips16_operands): Replace IPC with cia.
  93
  94         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
  95         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
  96         IPC to `cia'.
  97         (UndefinedResult): Replace function with macro/function
  98         combination.
  99         (sim_engine_run): Don't save PC in IPC.
 100
 101         * sim-main.h (IPC): Delete.
 102
 103         start-sanitize-vr5400
 104         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 105         (do_select): Rename function select.
 106         end-sanitize-vr5400
 107
 108         * interp.c (signal_exception, store_word, load_word,
 109         address_translation, load_memory, store_memory, cache_op,
 110         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 111         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 112         current instruction address - cia - argument.
 113         (sim_read, sim_write): Call address_translation directly.
 114         (sim_engine_run): Rename variable vaddr to cia.
 115         (signal_exception): Pass cia to sim_monitor
 116
 117         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 118         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 119         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 120
 121         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 122         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 123         SIM_ASSERT.
 124
 125         * interp.c (signal_exception): Pass restart address to
 126         sim_engine_restart.
 127
 128         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 129         idecode.o): Add dependency.
 130
 131         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 132         Delete definitions
 133         (DELAY_SLOT): Update NIA not PC with branch address.
 134         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 135
 136         * mips.igen: Use CIA not PC in branch calculations.
 137         (illegal): Call SignalException.
 138         (BEQ, ADDIU): Fix assembler.
 139
 140 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 141
 142         * m16.igen (JALX): Was missing.
 143
 144         * configure.in (enable-sim-igen): New configuration option.
 145         * configure: Re-generate.
 146
 147         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 148
 149         * interp.c (load_memory, store_memory): Delete parameter RAW.
 150         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 151         bypassing {load,store}_memory.
 152
 153         * sim-main.h (ByteSwapMem): Delete definition.
 154
 155         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 156
 157         * interp.c (sim_do_command, sim_commands): Delete mips specific
 158         commands.  Handled by module sim-options.
 159
 160         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 161         (WITH_MODULO_MEMORY): Define.
 162
 163         * interp.c (sim_info): Delete code printing memory size.
 164
 165         * interp.c (mips_size): Nee sim_size, delete function.
 166         (power2): Delete.
 167         (monitor, monitor_base, monitor_size): Delete global variables.
 168         (sim_open, sim_close): Delete code creating monitor and other
 169         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 170         manage memory regions.
 171         (load_memory, store_memory): Use sim-core for memory model.
 172
 173         * interp.c (address_translation): Delete all memory map code
 174         except line forcing 32 bit addresses.
 175
 176 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 177
 178         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 179         trace options.
 180
 181         * interp.c (logfh, logfile): Delete globals.
 182         (sim_open, sim_close): Delete code opening & closing log file.
 183         (mips_option_handler): Delete -l and -n options.
 184         (OPTION mips_options): Ditto.
 185
 186         * interp.c (OPTION mips_options): Rename option trace to dinero.
 187         (mips_option_handler): Update.
 188
 189 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 190
 191         * interp.c (fetch_str): New function.
 192         (sim_monitor): Rewrite using sim_read & sim_write.
 193         (sim_open): Check magic number.
 194         (sim_open): Write monitor vectors into memory using sim_write.
 195         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 196         (sim_read, sim_write): Simplify - transfer data one byte at a
 197         time.
 198         (load_memory, store_memory): Clarify meaning of parameter RAW.
 199
 200         * sim-main.h (isHOST): Defete definition.
 201         (isTARGET): Mark as depreciated.
 202         (address_translation): Delete parameter HOST.
 203
 204         * interp.c (address_translation): Delete parameter HOST.
 205
 206 start-sanitize-tx49
 207 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 208
 209         * gencode.c: Add tx49 configury and insns.
 210         * configure.in: Add tx49 configury.
 211         * configure: Update.
 212
 213 end-sanitize-tx49
 214 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 215
 216         * mips.igen:
 217
 218         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 219         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 220
 221 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 222
 223         * mips.igen: Add model filter field to records.
 224
 225 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 226
 227         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 228
 229         interp.c (sim_engine_run): Do not compile function sim_engine_run
 230         when WITH_IGEN == 1.
 231
 232         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 233         target architecture.
 234
 235         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 236         igen. Replace with configuration variables sim_igen_flags /
 237         sim_m16_flags.
 238
 239         start-sanitize-r5900
 240         * r5900.igen: New file. Copy r5900 insns here.
 241         end-sanitize-r5900
 242         start-sanitize-vr5400
 243         * vr5400.igen: New file.
 244         end-sanitize-v5400
 245         * m16.igen: New file.  Copy mips16 insns here.
 246         * mips.igen: From here.
 247
 248 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 249
 250         start-sanitize-vr5400
 251         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 252
 253         * configure.in: Add mips64vr5400 target.
 254         * configure: Re-generate.
 255
 256         end-sanitize-vr5400
 257         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 258         to top.
 259         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 260
 261 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 262
 263         * gencode.c (build_instruction): Follow sim_write's lead in using
 264         BigEndianMem instead of !ByteSwapMem.
 265
 266 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 267
 268         * configure.in (sim_gen): Dependent on target, select type of
 269         generator.  Always select old style generator.
 270
 271         configure: Re-generate.
 272
 273         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 274         targets.
 275         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 276         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 277         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 278         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 279         SIM_@sim_gen@_*, set by autoconf.
 280
 281 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 282
 283         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 284
 285         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 286         CURRENT_FLOATING_POINT instead.
 287
 288         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 289         (address_translation): Raise exception InstructionFetch when
 290         translation fails and isINSTRUCTION.
 291
 292         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 293         sim_engine_run): Change type of of vaddr and paddr to
 294         address_word.
 295         (address_translation, prefetch, load_memory, store_memory,
 296         cache_op): Change type of vAddr and pAddr to address_word.
 297
 298         * gencode.c (build_instruction): Change type of vaddr and paddr to
 299         address_word.
 300
 301 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 302
 303         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 304         macro to obtain result of ALU op.
 305
 306 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 307
 308         * interp.c (sim_info): Call profile_print.
 309
 310 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 311
 312         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 313
 314         * sim-main.h (WITH_PROFILE): Do not define, defined in
 315         common/sim-config.h.  Use sim-profile module.
 316         (simPROFILE): Delete defintion.
 317
 318         * interp.c (PROFILE): Delete definition.
 319         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 320         (sim_close): Delete code writing profile histogram.
 321         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 322         Delete.
 323         (sim_engine_run): Delete code profiling the PC.
 324
 325 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 326
 327         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 328
 329         * interp.c (sim_monitor): Make register pointers of type
 330         unsigned_word*.
 331
 332         * sim-main.h: Make registers of type unsigned_word not
 333         signed_word.
 334
 335 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 336
 337 start-sanitize-r5900
 338         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 339         ...): Move to sim-main.h
 340
 341 end-sanitize-r5900
 342         * interp.c (sync_operation): Rename from SyncOperation, make
 343         global, add SD argument.
 344         (prefetch): Rename from Prefetch, make global, add SD argument.
 345         (decode_coproc): Make global.
 346
 347         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 348
 349         * gencode.c (build_instruction): Generate DecodeCoproc not
 350         decode_coproc calls.
 351
 352         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 353         (SizeFGR): Move to sim-main.h
 354         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 355         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 356         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 357         sim-main.h.
 358         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 359         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 360         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 361         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 362         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 363         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 364
 365         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 366         exception.
 367         (sim-alu.h): Include.
 368         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 369         (sim_cia): Typedef to instruction_address.
 370
 371 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 372
 373         * Makefile.in (interp.o): Rename generated file engine.c to
 374         oengine.c.
 375
 376         * interp.c: Update.
 377
 378 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 379
 380         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 381
 382 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 383
 384         * gencode.c (build_instruction): For "FPSQRT", output correct
 385         number of arguments to Recip.
 386
 387 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 388
 389         * Makefile.in (interp.o): Depends on sim-main.h
 390
 391         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 392
 393         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 394         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 395         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 396         STATE, DSSTATE): Define
 397         (GPR, FGRIDX, ..): Define.
 398
 399         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 400         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 401         (GPR, FGRIDX, ...): Delete macros.
 402
 403         * interp.c: Update names to match defines from sim-main.h
 404
 405 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 406
 407         * interp.c (sim_monitor): Add SD argument.
 408         (sim_warning): Delete.  Replace calls with calls to
 409         sim_io_eprintf.
 410         (sim_error): Delete. Replace calls with sim_io_error.
 411         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 412         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 413         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 414         argument.
 415         (mips_size): Rename from sim_size. Add SD argument.
 416
 417         * interp.c (simulator): Delete global variable.
 418         (callback): Delete global variable.
 419         (mips_option_handler, sim_open, sim_write, sim_read,
 420         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 421         sim_size,sim_monitor): Use sim_io_* not callback->*.
 422         (sim_open): ZALLOC simulator struct.
 423         (PROFILE): Do not define.
 424
 425 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 426
 427         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 428         support.h with corresponding code.
 429
 430         * sim-main.h (word64, uword64), support.h: Move definition to
 431         sim-main.h.
 432         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 433
 434         * support.h: Delete
 435         * Makefile.in: Update dependencies
 436         * interp.c: Do not include.
 437
 438 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 439
 440         * interp.c (address_translation, load_memory, store_memory,
 441         cache_op): Rename to from AddressTranslation et.al., make global,
 442         add SD argument
 443
 444         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 445         CacheOp): Define.
 446
 447         * interp.c (SignalException): Rename to signal_exception, make
 448         global.
 449
 450         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 451
 452         * sim-main.h (SignalException, SignalExceptionInterrupt,
 453         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 454         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 455         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 456         Define.
 457
 458         * interp.c, support.h: Use.
 459
 460 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 461
 462         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 463         to value_fpr / store_fpr. Add SD argument.
 464         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 465         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 466
 467         * sim-main.h (ValueFPR, StoreFPR): Define.
 468
 469 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 470
 471         * interp.c (sim_engine_run): Check consistency between configure
 472         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 473         and HASFPU.
 474
 475         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 476         (mips_fpu): Configure WITH_FLOATING_POINT.
 477         (mips_endian): Configure WITH_TARGET_ENDIAN.
 478         * configure: Update.
 479
 480 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 481
 482         * configure: Regenerated to track ../common/aclocal.m4 changes.
 483
 484 start-sanitize-r5900
 485 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 486
 487         * interp.c (MAX_REG): Allow up-to 128 registers.
 488         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 489         (REGISTER_SA): Ditto.
 490         (sim_open): Initialize register_widths for r5900 specific
 491         registers.
 492         (sim_fetch_register, sim_store_register): Check for request of
 493         r5900 specific SA register.  Check for request for hi 64 bits of
 494         r5900 specific registers.
 495
 496 end-sanitize-r5900
 497 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 498
 499         * configure: Regenerated.
 500
 501 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 502
 503         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 504
 505 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 506
 507         * gencode.c (print_igen_insn_models): Assume certain architectures
 508         include all mips* instructions.
 509         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 510         instruction.
 511
 512         * Makefile.in (tmp.igen): Add target. Generate igen input from
 513         gencode file.
 514
 515         * gencode.c (FEATURE_IGEN): Define.
 516         (main): Add --igen option.  Generate output in igen format.
 517         (process_instructions): Format output according to igen option.
 518         (print_igen_insn_format): New function.
 519         (print_igen_insn_models): New function.
 520         (process_instructions): Only issue warnings and ignore
 521         instructions when no FEATURE_IGEN.
 522
 523 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 524
 525         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 526         MIPS targets.
 527
 528 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 529
 530         * configure: Regenerated to track ../common/aclocal.m4 changes.
 531
 532 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 533
 534         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 535         SIM_RESERVED_BITS): Delete, moved to common.
 536         (SIM_EXTRA_CFLAGS): Update.
 537
 538 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 539
 540         * configure.in: Configure non-strict memory alignment.
 541         * configure: Regenerated to track ../common/aclocal.m4 changes.
 542
 543 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 544
 545         * configure: Regenerated to track ../common/aclocal.m4 changes.
 546
 547 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 548
 549         * gencode.c (SDBBP,DERET): Added (3900) insns.
 550         (RFE): Turn on for 3900.
 551         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 552         (dsstate): Made global.
 553         (SUBTARGET_R3900): Added.
 554         (CANCELDELAYSLOT): New.
 555         (SignalException): Ignore SystemCall rather than ignore and
 556         terminate.  Add DebugBreakPoint handling.
 557         (decode_coproc): New insns RFE, DERET; and new registers Debug
 558         and DEPC protected by SUBTARGET_R3900.
 559         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 560         bits explicitly.
 561         * Makefile.in,configure.in: Add mips subtarget option.
 562         * configure: Update.
 563
 564 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 565
 566         * gencode.c: Add r3900 (tx39).
 567
 568 start-sanitize-tx19
 569         * gencode.c: Fix some configuration problems by improving
 570         the relationship between tx19 and tx39.
 571 end-sanitize-tx19
 572
 573 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 574
 575         * gencode.c (build_instruction): Don't need to subtract 4 for
 576         JALR, just 2.
 577
 578 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 579
 580         * interp.c: Correct some HASFPU problems.
 581
 582 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 583
 584         * configure: Regenerated to track ../common/aclocal.m4 changes.
 585
 586 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 587
 588         * interp.c (mips_options): Fix samples option short form, should
 589         be `x'.
 590
 591 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 592
 593         * interp.c (sim_info): Enable info code.  Was just returning.
 594
 595 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 596
 597         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 598         MFC0.
 599
 600 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 601
 602         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 603         constants.
 604         (build_instruction): Ditto for LL.
 605
 606 start-sanitize-tx19
 607 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 608
 609         * mips/configure.in, mips/gencode: Add tx19/r1900.
 610
 611 end-sanitize-tx19
 612 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 613
 614         * configure: Regenerated to track ../common/aclocal.m4 changes.
 615
 616 start-sanitize-r5900
 617 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 618
 619         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 620         for overflow due to ABS of MININT, set result to MAXINT.
 621         (build_instruction): For "psrlvw", signextend bit 31.
 622
 623 end-sanitize-r5900
 624 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 625
 626         * configure: Regenerated to track ../common/aclocal.m4 changes.
 627         * config.in: Ditto.
 628
 629 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 630
 631         * interp.c (sim_open): Add call to sim_analyze_program, update
 632         call to sim_config.
 633
 634 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 635
 636         * interp.c (sim_kill): Delete.
 637         (sim_create_inferior): Add ABFD argument. Set PC from same.
 638         (sim_load): Move code initializing trap handlers from here.
 639         (sim_open): To here.
 640         (sim_load): Delete, use sim-hload.c.
 641
 642         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 643
 644 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 645
 646         * configure: Regenerated to track ../common/aclocal.m4 changes.
 647         * config.in: Ditto.
 648
 649 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 650
 651         * interp.c (sim_open): Add ABFD argument.
 652         (sim_load): Move call to sim_config from here.
 653         (sim_open): To here.  Check return status.
 654
 655 start-sanitize-r5900
 656         * gencode.c (build_instruction): Do not define x8000000000000000,
 657         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 658
 659 end-sanitize-r5900
 660 start-sanitize-r5900
 661 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 662
 663         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 664         "pdivuw" check for overflow due to signed divide by -1.
 665
 666 end-sanitize-r5900
 667 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 668
 669         * gencode.c (build_instruction): Two arg MADD should
 670         not assign result to $0.
 671
 672 start-sanitize-r5900
 673 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 674
 675         * gencode.c (build_instruction): For "ppac5" use unsigned
 676         arrithmetic so that the sign bit doesn't smear when right shifted.
 677         (build_instruction): For "pdiv" perform sign extension when
 678         storing results in HI and LO.
 679         (build_instructions): For "pdiv" and "pdivbw" check for
 680         divide-by-zero.
 681         (build_instruction): For "pmfhl.slw" update hi part of dest
 682         register as well as low part.
 683         (build_instruction): For "pmfhl" portably handle long long values.
 684         (build_instruction): For "pmfhl.sh" correctly negative values.
 685         Store half words 2 and three in the correct place.
 686         (build_instruction): For "psllvw", sign extend value after shift.
 687
 688 end-sanitize-r5900
 689 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
 690
 691         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
 692         * sim/mips/configure.in: Regenerate.
 693
 694 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 695
 696         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 697         signed8, unsigned8 et.al. types.
 698
 699 start-sanitize-r5900
 700         * gencode.c (build_instruction): For PMULTU* do not sign extend
 701         registers.  Make generated code easier to debug.
 702
 703 end-sanitize-r5900
 704         * interp.c (SUB_REG_FETCH): Handle both little and big endian
 705         hosts when selecting subreg.
 706
 707 start-sanitize-r5900
 708 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
 709
 710         * gencode.c (type_for_data_len): For 32bit operations concerned
 711         with overflow, perform op using 64bits.
 712         (build_instruction): For PADD, always compute operation using type
 713         returned by type_for_data_len.
 714         (build_instruction): For PSUBU, when overflow, saturate to zero as
 715         actually underflow.
 716
 717 end-sanitize-r5900
 718 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
 719
 720 start-sanitize-r5900
 721         * gencode.c (build_instruction): Handle "pext5" according to
 722         version 1.95 of the r5900 ISA.
 723
 724         * gencode.c (build_instruction): Handle "ppac5" according to
 725         version 1.95 of the r5900 ISA.
 726
 727 end-sanitize-r5900
 728         * interp.c (sim_engine_run): Reset the ZERO register to zero
 729         regardless of FEATURE_WARN_ZERO.
 730         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
 731
 732 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 733
 734         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
 735         (SignalException): For BreakPoints ignore any mode bits and just
 736         save the PC.
 737         (SignalException): Always set the CAUSE register.
 738
 739 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 740
 741         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
 742         exception has been taken.
 743
 744         * interp.c: Implement the ERET and mt/f sr instructions.
 745
 746 start-sanitize-r5900
 747 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 748
 749         * gencode.c (build_instruction): For paddu, extract unsigned
 750         sub-fields.
 751
 752         * gencode.c (build_instruction): Saturate padds instead of padd
 753         instructions.
 754
 755 end-sanitize-r5900
 756 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 757
 758         * interp.c (SignalException): Don't bother restarting an
 759         interrupt.
 760
 761 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 762
 763         * interp.c (SignalException): Really take an interrupt.
 764         (interrupt_event): Only deliver interrupts when enabled.
 765
 766 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 767
 768         * interp.c (sim_info): Only print info when verbose.
 769         (sim_info) Use sim_io_printf for output.
 770
 771 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
 774         mips architectures.
 775
 776 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 777
 778         * interp.c (sim_do_command): Check for common commands if a
 779         simulator specific command fails.
 780
 781 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
 782
 783         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
 784         and simBE when DEBUG is defined.
 785
 786 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 787
 788         * interp.c (interrupt_event): New function.  Pass exception event
 789         onto exception handler.
 790
 791         * configure.in: Check for stdlib.h.
 792         * configure: Regenerate.
 793
 794         * gencode.c (build_instruction): Add UNUSED attribute to tempS
 795         variable declaration.
 796         (build_instruction): Initialize memval1.
 797         (build_instruction): Add UNUSED attribute to byte, bigend,
 798         reverse.
 799         (build_operands): Ditto.
 800
 801         * interp.c: Fix GCC warnings.
 802         (sim_get_quit_code): Delete.
 803
 804         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
 805         * Makefile.in: Ditto.
 806         * configure: Re-generate.
 807
 808         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
 809
 810 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 811
 812         * interp.c (mips_option_handler): New function parse argumes using
 813         sim-options.
 814         (myname): Replace with STATE_MY_NAME.
 815         (sim_open): Delete check for host endianness - performed by
 816         sim_config.
 817         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
 818         (sim_open): Move much of the initialization from here.
 819         (sim_load): To here.  After the image has been loaded and
 820         endianness set.
 821         (sim_open): Move ColdReset from here.
 822         (sim_create_inferior): To here.
 823         (sim_open): Make FP check less dependant on host endianness.
 824
 825         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
 826         run.
 827         * interp.c (sim_set_callbacks): Delete.
 828
 829         * interp.c (membank, membank_base, membank_size): Replace with
 830         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
 831         (sim_open): Remove call to callback->init. gdb/run do this.
 832
 833         * interp.c: Update
 834
 835         * sim-main.h (SIM_HAVE_FLATMEM): Define.
 836
 837         * interp.c (big_endian_p): Delete, replaced by
 838         current_target_byte_order.
 839
 840 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 841
 842         * interp.c (host_read_long, host_read_word, host_swap_word,
 843         host_swap_long): Delete. Using common sim-endian.
 844         (sim_fetch_register, sim_store_register): Use H2T.
 845         (pipeline_ticks): Delete.  Handled by sim-events.
 846         (sim_info): Update.
 847         (sim_engine_run): Update.
 848
 849 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 850
 851         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
 852         reason from here.
 853         (SignalException): To here. Signal using sim_engine_halt.
 854         (sim_stop_reason): Delete, moved to common.
 855
 856 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
 857
 858         * interp.c (sim_open): Add callback argument.
 859         (sim_set_callbacks): Delete SIM_DESC argument.
 860         (sim_size): Ditto.
 861
 862 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 863
 864         * Makefile.in (SIM_OBJS): Add common modules.
 865
 866         * interp.c (sim_set_callbacks): Also set SD callback.
 867         (set_endianness, xfer_*, swap_*): Delete.
 868         (host_read_word, host_read_long, host_swap_word, host_swap_long):
 869         Change to functions using sim-endian macros.
 870         (control_c, sim_stop): Delete, use common version.
 871         (simulate): Convert into.
 872         (sim_engine_run): This function.
 873         (sim_resume): Delete.
 874
 875         * interp.c (simulation): New variable - the simulator object.
 876         (sim_kind): Delete global - merged into simulation.
 877         (sim_load): Cleanup.  Move PC assignment from here.
 878         (sim_create_inferior): To here.
 879
 880         * sim-main.h: New file.
 881         * interp.c (sim-main.h): Include.
 882
 883 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 884
 885         * configure: Regenerated to track ../common/aclocal.m4 changes.
 886
 887 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
 888
 889         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
 890
 891 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
 892
 893         * gencode.c (build_instruction): DIV instructions: check
 894         for division by zero and integer overflow before using
 895         host's division operation.
 896
 897 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
 898
 899         * Makefile.in (SIM_OBJS): Add sim-load.o.
 900         * interp.c: #include bfd.h.
 901         (target_byte_order): Delete.
 902         (sim_kind, myname, big_endian_p): New static locals.
 903         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
 904         after argument parsing.  Recognize -E arg, set endianness accordingly.
 905         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
 906         load file into simulator.  Set PC from bfd.
 907         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
 908         (set_endianness): Use big_endian_p instead of target_byte_order.
 909
 910 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 911
 912         * interp.c (sim_size): Delete prototype - conflicts with
 913         definition in remote-sim.h.  Correct definition.
 914
 915 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 916
 917         * configure: Regenerated to track ../common/aclocal.m4 changes.
 918         * config.in: Ditto.
 919
 920 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
 921
 922         * interp.c (sim_open): New arg `kind'.
 923
 924         * configure: Regenerated to track ../common/aclocal.m4 changes.
 925
 926 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
 927
 928         * configure: Regenerated to track ../common/aclocal.m4 changes.
 929
 930 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
 931
 932         * interp.c (sim_open): Set optind to 0 before calling getopt.
 933
 934 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 935
 936         * configure: Regenerated to track ../common/aclocal.m4 changes.
 937
 938 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
 939
 940         * interp.c : Replace uses of pr_addr with pr_uword64
 941         where the bit length is always 64 independent of SIM_ADDR.
 942         (pr_uword64) : added.
 943
 944 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 945
 946         * configure: Re-generate.
 947
 948 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
 949
 950         * configure: Regenerate to track ../common/aclocal.m4 changes.
 951
 952 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
 953
 954         * interp.c (sim_open): New SIM_DESC result.  Argument is now
 955         in argv form.
 956         (other sim_*): New SIM_DESC argument.
 957
 958 start-sanitize-r5900
 959 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
 960
 961         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
 962         Change values to avoid overloading DOUBLEWORD which is tested
 963         for all insns.
 964         * gencode.c: reinstate "offending code".
 965
 966 end-sanitize-r5900
 967 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
 968
 969         * interp.c: Fix printing of addresses for non-64-bit targets.
 970         (pr_addr): Add function to print address based on size.
 971 start-sanitize-r5900
 972         * gencode.c: #ifdef out offending code until a permanent fix
 973         can be added.  Code is causing build errors for non-5900 mips targets.
 974 end-sanitize-r5900
 975
 976 start-sanitize-r5900
 977 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
 978
 979         * gencode.c (process_instructions): Correct test for ISA dependent
 980         architecture bits in isa field of MIPS_DECODE.
 981
 982 end-sanitize-r5900
 983 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
 984
 985         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
 986
 987 start-sanitize-r5900
 988 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
 989
 990         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
 991         PMADDUW.
 992
 993 end-sanitize-r5900
 994 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
 995
 996         * gencode.c (build_mips16_operands): Correct computation of base
 997         address for extended PC relative instruction.
 998
 999 start-sanitize-r5900
1000 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1001
1002         * Makefile.in, configure, configure.in, gencode.c,
1003         interp.c, support.h: add r5900.
1004
1005 end-sanitize-r5900
1006 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1007
1008         * interp.c (mips16_entry): Add support for floating point cases.
1009         (SignalException): Pass floating point cases to mips16_entry.
1010         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1011         registers.
1012         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1013         or fmt_word.
1014         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1015         and then set the state to fmt_uninterpreted.
1016         (COP_SW): Temporarily set the state to fmt_word while calling
1017         ValueFPR.
1018
1019 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1020
1021         * gencode.c (build_instruction): The high order may be set in the
1022         comparison flags at any ISA level, not just ISA 4.
1023
1024 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1025
1026         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1027         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1028         * configure.in: sinclude ../common/aclocal.m4.
1029         * configure: Regenerated.
1030
1031 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1032
1033         * configure: Rebuild after change to aclocal.m4.
1034
1035 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1036
1037         * configure configure.in Makefile.in:  Update to new configure
1038         scheme which is more compatible with WinGDB builds.
1039         * configure.in:  Improve comment on how to run autoconf.
1040         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1041         * Makefile.in:  Use autoconf substitution to install common
1042         makefile fragment.
1043
1044 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1045
1046         * gencode.c (build_instruction): Use BigEndianCPU instead of
1047         ByteSwapMem.
1048
1049 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1050
1051         * interp.c (sim_monitor): Make output to stdout visible in
1052         wingdb's I/O log window.
1053
1054 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1055
1056         * support.h: Undo previous change to SIGTRAP
1057         and SIGQUIT values.
1058
1059 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1060
1061         * interp.c (store_word, load_word): New static functions.
1062         (mips16_entry): New static function.
1063         (SignalException): Look for mips16 entry and exit instructions.
1064         (simulate): Use the correct index when setting fpr_state after
1065         doing a pending move.
1066
1067 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1068
1069         * interp.c: Fix byte-swapping code throughout to work on
1070         both little- and big-endian hosts.
1071
1072 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1073
1074         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1075         with gdb/config/i386/xm-windows.h.
1076
1077 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1078
1079         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1080         that messes up arithmetic shifts.
1081
1082 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1083
1084         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1085         SIGTRAP and SIGQUIT for _WIN32.
1086
1087 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1088
1089         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1090         force a 64 bit multiplication.
1091         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1092         destination register is 0, since that is the default mips16 nop
1093         instruction.
1094
1095 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1096
1097         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1098         (build_endian_shift): Don't check proc64.
1099         (build_instruction): Always set memval to uword64.  Cast op2 to
1100         uword64 when shifting it left in memory instructions.  Always use
1101         the same code for stores--don't special case proc64.
1102
1103         * gencode.c (build_mips16_operands): Fix base PC value for PC
1104         relative operands.
1105         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1106         jal instruction.
1107         * interp.c (simJALDELAYSLOT): Define.
1108         (JALDELAYSLOT): Define.
1109         (INDELAYSLOT, INJALDELAYSLOT): Define.
1110         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1111
1112 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1113
1114         * interp.c (sim_open): add flush_cache as a PMON routine
1115         (sim_monitor): handle flush_cache by ignoring it
1116
1117 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1118
1119         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1120         BigEndianMem.
1121         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1122         (BigEndianMem): Rename to ByteSwapMem and change sense.
1123         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1124         BigEndianMem references to !ByteSwapMem.
1125         (set_endianness): New function, with prototype.
1126         (sim_open): Call set_endianness.
1127         (sim_info): Use simBE instead of BigEndianMem.
1128         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1129         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1130         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1131         ifdefs, keeping the prototype declaration.
1132         (swap_word): Rewrite correctly.
1133         (ColdReset): Delete references to CONFIG.  Delete endianness related
1134         code; moved to set_endianness.
1135
1136 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1137
1138         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1139         * interp.c (CHECKHILO): Define away.
1140         (simSIGINT): New macro.
1141         (membank_size): Increase from 1MB to 2MB.
1142         (control_c): New function.
1143         (sim_resume): Rename parameter signal to signal_number.  Add local
1144         variable prev.  Call signal before and after simulate.
1145         (sim_stop_reason): Add simSIGINT support.
1146         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1147         functions always.
1148         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1149         if logfh is NULL.
1150         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1151         a call to sim_warning.
1152
1153 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1154
1155         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1156         16 bit instructions.
1157
1158 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1159
1160         Add support for mips16 (16 bit MIPS implementation):
1161         * gencode.c (inst_type): Add mips16 instruction encoding types.
1162         (GETDATASIZEINSN): Define.
1163         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1164         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1165         mtlo.
1166         (MIPS16_DECODE): New table, for mips16 instructions.
1167         (bitmap_val): New static function.
1168         (struct mips16_op): Define.
1169         (mips16_op_table): New table, for mips16 operands.
1170         (build_mips16_operands): New static function.
1171         (process_instructions): If PC is odd, decode a mips16
1172         instruction.  Break out instruction handling into new
1173         build_instruction function.
1174         (build_instruction): New static function, broken out of
1175         process_instructions.  Check modifiers rather than flags for SHIFT
1176         bit count and m[ft]{hi,lo} direction.
1177         (usage): Pass program name to fprintf.
1178         (main): Remove unused variable this_option_optind.  Change
1179         ``*loptarg++'' to ``loptarg++''.
1180         (my_strtoul): Parenthesize && within ||.
1181         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1182         (simulate): If PC is odd, fetch a 16 bit instruction, and
1183         increment PC by 2 rather than 4.
1184         * configure.in: Add case for mips16*-*-*.
1185         * configure: Rebuild.
1186
1187 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1188
1189         * interp.c: Allow -t to enable tracing in standalone simulator.
1190         Fix garbage output in trace file and error messages.
1191
1192 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1193
1194         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1195         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1196         * configure.in: Simplify using macros in ../common/aclocal.m4.
1197         * configure: Regenerated.
1198         * tconfig.in: New file.
1199
1200 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1201
1202         * interp.c: Fix bugs in 64-bit port.
1203         Use ansi function declarations for msvc compiler.
1204         Initialize and test file pointer in trace code.
1205         Prevent duplicate definition of LAST_EMED_REGNUM.
1206
1207 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1208
1209         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1210
1211 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1212
1213         * interp.c (SignalException): Check for explicit terminating
1214         breakpoint value.
1215         * gencode.c: Pass instruction value through SignalException()
1216         calls for Trap, Breakpoint and Syscall.
1217
1218 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1219
1220         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1221         only used on those hosts that provide it.
1222         * configure.in: Add sqrt() to list of functions to be checked for.
1223         * config.in: Re-generated.
1224         * configure: Re-generated.
1225
1226 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1227
1228         * gencode.c (process_instructions): Call build_endian_shift when
1229         expanding STORE RIGHT, to fix swr.
1230         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1231         clear the high bits.
1232         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1233         Fix float to int conversions to produce signed values.
1234
1235 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1236
1237         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1238         (process_instructions): Correct handling of nor instruction.
1239         Correct shift count for 32 bit shift instructions. Correct sign
1240         extension for arithmetic shifts to not shift the number of bits in
1241         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1242         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1243         Fix madd.
1244         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1245         It's OK to have a mult follow a mult.  What's not OK is to have a
1246         mult follow an mfhi.
1247         (Convert): Comment out incorrect rounding code.
1248
1249 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1250
1251         * interp.c (sim_monitor): Improved monitor printf
1252         simulation. Tidied up simulator warnings, and added "--log" option
1253         for directing warning message output.
1254         * gencode.c: Use sim_warning() rather than WARNING macro.
1255
1256 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1257
1258         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1259         getopt1.o, rather than on gencode.c.  Link objects together.
1260         Don't link against -liberty.
1261         (gencode.o, getopt.o, getopt1.o): New targets.
1262         * gencode.c: Include <ctype.h> and "ansidecl.h".
1263         (AND): Undefine after including "ansidecl.h".
1264         (ULONG_MAX): Define if not defined.
1265         (OP_*): Don't define macros; now defined in opcode/mips.h.
1266         (main): Call my_strtoul rather than strtoul.
1267         (my_strtoul): New static function.
1268
1269 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1270
1271         * gencode.c (process_instructions):  Generate word64 and uword64
1272         instead of `long long' and `unsigned long long' data types.
1273         * interp.c:  #include sysdep.h to get signals, and define default
1274         for SIGBUS.
1275         * (Convert):  Work around for Visual-C++ compiler bug with type
1276         conversion.
1277         * support.h:  Make things compile under Visual-C++ by using
1278         __int64 instead of `long long'.  Change many refs to long long
1279         into word64/uword64 typedefs.
1280
1281 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1282
1283         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1284         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1285         (docdir): Removed.
1286         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1287         (AC_PROG_INSTALL): Added.
1288         (AC_PROG_CC): Moved to before configure.host call.
1289         * configure: Rebuilt.
1290
1291 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1292
1293         * configure.in: Define @SIMCONF@ depending on mips target.
1294         * configure: Rebuild.
1295         * Makefile.in (run): Add @SIMCONF@ to control simulator
1296         construction.
1297         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1298         * interp.c: Remove some debugging, provide more detailed error
1299         messages, update memory accesses to use LOADDRMASK.
1300
1301 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1302
1303         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1304         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1305         stamp-h.
1306         * configure: Rebuild.
1307         * config.in: New file, generated by autoheader.
1308         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1309         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1310         HAVE_ANINT and HAVE_AINT, as appropriate.
1311         * Makefile.in (run): Use @LIBS@ rather than -lm.
1312         (interp.o): Depend upon config.h.
1313         (Makefile): Just rebuild Makefile.
1314         (clean): Remove stamp-h.
1315         (mostlyclean): Make the same as clean, not as distclean.
1316         (config.h, stamp-h): New targets.
1317
1318 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1319
1320         * interp.c (ColdReset): Fix boolean test. Make all simulator
1321         globals static.
1322
1323 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1324
1325         * interp.c (xfer_direct_word, xfer_direct_long,
1326         swap_direct_word, swap_direct_long, xfer_big_word,
1327         xfer_big_long, xfer_little_word, xfer_little_long,
1328         swap_word,swap_long): Added.
1329         * interp.c (ColdReset): Provide function indirection to
1330         host<->simulated_target transfer routines.
1331         * interp.c (sim_store_register, sim_fetch_register): Updated to
1332         make use of indirected transfer routines.
1333
1334 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1335
1336         * gencode.c (process_instructions): Ensure FP ABS instruction
1337         recognised.
1338         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1339         system call support.
1340
1341 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1342
1343         * interp.c (sim_do_command): Complain if callback structure not
1344         initialised.
1345
1346 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1347
1348         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1349         support for Sun hosts.
1350         * Makefile.in (gencode): Ensure the host compiler and libraries
1351         used for cross-hosted build.
1352
1353 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1354
1355         * interp.c, gencode.c: Some more (TODO) tidying.
1356
1357 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1358
1359         * gencode.c, interp.c: Replaced explicit long long references with
1360         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1361         * support.h (SET64LO, SET64HI): Macros added.
1362
1363 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1364
1365         * configure: Regenerate with autoconf 2.7.
1366
1367 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1368
1369         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1370         * support.h: Remove superfluous "1" from #if.
1371         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1372
1373 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1374
1375         * interp.c (StoreFPR): Control UndefinedResult() call on
1376         WARN_RESULT manifest.
1377
1378 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1379
1380         * gencode.c: Tidied instruction decoding, and added FP instruction
1381         support.
1382
1383         * interp.c: Added dineroIII, and BSD profiling support. Also
1384         run-time FP handling.
1385
1386 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1387
1388         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1389         gencode.c, interp.c, support.h: created.