sim/mips/ChangeLog

   1 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * sim-main.h (HIACCESS, LOACCESS): Always define.
   4
   5         * mdmx.igen (Maxi, Mini): Rename Max, Min.
   6
   7         * interp.c (sim_info): Delete.
   8
   9 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
  10
  11         * interp.c (DECLARE_OPTION_HANDLER): Use it.
  12         (mips_option_handler): New argument `cpu'.
  13         (sim_open): Update call to sim_add_option_table.
  14
  15 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  16
  17         * mips.igen (CxC1): Add tracing.
  18
  19 start-sanitize-r5900
  20 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  21
  22         * r5900.igen (StoreFP): Delete.
  23         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
  24         New functions.
  25         (rsqrt.s, sqrt.s): Implement.
  26         (r59cond): New function.
  27         (C.COND.S): Call r59cond in assembler line.
  28         (cvt.w.s, cvt.s.w): Implement.
  29
  30         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
  31         instruction set.
  32
  33         * sim-main.h: Define an enum of r5900 FCSR bit fields.
  34
  35 end-sanitize-r5900
  36 start-sanitize-r5900
  37 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  38
  39         * r5900.igen: Add tracing to all p* instructions.
  40
  41 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  42
  43         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
  44         to get gdb talking to re-aranged sim_cpu register structure.
  45
  46 end-sanitize-r5900
  47 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  48
  49         * sim-main.h (Max, Min): Declare.
  50
  51         * interp.c (Max, Min): New functions.
  52
  53         * mips.igen (BC1): Add tracing.
  54
  55 start-sanitize-vr5400
  56 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  57
  58         * mdmx.igen: Tag all functions as requiring either with mdmx or
  59         vr5400 processor.
  60
  61 end-sanitize-vr5400
  62 start-sanitize-r5900
  63 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  64
  65         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
  66         to 32.
  67         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
  68
  69         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
  70
  71         * r5900.igen: Rewrite.
  72
  73         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
  74         struct.
  75         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
  76         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
  77
  78 end-sanitize-r5900
  79 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
  80
  81         * interp.c Added memory map for stack in vr4100
  82
  83 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
  84
  85         * interp.c (load_memory): Add missing "break"'s.
  86
  87 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  88
  89         * interp.c (sim_store_register, sim_fetch_register): Pass in
  90         length parameter.  Return -1.
  91
  92 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
  93
  94         * interp.c: Added hardware init hook, fixed warnings.
  95
  96 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  97
  98         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
  99
 100 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 101
 102         * interp.c (ifetch16): New function.
 103
 104         * sim-main.h (IMEM32): Rename IMEM.
 105         (IMEM16_IMMED): Define.
 106         (IMEM16): Define.
 107         (DELAY_SLOT): Update.
 108
 109         * m16run.c (sim_engine_run): New file.
 110
 111         * m16.igen: All instructions except LB.
 112         (LB): Call do_load_byte.
 113         * mips.igen (do_load_byte): New function.
 114         (LB): Call do_load_byte.
 115
 116         * mips.igen: Move spec for insn bit size and high bit from here.
 117         * Makefile.in (tmp-igen, tmp-m16): To here.
 118
 119         * m16.dc: New file, decode mips16 instructions.
 120
 121         * Makefile.in (SIM_NO_ALL): Define.
 122         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 123
 124 start-sanitize-tx19
 125         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 126         set.
 127
 128 end-sanitize-tx19
 129 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 130
 131         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 132         point unit to 32 bit registers.
 133         * configure: Re-generate.
 134
 135 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 136
 137         * configure.in (sim_use_gen): Make IGEN the default simulator
 138         generator for generic 32 and 64 bit mips targets.
 139         * configure: Re-generate.
 140
 141 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 142
 143         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 144         bitsize.
 145
 146         * interp.c (sim_fetch_register, sim_store_register): Read/write
 147         FGR from correct location.
 148         (sim_open): Set size of FGR's according to
 149         WITH_TARGET_FLOATING_POINT_BITSIZE.
 150
 151         * sim-main.h (FGR): Store floating point registers in a separate
 152         array.
 153
 154 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 155
 156         * configure: Regenerated to track ../common/aclocal.m4 changes.
 157
 158 start-sanitize-vr5400
 159         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 160
 161 end-sanitize-vr5400
 162 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 163
 164         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 165
 166         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 167
 168         * interp.c (pending_tick): New function.  Deliver pending writes.
 169
 170         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 171         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 172         it can handle mixed sized quantites and single bits.
 173
 174 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 175
 176         * interp.c (oengine.h): Do not include when building with IGEN.
 177         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 178         (sim_info): Ditto for PROCESSOR_64BIT.
 179         (sim_monitor): Replace ut_reg with unsigned_word.
 180         (*): Ditto for t_reg.
 181         (LOADDRMASK): Define.
 182         (sim_open): Remove defunct check that host FP is IEEE compliant,
 183         using software to emulate floating point.
 184         (value_fpr, ...): Always compile, was conditional on HASFPU.
 185
 186 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 187
 188         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 189         size.
 190
 191         * interp.c (SD, CPU): Define.
 192         (mips_option_handler): Set flags in each CPU.
 193         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 194         (sim_close): Do not clear STATE, deleted anyway.
 195         (sim_write, sim_read): Assume CPU zero's vm should be used for
 196         data transfers.
 197         (sim_create_inferior): Set the PC for all processors.
 198         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 199         argument.
 200         (mips16_entry): Pass correct nr of args to store_word, load_word.
 201         (ColdReset): Cold reset all cpu's.
 202         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 203         (sim_monitor, load_memory, store_memory, signal_exception): Use
 204         `CPU' instead of STATE_CPU.
 205
 206
 207         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 208         SD or CPU_.
 209
 210         * sim-main.h (signal_exception): Add sim_cpu arg.
 211         (SignalException*): Pass both SD and CPU to signal_exception.
 212         * interp.c (signal_exception): Update.
 213
 214         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 215         Ditto
 216         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 217         address_translation): Ditto
 218         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 219
 220 start-sanitize-vr5400
 221         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 222         `sd'.
 223         (ByteAlign): Use StoreFPR, pass args in correct order.
 224
 225 end-sanitize-vr5400
 226 start-sanitize-r5900
 227 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 228
 229         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 230
 231 end-sanitize-r5900
 232 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 233
 234         * configure: Regenerated to track ../common/aclocal.m4 changes.
 235
 236 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 237
 238 start-sanitize-r5900
 239         * configure.in (sim_igen_filter): For r5900, use igen.
 240         * configure: Re-generate.
 241
 242 end-sanitize-r5900
 243         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 244
 245         * mips.igen (model): Map processor names onto BFD name.
 246
 247         * sim-main.h (CPU_CIA): Delete.
 248         (SET_CIA, GET_CIA): Define
 249
 250 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 251
 252         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 253         regiser.
 254
 255         * configure.in (default_endian): Configure a big-endian simulator
 256         by default.
 257         * configure: Re-generate.
 258
 259 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 260
 261         * configure: Regenerated to track ../common/aclocal.m4 changes.
 262
 263 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 264
 265         * interp.c (sim_monitor): Handle Densan monitor outbyte
 266         and inbyte functions.
 267
 268 1997-12-29  Felix Lee  <flee@cygnus.com>
 269
 270         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 271
 272 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 273
 274         * Makefile.in (tmp-igen): Arrange for $zero to always be
 275         reset to zero after every instruction.
 276
 277 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 278
 279         * configure: Regenerated to track ../common/aclocal.m4 changes.
 280         * config.in: Ditto.
 281
 282 start-sanitize-vr5400
 283 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 284
 285         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 286         bit values.
 287
 288 end-sanitize-vr5400
 289 start-sanitize-vr5400
 290 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 291
 292         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 293         vr5400 with the vr5000 as the default.
 294
 295 end-sanitize-vr5400
 296 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 297
 298         * mips.igen (MSUB): Fix to work like MADD.
 299         * gencode.c (MSUB): Similarly.
 300
 301 start-sanitize-vr5400
 302 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 303
 304         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 305         vr5400.
 306
 307 end-sanitize-vr5400
 308 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 309
 310         * configure: Regenerated to track ../common/aclocal.m4 changes.
 311
 312 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 313
 314         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 315
 316 start-sanitize-vr5400
 317         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 318         (value_cc, store_cc): Implement.
 319
 320         * sim-main.h: Add 8*3*8 bit accumulator.
 321
 322         * vr5400.igen: Move mdmx instructins from here
 323         * mdmx.igen: To here - new file. Add/fix missing instructions.
 324         * mips.igen: Include mdmx.igen.
 325         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 326
 327 end-sanitize-vr5400
 328 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 329
 330         * sim-main.h (sim-fpu.h): Include.
 331
 332         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 333         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 334         using host independant sim_fpu module.
 335
 336 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 337
 338         * interp.c (signal_exception): Report internal errors with SIGABRT
 339         not SIGQUIT.
 340
 341         * sim-main.h (C0_CONFIG): New register.
 342         (signal.h): No longer include.
 343
 344         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 345
 346 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 347
 348         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 349
 350 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 351
 352         * mips.igen: Tag vr5000 instructions.
 353         (ANDI): Was missing mipsIV model, fix assembler syntax.
 354         (do_c_cond_fmt): New function.
 355         (C.cond.fmt): Handle mips I-III which do not support CC field
 356         separatly.
 357         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 358         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 359         in IV3.2 spec.
 360         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 361         vr5000 which saves LO in a GPR separatly.
 362
 363         * configure.in (enable-sim-igen): For vr5000, select vr5000
 364         specific instructions.
 365         * configure: Re-generate.
 366
 367 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 370
 371         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 372         fmt_uninterpreted_64 bit cases to switch.  Convert to
 373         fmt_formatted,
 374
 375         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 376
 377         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 378         as specified in IV3.2 spec.
 379         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 380
 381 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 382
 383         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 384         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 385         (start-sanitize-r5900):
 386         (LWXC1, SWXC1): Delete from r5900 instruction set.
 387         (end-sanitize-r5900):
 388         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 389         PENDING_FILL versions of instructions.  Simplify.
 390         (X): New function.
 391         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 392         instructions.
 393         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 394         a signed value.
 395         (MTHI, MFHI): Disable code checking HI-LO.
 396
 397         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 398         global.
 399         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 400
 401 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 402
 403         * gencode.c (build_mips16_operands): Replace IPC with cia.
 404
 405         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 406         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 407         IPC to `cia'.
 408         (UndefinedResult): Replace function with macro/function
 409         combination.
 410         (sim_engine_run): Don't save PC in IPC.
 411
 412         * sim-main.h (IPC): Delete.
 413
 414         start-sanitize-vr5400
 415         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 416         (do_select): Rename function select.
 417         end-sanitize-vr5400
 418
 419         * interp.c (signal_exception, store_word, load_word,
 420         address_translation, load_memory, store_memory, cache_op,
 421         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 422         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 423         current instruction address - cia - argument.
 424         (sim_read, sim_write): Call address_translation directly.
 425         (sim_engine_run): Rename variable vaddr to cia.
 426         (signal_exception): Pass cia to sim_monitor
 427
 428         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 429         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 430         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 431
 432         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 433         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 434         SIM_ASSERT.
 435
 436         * interp.c (signal_exception): Pass restart address to
 437         sim_engine_restart.
 438
 439         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 440         idecode.o): Add dependency.
 441
 442         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 443         Delete definitions
 444         (DELAY_SLOT): Update NIA not PC with branch address.
 445         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 446
 447         * mips.igen: Use CIA not PC in branch calculations.
 448         (illegal): Call SignalException.
 449         (BEQ, ADDIU): Fix assembler.
 450
 451 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 452
 453         * m16.igen (JALX): Was missing.
 454
 455         * configure.in (enable-sim-igen): New configuration option.
 456         * configure: Re-generate.
 457
 458         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 459
 460         * interp.c (load_memory, store_memory): Delete parameter RAW.
 461         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 462         bypassing {load,store}_memory.
 463
 464         * sim-main.h (ByteSwapMem): Delete definition.
 465
 466         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 467
 468         * interp.c (sim_do_command, sim_commands): Delete mips specific
 469         commands.  Handled by module sim-options.
 470
 471         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 472         (WITH_MODULO_MEMORY): Define.
 473
 474         * interp.c (sim_info): Delete code printing memory size.
 475
 476         * interp.c (mips_size): Nee sim_size, delete function.
 477         (power2): Delete.
 478         (monitor, monitor_base, monitor_size): Delete global variables.
 479         (sim_open, sim_close): Delete code creating monitor and other
 480         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 481         manage memory regions.
 482         (load_memory, store_memory): Use sim-core for memory model.
 483
 484         * interp.c (address_translation): Delete all memory map code
 485         except line forcing 32 bit addresses.
 486
 487 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 488
 489         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 490         trace options.
 491
 492         * interp.c (logfh, logfile): Delete globals.
 493         (sim_open, sim_close): Delete code opening & closing log file.
 494         (mips_option_handler): Delete -l and -n options.
 495         (OPTION mips_options): Ditto.
 496
 497         * interp.c (OPTION mips_options): Rename option trace to dinero.
 498         (mips_option_handler): Update.
 499
 500 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 501
 502         * interp.c (fetch_str): New function.
 503         (sim_monitor): Rewrite using sim_read & sim_write.
 504         (sim_open): Check magic number.
 505         (sim_open): Write monitor vectors into memory using sim_write.
 506         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 507         (sim_read, sim_write): Simplify - transfer data one byte at a
 508         time.
 509         (load_memory, store_memory): Clarify meaning of parameter RAW.
 510
 511         * sim-main.h (isHOST): Defete definition.
 512         (isTARGET): Mark as depreciated.
 513         (address_translation): Delete parameter HOST.
 514
 515         * interp.c (address_translation): Delete parameter HOST.
 516
 517 start-sanitize-tx49
 518 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 519
 520         * gencode.c: Add tx49 configury and insns.
 521         * configure.in: Add tx49 configury.
 522         * configure: Update.
 523
 524 end-sanitize-tx49
 525 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 526
 527         * mips.igen:
 528
 529         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 530         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 531
 532 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 533
 534         * mips.igen: Add model filter field to records.
 535
 536 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 537
 538         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 539
 540         interp.c (sim_engine_run): Do not compile function sim_engine_run
 541         when WITH_IGEN == 1.
 542
 543         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 544         target architecture.
 545
 546         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 547         igen. Replace with configuration variables sim_igen_flags /
 548         sim_m16_flags.
 549
 550         start-sanitize-r5900
 551         * r5900.igen: New file. Copy r5900 insns here.
 552         end-sanitize-r5900
 553         start-sanitize-vr5400
 554         * vr5400.igen: New file.
 555         end-sanitize-vr5400
 556         * m16.igen: New file.  Copy mips16 insns here.
 557         * mips.igen: From here.
 558
 559 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 560
 561         start-sanitize-vr5400
 562         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 563
 564         * configure.in: Add mips64vr5400 target.
 565         * configure: Re-generate.
 566
 567         end-sanitize-vr5400
 568         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 569         to top.
 570         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 571
 572 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 573
 574         * gencode.c (build_instruction): Follow sim_write's lead in using
 575         BigEndianMem instead of !ByteSwapMem.
 576
 577 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 578
 579         * configure.in (sim_gen): Dependent on target, select type of
 580         generator.  Always select old style generator.
 581
 582         configure: Re-generate.
 583
 584         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 585         targets.
 586         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 587         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 588         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 589         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 590         SIM_@sim_gen@_*, set by autoconf.
 591
 592 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 593
 594         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 595
 596         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 597         CURRENT_FLOATING_POINT instead.
 598
 599         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 600         (address_translation): Raise exception InstructionFetch when
 601         translation fails and isINSTRUCTION.
 602
 603         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 604         sim_engine_run): Change type of of vaddr and paddr to
 605         address_word.
 606         (address_translation, prefetch, load_memory, store_memory,
 607         cache_op): Change type of vAddr and pAddr to address_word.
 608
 609         * gencode.c (build_instruction): Change type of vaddr and paddr to
 610         address_word.
 611
 612 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 613
 614         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 615         macro to obtain result of ALU op.
 616
 617 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 618
 619         * interp.c (sim_info): Call profile_print.
 620
 621 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 622
 623         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 624
 625         * sim-main.h (WITH_PROFILE): Do not define, defined in
 626         common/sim-config.h.  Use sim-profile module.
 627         (simPROFILE): Delete defintion.
 628
 629         * interp.c (PROFILE): Delete definition.
 630         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 631         (sim_close): Delete code writing profile histogram.
 632         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 633         Delete.
 634         (sim_engine_run): Delete code profiling the PC.
 635
 636 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 637
 638         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 639
 640         * interp.c (sim_monitor): Make register pointers of type
 641         unsigned_word*.
 642
 643         * sim-main.h: Make registers of type unsigned_word not
 644         signed_word.
 645
 646 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 647
 648 start-sanitize-r5900
 649         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 650         ...): Move to sim-main.h
 651
 652 end-sanitize-r5900
 653         * interp.c (sync_operation): Rename from SyncOperation, make
 654         global, add SD argument.
 655         (prefetch): Rename from Prefetch, make global, add SD argument.
 656         (decode_coproc): Make global.
 657
 658         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 659
 660         * gencode.c (build_instruction): Generate DecodeCoproc not
 661         decode_coproc calls.
 662
 663         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 664         (SizeFGR): Move to sim-main.h
 665         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 666         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 667         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 668         sim-main.h.
 669         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 670         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 671         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 672         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 673         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 674         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 675
 676         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 677         exception.
 678         (sim-alu.h): Include.
 679         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 680         (sim_cia): Typedef to instruction_address.
 681
 682 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 683
 684         * Makefile.in (interp.o): Rename generated file engine.c to
 685         oengine.c.
 686
 687         * interp.c: Update.
 688
 689 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 690
 691         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 692
 693 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 694
 695         * gencode.c (build_instruction): For "FPSQRT", output correct
 696         number of arguments to Recip.
 697
 698 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 699
 700         * Makefile.in (interp.o): Depends on sim-main.h
 701
 702         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 703
 704         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 705         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 706         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 707         STATE, DSSTATE): Define
 708         (GPR, FGRIDX, ..): Define.
 709
 710         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 711         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 712         (GPR, FGRIDX, ...): Delete macros.
 713
 714         * interp.c: Update names to match defines from sim-main.h
 715
 716 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 717
 718         * interp.c (sim_monitor): Add SD argument.
 719         (sim_warning): Delete.  Replace calls with calls to
 720         sim_io_eprintf.
 721         (sim_error): Delete. Replace calls with sim_io_error.
 722         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 723         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 724         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 725         argument.
 726         (mips_size): Rename from sim_size. Add SD argument.
 727
 728         * interp.c (simulator): Delete global variable.
 729         (callback): Delete global variable.
 730         (mips_option_handler, sim_open, sim_write, sim_read,
 731         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 732         sim_size,sim_monitor): Use sim_io_* not callback->*.
 733         (sim_open): ZALLOC simulator struct.
 734         (PROFILE): Do not define.
 735
 736 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 737
 738         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 739         support.h with corresponding code.
 740
 741         * sim-main.h (word64, uword64), support.h: Move definition to
 742         sim-main.h.
 743         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 744
 745         * support.h: Delete
 746         * Makefile.in: Update dependencies
 747         * interp.c: Do not include.
 748
 749 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 750
 751         * interp.c (address_translation, load_memory, store_memory,
 752         cache_op): Rename to from AddressTranslation et.al., make global,
 753         add SD argument
 754
 755         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 756         CacheOp): Define.
 757
 758         * interp.c (SignalException): Rename to signal_exception, make
 759         global.
 760
 761         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 762
 763         * sim-main.h (SignalException, SignalExceptionInterrupt,
 764         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 765         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 766         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 767         Define.
 768
 769         * interp.c, support.h: Use.
 770
 771 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 774         to value_fpr / store_fpr. Add SD argument.
 775         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 776         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 777
 778         * sim-main.h (ValueFPR, StoreFPR): Define.
 779
 780 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 781
 782         * interp.c (sim_engine_run): Check consistency between configure
 783         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 784         and HASFPU.
 785
 786         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 787         (mips_fpu): Configure WITH_FLOATING_POINT.
 788         (mips_endian): Configure WITH_TARGET_ENDIAN.
 789         * configure: Update.
 790
 791 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 792
 793         * configure: Regenerated to track ../common/aclocal.m4 changes.
 794
 795 start-sanitize-r5900
 796 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 797
 798         * interp.c (MAX_REG): Allow up-to 128 registers.
 799         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 800         (REGISTER_SA): Ditto.
 801         (sim_open): Initialize register_widths for r5900 specific
 802         registers.
 803         (sim_fetch_register, sim_store_register): Check for request of
 804         r5900 specific SA register.  Check for request for hi 64 bits of
 805         r5900 specific registers.
 806
 807 end-sanitize-r5900
 808 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 809
 810         * configure: Regenerated.
 811
 812 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 813
 814         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 815
 816 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 817
 818         * gencode.c (print_igen_insn_models): Assume certain architectures
 819         include all mips* instructions.
 820         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 821         instruction.
 822
 823         * Makefile.in (tmp.igen): Add target. Generate igen input from
 824         gencode file.
 825
 826         * gencode.c (FEATURE_IGEN): Define.
 827         (main): Add --igen option.  Generate output in igen format.
 828         (process_instructions): Format output according to igen option.
 829         (print_igen_insn_format): New function.
 830         (print_igen_insn_models): New function.
 831         (process_instructions): Only issue warnings and ignore
 832         instructions when no FEATURE_IGEN.
 833
 834 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 835
 836         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 837         MIPS targets.
 838
 839 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 840
 841         * configure: Regenerated to track ../common/aclocal.m4 changes.
 842
 843 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 844
 845         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 846         SIM_RESERVED_BITS): Delete, moved to common.
 847         (SIM_EXTRA_CFLAGS): Update.
 848
 849 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 850
 851         * configure.in: Configure non-strict memory alignment.
 852         * configure: Regenerated to track ../common/aclocal.m4 changes.
 853
 854 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 855
 856         * configure: Regenerated to track ../common/aclocal.m4 changes.
 857
 858 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 859
 860         * gencode.c (SDBBP,DERET): Added (3900) insns.
 861         (RFE): Turn on for 3900.
 862         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 863         (dsstate): Made global.
 864         (SUBTARGET_R3900): Added.
 865         (CANCELDELAYSLOT): New.
 866         (SignalException): Ignore SystemCall rather than ignore and
 867         terminate.  Add DebugBreakPoint handling.
 868         (decode_coproc): New insns RFE, DERET; and new registers Debug
 869         and DEPC protected by SUBTARGET_R3900.
 870         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 871         bits explicitly.
 872         * Makefile.in,configure.in: Add mips subtarget option.
 873         * configure: Update.
 874
 875 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 876
 877         * gencode.c: Add r3900 (tx39).
 878
 879 start-sanitize-tx19
 880         * gencode.c: Fix some configuration problems by improving
 881         the relationship between tx19 and tx39.
 882 end-sanitize-tx19
 883
 884 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 885
 886         * gencode.c (build_instruction): Don't need to subtract 4 for
 887         JALR, just 2.
 888
 889 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 890
 891         * interp.c: Correct some HASFPU problems.
 892
 893 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 894
 895         * configure: Regenerated to track ../common/aclocal.m4 changes.
 896
 897 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 898
 899         * interp.c (mips_options): Fix samples option short form, should
 900         be `x'.
 901
 902 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 903
 904         * interp.c (sim_info): Enable info code.  Was just returning.
 905
 906 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 907
 908         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 909         MFC0.
 910
 911 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 912
 913         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 914         constants.
 915         (build_instruction): Ditto for LL.
 916
 917 start-sanitize-tx19
 918 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 919
 920         * mips/configure.in, mips/gencode: Add tx19/r1900.
 921
 922 end-sanitize-tx19
 923 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 924
 925         * configure: Regenerated to track ../common/aclocal.m4 changes.
 926
 927 start-sanitize-r5900
 928 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 929
 930         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 931         for overflow due to ABS of MININT, set result to MAXINT.
 932         (build_instruction): For "psrlvw", signextend bit 31.
 933
 934 end-sanitize-r5900
 935 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 936
 937         * configure: Regenerated to track ../common/aclocal.m4 changes.
 938         * config.in: Ditto.
 939
 940 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 941
 942         * interp.c (sim_open): Add call to sim_analyze_program, update
 943         call to sim_config.
 944
 945 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 946
 947         * interp.c (sim_kill): Delete.
 948         (sim_create_inferior): Add ABFD argument. Set PC from same.
 949         (sim_load): Move code initializing trap handlers from here.
 950         (sim_open): To here.
 951         (sim_load): Delete, use sim-hload.c.
 952
 953         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 954
 955 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 956
 957         * configure: Regenerated to track ../common/aclocal.m4 changes.
 958         * config.in: Ditto.
 959
 960 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 961
 962         * interp.c (sim_open): Add ABFD argument.
 963         (sim_load): Move call to sim_config from here.
 964         (sim_open): To here.  Check return status.
 965
 966 start-sanitize-r5900
 967         * gencode.c (build_instruction): Do not define x8000000000000000,
 968         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 969
 970 end-sanitize-r5900
 971 start-sanitize-r5900
 972 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 975         "pdivuw" check for overflow due to signed divide by -1.
 976
 977 end-sanitize-r5900
 978 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 979
 980         * gencode.c (build_instruction): Two arg MADD should
 981         not assign result to $0.
 982
 983 start-sanitize-r5900
 984 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 985
 986         * gencode.c (build_instruction): For "ppac5" use unsigned
 987         arrithmetic so that the sign bit doesn't smear when right shifted.
 988         (build_instruction): For "pdiv" perform sign extension when
 989         storing results in HI and LO.
 990         (build_instructions): For "pdiv" and "pdivbw" check for
 991         divide-by-zero.
 992         (build_instruction): For "pmfhl.slw" update hi part of dest
 993         register as well as low part.
 994         (build_instruction): For "pmfhl" portably handle long long values.
 995         (build_instruction): For "pmfhl.sh" correctly negative values.
 996         Store half words 2 and three in the correct place.
 997         (build_instruction): For "psllvw", sign extend value after shift.
 998
 999 end-sanitize-r5900
1000 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1001
1002         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1003         * sim/mips/configure.in: Regenerate.
1004
1005 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1006
1007         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1008         signed8, unsigned8 et.al. types.
1009
1010 start-sanitize-r5900
1011         * gencode.c (build_instruction): For PMULTU* do not sign extend
1012         registers.  Make generated code easier to debug.
1013
1014 end-sanitize-r5900
1015         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1016         hosts when selecting subreg.
1017
1018 start-sanitize-r5900
1019 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1020
1021         * gencode.c (type_for_data_len): For 32bit operations concerned
1022         with overflow, perform op using 64bits.
1023         (build_instruction): For PADD, always compute operation using type
1024         returned by type_for_data_len.
1025         (build_instruction): For PSUBU, when overflow, saturate to zero as
1026         actually underflow.
1027
1028 end-sanitize-r5900
1029 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1030
1031 start-sanitize-r5900
1032         * gencode.c (build_instruction): Handle "pext5" according to
1033         version 1.95 of the r5900 ISA.
1034
1035         * gencode.c (build_instruction): Handle "ppac5" according to
1036         version 1.95 of the r5900 ISA.
1037
1038 end-sanitize-r5900
1039         * interp.c (sim_engine_run): Reset the ZERO register to zero
1040         regardless of FEATURE_WARN_ZERO.
1041         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1042
1043 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1044
1045         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1046         (SignalException): For BreakPoints ignore any mode bits and just
1047         save the PC.
1048         (SignalException): Always set the CAUSE register.
1049
1050 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1051
1052         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1053         exception has been taken.
1054
1055         * interp.c: Implement the ERET and mt/f sr instructions.
1056
1057 start-sanitize-r5900
1058 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1059
1060         * gencode.c (build_instruction): For paddu, extract unsigned
1061         sub-fields.
1062
1063         * gencode.c (build_instruction): Saturate padds instead of padd
1064         instructions.
1065
1066 end-sanitize-r5900
1067 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1068
1069         * interp.c (SignalException): Don't bother restarting an
1070         interrupt.
1071
1072 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1073
1074         * interp.c (SignalException): Really take an interrupt.
1075         (interrupt_event): Only deliver interrupts when enabled.
1076
1077 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1078
1079         * interp.c (sim_info): Only print info when verbose.
1080         (sim_info) Use sim_io_printf for output.
1081
1082 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1083
1084         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1085         mips architectures.
1086
1087 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1088
1089         * interp.c (sim_do_command): Check for common commands if a
1090         simulator specific command fails.
1091
1092 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1093
1094         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1095         and simBE when DEBUG is defined.
1096
1097 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1098
1099         * interp.c (interrupt_event): New function.  Pass exception event
1100         onto exception handler.
1101
1102         * configure.in: Check for stdlib.h.
1103         * configure: Regenerate.
1104
1105         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1106         variable declaration.
1107         (build_instruction): Initialize memval1.
1108         (build_instruction): Add UNUSED attribute to byte, bigend,
1109         reverse.
1110         (build_operands): Ditto.
1111
1112         * interp.c: Fix GCC warnings.
1113         (sim_get_quit_code): Delete.
1114
1115         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1116         * Makefile.in: Ditto.
1117         * configure: Re-generate.
1118
1119         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1120
1121 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1122
1123         * interp.c (mips_option_handler): New function parse argumes using
1124         sim-options.
1125         (myname): Replace with STATE_MY_NAME.
1126         (sim_open): Delete check for host endianness - performed by
1127         sim_config.
1128         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1129         (sim_open): Move much of the initialization from here.
1130         (sim_load): To here.  After the image has been loaded and
1131         endianness set.
1132         (sim_open): Move ColdReset from here.
1133         (sim_create_inferior): To here.
1134         (sim_open): Make FP check less dependant on host endianness.
1135
1136         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1137         run.
1138         * interp.c (sim_set_callbacks): Delete.
1139
1140         * interp.c (membank, membank_base, membank_size): Replace with
1141         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1142         (sim_open): Remove call to callback->init. gdb/run do this.
1143
1144         * interp.c: Update
1145
1146         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1147
1148         * interp.c (big_endian_p): Delete, replaced by
1149         current_target_byte_order.
1150
1151 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1152
1153         * interp.c (host_read_long, host_read_word, host_swap_word,
1154         host_swap_long): Delete. Using common sim-endian.
1155         (sim_fetch_register, sim_store_register): Use H2T.
1156         (pipeline_ticks): Delete.  Handled by sim-events.
1157         (sim_info): Update.
1158         (sim_engine_run): Update.
1159
1160 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1161
1162         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1163         reason from here.
1164         (SignalException): To here. Signal using sim_engine_halt.
1165         (sim_stop_reason): Delete, moved to common.
1166
1167 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1168
1169         * interp.c (sim_open): Add callback argument.
1170         (sim_set_callbacks): Delete SIM_DESC argument.
1171         (sim_size): Ditto.
1172
1173 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1174
1175         * Makefile.in (SIM_OBJS): Add common modules.
1176
1177         * interp.c (sim_set_callbacks): Also set SD callback.
1178         (set_endianness, xfer_*, swap_*): Delete.
1179         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1180         Change to functions using sim-endian macros.
1181         (control_c, sim_stop): Delete, use common version.
1182         (simulate): Convert into.
1183         (sim_engine_run): This function.
1184         (sim_resume): Delete.
1185
1186         * interp.c (simulation): New variable - the simulator object.
1187         (sim_kind): Delete global - merged into simulation.
1188         (sim_load): Cleanup.  Move PC assignment from here.
1189         (sim_create_inferior): To here.
1190
1191         * sim-main.h: New file.
1192         * interp.c (sim-main.h): Include.
1193
1194 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1195
1196         * configure: Regenerated to track ../common/aclocal.m4 changes.
1197
1198 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1199
1200         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1201
1202 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1203
1204         * gencode.c (build_instruction): DIV instructions: check
1205         for division by zero and integer overflow before using
1206         host's division operation.
1207
1208 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1209
1210         * Makefile.in (SIM_OBJS): Add sim-load.o.
1211         * interp.c: #include bfd.h.
1212         (target_byte_order): Delete.
1213         (sim_kind, myname, big_endian_p): New static locals.
1214         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1215         after argument parsing.  Recognize -E arg, set endianness accordingly.
1216         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1217         load file into simulator.  Set PC from bfd.
1218         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1219         (set_endianness): Use big_endian_p instead of target_byte_order.
1220
1221 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1222
1223         * interp.c (sim_size): Delete prototype - conflicts with
1224         definition in remote-sim.h.  Correct definition.
1225
1226 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1227
1228         * configure: Regenerated to track ../common/aclocal.m4 changes.
1229         * config.in: Ditto.
1230
1231 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1232
1233         * interp.c (sim_open): New arg `kind'.
1234
1235         * configure: Regenerated to track ../common/aclocal.m4 changes.
1236
1237 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1238
1239         * configure: Regenerated to track ../common/aclocal.m4 changes.
1240
1241 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1242
1243         * interp.c (sim_open): Set optind to 0 before calling getopt.
1244
1245 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1246
1247         * configure: Regenerated to track ../common/aclocal.m4 changes.
1248
1249 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1250
1251         * interp.c : Replace uses of pr_addr with pr_uword64
1252         where the bit length is always 64 independent of SIM_ADDR.
1253         (pr_uword64) : added.
1254
1255 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1256
1257         * configure: Re-generate.
1258
1259 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1260
1261         * configure: Regenerate to track ../common/aclocal.m4 changes.
1262
1263 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1264
1265         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1266         in argv form.
1267         (other sim_*): New SIM_DESC argument.
1268
1269 start-sanitize-r5900
1270 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1271
1272         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1273         Change values to avoid overloading DOUBLEWORD which is tested
1274         for all insns.
1275         * gencode.c: reinstate "offending code".
1276
1277 end-sanitize-r5900
1278 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1279
1280         * interp.c: Fix printing of addresses for non-64-bit targets.
1281         (pr_addr): Add function to print address based on size.
1282 start-sanitize-r5900
1283         * gencode.c: #ifdef out offending code until a permanent fix
1284         can be added.  Code is causing build errors for non-5900 mips targets.
1285 end-sanitize-r5900
1286
1287 start-sanitize-r5900
1288 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1289
1290         * gencode.c (process_instructions): Correct test for ISA dependent
1291         architecture bits in isa field of MIPS_DECODE.
1292
1293 end-sanitize-r5900
1294 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1295
1296         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1297
1298 start-sanitize-r5900
1299 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1300
1301         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1302         PMADDUW.
1303
1304 end-sanitize-r5900
1305 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1306
1307         * gencode.c (build_mips16_operands): Correct computation of base
1308         address for extended PC relative instruction.
1309
1310 start-sanitize-r5900
1311 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1312
1313         * Makefile.in, configure, configure.in, gencode.c,
1314         interp.c, support.h: add r5900.
1315
1316 end-sanitize-r5900
1317 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1318
1319         * interp.c (mips16_entry): Add support for floating point cases.
1320         (SignalException): Pass floating point cases to mips16_entry.
1321         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1322         registers.
1323         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1324         or fmt_word.
1325         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1326         and then set the state to fmt_uninterpreted.
1327         (COP_SW): Temporarily set the state to fmt_word while calling
1328         ValueFPR.
1329
1330 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1331
1332         * gencode.c (build_instruction): The high order may be set in the
1333         comparison flags at any ISA level, not just ISA 4.
1334
1335 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1336
1337         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1338         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1339         * configure.in: sinclude ../common/aclocal.m4.
1340         * configure: Regenerated.
1341
1342 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1343
1344         * configure: Rebuild after change to aclocal.m4.
1345
1346 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1347
1348         * configure configure.in Makefile.in:  Update to new configure
1349         scheme which is more compatible with WinGDB builds.
1350         * configure.in:  Improve comment on how to run autoconf.
1351         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1352         * Makefile.in:  Use autoconf substitution to install common
1353         makefile fragment.
1354
1355 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1356
1357         * gencode.c (build_instruction): Use BigEndianCPU instead of
1358         ByteSwapMem.
1359
1360 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1361
1362         * interp.c (sim_monitor): Make output to stdout visible in
1363         wingdb's I/O log window.
1364
1365 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1366
1367         * support.h: Undo previous change to SIGTRAP
1368         and SIGQUIT values.
1369
1370 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1371
1372         * interp.c (store_word, load_word): New static functions.
1373         (mips16_entry): New static function.
1374         (SignalException): Look for mips16 entry and exit instructions.
1375         (simulate): Use the correct index when setting fpr_state after
1376         doing a pending move.
1377
1378 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1379
1380         * interp.c: Fix byte-swapping code throughout to work on
1381         both little- and big-endian hosts.
1382
1383 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1384
1385         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1386         with gdb/config/i386/xm-windows.h.
1387
1388 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1389
1390         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1391         that messes up arithmetic shifts.
1392
1393 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1394
1395         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1396         SIGTRAP and SIGQUIT for _WIN32.
1397
1398 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1399
1400         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1401         force a 64 bit multiplication.
1402         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1403         destination register is 0, since that is the default mips16 nop
1404         instruction.
1405
1406 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1407
1408         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1409         (build_endian_shift): Don't check proc64.
1410         (build_instruction): Always set memval to uword64.  Cast op2 to
1411         uword64 when shifting it left in memory instructions.  Always use
1412         the same code for stores--don't special case proc64.
1413
1414         * gencode.c (build_mips16_operands): Fix base PC value for PC
1415         relative operands.
1416         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1417         jal instruction.
1418         * interp.c (simJALDELAYSLOT): Define.
1419         (JALDELAYSLOT): Define.
1420         (INDELAYSLOT, INJALDELAYSLOT): Define.
1421         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1422
1423 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1424
1425         * interp.c (sim_open): add flush_cache as a PMON routine
1426         (sim_monitor): handle flush_cache by ignoring it
1427
1428 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1429
1430         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1431         BigEndianMem.
1432         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1433         (BigEndianMem): Rename to ByteSwapMem and change sense.
1434         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1435         BigEndianMem references to !ByteSwapMem.
1436         (set_endianness): New function, with prototype.
1437         (sim_open): Call set_endianness.
1438         (sim_info): Use simBE instead of BigEndianMem.
1439         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1440         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1441         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1442         ifdefs, keeping the prototype declaration.
1443         (swap_word): Rewrite correctly.
1444         (ColdReset): Delete references to CONFIG.  Delete endianness related
1445         code; moved to set_endianness.
1446
1447 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1448
1449         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1450         * interp.c (CHECKHILO): Define away.
1451         (simSIGINT): New macro.
1452         (membank_size): Increase from 1MB to 2MB.
1453         (control_c): New function.
1454         (sim_resume): Rename parameter signal to signal_number.  Add local
1455         variable prev.  Call signal before and after simulate.
1456         (sim_stop_reason): Add simSIGINT support.
1457         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1458         functions always.
1459         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1460         if logfh is NULL.
1461         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1462         a call to sim_warning.
1463
1464 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1465
1466         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1467         16 bit instructions.
1468
1469 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1470
1471         Add support for mips16 (16 bit MIPS implementation):
1472         * gencode.c (inst_type): Add mips16 instruction encoding types.
1473         (GETDATASIZEINSN): Define.
1474         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1475         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1476         mtlo.
1477         (MIPS16_DECODE): New table, for mips16 instructions.
1478         (bitmap_val): New static function.
1479         (struct mips16_op): Define.
1480         (mips16_op_table): New table, for mips16 operands.
1481         (build_mips16_operands): New static function.
1482         (process_instructions): If PC is odd, decode a mips16
1483         instruction.  Break out instruction handling into new
1484         build_instruction function.
1485         (build_instruction): New static function, broken out of
1486         process_instructions.  Check modifiers rather than flags for SHIFT
1487         bit count and m[ft]{hi,lo} direction.
1488         (usage): Pass program name to fprintf.
1489         (main): Remove unused variable this_option_optind.  Change
1490         ``*loptarg++'' to ``loptarg++''.
1491         (my_strtoul): Parenthesize && within ||.
1492         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1493         (simulate): If PC is odd, fetch a 16 bit instruction, and
1494         increment PC by 2 rather than 4.
1495         * configure.in: Add case for mips16*-*-*.
1496         * configure: Rebuild.
1497
1498 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1499
1500         * interp.c: Allow -t to enable tracing in standalone simulator.
1501         Fix garbage output in trace file and error messages.
1502
1503 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1504
1505         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1506         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1507         * configure.in: Simplify using macros in ../common/aclocal.m4.
1508         * configure: Regenerated.
1509         * tconfig.in: New file.
1510
1511 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1512
1513         * interp.c: Fix bugs in 64-bit port.
1514         Use ansi function declarations for msvc compiler.
1515         Initialize and test file pointer in trace code.
1516         Prevent duplicate definition of LAST_EMED_REGNUM.
1517
1518 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1519
1520         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1521
1522 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1523
1524         * interp.c (SignalException): Check for explicit terminating
1525         breakpoint value.
1526         * gencode.c: Pass instruction value through SignalException()
1527         calls for Trap, Breakpoint and Syscall.
1528
1529 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1530
1531         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1532         only used on those hosts that provide it.
1533         * configure.in: Add sqrt() to list of functions to be checked for.
1534         * config.in: Re-generated.
1535         * configure: Re-generated.
1536
1537 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1538
1539         * gencode.c (process_instructions): Call build_endian_shift when
1540         expanding STORE RIGHT, to fix swr.
1541         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1542         clear the high bits.
1543         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1544         Fix float to int conversions to produce signed values.
1545
1546 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1547
1548         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1549         (process_instructions): Correct handling of nor instruction.
1550         Correct shift count for 32 bit shift instructions. Correct sign
1551         extension for arithmetic shifts to not shift the number of bits in
1552         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1553         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1554         Fix madd.
1555         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1556         It's OK to have a mult follow a mult.  What's not OK is to have a
1557         mult follow an mfhi.
1558         (Convert): Comment out incorrect rounding code.
1559
1560 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1561
1562         * interp.c (sim_monitor): Improved monitor printf
1563         simulation. Tidied up simulator warnings, and added "--log" option
1564         for directing warning message output.
1565         * gencode.c: Use sim_warning() rather than WARNING macro.
1566
1567 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1568
1569         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1570         getopt1.o, rather than on gencode.c.  Link objects together.
1571         Don't link against -liberty.
1572         (gencode.o, getopt.o, getopt1.o): New targets.
1573         * gencode.c: Include <ctype.h> and "ansidecl.h".
1574         (AND): Undefine after including "ansidecl.h".
1575         (ULONG_MAX): Define if not defined.
1576         (OP_*): Don't define macros; now defined in opcode/mips.h.
1577         (main): Call my_strtoul rather than strtoul.
1578         (my_strtoul): New static function.
1579
1580 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1581
1582         * gencode.c (process_instructions):  Generate word64 and uword64
1583         instead of `long long' and `unsigned long long' data types.
1584         * interp.c:  #include sysdep.h to get signals, and define default
1585         for SIGBUS.
1586         * (Convert):  Work around for Visual-C++ compiler bug with type
1587         conversion.
1588         * support.h:  Make things compile under Visual-C++ by using
1589         __int64 instead of `long long'.  Change many refs to long long
1590         into word64/uword64 typedefs.
1591
1592 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1593
1594         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1595         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1596         (docdir): Removed.
1597         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1598         (AC_PROG_INSTALL): Added.
1599         (AC_PROG_CC): Moved to before configure.host call.
1600         * configure: Rebuilt.
1601
1602 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1603
1604         * configure.in: Define @SIMCONF@ depending on mips target.
1605         * configure: Rebuild.
1606         * Makefile.in (run): Add @SIMCONF@ to control simulator
1607         construction.
1608         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1609         * interp.c: Remove some debugging, provide more detailed error
1610         messages, update memory accesses to use LOADDRMASK.
1611
1612 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1613
1614         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1615         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1616         stamp-h.
1617         * configure: Rebuild.
1618         * config.in: New file, generated by autoheader.
1619         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1620         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1621         HAVE_ANINT and HAVE_AINT, as appropriate.
1622         * Makefile.in (run): Use @LIBS@ rather than -lm.
1623         (interp.o): Depend upon config.h.
1624         (Makefile): Just rebuild Makefile.
1625         (clean): Remove stamp-h.
1626         (mostlyclean): Make the same as clean, not as distclean.
1627         (config.h, stamp-h): New targets.
1628
1629 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1630
1631         * interp.c (ColdReset): Fix boolean test. Make all simulator
1632         globals static.
1633
1634 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1635
1636         * interp.c (xfer_direct_word, xfer_direct_long,
1637         swap_direct_word, swap_direct_long, xfer_big_word,
1638         xfer_big_long, xfer_little_word, xfer_little_long,
1639         swap_word,swap_long): Added.
1640         * interp.c (ColdReset): Provide function indirection to
1641         host<->simulated_target transfer routines.
1642         * interp.c (sim_store_register, sim_fetch_register): Updated to
1643         make use of indirected transfer routines.
1644
1645 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1646
1647         * gencode.c (process_instructions): Ensure FP ABS instruction
1648         recognised.
1649         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1650         system call support.
1651
1652 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1653
1654         * interp.c (sim_do_command): Complain if callback structure not
1655         initialised.
1656
1657 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1658
1659         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1660         support for Sun hosts.
1661         * Makefile.in (gencode): Ensure the host compiler and libraries
1662         used for cross-hosted build.
1663
1664 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1665
1666         * interp.c, gencode.c: Some more (TODO) tidying.
1667
1668 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1669
1670         * gencode.c, interp.c: Replaced explicit long long references with
1671         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1672         * support.h (SET64LO, SET64HI): Macros added.
1673
1674 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1675
1676         * configure: Regenerate with autoconf 2.7.
1677
1678 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1679
1680         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1681         * support.h: Remove superfluous "1" from #if.
1682         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1683
1684 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1685
1686         * interp.c (StoreFPR): Control UndefinedResult() call on
1687         WARN_RESULT manifest.
1688
1689 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1690
1691         * gencode.c: Tidied instruction decoding, and added FP instruction
1692         support.
1693
1694         * interp.c: Added dineroIII, and BSD profiling support. Also
1695         run-time FP handling.
1696
1697 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1698
1699         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1700         gencode.c, interp.c, support.h: created.