sim/mips/ChangeLog

   1 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
   4
   5 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   6
   7         * interp.c (ifetch16): New function.
   8
   9         * sim-main.h (IMEM32): Rename IMEM.
  10         (IMEM16_IMMED): Define.
  11         (IMEM16): Define.
  12         (DELAY_SLOT): Update.
  13
  14         * m16run.c (sim_engine_run): New file.
  15
  16         * m16.igen: All instructions except LB.
  17         (LB): Call do_load_byte.
  18         * mips.igen (do_load_byte): New function.
  19         (LB): Call do_load_byte.
  20
  21         * mips.igen: Move spec for insn bit size and high bit from here.
  22         * Makefile.in (tmp-igen, tmp-m16): To here.
  23
  24         * m16.dc: New file, decode mips16 instructions.
  25
  26         * Makefile.in (SIM_NO_ALL): Define.
  27         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
  28
  29 start-sanitize-tx19
  30         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
  31         set.
  32
  33 end-sanitize-tx19
  34 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  35
  36         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
  37         point unit to 32 bit registers.
  38         * configure: Re-generate.
  39
  40 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  41
  42         * configure.in (sim_use_gen): Make IGEN the default simulator
  43         generator for generic 32 and 64 bit mips targets.
  44         * configure: Re-generate.
  45
  46 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  47
  48         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
  49         bitsize.
  50
  51         * interp.c (sim_fetch_register, sim_store_register): Read/write
  52         FGR from correct location.
  53         (sim_open): Set size of FGR's according to
  54         WITH_TARGET_FLOATING_POINT_BITSIZE.
  55
  56         * sim-main.h (FGR): Store floating point registers in a separate
  57         array.
  58
  59 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  60
  61         * configure: Regenerated to track ../common/aclocal.m4 changes.
  62
  63 start-sanitize-vr5400
  64         * mdmx.igen: Mark all instructions as 64bit/fp specific.
  65
  66 end-sanitize-vr5400
  67 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  68
  69         * interp.c (ColdReset): Call PENDING_INVALIDATE.
  70
  71         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
  72
  73         * interp.c (pending_tick): New function.  Deliver pending writes.
  74
  75         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
  76         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
  77         it can handle mixed sized quantites and single bits.
  78
  79 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  80
  81         * interp.c (oengine.h): Do not include when building with IGEN.
  82         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
  83         (sim_info): Ditto for PROCESSOR_64BIT.
  84         (sim_monitor): Replace ut_reg with unsigned_word.
  85         (*): Ditto for t_reg.
  86         (LOADDRMASK): Define.
  87         (sim_open): Remove defunct check that host FP is IEEE compliant,
  88         using software to emulate floating point.
  89         (value_fpr, ...): Always compile, was conditional on HASFPU.
  90
  91 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  92
  93         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
  94         size.
  95
  96         * interp.c (SD, CPU): Define.
  97         (mips_option_handler): Set flags in each CPU.
  98         (interrupt_event): Assume CPU 0 is the one being iterrupted.
  99         (sim_close): Do not clear STATE, deleted anyway.
 100         (sim_write, sim_read): Assume CPU zero's vm should be used for
 101         data transfers.
 102         (sim_create_inferior): Set the PC for all processors.
 103         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 104         argument.
 105         (mips16_entry): Pass correct nr of args to store_word, load_word.
 106         (ColdReset): Cold reset all cpu's.
 107         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 108         (sim_monitor, load_memory, store_memory, signal_exception): Use
 109         `CPU' instead of STATE_CPU.
 110
 111
 112         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 113         SD or CPU_.
 114
 115         * sim-main.h (signal_exception): Add sim_cpu arg.
 116         (SignalException*): Pass both SD and CPU to signal_exception.
 117         * interp.c (signal_exception): Update.
 118
 119         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 120         Ditto
 121         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 122         address_translation): Ditto
 123         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 124
 125 start-sanitize-vr5400
 126         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 127         `sd'.
 128         (ByteAlign): Use StoreFPR, pass args in correct order.
 129
 130 end-sanitize-vr5400
 131 start-sanitize-r5900
 132 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 133
 134         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 135
 136 end-sanitize-r5900
 137 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 138
 139         * configure: Regenerated to track ../common/aclocal.m4 changes.
 140
 141 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 142
 143 start-sanitize-r5900
 144         * configure.in (sim_igen_filter): For r5900, use igen.
 145         * configure: Re-generate.
 146
 147 end-sanitize-r5900
 148         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 149
 150         * mips.igen (model): Map processor names onto BFD name.
 151
 152         * sim-main.h (CPU_CIA): Delete.
 153         (SET_CIA, GET_CIA): Define
 154
 155 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 156
 157         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 158         regiser.
 159
 160         * configure.in (default_endian): Configure a big-endian simulator
 161         by default.
 162         * configure: Re-generate.
 163
 164 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 165
 166         * configure: Regenerated to track ../common/aclocal.m4 changes.
 167
 168 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 169
 170         * interp.c (sim_monitor): Handle Densan monitor outbyte
 171         and inbyte functions.
 172
 173 1997-12-29  Felix Lee  <flee@cygnus.com>
 174
 175         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 176
 177 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 178
 179         * Makefile.in (tmp-igen): Arrange for $zero to always be
 180         reset to zero after every instruction.
 181
 182 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 183
 184         * configure: Regenerated to track ../common/aclocal.m4 changes.
 185         * config.in: Ditto.
 186
 187 start-sanitize-vr5400
 188 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 189
 190         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 191         bit values.
 192
 193 end-sanitize-vr5400
 194 start-sanitize-vr5400
 195 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 196
 197         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 198         vr5400 with the vr5000 as the default.
 199
 200 end-sanitize-vr5400
 201 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 202
 203         * mips.igen (MSUB): Fix to work like MADD.
 204         * gencode.c (MSUB): Similarly.
 205
 206 start-sanitize-vr5400
 207 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 208
 209         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 210         vr5400.
 211
 212 end-sanitize-vr5400
 213 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 214
 215         * configure: Regenerated to track ../common/aclocal.m4 changes.
 216
 217 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 218
 219         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 220
 221 start-sanitize-vr5400
 222         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 223         (value_cc, store_cc): Implement.
 224
 225         * sim-main.h: Add 8*3*8 bit accumulator.
 226
 227         * vr5400.igen: Move mdmx instructins from here
 228         * mdmx.igen: To here - new file. Add/fix missing instructions.
 229         * mips.igen: Include mdmx.igen.
 230         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 231
 232 end-sanitize-vr5400
 233 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 234
 235         * sim-main.h (sim-fpu.h): Include.
 236
 237         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 238         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 239         using host independant sim_fpu module.
 240
 241 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 242
 243         * interp.c (signal_exception): Report internal errors with SIGABRT
 244         not SIGQUIT.
 245
 246         * sim-main.h (C0_CONFIG): New register.
 247         (signal.h): No longer include.
 248
 249         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 250
 251 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 252
 253         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 254
 255 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 256
 257         * mips.igen: Tag vr5000 instructions.
 258         (ANDI): Was missing mipsIV model, fix assembler syntax.
 259         (do_c_cond_fmt): New function.
 260         (C.cond.fmt): Handle mips I-III which do not support CC field
 261         separatly.
 262         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 263         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 264         in IV3.2 spec.
 265         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 266         vr5000 which saves LO in a GPR separatly.
 267
 268         * configure.in (enable-sim-igen): For vr5000, select vr5000
 269         specific instructions.
 270         * configure: Re-generate.
 271
 272 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 273
 274         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 275
 276         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 277         fmt_uninterpreted_64 bit cases to switch.  Convert to
 278         fmt_formatted,
 279
 280         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 281
 282         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 283         as specified in IV3.2 spec.
 284         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 285
 286 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 287
 288         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 289         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 290         (start-sanitize-r5900):
 291         (LWXC1, SWXC1): Delete from r5900 instruction set.
 292         (end-sanitize-r5900):
 293         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 294         PENDING_FILL versions of instructions.  Simplify.
 295         (X): New function.
 296         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 297         instructions.
 298         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 299         a signed value.
 300         (MTHI, MFHI): Disable code checking HI-LO.
 301
 302         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 303         global.
 304         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 305
 306 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 307
 308         * gencode.c (build_mips16_operands): Replace IPC with cia.
 309
 310         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 311         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 312         IPC to `cia'.
 313         (UndefinedResult): Replace function with macro/function
 314         combination.
 315         (sim_engine_run): Don't save PC in IPC.
 316
 317         * sim-main.h (IPC): Delete.
 318
 319         start-sanitize-vr5400
 320         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 321         (do_select): Rename function select.
 322         end-sanitize-vr5400
 323
 324         * interp.c (signal_exception, store_word, load_word,
 325         address_translation, load_memory, store_memory, cache_op,
 326         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 327         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 328         current instruction address - cia - argument.
 329         (sim_read, sim_write): Call address_translation directly.
 330         (sim_engine_run): Rename variable vaddr to cia.
 331         (signal_exception): Pass cia to sim_monitor
 332
 333         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 334         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 335         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 336
 337         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 338         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 339         SIM_ASSERT.
 340
 341         * interp.c (signal_exception): Pass restart address to
 342         sim_engine_restart.
 343
 344         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 345         idecode.o): Add dependency.
 346
 347         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 348         Delete definitions
 349         (DELAY_SLOT): Update NIA not PC with branch address.
 350         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 351
 352         * mips.igen: Use CIA not PC in branch calculations.
 353         (illegal): Call SignalException.
 354         (BEQ, ADDIU): Fix assembler.
 355
 356 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 357
 358         * m16.igen (JALX): Was missing.
 359
 360         * configure.in (enable-sim-igen): New configuration option.
 361         * configure: Re-generate.
 362
 363         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 364
 365         * interp.c (load_memory, store_memory): Delete parameter RAW.
 366         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 367         bypassing {load,store}_memory.
 368
 369         * sim-main.h (ByteSwapMem): Delete definition.
 370
 371         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 372
 373         * interp.c (sim_do_command, sim_commands): Delete mips specific
 374         commands.  Handled by module sim-options.
 375
 376         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 377         (WITH_MODULO_MEMORY): Define.
 378
 379         * interp.c (sim_info): Delete code printing memory size.
 380
 381         * interp.c (mips_size): Nee sim_size, delete function.
 382         (power2): Delete.
 383         (monitor, monitor_base, monitor_size): Delete global variables.
 384         (sim_open, sim_close): Delete code creating monitor and other
 385         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 386         manage memory regions.
 387         (load_memory, store_memory): Use sim-core for memory model.
 388
 389         * interp.c (address_translation): Delete all memory map code
 390         except line forcing 32 bit addresses.
 391
 392 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 393
 394         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 395         trace options.
 396
 397         * interp.c (logfh, logfile): Delete globals.
 398         (sim_open, sim_close): Delete code opening & closing log file.
 399         (mips_option_handler): Delete -l and -n options.
 400         (OPTION mips_options): Ditto.
 401
 402         * interp.c (OPTION mips_options): Rename option trace to dinero.
 403         (mips_option_handler): Update.
 404
 405 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 406
 407         * interp.c (fetch_str): New function.
 408         (sim_monitor): Rewrite using sim_read & sim_write.
 409         (sim_open): Check magic number.
 410         (sim_open): Write monitor vectors into memory using sim_write.
 411         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 412         (sim_read, sim_write): Simplify - transfer data one byte at a
 413         time.
 414         (load_memory, store_memory): Clarify meaning of parameter RAW.
 415
 416         * sim-main.h (isHOST): Defete definition.
 417         (isTARGET): Mark as depreciated.
 418         (address_translation): Delete parameter HOST.
 419
 420         * interp.c (address_translation): Delete parameter HOST.
 421
 422 start-sanitize-tx49
 423 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 424
 425         * gencode.c: Add tx49 configury and insns.
 426         * configure.in: Add tx49 configury.
 427         * configure: Update.
 428
 429 end-sanitize-tx49
 430 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 431
 432         * mips.igen:
 433
 434         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 435         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 436
 437 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 438
 439         * mips.igen: Add model filter field to records.
 440
 441 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 442
 443         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 444
 445         interp.c (sim_engine_run): Do not compile function sim_engine_run
 446         when WITH_IGEN == 1.
 447
 448         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 449         target architecture.
 450
 451         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 452         igen. Replace with configuration variables sim_igen_flags /
 453         sim_m16_flags.
 454
 455         start-sanitize-r5900
 456         * r5900.igen: New file. Copy r5900 insns here.
 457         end-sanitize-r5900
 458         start-sanitize-vr5400
 459         * vr5400.igen: New file.
 460         end-sanitize-vr5400
 461         * m16.igen: New file.  Copy mips16 insns here.
 462         * mips.igen: From here.
 463
 464 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 465
 466         start-sanitize-vr5400
 467         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 468
 469         * configure.in: Add mips64vr5400 target.
 470         * configure: Re-generate.
 471
 472         end-sanitize-vr5400
 473         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 474         to top.
 475         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 476
 477 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 478
 479         * gencode.c (build_instruction): Follow sim_write's lead in using
 480         BigEndianMem instead of !ByteSwapMem.
 481
 482 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 483
 484         * configure.in (sim_gen): Dependent on target, select type of
 485         generator.  Always select old style generator.
 486
 487         configure: Re-generate.
 488
 489         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 490         targets.
 491         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 492         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 493         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 494         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 495         SIM_@sim_gen@_*, set by autoconf.
 496
 497 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 498
 499         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 500
 501         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 502         CURRENT_FLOATING_POINT instead.
 503
 504         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 505         (address_translation): Raise exception InstructionFetch when
 506         translation fails and isINSTRUCTION.
 507
 508         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 509         sim_engine_run): Change type of of vaddr and paddr to
 510         address_word.
 511         (address_translation, prefetch, load_memory, store_memory,
 512         cache_op): Change type of vAddr and pAddr to address_word.
 513
 514         * gencode.c (build_instruction): Change type of vaddr and paddr to
 515         address_word.
 516
 517 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 518
 519         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 520         macro to obtain result of ALU op.
 521
 522 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 523
 524         * interp.c (sim_info): Call profile_print.
 525
 526 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 527
 528         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 529
 530         * sim-main.h (WITH_PROFILE): Do not define, defined in
 531         common/sim-config.h.  Use sim-profile module.
 532         (simPROFILE): Delete defintion.
 533
 534         * interp.c (PROFILE): Delete definition.
 535         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 536         (sim_close): Delete code writing profile histogram.
 537         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 538         Delete.
 539         (sim_engine_run): Delete code profiling the PC.
 540
 541 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 542
 543         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 544
 545         * interp.c (sim_monitor): Make register pointers of type
 546         unsigned_word*.
 547
 548         * sim-main.h: Make registers of type unsigned_word not
 549         signed_word.
 550
 551 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 552
 553 start-sanitize-r5900
 554         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 555         ...): Move to sim-main.h
 556
 557 end-sanitize-r5900
 558         * interp.c (sync_operation): Rename from SyncOperation, make
 559         global, add SD argument.
 560         (prefetch): Rename from Prefetch, make global, add SD argument.
 561         (decode_coproc): Make global.
 562
 563         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 564
 565         * gencode.c (build_instruction): Generate DecodeCoproc not
 566         decode_coproc calls.
 567
 568         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 569         (SizeFGR): Move to sim-main.h
 570         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 571         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 572         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 573         sim-main.h.
 574         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 575         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 576         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 577         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 578         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 579         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 580
 581         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 582         exception.
 583         (sim-alu.h): Include.
 584         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 585         (sim_cia): Typedef to instruction_address.
 586
 587 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 588
 589         * Makefile.in (interp.o): Rename generated file engine.c to
 590         oengine.c.
 591
 592         * interp.c: Update.
 593
 594 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 595
 596         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 597
 598 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 599
 600         * gencode.c (build_instruction): For "FPSQRT", output correct
 601         number of arguments to Recip.
 602
 603 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 604
 605         * Makefile.in (interp.o): Depends on sim-main.h
 606
 607         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 608
 609         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 610         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 611         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 612         STATE, DSSTATE): Define
 613         (GPR, FGRIDX, ..): Define.
 614
 615         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 616         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 617         (GPR, FGRIDX, ...): Delete macros.
 618
 619         * interp.c: Update names to match defines from sim-main.h
 620
 621 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 622
 623         * interp.c (sim_monitor): Add SD argument.
 624         (sim_warning): Delete.  Replace calls with calls to
 625         sim_io_eprintf.
 626         (sim_error): Delete. Replace calls with sim_io_error.
 627         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 628         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 629         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 630         argument.
 631         (mips_size): Rename from sim_size. Add SD argument.
 632
 633         * interp.c (simulator): Delete global variable.
 634         (callback): Delete global variable.
 635         (mips_option_handler, sim_open, sim_write, sim_read,
 636         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 637         sim_size,sim_monitor): Use sim_io_* not callback->*.
 638         (sim_open): ZALLOC simulator struct.
 639         (PROFILE): Do not define.
 640
 641 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 642
 643         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 644         support.h with corresponding code.
 645
 646         * sim-main.h (word64, uword64), support.h: Move definition to
 647         sim-main.h.
 648         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 649
 650         * support.h: Delete
 651         * Makefile.in: Update dependencies
 652         * interp.c: Do not include.
 653
 654 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 655
 656         * interp.c (address_translation, load_memory, store_memory,
 657         cache_op): Rename to from AddressTranslation et.al., make global,
 658         add SD argument
 659
 660         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 661         CacheOp): Define.
 662
 663         * interp.c (SignalException): Rename to signal_exception, make
 664         global.
 665
 666         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 667
 668         * sim-main.h (SignalException, SignalExceptionInterrupt,
 669         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 670         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 671         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 672         Define.
 673
 674         * interp.c, support.h: Use.
 675
 676 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 677
 678         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 679         to value_fpr / store_fpr. Add SD argument.
 680         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 681         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 682
 683         * sim-main.h (ValueFPR, StoreFPR): Define.
 684
 685 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 686
 687         * interp.c (sim_engine_run): Check consistency between configure
 688         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 689         and HASFPU.
 690
 691         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 692         (mips_fpu): Configure WITH_FLOATING_POINT.
 693         (mips_endian): Configure WITH_TARGET_ENDIAN.
 694         * configure: Update.
 695
 696 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 697
 698         * configure: Regenerated to track ../common/aclocal.m4 changes.
 699
 700 start-sanitize-r5900
 701 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 702
 703         * interp.c (MAX_REG): Allow up-to 128 registers.
 704         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 705         (REGISTER_SA): Ditto.
 706         (sim_open): Initialize register_widths for r5900 specific
 707         registers.
 708         (sim_fetch_register, sim_store_register): Check for request of
 709         r5900 specific SA register.  Check for request for hi 64 bits of
 710         r5900 specific registers.
 711
 712 end-sanitize-r5900
 713 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 714
 715         * configure: Regenerated.
 716
 717 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 718
 719         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 720
 721 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 722
 723         * gencode.c (print_igen_insn_models): Assume certain architectures
 724         include all mips* instructions.
 725         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 726         instruction.
 727
 728         * Makefile.in (tmp.igen): Add target. Generate igen input from
 729         gencode file.
 730
 731         * gencode.c (FEATURE_IGEN): Define.
 732         (main): Add --igen option.  Generate output in igen format.
 733         (process_instructions): Format output according to igen option.
 734         (print_igen_insn_format): New function.
 735         (print_igen_insn_models): New function.
 736         (process_instructions): Only issue warnings and ignore
 737         instructions when no FEATURE_IGEN.
 738
 739 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 740
 741         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 742         MIPS targets.
 743
 744 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 745
 746         * configure: Regenerated to track ../common/aclocal.m4 changes.
 747
 748 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 749
 750         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 751         SIM_RESERVED_BITS): Delete, moved to common.
 752         (SIM_EXTRA_CFLAGS): Update.
 753
 754 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 755
 756         * configure.in: Configure non-strict memory alignment.
 757         * configure: Regenerated to track ../common/aclocal.m4 changes.
 758
 759 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 760
 761         * configure: Regenerated to track ../common/aclocal.m4 changes.
 762
 763 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 764
 765         * gencode.c (SDBBP,DERET): Added (3900) insns.
 766         (RFE): Turn on for 3900.
 767         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 768         (dsstate): Made global.
 769         (SUBTARGET_R3900): Added.
 770         (CANCELDELAYSLOT): New.
 771         (SignalException): Ignore SystemCall rather than ignore and
 772         terminate.  Add DebugBreakPoint handling.
 773         (decode_coproc): New insns RFE, DERET; and new registers Debug
 774         and DEPC protected by SUBTARGET_R3900.
 775         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 776         bits explicitly.
 777         * Makefile.in,configure.in: Add mips subtarget option.
 778         * configure: Update.
 779
 780 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 781
 782         * gencode.c: Add r3900 (tx39).
 783
 784 start-sanitize-tx19
 785         * gencode.c: Fix some configuration problems by improving
 786         the relationship between tx19 and tx39.
 787 end-sanitize-tx19
 788
 789 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 790
 791         * gencode.c (build_instruction): Don't need to subtract 4 for
 792         JALR, just 2.
 793
 794 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 795
 796         * interp.c: Correct some HASFPU problems.
 797
 798 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 799
 800         * configure: Regenerated to track ../common/aclocal.m4 changes.
 801
 802 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 803
 804         * interp.c (mips_options): Fix samples option short form, should
 805         be `x'.
 806
 807 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 808
 809         * interp.c (sim_info): Enable info code.  Was just returning.
 810
 811 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 812
 813         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 814         MFC0.
 815
 816 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 817
 818         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 819         constants.
 820         (build_instruction): Ditto for LL.
 821
 822 start-sanitize-tx19
 823 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 824
 825         * mips/configure.in, mips/gencode: Add tx19/r1900.
 826
 827 end-sanitize-tx19
 828 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 829
 830         * configure: Regenerated to track ../common/aclocal.m4 changes.
 831
 832 start-sanitize-r5900
 833 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 834
 835         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 836         for overflow due to ABS of MININT, set result to MAXINT.
 837         (build_instruction): For "psrlvw", signextend bit 31.
 838
 839 end-sanitize-r5900
 840 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 841
 842         * configure: Regenerated to track ../common/aclocal.m4 changes.
 843         * config.in: Ditto.
 844
 845 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 846
 847         * interp.c (sim_open): Add call to sim_analyze_program, update
 848         call to sim_config.
 849
 850 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 851
 852         * interp.c (sim_kill): Delete.
 853         (sim_create_inferior): Add ABFD argument. Set PC from same.
 854         (sim_load): Move code initializing trap handlers from here.
 855         (sim_open): To here.
 856         (sim_load): Delete, use sim-hload.c.
 857
 858         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 859
 860 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 861
 862         * configure: Regenerated to track ../common/aclocal.m4 changes.
 863         * config.in: Ditto.
 864
 865 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 866
 867         * interp.c (sim_open): Add ABFD argument.
 868         (sim_load): Move call to sim_config from here.
 869         (sim_open): To here.  Check return status.
 870
 871 start-sanitize-r5900
 872         * gencode.c (build_instruction): Do not define x8000000000000000,
 873         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 874
 875 end-sanitize-r5900
 876 start-sanitize-r5900
 877 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 878
 879         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 880         "pdivuw" check for overflow due to signed divide by -1.
 881
 882 end-sanitize-r5900
 883 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 884
 885         * gencode.c (build_instruction): Two arg MADD should
 886         not assign result to $0.
 887
 888 start-sanitize-r5900
 889 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 890
 891         * gencode.c (build_instruction): For "ppac5" use unsigned
 892         arrithmetic so that the sign bit doesn't smear when right shifted.
 893         (build_instruction): For "pdiv" perform sign extension when
 894         storing results in HI and LO.
 895         (build_instructions): For "pdiv" and "pdivbw" check for
 896         divide-by-zero.
 897         (build_instruction): For "pmfhl.slw" update hi part of dest
 898         register as well as low part.
 899         (build_instruction): For "pmfhl" portably handle long long values.
 900         (build_instruction): For "pmfhl.sh" correctly negative values.
 901         Store half words 2 and three in the correct place.
 902         (build_instruction): For "psllvw", sign extend value after shift.
 903
 904 end-sanitize-r5900
 905 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
 906
 907         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
 908         * sim/mips/configure.in: Regenerate.
 909
 910 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 911
 912         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 913         signed8, unsigned8 et.al. types.
 914
 915 start-sanitize-r5900
 916         * gencode.c (build_instruction): For PMULTU* do not sign extend
 917         registers.  Make generated code easier to debug.
 918
 919 end-sanitize-r5900
 920         * interp.c (SUB_REG_FETCH): Handle both little and big endian
 921         hosts when selecting subreg.
 922
 923 start-sanitize-r5900
 924 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
 925
 926         * gencode.c (type_for_data_len): For 32bit operations concerned
 927         with overflow, perform op using 64bits.
 928         (build_instruction): For PADD, always compute operation using type
 929         returned by type_for_data_len.
 930         (build_instruction): For PSUBU, when overflow, saturate to zero as
 931         actually underflow.
 932
 933 end-sanitize-r5900
 934 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
 935
 936 start-sanitize-r5900
 937         * gencode.c (build_instruction): Handle "pext5" according to
 938         version 1.95 of the r5900 ISA.
 939
 940         * gencode.c (build_instruction): Handle "ppac5" according to
 941         version 1.95 of the r5900 ISA.
 942
 943 end-sanitize-r5900
 944         * interp.c (sim_engine_run): Reset the ZERO register to zero
 945         regardless of FEATURE_WARN_ZERO.
 946         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
 947
 948 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 949
 950         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
 951         (SignalException): For BreakPoints ignore any mode bits and just
 952         save the PC.
 953         (SignalException): Always set the CAUSE register.
 954
 955 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 956
 957         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
 958         exception has been taken.
 959
 960         * interp.c: Implement the ERET and mt/f sr instructions.
 961
 962 start-sanitize-r5900
 963 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 964
 965         * gencode.c (build_instruction): For paddu, extract unsigned
 966         sub-fields.
 967
 968         * gencode.c (build_instruction): Saturate padds instead of padd
 969         instructions.
 970
 971 end-sanitize-r5900
 972 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * interp.c (SignalException): Don't bother restarting an
 975         interrupt.
 976
 977 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 978
 979         * interp.c (SignalException): Really take an interrupt.
 980         (interrupt_event): Only deliver interrupts when enabled.
 981
 982 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 983
 984         * interp.c (sim_info): Only print info when verbose.
 985         (sim_info) Use sim_io_printf for output.
 986
 987 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 988
 989         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
 990         mips architectures.
 991
 992 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 993
 994         * interp.c (sim_do_command): Check for common commands if a
 995         simulator specific command fails.
 996
 997 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
 998
 999         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1000         and simBE when DEBUG is defined.
1001
1002 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1003
1004         * interp.c (interrupt_event): New function.  Pass exception event
1005         onto exception handler.
1006
1007         * configure.in: Check for stdlib.h.
1008         * configure: Regenerate.
1009
1010         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1011         variable declaration.
1012         (build_instruction): Initialize memval1.
1013         (build_instruction): Add UNUSED attribute to byte, bigend,
1014         reverse.
1015         (build_operands): Ditto.
1016
1017         * interp.c: Fix GCC warnings.
1018         (sim_get_quit_code): Delete.
1019
1020         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1021         * Makefile.in: Ditto.
1022         * configure: Re-generate.
1023
1024         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1025
1026 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1027
1028         * interp.c (mips_option_handler): New function parse argumes using
1029         sim-options.
1030         (myname): Replace with STATE_MY_NAME.
1031         (sim_open): Delete check for host endianness - performed by
1032         sim_config.
1033         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1034         (sim_open): Move much of the initialization from here.
1035         (sim_load): To here.  After the image has been loaded and
1036         endianness set.
1037         (sim_open): Move ColdReset from here.
1038         (sim_create_inferior): To here.
1039         (sim_open): Make FP check less dependant on host endianness.
1040
1041         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1042         run.
1043         * interp.c (sim_set_callbacks): Delete.
1044
1045         * interp.c (membank, membank_base, membank_size): Replace with
1046         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1047         (sim_open): Remove call to callback->init. gdb/run do this.
1048
1049         * interp.c: Update
1050
1051         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1052
1053         * interp.c (big_endian_p): Delete, replaced by
1054         current_target_byte_order.
1055
1056 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1057
1058         * interp.c (host_read_long, host_read_word, host_swap_word,
1059         host_swap_long): Delete. Using common sim-endian.
1060         (sim_fetch_register, sim_store_register): Use H2T.
1061         (pipeline_ticks): Delete.  Handled by sim-events.
1062         (sim_info): Update.
1063         (sim_engine_run): Update.
1064
1065 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1066
1067         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1068         reason from here.
1069         (SignalException): To here. Signal using sim_engine_halt.
1070         (sim_stop_reason): Delete, moved to common.
1071
1072 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1073
1074         * interp.c (sim_open): Add callback argument.
1075         (sim_set_callbacks): Delete SIM_DESC argument.
1076         (sim_size): Ditto.
1077
1078 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1079
1080         * Makefile.in (SIM_OBJS): Add common modules.
1081
1082         * interp.c (sim_set_callbacks): Also set SD callback.
1083         (set_endianness, xfer_*, swap_*): Delete.
1084         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1085         Change to functions using sim-endian macros.
1086         (control_c, sim_stop): Delete, use common version.
1087         (simulate): Convert into.
1088         (sim_engine_run): This function.
1089         (sim_resume): Delete.
1090
1091         * interp.c (simulation): New variable - the simulator object.
1092         (sim_kind): Delete global - merged into simulation.
1093         (sim_load): Cleanup.  Move PC assignment from here.
1094         (sim_create_inferior): To here.
1095
1096         * sim-main.h: New file.
1097         * interp.c (sim-main.h): Include.
1098
1099 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1100
1101         * configure: Regenerated to track ../common/aclocal.m4 changes.
1102
1103 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1104
1105         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1106
1107 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1108
1109         * gencode.c (build_instruction): DIV instructions: check
1110         for division by zero and integer overflow before using
1111         host's division operation.
1112
1113 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1114
1115         * Makefile.in (SIM_OBJS): Add sim-load.o.
1116         * interp.c: #include bfd.h.
1117         (target_byte_order): Delete.
1118         (sim_kind, myname, big_endian_p): New static locals.
1119         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1120         after argument parsing.  Recognize -E arg, set endianness accordingly.
1121         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1122         load file into simulator.  Set PC from bfd.
1123         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1124         (set_endianness): Use big_endian_p instead of target_byte_order.
1125
1126 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1127
1128         * interp.c (sim_size): Delete prototype - conflicts with
1129         definition in remote-sim.h.  Correct definition.
1130
1131 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1132
1133         * configure: Regenerated to track ../common/aclocal.m4 changes.
1134         * config.in: Ditto.
1135
1136 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1137
1138         * interp.c (sim_open): New arg `kind'.
1139
1140         * configure: Regenerated to track ../common/aclocal.m4 changes.
1141
1142 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1143
1144         * configure: Regenerated to track ../common/aclocal.m4 changes.
1145
1146 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1147
1148         * interp.c (sim_open): Set optind to 0 before calling getopt.
1149
1150 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1151
1152         * configure: Regenerated to track ../common/aclocal.m4 changes.
1153
1154 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1155
1156         * interp.c : Replace uses of pr_addr with pr_uword64
1157         where the bit length is always 64 independent of SIM_ADDR.
1158         (pr_uword64) : added.
1159
1160 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1161
1162         * configure: Re-generate.
1163
1164 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1165
1166         * configure: Regenerate to track ../common/aclocal.m4 changes.
1167
1168 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1169
1170         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1171         in argv form.
1172         (other sim_*): New SIM_DESC argument.
1173
1174 start-sanitize-r5900
1175 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1176
1177         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1178         Change values to avoid overloading DOUBLEWORD which is tested
1179         for all insns.
1180         * gencode.c: reinstate "offending code".
1181
1182 end-sanitize-r5900
1183 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1184
1185         * interp.c: Fix printing of addresses for non-64-bit targets.
1186         (pr_addr): Add function to print address based on size.
1187 start-sanitize-r5900
1188         * gencode.c: #ifdef out offending code until a permanent fix
1189         can be added.  Code is causing build errors for non-5900 mips targets.
1190 end-sanitize-r5900
1191
1192 start-sanitize-r5900
1193 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1194
1195         * gencode.c (process_instructions): Correct test for ISA dependent
1196         architecture bits in isa field of MIPS_DECODE.
1197
1198 end-sanitize-r5900
1199 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1200
1201         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1202
1203 start-sanitize-r5900
1204 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1205
1206         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1207         PMADDUW.
1208
1209 end-sanitize-r5900
1210 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1211
1212         * gencode.c (build_mips16_operands): Correct computation of base
1213         address for extended PC relative instruction.
1214
1215 start-sanitize-r5900
1216 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1217
1218         * Makefile.in, configure, configure.in, gencode.c,
1219         interp.c, support.h: add r5900.
1220
1221 end-sanitize-r5900
1222 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1223
1224         * interp.c (mips16_entry): Add support for floating point cases.
1225         (SignalException): Pass floating point cases to mips16_entry.
1226         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1227         registers.
1228         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1229         or fmt_word.
1230         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1231         and then set the state to fmt_uninterpreted.
1232         (COP_SW): Temporarily set the state to fmt_word while calling
1233         ValueFPR.
1234
1235 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1236
1237         * gencode.c (build_instruction): The high order may be set in the
1238         comparison flags at any ISA level, not just ISA 4.
1239
1240 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1241
1242         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1243         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1244         * configure.in: sinclude ../common/aclocal.m4.
1245         * configure: Regenerated.
1246
1247 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1248
1249         * configure: Rebuild after change to aclocal.m4.
1250
1251 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1252
1253         * configure configure.in Makefile.in:  Update to new configure
1254         scheme which is more compatible with WinGDB builds.
1255         * configure.in:  Improve comment on how to run autoconf.
1256         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1257         * Makefile.in:  Use autoconf substitution to install common
1258         makefile fragment.
1259
1260 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1261
1262         * gencode.c (build_instruction): Use BigEndianCPU instead of
1263         ByteSwapMem.
1264
1265 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1266
1267         * interp.c (sim_monitor): Make output to stdout visible in
1268         wingdb's I/O log window.
1269
1270 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1271
1272         * support.h: Undo previous change to SIGTRAP
1273         and SIGQUIT values.
1274
1275 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1276
1277         * interp.c (store_word, load_word): New static functions.
1278         (mips16_entry): New static function.
1279         (SignalException): Look for mips16 entry and exit instructions.
1280         (simulate): Use the correct index when setting fpr_state after
1281         doing a pending move.
1282
1283 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1284
1285         * interp.c: Fix byte-swapping code throughout to work on
1286         both little- and big-endian hosts.
1287
1288 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1289
1290         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1291         with gdb/config/i386/xm-windows.h.
1292
1293 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1294
1295         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1296         that messes up arithmetic shifts.
1297
1298 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1299
1300         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1301         SIGTRAP and SIGQUIT for _WIN32.
1302
1303 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1304
1305         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1306         force a 64 bit multiplication.
1307         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1308         destination register is 0, since that is the default mips16 nop
1309         instruction.
1310
1311 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1312
1313         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1314         (build_endian_shift): Don't check proc64.
1315         (build_instruction): Always set memval to uword64.  Cast op2 to
1316         uword64 when shifting it left in memory instructions.  Always use
1317         the same code for stores--don't special case proc64.
1318
1319         * gencode.c (build_mips16_operands): Fix base PC value for PC
1320         relative operands.
1321         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1322         jal instruction.
1323         * interp.c (simJALDELAYSLOT): Define.
1324         (JALDELAYSLOT): Define.
1325         (INDELAYSLOT, INJALDELAYSLOT): Define.
1326         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1327
1328 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1329
1330         * interp.c (sim_open): add flush_cache as a PMON routine
1331         (sim_monitor): handle flush_cache by ignoring it
1332
1333 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1334
1335         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1336         BigEndianMem.
1337         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1338         (BigEndianMem): Rename to ByteSwapMem and change sense.
1339         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1340         BigEndianMem references to !ByteSwapMem.
1341         (set_endianness): New function, with prototype.
1342         (sim_open): Call set_endianness.
1343         (sim_info): Use simBE instead of BigEndianMem.
1344         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1345         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1346         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1347         ifdefs, keeping the prototype declaration.
1348         (swap_word): Rewrite correctly.
1349         (ColdReset): Delete references to CONFIG.  Delete endianness related
1350         code; moved to set_endianness.
1351
1352 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1353
1354         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1355         * interp.c (CHECKHILO): Define away.
1356         (simSIGINT): New macro.
1357         (membank_size): Increase from 1MB to 2MB.
1358         (control_c): New function.
1359         (sim_resume): Rename parameter signal to signal_number.  Add local
1360         variable prev.  Call signal before and after simulate.
1361         (sim_stop_reason): Add simSIGINT support.
1362         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1363         functions always.
1364         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1365         if logfh is NULL.
1366         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1367         a call to sim_warning.
1368
1369 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1370
1371         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1372         16 bit instructions.
1373
1374 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1375
1376         Add support for mips16 (16 bit MIPS implementation):
1377         * gencode.c (inst_type): Add mips16 instruction encoding types.
1378         (GETDATASIZEINSN): Define.
1379         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1380         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1381         mtlo.
1382         (MIPS16_DECODE): New table, for mips16 instructions.
1383         (bitmap_val): New static function.
1384         (struct mips16_op): Define.
1385         (mips16_op_table): New table, for mips16 operands.
1386         (build_mips16_operands): New static function.
1387         (process_instructions): If PC is odd, decode a mips16
1388         instruction.  Break out instruction handling into new
1389         build_instruction function.
1390         (build_instruction): New static function, broken out of
1391         process_instructions.  Check modifiers rather than flags for SHIFT
1392         bit count and m[ft]{hi,lo} direction.
1393         (usage): Pass program name to fprintf.
1394         (main): Remove unused variable this_option_optind.  Change
1395         ``*loptarg++'' to ``loptarg++''.
1396         (my_strtoul): Parenthesize && within ||.
1397         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1398         (simulate): If PC is odd, fetch a 16 bit instruction, and
1399         increment PC by 2 rather than 4.
1400         * configure.in: Add case for mips16*-*-*.
1401         * configure: Rebuild.
1402
1403 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1404
1405         * interp.c: Allow -t to enable tracing in standalone simulator.
1406         Fix garbage output in trace file and error messages.
1407
1408 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1409
1410         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1411         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1412         * configure.in: Simplify using macros in ../common/aclocal.m4.
1413         * configure: Regenerated.
1414         * tconfig.in: New file.
1415
1416 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1417
1418         * interp.c: Fix bugs in 64-bit port.
1419         Use ansi function declarations for msvc compiler.
1420         Initialize and test file pointer in trace code.
1421         Prevent duplicate definition of LAST_EMED_REGNUM.
1422
1423 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1424
1425         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1426
1427 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1428
1429         * interp.c (SignalException): Check for explicit terminating
1430         breakpoint value.
1431         * gencode.c: Pass instruction value through SignalException()
1432         calls for Trap, Breakpoint and Syscall.
1433
1434 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1435
1436         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1437         only used on those hosts that provide it.
1438         * configure.in: Add sqrt() to list of functions to be checked for.
1439         * config.in: Re-generated.
1440         * configure: Re-generated.
1441
1442 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1443
1444         * gencode.c (process_instructions): Call build_endian_shift when
1445         expanding STORE RIGHT, to fix swr.
1446         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1447         clear the high bits.
1448         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1449         Fix float to int conversions to produce signed values.
1450
1451 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1452
1453         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1454         (process_instructions): Correct handling of nor instruction.
1455         Correct shift count for 32 bit shift instructions. Correct sign
1456         extension for arithmetic shifts to not shift the number of bits in
1457         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1458         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1459         Fix madd.
1460         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1461         It's OK to have a mult follow a mult.  What's not OK is to have a
1462         mult follow an mfhi.
1463         (Convert): Comment out incorrect rounding code.
1464
1465 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1466
1467         * interp.c (sim_monitor): Improved monitor printf
1468         simulation. Tidied up simulator warnings, and added "--log" option
1469         for directing warning message output.
1470         * gencode.c: Use sim_warning() rather than WARNING macro.
1471
1472 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1473
1474         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1475         getopt1.o, rather than on gencode.c.  Link objects together.
1476         Don't link against -liberty.
1477         (gencode.o, getopt.o, getopt1.o): New targets.
1478         * gencode.c: Include <ctype.h> and "ansidecl.h".
1479         (AND): Undefine after including "ansidecl.h".
1480         (ULONG_MAX): Define if not defined.
1481         (OP_*): Don't define macros; now defined in opcode/mips.h.
1482         (main): Call my_strtoul rather than strtoul.
1483         (my_strtoul): New static function.
1484
1485 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1486
1487         * gencode.c (process_instructions):  Generate word64 and uword64
1488         instead of `long long' and `unsigned long long' data types.
1489         * interp.c:  #include sysdep.h to get signals, and define default
1490         for SIGBUS.
1491         * (Convert):  Work around for Visual-C++ compiler bug with type
1492         conversion.
1493         * support.h:  Make things compile under Visual-C++ by using
1494         __int64 instead of `long long'.  Change many refs to long long
1495         into word64/uword64 typedefs.
1496
1497 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1498
1499         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1500         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1501         (docdir): Removed.
1502         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1503         (AC_PROG_INSTALL): Added.
1504         (AC_PROG_CC): Moved to before configure.host call.
1505         * configure: Rebuilt.
1506
1507 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1508
1509         * configure.in: Define @SIMCONF@ depending on mips target.
1510         * configure: Rebuild.
1511         * Makefile.in (run): Add @SIMCONF@ to control simulator
1512         construction.
1513         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1514         * interp.c: Remove some debugging, provide more detailed error
1515         messages, update memory accesses to use LOADDRMASK.
1516
1517 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1518
1519         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1520         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1521         stamp-h.
1522         * configure: Rebuild.
1523         * config.in: New file, generated by autoheader.
1524         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1525         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1526         HAVE_ANINT and HAVE_AINT, as appropriate.
1527         * Makefile.in (run): Use @LIBS@ rather than -lm.
1528         (interp.o): Depend upon config.h.
1529         (Makefile): Just rebuild Makefile.
1530         (clean): Remove stamp-h.
1531         (mostlyclean): Make the same as clean, not as distclean.
1532         (config.h, stamp-h): New targets.
1533
1534 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1535
1536         * interp.c (ColdReset): Fix boolean test. Make all simulator
1537         globals static.
1538
1539 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1540
1541         * interp.c (xfer_direct_word, xfer_direct_long,
1542         swap_direct_word, swap_direct_long, xfer_big_word,
1543         xfer_big_long, xfer_little_word, xfer_little_long,
1544         swap_word,swap_long): Added.
1545         * interp.c (ColdReset): Provide function indirection to
1546         host<->simulated_target transfer routines.
1547         * interp.c (sim_store_register, sim_fetch_register): Updated to
1548         make use of indirected transfer routines.
1549
1550 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1551
1552         * gencode.c (process_instructions): Ensure FP ABS instruction
1553         recognised.
1554         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1555         system call support.
1556
1557 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1558
1559         * interp.c (sim_do_command): Complain if callback structure not
1560         initialised.
1561
1562 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1563
1564         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1565         support for Sun hosts.
1566         * Makefile.in (gencode): Ensure the host compiler and libraries
1567         used for cross-hosted build.
1568
1569 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1570
1571         * interp.c, gencode.c: Some more (TODO) tidying.
1572
1573 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1574
1575         * gencode.c, interp.c: Replaced explicit long long references with
1576         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1577         * support.h (SET64LO, SET64HI): Macros added.
1578
1579 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1580
1581         * configure: Regenerate with autoconf 2.7.
1582
1583 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1584
1585         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1586         * support.h: Remove superfluous "1" from #if.
1587         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1588
1589 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1590
1591         * interp.c (StoreFPR): Control UndefinedResult() call on
1592         WARN_RESULT manifest.
1593
1594 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1595
1596         * gencode.c: Tidied instruction decoding, and added FP instruction
1597         support.
1598
1599         * interp.c: Added dineroIII, and BSD profiling support. Also
1600         run-time FP handling.
1601
1602 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1603
1604         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1605         gencode.c, interp.c, support.h: created.