sim/mips/ChangeLog

   1 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
   4         regiser.
   5
   6         * configure.in (default_endian): Configure a big-endian simulator
   7         by default.
   8         * configure: Re-generate.
   9
  10 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
  11
  12         * configure: Regenerated to track ../common/aclocal.m4 changes.
  13
  14 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
  15
  16         * interp.c (sim_monitor): Handle Densan monitor outbyte
  17         and inbyte functions.
  18
  19 1997-12-29  Felix Lee  <flee@cygnus.com>
  20
  21         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
  22
  23 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
  24
  25         * Makefile.in (tmp-igen): Arrange for $zero to always be
  26         reset to zero after every instruction.
  27
  28 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  29
  30         * configure: Regenerated to track ../common/aclocal.m4 changes.
  31         * config.in: Ditto.
  32
  33 start-sanitize-vr5400
  34 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  35
  36         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
  37         bit values.
  38
  39 end-sanitize-vr5400
  40 start-sanitize-vr5400
  41 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
  42
  43         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
  44         vr5400 with the vr5000 as the default.
  45
  46 end-sanitize-vr5400
  47 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
  48
  49         * mips.igen (MSUB): Fix to work like MADD.
  50         * gencode.c (MSUB): Similarly.
  51
  52 start-sanitize-vr5400
  53 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  54
  55         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
  56         vr5400.
  57
  58 end-sanitize-vr5400
  59 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
  60
  61         * configure: Regenerated to track ../common/aclocal.m4 changes.
  62
  63 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  64
  65         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
  66
  67 start-sanitize-vr5400
  68         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
  69         (value_cc, store_cc): Implement.
  70
  71         * sim-main.h: Add 8*3*8 bit accumulator.
  72
  73         * vr5400.igen: Move mdmx instructins from here
  74         * mdmx.igen: To here - new file. Add/fix missing instructions.
  75         * mips.igen: Include mdmx.igen.
  76         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
  77
  78 end-sanitize-vr5400
  79 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  80
  81         * sim-main.h (sim-fpu.h): Include.
  82
  83         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
  84         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
  85         using host independant sim_fpu module.
  86
  87 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  88
  89         * interp.c (signal_exception): Report internal errors with SIGABRT
  90         not SIGQUIT.
  91
  92         * sim-main.h (C0_CONFIG): New register.
  93         (signal.h): No longer include.
  94
  95         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
  96
  97 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
  98
  99         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 100
 101 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 102
 103         * mips.igen: Tag vr5000 instructions.
 104         (ANDI): Was missing mipsIV model, fix assembler syntax.
 105         (do_c_cond_fmt): New function.
 106         (C.cond.fmt): Handle mips I-III which do not support CC field
 107         separatly.
 108         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 109         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 110         in IV3.2 spec.
 111         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 112         vr5000 which saves LO in a GPR separatly.
 113
 114         * configure.in (enable-sim-igen): For vr5000, select vr5000
 115         specific instructions.
 116         * configure: Re-generate.
 117
 118 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 119
 120         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 121
 122         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 123         fmt_uninterpreted_64 bit cases to switch.  Convert to
 124         fmt_formatted,
 125
 126         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 127
 128         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 129         as specified in IV3.2 spec.
 130         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 131
 132 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 133
 134         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 135         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 136         (start-sanitize-r5900):
 137         (LWXC1, SWXC1): Delete from r5900 instruction set.
 138         (end-sanitize-r5900):
 139         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 140         PENDING_FILL versions of instructions.  Simplify.
 141         (X): New function.
 142         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 143         instructions.
 144         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 145         a signed value.
 146         (MTHI, MFHI): Disable code checking HI-LO.
 147
 148         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 149         global.
 150         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 151
 152 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 153
 154         * gencode.c (build_mips16_operands): Replace IPC with cia.
 155
 156         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 157         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 158         IPC to `cia'.
 159         (UndefinedResult): Replace function with macro/function
 160         combination.
 161         (sim_engine_run): Don't save PC in IPC.
 162
 163         * sim-main.h (IPC): Delete.
 164
 165         start-sanitize-vr5400
 166         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 167         (do_select): Rename function select.
 168         end-sanitize-vr5400
 169
 170         * interp.c (signal_exception, store_word, load_word,
 171         address_translation, load_memory, store_memory, cache_op,
 172         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 173         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 174         current instruction address - cia - argument.
 175         (sim_read, sim_write): Call address_translation directly.
 176         (sim_engine_run): Rename variable vaddr to cia.
 177         (signal_exception): Pass cia to sim_monitor
 178
 179         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 180         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 181         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 182
 183         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 184         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 185         SIM_ASSERT.
 186
 187         * interp.c (signal_exception): Pass restart address to
 188         sim_engine_restart.
 189
 190         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 191         idecode.o): Add dependency.
 192
 193         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 194         Delete definitions
 195         (DELAY_SLOT): Update NIA not PC with branch address.
 196         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 197
 198         * mips.igen: Use CIA not PC in branch calculations.
 199         (illegal): Call SignalException.
 200         (BEQ, ADDIU): Fix assembler.
 201
 202 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 203
 204         * m16.igen (JALX): Was missing.
 205
 206         * configure.in (enable-sim-igen): New configuration option.
 207         * configure: Re-generate.
 208
 209         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 210
 211         * interp.c (load_memory, store_memory): Delete parameter RAW.
 212         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 213         bypassing {load,store}_memory.
 214
 215         * sim-main.h (ByteSwapMem): Delete definition.
 216
 217         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 218
 219         * interp.c (sim_do_command, sim_commands): Delete mips specific
 220         commands.  Handled by module sim-options.
 221
 222         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 223         (WITH_MODULO_MEMORY): Define.
 224
 225         * interp.c (sim_info): Delete code printing memory size.
 226
 227         * interp.c (mips_size): Nee sim_size, delete function.
 228         (power2): Delete.
 229         (monitor, monitor_base, monitor_size): Delete global variables.
 230         (sim_open, sim_close): Delete code creating monitor and other
 231         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 232         manage memory regions.
 233         (load_memory, store_memory): Use sim-core for memory model.
 234
 235         * interp.c (address_translation): Delete all memory map code
 236         except line forcing 32 bit addresses.
 237
 238 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 239
 240         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 241         trace options.
 242
 243         * interp.c (logfh, logfile): Delete globals.
 244         (sim_open, sim_close): Delete code opening & closing log file.
 245         (mips_option_handler): Delete -l and -n options.
 246         (OPTION mips_options): Ditto.
 247
 248         * interp.c (OPTION mips_options): Rename option trace to dinero.
 249         (mips_option_handler): Update.
 250
 251 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 252
 253         * interp.c (fetch_str): New function.
 254         (sim_monitor): Rewrite using sim_read & sim_write.
 255         (sim_open): Check magic number.
 256         (sim_open): Write monitor vectors into memory using sim_write.
 257         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 258         (sim_read, sim_write): Simplify - transfer data one byte at a
 259         time.
 260         (load_memory, store_memory): Clarify meaning of parameter RAW.
 261
 262         * sim-main.h (isHOST): Defete definition.
 263         (isTARGET): Mark as depreciated.
 264         (address_translation): Delete parameter HOST.
 265
 266         * interp.c (address_translation): Delete parameter HOST.
 267
 268 start-sanitize-tx49
 269 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 270
 271         * gencode.c: Add tx49 configury and insns.
 272         * configure.in: Add tx49 configury.
 273         * configure: Update.
 274
 275 end-sanitize-tx49
 276 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 277
 278         * mips.igen:
 279
 280         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 281         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 282
 283 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 284
 285         * mips.igen: Add model filter field to records.
 286
 287 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 288
 289         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 290
 291         interp.c (sim_engine_run): Do not compile function sim_engine_run
 292         when WITH_IGEN == 1.
 293
 294         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 295         target architecture.
 296
 297         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 298         igen. Replace with configuration variables sim_igen_flags /
 299         sim_m16_flags.
 300
 301         start-sanitize-r5900
 302         * r5900.igen: New file. Copy r5900 insns here.
 303         end-sanitize-r5900
 304         start-sanitize-vr5400
 305         * vr5400.igen: New file.
 306         end-sanitize-vr5400
 307         * m16.igen: New file.  Copy mips16 insns here.
 308         * mips.igen: From here.
 309
 310 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 311
 312         start-sanitize-vr5400
 313         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 314
 315         * configure.in: Add mips64vr5400 target.
 316         * configure: Re-generate.
 317
 318         end-sanitize-vr5400
 319         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 320         to top.
 321         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 322
 323 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 324
 325         * gencode.c (build_instruction): Follow sim_write's lead in using
 326         BigEndianMem instead of !ByteSwapMem.
 327
 328 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 329
 330         * configure.in (sim_gen): Dependent on target, select type of
 331         generator.  Always select old style generator.
 332
 333         configure: Re-generate.
 334
 335         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 336         targets.
 337         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 338         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 339         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 340         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 341         SIM_@sim_gen@_*, set by autoconf.
 342
 343 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 344
 345         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 346
 347         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 348         CURRENT_FLOATING_POINT instead.
 349
 350         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 351         (address_translation): Raise exception InstructionFetch when
 352         translation fails and isINSTRUCTION.
 353
 354         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 355         sim_engine_run): Change type of of vaddr and paddr to
 356         address_word.
 357         (address_translation, prefetch, load_memory, store_memory,
 358         cache_op): Change type of vAddr and pAddr to address_word.
 359
 360         * gencode.c (build_instruction): Change type of vaddr and paddr to
 361         address_word.
 362
 363 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 364
 365         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 366         macro to obtain result of ALU op.
 367
 368 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 369
 370         * interp.c (sim_info): Call profile_print.
 371
 372 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 373
 374         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 375
 376         * sim-main.h (WITH_PROFILE): Do not define, defined in
 377         common/sim-config.h.  Use sim-profile module.
 378         (simPROFILE): Delete defintion.
 379
 380         * interp.c (PROFILE): Delete definition.
 381         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 382         (sim_close): Delete code writing profile histogram.
 383         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 384         Delete.
 385         (sim_engine_run): Delete code profiling the PC.
 386
 387 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 388
 389         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 390
 391         * interp.c (sim_monitor): Make register pointers of type
 392         unsigned_word*.
 393
 394         * sim-main.h: Make registers of type unsigned_word not
 395         signed_word.
 396
 397 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 398
 399 start-sanitize-r5900
 400         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 401         ...): Move to sim-main.h
 402
 403 end-sanitize-r5900
 404         * interp.c (sync_operation): Rename from SyncOperation, make
 405         global, add SD argument.
 406         (prefetch): Rename from Prefetch, make global, add SD argument.
 407         (decode_coproc): Make global.
 408
 409         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 410
 411         * gencode.c (build_instruction): Generate DecodeCoproc not
 412         decode_coproc calls.
 413
 414         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 415         (SizeFGR): Move to sim-main.h
 416         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 417         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 418         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 419         sim-main.h.
 420         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 421         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 422         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 423         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 424         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 425         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 426
 427         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 428         exception.
 429         (sim-alu.h): Include.
 430         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 431         (sim_cia): Typedef to instruction_address.
 432
 433 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 434
 435         * Makefile.in (interp.o): Rename generated file engine.c to
 436         oengine.c.
 437
 438         * interp.c: Update.
 439
 440 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 441
 442         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 443
 444 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 445
 446         * gencode.c (build_instruction): For "FPSQRT", output correct
 447         number of arguments to Recip.
 448
 449 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 450
 451         * Makefile.in (interp.o): Depends on sim-main.h
 452
 453         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 454
 455         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 456         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 457         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 458         STATE, DSSTATE): Define
 459         (GPR, FGRIDX, ..): Define.
 460
 461         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 462         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 463         (GPR, FGRIDX, ...): Delete macros.
 464
 465         * interp.c: Update names to match defines from sim-main.h
 466
 467 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 468
 469         * interp.c (sim_monitor): Add SD argument.
 470         (sim_warning): Delete.  Replace calls with calls to
 471         sim_io_eprintf.
 472         (sim_error): Delete. Replace calls with sim_io_error.
 473         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 474         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 475         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 476         argument.
 477         (mips_size): Rename from sim_size. Add SD argument.
 478
 479         * interp.c (simulator): Delete global variable.
 480         (callback): Delete global variable.
 481         (mips_option_handler, sim_open, sim_write, sim_read,
 482         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 483         sim_size,sim_monitor): Use sim_io_* not callback->*.
 484         (sim_open): ZALLOC simulator struct.
 485         (PROFILE): Do not define.
 486
 487 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 488
 489         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 490         support.h with corresponding code.
 491
 492         * sim-main.h (word64, uword64), support.h: Move definition to
 493         sim-main.h.
 494         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 495
 496         * support.h: Delete
 497         * Makefile.in: Update dependencies
 498         * interp.c: Do not include.
 499
 500 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 501
 502         * interp.c (address_translation, load_memory, store_memory,
 503         cache_op): Rename to from AddressTranslation et.al., make global,
 504         add SD argument
 505
 506         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 507         CacheOp): Define.
 508
 509         * interp.c (SignalException): Rename to signal_exception, make
 510         global.
 511
 512         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 513
 514         * sim-main.h (SignalException, SignalExceptionInterrupt,
 515         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 516         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 517         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 518         Define.
 519
 520         * interp.c, support.h: Use.
 521
 522 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 523
 524         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 525         to value_fpr / store_fpr. Add SD argument.
 526         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 527         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 528
 529         * sim-main.h (ValueFPR, StoreFPR): Define.
 530
 531 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 532
 533         * interp.c (sim_engine_run): Check consistency between configure
 534         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 535         and HASFPU.
 536
 537         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 538         (mips_fpu): Configure WITH_FLOATING_POINT.
 539         (mips_endian): Configure WITH_TARGET_ENDIAN.
 540         * configure: Update.
 541
 542 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 543
 544         * configure: Regenerated to track ../common/aclocal.m4 changes.
 545
 546 start-sanitize-r5900
 547 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 548
 549         * interp.c (MAX_REG): Allow up-to 128 registers.
 550         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 551         (REGISTER_SA): Ditto.
 552         (sim_open): Initialize register_widths for r5900 specific
 553         registers.
 554         (sim_fetch_register, sim_store_register): Check for request of
 555         r5900 specific SA register.  Check for request for hi 64 bits of
 556         r5900 specific registers.
 557
 558 end-sanitize-r5900
 559 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 560
 561         * configure: Regenerated.
 562
 563 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 564
 565         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 566
 567 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 568
 569         * gencode.c (print_igen_insn_models): Assume certain architectures
 570         include all mips* instructions.
 571         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 572         instruction.
 573
 574         * Makefile.in (tmp.igen): Add target. Generate igen input from
 575         gencode file.
 576
 577         * gencode.c (FEATURE_IGEN): Define.
 578         (main): Add --igen option.  Generate output in igen format.
 579         (process_instructions): Format output according to igen option.
 580         (print_igen_insn_format): New function.
 581         (print_igen_insn_models): New function.
 582         (process_instructions): Only issue warnings and ignore
 583         instructions when no FEATURE_IGEN.
 584
 585 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 586
 587         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 588         MIPS targets.
 589
 590 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 591
 592         * configure: Regenerated to track ../common/aclocal.m4 changes.
 593
 594 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 595
 596         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 597         SIM_RESERVED_BITS): Delete, moved to common.
 598         (SIM_EXTRA_CFLAGS): Update.
 599
 600 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 601
 602         * configure.in: Configure non-strict memory alignment.
 603         * configure: Regenerated to track ../common/aclocal.m4 changes.
 604
 605 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 606
 607         * configure: Regenerated to track ../common/aclocal.m4 changes.
 608
 609 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 610
 611         * gencode.c (SDBBP,DERET): Added (3900) insns.
 612         (RFE): Turn on for 3900.
 613         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 614         (dsstate): Made global.
 615         (SUBTARGET_R3900): Added.
 616         (CANCELDELAYSLOT): New.
 617         (SignalException): Ignore SystemCall rather than ignore and
 618         terminate.  Add DebugBreakPoint handling.
 619         (decode_coproc): New insns RFE, DERET; and new registers Debug
 620         and DEPC protected by SUBTARGET_R3900.
 621         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 622         bits explicitly.
 623         * Makefile.in,configure.in: Add mips subtarget option.
 624         * configure: Update.
 625
 626 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 627
 628         * gencode.c: Add r3900 (tx39).
 629
 630 start-sanitize-tx19
 631         * gencode.c: Fix some configuration problems by improving
 632         the relationship between tx19 and tx39.
 633 end-sanitize-tx19
 634
 635 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 636
 637         * gencode.c (build_instruction): Don't need to subtract 4 for
 638         JALR, just 2.
 639
 640 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 641
 642         * interp.c: Correct some HASFPU problems.
 643
 644 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 645
 646         * configure: Regenerated to track ../common/aclocal.m4 changes.
 647
 648 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 649
 650         * interp.c (mips_options): Fix samples option short form, should
 651         be `x'.
 652
 653 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 654
 655         * interp.c (sim_info): Enable info code.  Was just returning.
 656
 657 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 658
 659         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 660         MFC0.
 661
 662 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 663
 664         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 665         constants.
 666         (build_instruction): Ditto for LL.
 667
 668 start-sanitize-tx19
 669 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 670
 671         * mips/configure.in, mips/gencode: Add tx19/r1900.
 672
 673 end-sanitize-tx19
 674 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 675
 676         * configure: Regenerated to track ../common/aclocal.m4 changes.
 677
 678 start-sanitize-r5900
 679 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 680
 681         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 682         for overflow due to ABS of MININT, set result to MAXINT.
 683         (build_instruction): For "psrlvw", signextend bit 31.
 684
 685 end-sanitize-r5900
 686 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 687
 688         * configure: Regenerated to track ../common/aclocal.m4 changes.
 689         * config.in: Ditto.
 690
 691 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 692
 693         * interp.c (sim_open): Add call to sim_analyze_program, update
 694         call to sim_config.
 695
 696 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 697
 698         * interp.c (sim_kill): Delete.
 699         (sim_create_inferior): Add ABFD argument. Set PC from same.
 700         (sim_load): Move code initializing trap handlers from here.
 701         (sim_open): To here.
 702         (sim_load): Delete, use sim-hload.c.
 703
 704         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 705
 706 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 707
 708         * configure: Regenerated to track ../common/aclocal.m4 changes.
 709         * config.in: Ditto.
 710
 711 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 712
 713         * interp.c (sim_open): Add ABFD argument.
 714         (sim_load): Move call to sim_config from here.
 715         (sim_open): To here.  Check return status.
 716
 717 start-sanitize-r5900
 718         * gencode.c (build_instruction): Do not define x8000000000000000,
 719         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 720
 721 end-sanitize-r5900
 722 start-sanitize-r5900
 723 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 724
 725         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 726         "pdivuw" check for overflow due to signed divide by -1.
 727
 728 end-sanitize-r5900
 729 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 730
 731         * gencode.c (build_instruction): Two arg MADD should
 732         not assign result to $0.
 733
 734 start-sanitize-r5900
 735 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 736
 737         * gencode.c (build_instruction): For "ppac5" use unsigned
 738         arrithmetic so that the sign bit doesn't smear when right shifted.
 739         (build_instruction): For "pdiv" perform sign extension when
 740         storing results in HI and LO.
 741         (build_instructions): For "pdiv" and "pdivbw" check for
 742         divide-by-zero.
 743         (build_instruction): For "pmfhl.slw" update hi part of dest
 744         register as well as low part.
 745         (build_instruction): For "pmfhl" portably handle long long values.
 746         (build_instruction): For "pmfhl.sh" correctly negative values.
 747         Store half words 2 and three in the correct place.
 748         (build_instruction): For "psllvw", sign extend value after shift.
 749
 750 end-sanitize-r5900
 751 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
 752
 753         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
 754         * sim/mips/configure.in: Regenerate.
 755
 756 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 757
 758         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 759         signed8, unsigned8 et.al. types.
 760
 761 start-sanitize-r5900
 762         * gencode.c (build_instruction): For PMULTU* do not sign extend
 763         registers.  Make generated code easier to debug.
 764
 765 end-sanitize-r5900
 766         * interp.c (SUB_REG_FETCH): Handle both little and big endian
 767         hosts when selecting subreg.
 768
 769 start-sanitize-r5900
 770 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
 771
 772         * gencode.c (type_for_data_len): For 32bit operations concerned
 773         with overflow, perform op using 64bits.
 774         (build_instruction): For PADD, always compute operation using type
 775         returned by type_for_data_len.
 776         (build_instruction): For PSUBU, when overflow, saturate to zero as
 777         actually underflow.
 778
 779 end-sanitize-r5900
 780 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
 781
 782 start-sanitize-r5900
 783         * gencode.c (build_instruction): Handle "pext5" according to
 784         version 1.95 of the r5900 ISA.
 785
 786         * gencode.c (build_instruction): Handle "ppac5" according to
 787         version 1.95 of the r5900 ISA.
 788
 789 end-sanitize-r5900
 790         * interp.c (sim_engine_run): Reset the ZERO register to zero
 791         regardless of FEATURE_WARN_ZERO.
 792         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
 793
 794 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 795
 796         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
 797         (SignalException): For BreakPoints ignore any mode bits and just
 798         save the PC.
 799         (SignalException): Always set the CAUSE register.
 800
 801 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 802
 803         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
 804         exception has been taken.
 805
 806         * interp.c: Implement the ERET and mt/f sr instructions.
 807
 808 start-sanitize-r5900
 809 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 810
 811         * gencode.c (build_instruction): For paddu, extract unsigned
 812         sub-fields.
 813
 814         * gencode.c (build_instruction): Saturate padds instead of padd
 815         instructions.
 816
 817 end-sanitize-r5900
 818 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 819
 820         * interp.c (SignalException): Don't bother restarting an
 821         interrupt.
 822
 823 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 824
 825         * interp.c (SignalException): Really take an interrupt.
 826         (interrupt_event): Only deliver interrupts when enabled.
 827
 828 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 829
 830         * interp.c (sim_info): Only print info when verbose.
 831         (sim_info) Use sim_io_printf for output.
 832
 833 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 834
 835         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
 836         mips architectures.
 837
 838 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 839
 840         * interp.c (sim_do_command): Check for common commands if a
 841         simulator specific command fails.
 842
 843 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
 844
 845         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
 846         and simBE when DEBUG is defined.
 847
 848 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 849
 850         * interp.c (interrupt_event): New function.  Pass exception event
 851         onto exception handler.
 852
 853         * configure.in: Check for stdlib.h.
 854         * configure: Regenerate.
 855
 856         * gencode.c (build_instruction): Add UNUSED attribute to tempS
 857         variable declaration.
 858         (build_instruction): Initialize memval1.
 859         (build_instruction): Add UNUSED attribute to byte, bigend,
 860         reverse.
 861         (build_operands): Ditto.
 862
 863         * interp.c: Fix GCC warnings.
 864         (sim_get_quit_code): Delete.
 865
 866         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
 867         * Makefile.in: Ditto.
 868         * configure: Re-generate.
 869
 870         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
 871
 872 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 873
 874         * interp.c (mips_option_handler): New function parse argumes using
 875         sim-options.
 876         (myname): Replace with STATE_MY_NAME.
 877         (sim_open): Delete check for host endianness - performed by
 878         sim_config.
 879         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
 880         (sim_open): Move much of the initialization from here.
 881         (sim_load): To here.  After the image has been loaded and
 882         endianness set.
 883         (sim_open): Move ColdReset from here.
 884         (sim_create_inferior): To here.
 885         (sim_open): Make FP check less dependant on host endianness.
 886
 887         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
 888         run.
 889         * interp.c (sim_set_callbacks): Delete.
 890
 891         * interp.c (membank, membank_base, membank_size): Replace with
 892         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
 893         (sim_open): Remove call to callback->init. gdb/run do this.
 894
 895         * interp.c: Update
 896
 897         * sim-main.h (SIM_HAVE_FLATMEM): Define.
 898
 899         * interp.c (big_endian_p): Delete, replaced by
 900         current_target_byte_order.
 901
 902 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 903
 904         * interp.c (host_read_long, host_read_word, host_swap_word,
 905         host_swap_long): Delete. Using common sim-endian.
 906         (sim_fetch_register, sim_store_register): Use H2T.
 907         (pipeline_ticks): Delete.  Handled by sim-events.
 908         (sim_info): Update.
 909         (sim_engine_run): Update.
 910
 911 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 912
 913         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
 914         reason from here.
 915         (SignalException): To here. Signal using sim_engine_halt.
 916         (sim_stop_reason): Delete, moved to common.
 917
 918 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
 919
 920         * interp.c (sim_open): Add callback argument.
 921         (sim_set_callbacks): Delete SIM_DESC argument.
 922         (sim_size): Ditto.
 923
 924 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 925
 926         * Makefile.in (SIM_OBJS): Add common modules.
 927
 928         * interp.c (sim_set_callbacks): Also set SD callback.
 929         (set_endianness, xfer_*, swap_*): Delete.
 930         (host_read_word, host_read_long, host_swap_word, host_swap_long):
 931         Change to functions using sim-endian macros.
 932         (control_c, sim_stop): Delete, use common version.
 933         (simulate): Convert into.
 934         (sim_engine_run): This function.
 935         (sim_resume): Delete.
 936
 937         * interp.c (simulation): New variable - the simulator object.
 938         (sim_kind): Delete global - merged into simulation.
 939         (sim_load): Cleanup.  Move PC assignment from here.
 940         (sim_create_inferior): To here.
 941
 942         * sim-main.h: New file.
 943         * interp.c (sim-main.h): Include.
 944
 945 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 946
 947         * configure: Regenerated to track ../common/aclocal.m4 changes.
 948
 949 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
 950
 951         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
 952
 953 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
 954
 955         * gencode.c (build_instruction): DIV instructions: check
 956         for division by zero and integer overflow before using
 957         host's division operation.
 958
 959 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
 960
 961         * Makefile.in (SIM_OBJS): Add sim-load.o.
 962         * interp.c: #include bfd.h.
 963         (target_byte_order): Delete.
 964         (sim_kind, myname, big_endian_p): New static locals.
 965         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
 966         after argument parsing.  Recognize -E arg, set endianness accordingly.
 967         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
 968         load file into simulator.  Set PC from bfd.
 969         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
 970         (set_endianness): Use big_endian_p instead of target_byte_order.
 971
 972 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * interp.c (sim_size): Delete prototype - conflicts with
 975         definition in remote-sim.h.  Correct definition.
 976
 977 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 978
 979         * configure: Regenerated to track ../common/aclocal.m4 changes.
 980         * config.in: Ditto.
 981
 982 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
 983
 984         * interp.c (sim_open): New arg `kind'.
 985
 986         * configure: Regenerated to track ../common/aclocal.m4 changes.
 987
 988 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
 989
 990         * configure: Regenerated to track ../common/aclocal.m4 changes.
 991
 992 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
 993
 994         * interp.c (sim_open): Set optind to 0 before calling getopt.
 995
 996 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 997
 998         * configure: Regenerated to track ../common/aclocal.m4 changes.
 999
1000 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1001
1002         * interp.c : Replace uses of pr_addr with pr_uword64
1003         where the bit length is always 64 independent of SIM_ADDR.
1004         (pr_uword64) : added.
1005
1006 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1007
1008         * configure: Re-generate.
1009
1010 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1011
1012         * configure: Regenerate to track ../common/aclocal.m4 changes.
1013
1014 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1015
1016         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1017         in argv form.
1018         (other sim_*): New SIM_DESC argument.
1019
1020 start-sanitize-r5900
1021 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1022
1023         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1024         Change values to avoid overloading DOUBLEWORD which is tested
1025         for all insns.
1026         * gencode.c: reinstate "offending code".
1027
1028 end-sanitize-r5900
1029 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1030
1031         * interp.c: Fix printing of addresses for non-64-bit targets.
1032         (pr_addr): Add function to print address based on size.
1033 start-sanitize-r5900
1034         * gencode.c: #ifdef out offending code until a permanent fix
1035         can be added.  Code is causing build errors for non-5900 mips targets.
1036 end-sanitize-r5900
1037
1038 start-sanitize-r5900
1039 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1040
1041         * gencode.c (process_instructions): Correct test for ISA dependent
1042         architecture bits in isa field of MIPS_DECODE.
1043
1044 end-sanitize-r5900
1045 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1046
1047         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1048
1049 start-sanitize-r5900
1050 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1051
1052         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1053         PMADDUW.
1054
1055 end-sanitize-r5900
1056 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1057
1058         * gencode.c (build_mips16_operands): Correct computation of base
1059         address for extended PC relative instruction.
1060
1061 start-sanitize-r5900
1062 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1063
1064         * Makefile.in, configure, configure.in, gencode.c,
1065         interp.c, support.h: add r5900.
1066
1067 end-sanitize-r5900
1068 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1069
1070         * interp.c (mips16_entry): Add support for floating point cases.
1071         (SignalException): Pass floating point cases to mips16_entry.
1072         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1073         registers.
1074         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1075         or fmt_word.
1076         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1077         and then set the state to fmt_uninterpreted.
1078         (COP_SW): Temporarily set the state to fmt_word while calling
1079         ValueFPR.
1080
1081 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1082
1083         * gencode.c (build_instruction): The high order may be set in the
1084         comparison flags at any ISA level, not just ISA 4.
1085
1086 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1087
1088         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1089         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1090         * configure.in: sinclude ../common/aclocal.m4.
1091         * configure: Regenerated.
1092
1093 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1094
1095         * configure: Rebuild after change to aclocal.m4.
1096
1097 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1098
1099         * configure configure.in Makefile.in:  Update to new configure
1100         scheme which is more compatible with WinGDB builds.
1101         * configure.in:  Improve comment on how to run autoconf.
1102         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1103         * Makefile.in:  Use autoconf substitution to install common
1104         makefile fragment.
1105
1106 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1107
1108         * gencode.c (build_instruction): Use BigEndianCPU instead of
1109         ByteSwapMem.
1110
1111 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1112
1113         * interp.c (sim_monitor): Make output to stdout visible in
1114         wingdb's I/O log window.
1115
1116 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1117
1118         * support.h: Undo previous change to SIGTRAP
1119         and SIGQUIT values.
1120
1121 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1122
1123         * interp.c (store_word, load_word): New static functions.
1124         (mips16_entry): New static function.
1125         (SignalException): Look for mips16 entry and exit instructions.
1126         (simulate): Use the correct index when setting fpr_state after
1127         doing a pending move.
1128
1129 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1130
1131         * interp.c: Fix byte-swapping code throughout to work on
1132         both little- and big-endian hosts.
1133
1134 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1135
1136         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1137         with gdb/config/i386/xm-windows.h.
1138
1139 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1140
1141         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1142         that messes up arithmetic shifts.
1143
1144 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1145
1146         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1147         SIGTRAP and SIGQUIT for _WIN32.
1148
1149 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1150
1151         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1152         force a 64 bit multiplication.
1153         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1154         destination register is 0, since that is the default mips16 nop
1155         instruction.
1156
1157 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1158
1159         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1160         (build_endian_shift): Don't check proc64.
1161         (build_instruction): Always set memval to uword64.  Cast op2 to
1162         uword64 when shifting it left in memory instructions.  Always use
1163         the same code for stores--don't special case proc64.
1164
1165         * gencode.c (build_mips16_operands): Fix base PC value for PC
1166         relative operands.
1167         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1168         jal instruction.
1169         * interp.c (simJALDELAYSLOT): Define.
1170         (JALDELAYSLOT): Define.
1171         (INDELAYSLOT, INJALDELAYSLOT): Define.
1172         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1173
1174 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1175
1176         * interp.c (sim_open): add flush_cache as a PMON routine
1177         (sim_monitor): handle flush_cache by ignoring it
1178
1179 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1180
1181         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1182         BigEndianMem.
1183         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1184         (BigEndianMem): Rename to ByteSwapMem and change sense.
1185         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1186         BigEndianMem references to !ByteSwapMem.
1187         (set_endianness): New function, with prototype.
1188         (sim_open): Call set_endianness.
1189         (sim_info): Use simBE instead of BigEndianMem.
1190         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1191         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1192         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1193         ifdefs, keeping the prototype declaration.
1194         (swap_word): Rewrite correctly.
1195         (ColdReset): Delete references to CONFIG.  Delete endianness related
1196         code; moved to set_endianness.
1197
1198 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1199
1200         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1201         * interp.c (CHECKHILO): Define away.
1202         (simSIGINT): New macro.
1203         (membank_size): Increase from 1MB to 2MB.
1204         (control_c): New function.
1205         (sim_resume): Rename parameter signal to signal_number.  Add local
1206         variable prev.  Call signal before and after simulate.
1207         (sim_stop_reason): Add simSIGINT support.
1208         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1209         functions always.
1210         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1211         if logfh is NULL.
1212         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1213         a call to sim_warning.
1214
1215 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1216
1217         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1218         16 bit instructions.
1219
1220 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1221
1222         Add support for mips16 (16 bit MIPS implementation):
1223         * gencode.c (inst_type): Add mips16 instruction encoding types.
1224         (GETDATASIZEINSN): Define.
1225         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1226         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1227         mtlo.
1228         (MIPS16_DECODE): New table, for mips16 instructions.
1229         (bitmap_val): New static function.
1230         (struct mips16_op): Define.
1231         (mips16_op_table): New table, for mips16 operands.
1232         (build_mips16_operands): New static function.
1233         (process_instructions): If PC is odd, decode a mips16
1234         instruction.  Break out instruction handling into new
1235         build_instruction function.
1236         (build_instruction): New static function, broken out of
1237         process_instructions.  Check modifiers rather than flags for SHIFT
1238         bit count and m[ft]{hi,lo} direction.
1239         (usage): Pass program name to fprintf.
1240         (main): Remove unused variable this_option_optind.  Change
1241         ``*loptarg++'' to ``loptarg++''.
1242         (my_strtoul): Parenthesize && within ||.
1243         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1244         (simulate): If PC is odd, fetch a 16 bit instruction, and
1245         increment PC by 2 rather than 4.
1246         * configure.in: Add case for mips16*-*-*.
1247         * configure: Rebuild.
1248
1249 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1250
1251         * interp.c: Allow -t to enable tracing in standalone simulator.
1252         Fix garbage output in trace file and error messages.
1253
1254 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1255
1256         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1257         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1258         * configure.in: Simplify using macros in ../common/aclocal.m4.
1259         * configure: Regenerated.
1260         * tconfig.in: New file.
1261
1262 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1263
1264         * interp.c: Fix bugs in 64-bit port.
1265         Use ansi function declarations for msvc compiler.
1266         Initialize and test file pointer in trace code.
1267         Prevent duplicate definition of LAST_EMED_REGNUM.
1268
1269 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1270
1271         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1272
1273 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1274
1275         * interp.c (SignalException): Check for explicit terminating
1276         breakpoint value.
1277         * gencode.c: Pass instruction value through SignalException()
1278         calls for Trap, Breakpoint and Syscall.
1279
1280 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1281
1282         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1283         only used on those hosts that provide it.
1284         * configure.in: Add sqrt() to list of functions to be checked for.
1285         * config.in: Re-generated.
1286         * configure: Re-generated.
1287
1288 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1289
1290         * gencode.c (process_instructions): Call build_endian_shift when
1291         expanding STORE RIGHT, to fix swr.
1292         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1293         clear the high bits.
1294         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1295         Fix float to int conversions to produce signed values.
1296
1297 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1298
1299         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1300         (process_instructions): Correct handling of nor instruction.
1301         Correct shift count for 32 bit shift instructions. Correct sign
1302         extension for arithmetic shifts to not shift the number of bits in
1303         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1304         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1305         Fix madd.
1306         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1307         It's OK to have a mult follow a mult.  What's not OK is to have a
1308         mult follow an mfhi.
1309         (Convert): Comment out incorrect rounding code.
1310
1311 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1312
1313         * interp.c (sim_monitor): Improved monitor printf
1314         simulation. Tidied up simulator warnings, and added "--log" option
1315         for directing warning message output.
1316         * gencode.c: Use sim_warning() rather than WARNING macro.
1317
1318 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1319
1320         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1321         getopt1.o, rather than on gencode.c.  Link objects together.
1322         Don't link against -liberty.
1323         (gencode.o, getopt.o, getopt1.o): New targets.
1324         * gencode.c: Include <ctype.h> and "ansidecl.h".
1325         (AND): Undefine after including "ansidecl.h".
1326         (ULONG_MAX): Define if not defined.
1327         (OP_*): Don't define macros; now defined in opcode/mips.h.
1328         (main): Call my_strtoul rather than strtoul.
1329         (my_strtoul): New static function.
1330
1331 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1332
1333         * gencode.c (process_instructions):  Generate word64 and uword64
1334         instead of `long long' and `unsigned long long' data types.
1335         * interp.c:  #include sysdep.h to get signals, and define default
1336         for SIGBUS.
1337         * (Convert):  Work around for Visual-C++ compiler bug with type
1338         conversion.
1339         * support.h:  Make things compile under Visual-C++ by using
1340         __int64 instead of `long long'.  Change many refs to long long
1341         into word64/uword64 typedefs.
1342
1343 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1344
1345         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1346         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1347         (docdir): Removed.
1348         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1349         (AC_PROG_INSTALL): Added.
1350         (AC_PROG_CC): Moved to before configure.host call.
1351         * configure: Rebuilt.
1352
1353 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1354
1355         * configure.in: Define @SIMCONF@ depending on mips target.
1356         * configure: Rebuild.
1357         * Makefile.in (run): Add @SIMCONF@ to control simulator
1358         construction.
1359         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1360         * interp.c: Remove some debugging, provide more detailed error
1361         messages, update memory accesses to use LOADDRMASK.
1362
1363 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1364
1365         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1366         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1367         stamp-h.
1368         * configure: Rebuild.
1369         * config.in: New file, generated by autoheader.
1370         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1371         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1372         HAVE_ANINT and HAVE_AINT, as appropriate.
1373         * Makefile.in (run): Use @LIBS@ rather than -lm.
1374         (interp.o): Depend upon config.h.
1375         (Makefile): Just rebuild Makefile.
1376         (clean): Remove stamp-h.
1377         (mostlyclean): Make the same as clean, not as distclean.
1378         (config.h, stamp-h): New targets.
1379
1380 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1381
1382         * interp.c (ColdReset): Fix boolean test. Make all simulator
1383         globals static.
1384
1385 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1386
1387         * interp.c (xfer_direct_word, xfer_direct_long,
1388         swap_direct_word, swap_direct_long, xfer_big_word,
1389         xfer_big_long, xfer_little_word, xfer_little_long,
1390         swap_word,swap_long): Added.
1391         * interp.c (ColdReset): Provide function indirection to
1392         host<->simulated_target transfer routines.
1393         * interp.c (sim_store_register, sim_fetch_register): Updated to
1394         make use of indirected transfer routines.
1395
1396 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1397
1398         * gencode.c (process_instructions): Ensure FP ABS instruction
1399         recognised.
1400         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1401         system call support.
1402
1403 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1404
1405         * interp.c (sim_do_command): Complain if callback structure not
1406         initialised.
1407
1408 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1409
1410         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1411         support for Sun hosts.
1412         * Makefile.in (gencode): Ensure the host compiler and libraries
1413         used for cross-hosted build.
1414
1415 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1416
1417         * interp.c, gencode.c: Some more (TODO) tidying.
1418
1419 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1420
1421         * gencode.c, interp.c: Replaced explicit long long references with
1422         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1423         * support.h (SET64LO, SET64HI): Macros added.
1424
1425 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1426
1427         * configure: Regenerate with autoconf 2.7.
1428
1429 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1430
1431         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1432         * support.h: Remove superfluous "1" from #if.
1433         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1434
1435 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1436
1437         * interp.c (StoreFPR): Control UndefinedResult() call on
1438         WARN_RESULT manifest.
1439
1440 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1441
1442         * gencode.c: Tidied instruction decoding, and added FP instruction
1443         support.
1444
1445         * interp.c: Added dineroIII, and BSD profiling support. Also
1446         run-time FP handling.
1447
1448 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1449
1450         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1451         gencode.c, interp.c, support.h: created.