sim/mips/ChangeLog

   1 start-sanitize-sky
   2 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
   5
   6         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
   7         for TARGET_SKY.
   8
   9         * r5900.igen (SQC2): Thinko.
  10
  11 end-sanitize-sky
  12
  13 start-sanitize-sky
  14 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
  15
  16         * interp.c (*): Adapt code to merged VU device & state structs.
  17         (decode_coproc): Execute COP2 each macroinstruction without
  18         pipelining, by stepping VU to completion state.  Adapted to
  19         read_vu_*_reg style of register access.
  20
  21         * mips.igen ([SL]QC2): Removed these COP2 instructions.
  22
  23         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
  24
  25         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
  26
  27 end-sanitize-sky
  28
  29 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  30
  31         * Makefile.in (SIM_OBJS): Add sim-main.o.
  32
  33         * sim-main.h (address_translation, load_memory, store_memory,
  34         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
  35         as INLINE_SIM_MAIN.
  36         (pr_addr, pr_uword64): Declare.
  37         (sim-main.c): Include when H_REVEALS_MODULE_P.
  38
  39         * interp.c (address_translation, load_memory, store_memory,
  40         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
  41         from here.
  42         * sim-main.c: To here. Fix compilation problems.
  43
  44         * configure.in: Enable inlining.
  45         * configure: Re-config.
  46
  47 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  48
  49         * configure: Regenerated to track ../common/aclocal.m4 changes.
  50
  51 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  52
  53         * mips.igen: Include tx.igen.
  54         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
  55         * tx.igen: New file, contains MADD and MADDU.
  56
  57         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
  58         the hardwired constant `7'.
  59         (store_memory): Ditto.
  60         (LOADDRMASK): Move definition to sim-main.h.
  61
  62         mips.igen (MTC0): Enable for r3900.
  63         (ADDU): Add trace.
  64
  65         mips.igen (do_load_byte): Delete.
  66         (do_load, do_store, do_load_left, do_load_write, do_store_left,
  67         do_store_right): New functions.
  68         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
  69
  70         configure.in: Let the tx39 use igen again.
  71         configure: Update.
  72
  73 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  74
  75         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
  76         not an address sized quantity.  Return zero for cache sizes.
  77
  78 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  79
  80         * mips.igen (r3900): r3900 does not support 64 bit integer
  81         operations.
  82
  83 start-sanitize-sky
  84 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
  85
  86         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
  87
  88 end-sanitize-sky
  89 start-sanitize-sky
  90 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
  91
  92         * interp.c (decode_coproc): Continuing COP2 work.
  93         (cop_[ls]q): Make sky-target-only.
  94
  95         * sim-main.h (COP_[LS]Q): Make sky-target-only.
  96 end-sanitize-sky
  97
  98 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
  99
 100         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 101         than igen one.
 102         * configure : Rebuild.
 103
 104 start-sanitize-sky
 105 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 106
 107         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 108         around COP2 implementation skeleton.
 109
 110 end-sanitize-sky
 111
 112 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 113
 114 start-sanitize-sky
 115         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 116
 117         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 118         static to access VU registers.
 119         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 120         decoding.  Work in progress.
 121
 122         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 123         overlapping/redundant bit pattern.
 124         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 125         progress.
 126
 127         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 128         status register.
 129
 130         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 131         access to coprocessor registers.
 132
 133         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 134 end-sanitize-sky
 135
 136 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 137
 138         * configure: Regenerated to track ../common/aclocal.m4 changes.
 139
 140 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 141
 142         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 143
 144 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 145
 146         * configure: Regenerated to track ../common/aclocal.m4 changes.
 147         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 148
 149 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 150
 151         * configure: Regenerated to track ../common/aclocal.m4 changes.
 152
 153 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 154
 155         * interp.c (Max, Min): Comment out functions. Not yet used.
 156
 157 start-sanitize-vr4320
 158 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 159
 160         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 161
 162 end-sanitize-vr4320
 163 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 164
 165         * configure: Regenerated to track ../common/aclocal.m4 changes.
 166
 167 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 168
 169         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 170         configurable settings for stand-alone simulator.
 171
 172 start-sanitize-sky
 173         * configure.in: Added --with-sim-gpu2 option to specify path of
 174         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 175         links/compiles stand-alone simulator with this library.
 176
 177         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 178 end-sanitize-sky
 179
 180         * configure.in: Added X11 search, just in case.
 181
 182         * configure: Regenerated.
 183
 184 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 185
 186         * interp.c (sim_write, sim_read, load_memory, store_memory):
 187         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 188
 189 start-sanitize-vr4320
 190 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 191
 192         * vr4320.igen (clz,dclz) : Added.
 193         (dmac): Replaced 99, with LO.
 194
 195 end-sanitize-vr4320
 196 start-sanitize-vr5400
 197 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 198
 199         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 200
 201 end-sanitize-vr5400
 202 start-sanitize-vr4320
 203 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 204
 205         * vr4320.igen: New file.
 206         * Makefile.in (vr4320.igen) : Added.
 207         * configure.in (mips64vr4320-*-*): Added.
 208         * configure : Rebuilt.
 209         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 210         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 211
 212 end-sanitize-vr4320
 213 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 214
 215         * sim-main.h (GETFCC): Return an unsigned value.
 216
 217 start-sanitize-r5900
 218         * r5900.igen: Use an unsigned array index variable `i'.
 219         (QFSRV): Ditto for variable bytes.
 220
 221 end-sanitize-r5900
 222 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 223
 224         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 225         (DADD): Result destination is RD not RT.
 226
 227 start-sanitize-r5900
 228         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 229         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 230         divide.
 231
 232 end-sanitize-r5900
 233 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 234
 235         * sim-main.h (HIACCESS, LOACCESS): Always define.
 236
 237         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 238
 239         * interp.c (sim_info): Delete.
 240
 241 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 242
 243         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 244         (mips_option_handler): New argument `cpu'.
 245         (sim_open): Update call to sim_add_option_table.
 246
 247 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 248
 249         * mips.igen (CxC1): Add tracing.
 250
 251 start-sanitize-r5900
 252 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 253
 254         * r5900.igen (StoreFP): Delete.
 255         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 256         New functions.
 257         (rsqrt.s, sqrt.s): Implement.
 258         (r59cond): New function.
 259         (C.COND.S): Call r59cond in assembler line.
 260         (cvt.w.s, cvt.s.w): Implement.
 261
 262         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 263         instruction set.
 264
 265         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 266
 267 end-sanitize-r5900
 268 start-sanitize-r5900
 269 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 270
 271         * r5900.igen: Add tracing to all p* instructions.
 272
 273 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 274
 275         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 276         to get gdb talking to re-aranged sim_cpu register structure.
 277
 278 end-sanitize-r5900
 279 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 280
 281         * sim-main.h (Max, Min): Declare.
 282
 283         * interp.c (Max, Min): New functions.
 284
 285         * mips.igen (BC1): Add tracing.
 286
 287 start-sanitize-vr5400
 288 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 289
 290         * mdmx.igen: Tag all functions as requiring either with mdmx or
 291         vr5400 processor.
 292
 293 end-sanitize-vr5400
 294 start-sanitize-r5900
 295 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 296
 297         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 298         to 32.
 299         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 300
 301         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 302
 303         * r5900.igen: Rewrite.
 304
 305         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 306         struct.
 307         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 308         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 309
 310 end-sanitize-r5900
 311 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 312
 313         * interp.c Added memory map for stack in vr4100
 314
 315 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 316
 317         * interp.c (load_memory): Add missing "break"'s.
 318
 319 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 320
 321         * interp.c (sim_store_register, sim_fetch_register): Pass in
 322         length parameter.  Return -1.
 323
 324 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 325
 326         * interp.c: Added hardware init hook, fixed warnings.
 327
 328 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 329
 330         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 331
 332 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 333
 334         * interp.c (ifetch16): New function.
 335
 336         * sim-main.h (IMEM32): Rename IMEM.
 337         (IMEM16_IMMED): Define.
 338         (IMEM16): Define.
 339         (DELAY_SLOT): Update.
 340
 341         * m16run.c (sim_engine_run): New file.
 342
 343         * m16.igen: All instructions except LB.
 344         (LB): Call do_load_byte.
 345         * mips.igen (do_load_byte): New function.
 346         (LB): Call do_load_byte.
 347
 348         * mips.igen: Move spec for insn bit size and high bit from here.
 349         * Makefile.in (tmp-igen, tmp-m16): To here.
 350
 351         * m16.dc: New file, decode mips16 instructions.
 352
 353         * Makefile.in (SIM_NO_ALL): Define.
 354         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 355
 356 start-sanitize-tx19
 357         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 358         set.
 359
 360 end-sanitize-tx19
 361 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 362
 363         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 364         point unit to 32 bit registers.
 365         * configure: Re-generate.
 366
 367 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * configure.in (sim_use_gen): Make IGEN the default simulator
 370         generator for generic 32 and 64 bit mips targets.
 371         * configure: Re-generate.
 372
 373 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 374
 375         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 376         bitsize.
 377
 378         * interp.c (sim_fetch_register, sim_store_register): Read/write
 379         FGR from correct location.
 380         (sim_open): Set size of FGR's according to
 381         WITH_TARGET_FLOATING_POINT_BITSIZE.
 382
 383         * sim-main.h (FGR): Store floating point registers in a separate
 384         array.
 385
 386 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 387
 388         * configure: Regenerated to track ../common/aclocal.m4 changes.
 389
 390 start-sanitize-vr5400
 391         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 392
 393 end-sanitize-vr5400
 394 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 395
 396         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 397
 398         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 399
 400         * interp.c (pending_tick): New function.  Deliver pending writes.
 401
 402         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 403         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 404         it can handle mixed sized quantites and single bits.
 405
 406 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 407
 408         * interp.c (oengine.h): Do not include when building with IGEN.
 409         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 410         (sim_info): Ditto for PROCESSOR_64BIT.
 411         (sim_monitor): Replace ut_reg with unsigned_word.
 412         (*): Ditto for t_reg.
 413         (LOADDRMASK): Define.
 414         (sim_open): Remove defunct check that host FP is IEEE compliant,
 415         using software to emulate floating point.
 416         (value_fpr, ...): Always compile, was conditional on HASFPU.
 417
 418 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 419
 420         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 421         size.
 422
 423         * interp.c (SD, CPU): Define.
 424         (mips_option_handler): Set flags in each CPU.
 425         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 426         (sim_close): Do not clear STATE, deleted anyway.
 427         (sim_write, sim_read): Assume CPU zero's vm should be used for
 428         data transfers.
 429         (sim_create_inferior): Set the PC for all processors.
 430         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 431         argument.
 432         (mips16_entry): Pass correct nr of args to store_word, load_word.
 433         (ColdReset): Cold reset all cpu's.
 434         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 435         (sim_monitor, load_memory, store_memory, signal_exception): Use
 436         `CPU' instead of STATE_CPU.
 437
 438
 439         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 440         SD or CPU_.
 441
 442         * sim-main.h (signal_exception): Add sim_cpu arg.
 443         (SignalException*): Pass both SD and CPU to signal_exception.
 444         * interp.c (signal_exception): Update.
 445
 446         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 447         Ditto
 448         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 449         address_translation): Ditto
 450         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 451
 452 start-sanitize-vr5400
 453         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 454         `sd'.
 455         (ByteAlign): Use StoreFPR, pass args in correct order.
 456
 457 end-sanitize-vr5400
 458 start-sanitize-r5900
 459 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 460
 461         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 462
 463 end-sanitize-r5900
 464 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 465
 466         * configure: Regenerated to track ../common/aclocal.m4 changes.
 467
 468 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 469
 470 start-sanitize-r5900
 471         * configure.in (sim_igen_filter): For r5900, use igen.
 472         * configure: Re-generate.
 473
 474 end-sanitize-r5900
 475         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 476
 477         * mips.igen (model): Map processor names onto BFD name.
 478
 479         * sim-main.h (CPU_CIA): Delete.
 480         (SET_CIA, GET_CIA): Define
 481
 482 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 483
 484         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 485         regiser.
 486
 487         * configure.in (default_endian): Configure a big-endian simulator
 488         by default.
 489         * configure: Re-generate.
 490
 491 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 492
 493         * configure: Regenerated to track ../common/aclocal.m4 changes.
 494
 495 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 496
 497         * interp.c (sim_monitor): Handle Densan monitor outbyte
 498         and inbyte functions.
 499
 500 1997-12-29  Felix Lee  <flee@cygnus.com>
 501
 502         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 503
 504 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 505
 506         * Makefile.in (tmp-igen): Arrange for $zero to always be
 507         reset to zero after every instruction.
 508
 509 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 510
 511         * configure: Regenerated to track ../common/aclocal.m4 changes.
 512         * config.in: Ditto.
 513
 514 start-sanitize-vr5400
 515 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 516
 517         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 518         bit values.
 519
 520 end-sanitize-vr5400
 521 start-sanitize-vr5400
 522 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 523
 524         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 525         vr5400 with the vr5000 as the default.
 526
 527 end-sanitize-vr5400
 528 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 529
 530         * mips.igen (MSUB): Fix to work like MADD.
 531         * gencode.c (MSUB): Similarly.
 532
 533 start-sanitize-vr5400
 534 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 535
 536         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 537         vr5400.
 538
 539 end-sanitize-vr5400
 540 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 541
 542         * configure: Regenerated to track ../common/aclocal.m4 changes.
 543
 544 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 545
 546         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 547
 548 start-sanitize-vr5400
 549         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 550         (value_cc, store_cc): Implement.
 551
 552         * sim-main.h: Add 8*3*8 bit accumulator.
 553
 554         * vr5400.igen: Move mdmx instructins from here
 555         * mdmx.igen: To here - new file. Add/fix missing instructions.
 556         * mips.igen: Include mdmx.igen.
 557         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 558
 559 end-sanitize-vr5400
 560 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 561
 562         * sim-main.h (sim-fpu.h): Include.
 563
 564         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 565         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 566         using host independant sim_fpu module.
 567
 568 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 569
 570         * interp.c (signal_exception): Report internal errors with SIGABRT
 571         not SIGQUIT.
 572
 573         * sim-main.h (C0_CONFIG): New register.
 574         (signal.h): No longer include.
 575
 576         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 577
 578 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 579
 580         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 581
 582 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 583
 584         * mips.igen: Tag vr5000 instructions.
 585         (ANDI): Was missing mipsIV model, fix assembler syntax.
 586         (do_c_cond_fmt): New function.
 587         (C.cond.fmt): Handle mips I-III which do not support CC field
 588         separatly.
 589         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 590         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 591         in IV3.2 spec.
 592         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 593         vr5000 which saves LO in a GPR separatly.
 594
 595         * configure.in (enable-sim-igen): For vr5000, select vr5000
 596         specific instructions.
 597         * configure: Re-generate.
 598
 599 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 600
 601         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 602
 603         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 604         fmt_uninterpreted_64 bit cases to switch.  Convert to
 605         fmt_formatted,
 606
 607         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 608
 609         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 610         as specified in IV3.2 spec.
 611         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 612
 613 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 614
 615         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 616         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 617         (start-sanitize-r5900):
 618         (LWXC1, SWXC1): Delete from r5900 instruction set.
 619         (end-sanitize-r5900):
 620         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 621         PENDING_FILL versions of instructions.  Simplify.
 622         (X): New function.
 623         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 624         instructions.
 625         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 626         a signed value.
 627         (MTHI, MFHI): Disable code checking HI-LO.
 628
 629         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 630         global.
 631         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 632
 633 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 634
 635         * gencode.c (build_mips16_operands): Replace IPC with cia.
 636
 637         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 638         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 639         IPC to `cia'.
 640         (UndefinedResult): Replace function with macro/function
 641         combination.
 642         (sim_engine_run): Don't save PC in IPC.
 643
 644         * sim-main.h (IPC): Delete.
 645
 646         start-sanitize-vr5400
 647         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 648         (do_select): Rename function select.
 649         end-sanitize-vr5400
 650
 651         * interp.c (signal_exception, store_word, load_word,
 652         address_translation, load_memory, store_memory, cache_op,
 653         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 654         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 655         current instruction address - cia - argument.
 656         (sim_read, sim_write): Call address_translation directly.
 657         (sim_engine_run): Rename variable vaddr to cia.
 658         (signal_exception): Pass cia to sim_monitor
 659
 660         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 661         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 662         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 663
 664         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 665         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 666         SIM_ASSERT.
 667
 668         * interp.c (signal_exception): Pass restart address to
 669         sim_engine_restart.
 670
 671         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 672         idecode.o): Add dependency.
 673
 674         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 675         Delete definitions
 676         (DELAY_SLOT): Update NIA not PC with branch address.
 677         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 678
 679         * mips.igen: Use CIA not PC in branch calculations.
 680         (illegal): Call SignalException.
 681         (BEQ, ADDIU): Fix assembler.
 682
 683 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 684
 685         * m16.igen (JALX): Was missing.
 686
 687         * configure.in (enable-sim-igen): New configuration option.
 688         * configure: Re-generate.
 689
 690         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 691
 692         * interp.c (load_memory, store_memory): Delete parameter RAW.
 693         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 694         bypassing {load,store}_memory.
 695
 696         * sim-main.h (ByteSwapMem): Delete definition.
 697
 698         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 699
 700         * interp.c (sim_do_command, sim_commands): Delete mips specific
 701         commands.  Handled by module sim-options.
 702
 703         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 704         (WITH_MODULO_MEMORY): Define.
 705
 706         * interp.c (sim_info): Delete code printing memory size.
 707
 708         * interp.c (mips_size): Nee sim_size, delete function.
 709         (power2): Delete.
 710         (monitor, monitor_base, monitor_size): Delete global variables.
 711         (sim_open, sim_close): Delete code creating monitor and other
 712         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 713         manage memory regions.
 714         (load_memory, store_memory): Use sim-core for memory model.
 715
 716         * interp.c (address_translation): Delete all memory map code
 717         except line forcing 32 bit addresses.
 718
 719 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 720
 721         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 722         trace options.
 723
 724         * interp.c (logfh, logfile): Delete globals.
 725         (sim_open, sim_close): Delete code opening & closing log file.
 726         (mips_option_handler): Delete -l and -n options.
 727         (OPTION mips_options): Ditto.
 728
 729         * interp.c (OPTION mips_options): Rename option trace to dinero.
 730         (mips_option_handler): Update.
 731
 732 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 733
 734         * interp.c (fetch_str): New function.
 735         (sim_monitor): Rewrite using sim_read & sim_write.
 736         (sim_open): Check magic number.
 737         (sim_open): Write monitor vectors into memory using sim_write.
 738         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 739         (sim_read, sim_write): Simplify - transfer data one byte at a
 740         time.
 741         (load_memory, store_memory): Clarify meaning of parameter RAW.
 742
 743         * sim-main.h (isHOST): Defete definition.
 744         (isTARGET): Mark as depreciated.
 745         (address_translation): Delete parameter HOST.
 746
 747         * interp.c (address_translation): Delete parameter HOST.
 748
 749 start-sanitize-tx49
 750 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 751
 752         * gencode.c: Add tx49 configury and insns.
 753         * configure.in: Add tx49 configury.
 754         * configure: Update.
 755
 756 end-sanitize-tx49
 757 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 758
 759         * mips.igen:
 760
 761         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 762         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 763
 764 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 765
 766         * mips.igen: Add model filter field to records.
 767
 768 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 769
 770         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 771
 772         interp.c (sim_engine_run): Do not compile function sim_engine_run
 773         when WITH_IGEN == 1.
 774
 775         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 776         target architecture.
 777
 778         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 779         igen. Replace with configuration variables sim_igen_flags /
 780         sim_m16_flags.
 781
 782         start-sanitize-r5900
 783         * r5900.igen: New file. Copy r5900 insns here.
 784         end-sanitize-r5900
 785         start-sanitize-vr5400
 786         * vr5400.igen: New file.
 787         end-sanitize-vr5400
 788         * m16.igen: New file.  Copy mips16 insns here.
 789         * mips.igen: From here.
 790
 791 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 792
 793         start-sanitize-vr5400
 794         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 795
 796         * configure.in: Add mips64vr5400 target.
 797         * configure: Re-generate.
 798
 799         end-sanitize-vr5400
 800         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 801         to top.
 802         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 803
 804 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 805
 806         * gencode.c (build_instruction): Follow sim_write's lead in using
 807         BigEndianMem instead of !ByteSwapMem.
 808
 809 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 810
 811         * configure.in (sim_gen): Dependent on target, select type of
 812         generator.  Always select old style generator.
 813
 814         configure: Re-generate.
 815
 816         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 817         targets.
 818         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 819         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 820         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 821         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 822         SIM_@sim_gen@_*, set by autoconf.
 823
 824 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 825
 826         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 827
 828         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 829         CURRENT_FLOATING_POINT instead.
 830
 831         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 832         (address_translation): Raise exception InstructionFetch when
 833         translation fails and isINSTRUCTION.
 834
 835         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 836         sim_engine_run): Change type of of vaddr and paddr to
 837         address_word.
 838         (address_translation, prefetch, load_memory, store_memory,
 839         cache_op): Change type of vAddr and pAddr to address_word.
 840
 841         * gencode.c (build_instruction): Change type of vaddr and paddr to
 842         address_word.
 843
 844 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 845
 846         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 847         macro to obtain result of ALU op.
 848
 849 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 850
 851         * interp.c (sim_info): Call profile_print.
 852
 853 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 854
 855         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 856
 857         * sim-main.h (WITH_PROFILE): Do not define, defined in
 858         common/sim-config.h.  Use sim-profile module.
 859         (simPROFILE): Delete defintion.
 860
 861         * interp.c (PROFILE): Delete definition.
 862         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 863         (sim_close): Delete code writing profile histogram.
 864         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 865         Delete.
 866         (sim_engine_run): Delete code profiling the PC.
 867
 868 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 869
 870         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 871
 872         * interp.c (sim_monitor): Make register pointers of type
 873         unsigned_word*.
 874
 875         * sim-main.h: Make registers of type unsigned_word not
 876         signed_word.
 877
 878 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 879
 880 start-sanitize-r5900
 881         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 882         ...): Move to sim-main.h
 883
 884 end-sanitize-r5900
 885         * interp.c (sync_operation): Rename from SyncOperation, make
 886         global, add SD argument.
 887         (prefetch): Rename from Prefetch, make global, add SD argument.
 888         (decode_coproc): Make global.
 889
 890         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 891
 892         * gencode.c (build_instruction): Generate DecodeCoproc not
 893         decode_coproc calls.
 894
 895         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 896         (SizeFGR): Move to sim-main.h
 897         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 898         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 899         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 900         sim-main.h.
 901         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 902         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 903         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 904         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 905         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 906         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 907
 908         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 909         exception.
 910         (sim-alu.h): Include.
 911         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 912         (sim_cia): Typedef to instruction_address.
 913
 914 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 915
 916         * Makefile.in (interp.o): Rename generated file engine.c to
 917         oengine.c.
 918
 919         * interp.c: Update.
 920
 921 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 922
 923         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 924
 925 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 926
 927         * gencode.c (build_instruction): For "FPSQRT", output correct
 928         number of arguments to Recip.
 929
 930 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 931
 932         * Makefile.in (interp.o): Depends on sim-main.h
 933
 934         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 935
 936         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 937         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 938         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 939         STATE, DSSTATE): Define
 940         (GPR, FGRIDX, ..): Define.
 941
 942         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 943         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 944         (GPR, FGRIDX, ...): Delete macros.
 945
 946         * interp.c: Update names to match defines from sim-main.h
 947
 948 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 949
 950         * interp.c (sim_monitor): Add SD argument.
 951         (sim_warning): Delete.  Replace calls with calls to
 952         sim_io_eprintf.
 953         (sim_error): Delete. Replace calls with sim_io_error.
 954         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 955         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 956         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 957         argument.
 958         (mips_size): Rename from sim_size. Add SD argument.
 959
 960         * interp.c (simulator): Delete global variable.
 961         (callback): Delete global variable.
 962         (mips_option_handler, sim_open, sim_write, sim_read,
 963         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 964         sim_size,sim_monitor): Use sim_io_* not callback->*.
 965         (sim_open): ZALLOC simulator struct.
 966         (PROFILE): Do not define.
 967
 968 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 969
 970         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 971         support.h with corresponding code.
 972
 973         * sim-main.h (word64, uword64), support.h: Move definition to
 974         sim-main.h.
 975         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 976
 977         * support.h: Delete
 978         * Makefile.in: Update dependencies
 979         * interp.c: Do not include.
 980
 981 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 982
 983         * interp.c (address_translation, load_memory, store_memory,
 984         cache_op): Rename to from AddressTranslation et.al., make global,
 985         add SD argument
 986
 987         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 988         CacheOp): Define.
 989
 990         * interp.c (SignalException): Rename to signal_exception, make
 991         global.
 992
 993         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 994
 995         * sim-main.h (SignalException, SignalExceptionInterrupt,
 996         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 997         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 998         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 999         Define.
1000
1001         * interp.c, support.h: Use.
1002
1003 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1004
1005         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1006         to value_fpr / store_fpr. Add SD argument.
1007         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1008         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1009
1010         * sim-main.h (ValueFPR, StoreFPR): Define.
1011
1012 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1013
1014         * interp.c (sim_engine_run): Check consistency between configure
1015         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1016         and HASFPU.
1017
1018         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1019         (mips_fpu): Configure WITH_FLOATING_POINT.
1020         (mips_endian): Configure WITH_TARGET_ENDIAN.
1021         * configure: Update.
1022
1023 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1024
1025         * configure: Regenerated to track ../common/aclocal.m4 changes.
1026
1027 start-sanitize-r5900
1028 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1029
1030         * interp.c (MAX_REG): Allow up-to 128 registers.
1031         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1032         (REGISTER_SA): Ditto.
1033         (sim_open): Initialize register_widths for r5900 specific
1034         registers.
1035         (sim_fetch_register, sim_store_register): Check for request of
1036         r5900 specific SA register.  Check for request for hi 64 bits of
1037         r5900 specific registers.
1038
1039 end-sanitize-r5900
1040 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1041
1042         * configure: Regenerated.
1043
1044 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1045
1046         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1047
1048 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1049
1050         * gencode.c (print_igen_insn_models): Assume certain architectures
1051         include all mips* instructions.
1052         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1053         instruction.
1054
1055         * Makefile.in (tmp.igen): Add target. Generate igen input from
1056         gencode file.
1057
1058         * gencode.c (FEATURE_IGEN): Define.
1059         (main): Add --igen option.  Generate output in igen format.
1060         (process_instructions): Format output according to igen option.
1061         (print_igen_insn_format): New function.
1062         (print_igen_insn_models): New function.
1063         (process_instructions): Only issue warnings and ignore
1064         instructions when no FEATURE_IGEN.
1065
1066 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1067
1068         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1069         MIPS targets.
1070
1071 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1072
1073         * configure: Regenerated to track ../common/aclocal.m4 changes.
1074
1075 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1076
1077         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1078         SIM_RESERVED_BITS): Delete, moved to common.
1079         (SIM_EXTRA_CFLAGS): Update.
1080
1081 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1082
1083         * configure.in: Configure non-strict memory alignment.
1084         * configure: Regenerated to track ../common/aclocal.m4 changes.
1085
1086 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1087
1088         * configure: Regenerated to track ../common/aclocal.m4 changes.
1089
1090 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1091
1092         * gencode.c (SDBBP,DERET): Added (3900) insns.
1093         (RFE): Turn on for 3900.
1094         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1095         (dsstate): Made global.
1096         (SUBTARGET_R3900): Added.
1097         (CANCELDELAYSLOT): New.
1098         (SignalException): Ignore SystemCall rather than ignore and
1099         terminate.  Add DebugBreakPoint handling.
1100         (decode_coproc): New insns RFE, DERET; and new registers Debug
1101         and DEPC protected by SUBTARGET_R3900.
1102         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1103         bits explicitly.
1104         * Makefile.in,configure.in: Add mips subtarget option.
1105         * configure: Update.
1106
1107 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1108
1109         * gencode.c: Add r3900 (tx39).
1110
1111 start-sanitize-tx19
1112         * gencode.c: Fix some configuration problems by improving
1113         the relationship between tx19 and tx39.
1114 end-sanitize-tx19
1115
1116 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1117
1118         * gencode.c (build_instruction): Don't need to subtract 4 for
1119         JALR, just 2.
1120
1121 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1122
1123         * interp.c: Correct some HASFPU problems.
1124
1125 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1126
1127         * configure: Regenerated to track ../common/aclocal.m4 changes.
1128
1129 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1130
1131         * interp.c (mips_options): Fix samples option short form, should
1132         be `x'.
1133
1134 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1135
1136         * interp.c (sim_info): Enable info code.  Was just returning.
1137
1138 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1139
1140         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1141         MFC0.
1142
1143 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1144
1145         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1146         constants.
1147         (build_instruction): Ditto for LL.
1148
1149 start-sanitize-tx19
1150 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1151
1152         * mips/configure.in, mips/gencode: Add tx19/r1900.
1153
1154 end-sanitize-tx19
1155 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1156
1157         * configure: Regenerated to track ../common/aclocal.m4 changes.
1158
1159 start-sanitize-r5900
1160 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1161
1162         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1163         for overflow due to ABS of MININT, set result to MAXINT.
1164         (build_instruction): For "psrlvw", signextend bit 31.
1165
1166 end-sanitize-r5900
1167 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1168
1169         * configure: Regenerated to track ../common/aclocal.m4 changes.
1170         * config.in: Ditto.
1171
1172 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1173
1174         * interp.c (sim_open): Add call to sim_analyze_program, update
1175         call to sim_config.
1176
1177 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1178
1179         * interp.c (sim_kill): Delete.
1180         (sim_create_inferior): Add ABFD argument. Set PC from same.
1181         (sim_load): Move code initializing trap handlers from here.
1182         (sim_open): To here.
1183         (sim_load): Delete, use sim-hload.c.
1184
1185         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1186
1187 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1188
1189         * configure: Regenerated to track ../common/aclocal.m4 changes.
1190         * config.in: Ditto.
1191
1192 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1193
1194         * interp.c (sim_open): Add ABFD argument.
1195         (sim_load): Move call to sim_config from here.
1196         (sim_open): To here.  Check return status.
1197
1198 start-sanitize-r5900
1199         * gencode.c (build_instruction): Do not define x8000000000000000,
1200         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1201
1202 end-sanitize-r5900
1203 start-sanitize-r5900
1204 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1205
1206         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1207         "pdivuw" check for overflow due to signed divide by -1.
1208
1209 end-sanitize-r5900
1210 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1211
1212         * gencode.c (build_instruction): Two arg MADD should
1213         not assign result to $0.
1214
1215 start-sanitize-r5900
1216 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1217
1218         * gencode.c (build_instruction): For "ppac5" use unsigned
1219         arrithmetic so that the sign bit doesn't smear when right shifted.
1220         (build_instruction): For "pdiv" perform sign extension when
1221         storing results in HI and LO.
1222         (build_instructions): For "pdiv" and "pdivbw" check for
1223         divide-by-zero.
1224         (build_instruction): For "pmfhl.slw" update hi part of dest
1225         register as well as low part.
1226         (build_instruction): For "pmfhl" portably handle long long values.
1227         (build_instruction): For "pmfhl.sh" correctly negative values.
1228         Store half words 2 and three in the correct place.
1229         (build_instruction): For "psllvw", sign extend value after shift.
1230
1231 end-sanitize-r5900
1232 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1233
1234         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1235         * sim/mips/configure.in: Regenerate.
1236
1237 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1238
1239         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1240         signed8, unsigned8 et.al. types.
1241
1242 start-sanitize-r5900
1243         * gencode.c (build_instruction): For PMULTU* do not sign extend
1244         registers.  Make generated code easier to debug.
1245
1246 end-sanitize-r5900
1247         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1248         hosts when selecting subreg.
1249
1250 start-sanitize-r5900
1251 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1252
1253         * gencode.c (type_for_data_len): For 32bit operations concerned
1254         with overflow, perform op using 64bits.
1255         (build_instruction): For PADD, always compute operation using type
1256         returned by type_for_data_len.
1257         (build_instruction): For PSUBU, when overflow, saturate to zero as
1258         actually underflow.
1259
1260 end-sanitize-r5900
1261 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1262
1263 start-sanitize-r5900
1264         * gencode.c (build_instruction): Handle "pext5" according to
1265         version 1.95 of the r5900 ISA.
1266
1267         * gencode.c (build_instruction): Handle "ppac5" according to
1268         version 1.95 of the r5900 ISA.
1269
1270 end-sanitize-r5900
1271         * interp.c (sim_engine_run): Reset the ZERO register to zero
1272         regardless of FEATURE_WARN_ZERO.
1273         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1274
1275 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1276
1277         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1278         (SignalException): For BreakPoints ignore any mode bits and just
1279         save the PC.
1280         (SignalException): Always set the CAUSE register.
1281
1282 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1283
1284         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1285         exception has been taken.
1286
1287         * interp.c: Implement the ERET and mt/f sr instructions.
1288
1289 start-sanitize-r5900
1290 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1291
1292         * gencode.c (build_instruction): For paddu, extract unsigned
1293         sub-fields.
1294
1295         * gencode.c (build_instruction): Saturate padds instead of padd
1296         instructions.
1297
1298 end-sanitize-r5900
1299 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1300
1301         * interp.c (SignalException): Don't bother restarting an
1302         interrupt.
1303
1304 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1305
1306         * interp.c (SignalException): Really take an interrupt.
1307         (interrupt_event): Only deliver interrupts when enabled.
1308
1309 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1310
1311         * interp.c (sim_info): Only print info when verbose.
1312         (sim_info) Use sim_io_printf for output.
1313
1314 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1315
1316         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1317         mips architectures.
1318
1319 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1320
1321         * interp.c (sim_do_command): Check for common commands if a
1322         simulator specific command fails.
1323
1324 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1325
1326         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1327         and simBE when DEBUG is defined.
1328
1329 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1330
1331         * interp.c (interrupt_event): New function.  Pass exception event
1332         onto exception handler.
1333
1334         * configure.in: Check for stdlib.h.
1335         * configure: Regenerate.
1336
1337         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1338         variable declaration.
1339         (build_instruction): Initialize memval1.
1340         (build_instruction): Add UNUSED attribute to byte, bigend,
1341         reverse.
1342         (build_operands): Ditto.
1343
1344         * interp.c: Fix GCC warnings.
1345         (sim_get_quit_code): Delete.
1346
1347         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1348         * Makefile.in: Ditto.
1349         * configure: Re-generate.
1350
1351         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1352
1353 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1354
1355         * interp.c (mips_option_handler): New function parse argumes using
1356         sim-options.
1357         (myname): Replace with STATE_MY_NAME.
1358         (sim_open): Delete check for host endianness - performed by
1359         sim_config.
1360         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1361         (sim_open): Move much of the initialization from here.
1362         (sim_load): To here.  After the image has been loaded and
1363         endianness set.
1364         (sim_open): Move ColdReset from here.
1365         (sim_create_inferior): To here.
1366         (sim_open): Make FP check less dependant on host endianness.
1367
1368         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1369         run.
1370         * interp.c (sim_set_callbacks): Delete.
1371
1372         * interp.c (membank, membank_base, membank_size): Replace with
1373         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1374         (sim_open): Remove call to callback->init. gdb/run do this.
1375
1376         * interp.c: Update
1377
1378         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1379
1380         * interp.c (big_endian_p): Delete, replaced by
1381         current_target_byte_order.
1382
1383 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1384
1385         * interp.c (host_read_long, host_read_word, host_swap_word,
1386         host_swap_long): Delete. Using common sim-endian.
1387         (sim_fetch_register, sim_store_register): Use H2T.
1388         (pipeline_ticks): Delete.  Handled by sim-events.
1389         (sim_info): Update.
1390         (sim_engine_run): Update.
1391
1392 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1393
1394         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1395         reason from here.
1396         (SignalException): To here. Signal using sim_engine_halt.
1397         (sim_stop_reason): Delete, moved to common.
1398
1399 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1400
1401         * interp.c (sim_open): Add callback argument.
1402         (sim_set_callbacks): Delete SIM_DESC argument.
1403         (sim_size): Ditto.
1404
1405 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1406
1407         * Makefile.in (SIM_OBJS): Add common modules.
1408
1409         * interp.c (sim_set_callbacks): Also set SD callback.
1410         (set_endianness, xfer_*, swap_*): Delete.
1411         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1412         Change to functions using sim-endian macros.
1413         (control_c, sim_stop): Delete, use common version.
1414         (simulate): Convert into.
1415         (sim_engine_run): This function.
1416         (sim_resume): Delete.
1417
1418         * interp.c (simulation): New variable - the simulator object.
1419         (sim_kind): Delete global - merged into simulation.
1420         (sim_load): Cleanup.  Move PC assignment from here.
1421         (sim_create_inferior): To here.
1422
1423         * sim-main.h: New file.
1424         * interp.c (sim-main.h): Include.
1425
1426 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1427
1428         * configure: Regenerated to track ../common/aclocal.m4 changes.
1429
1430 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1431
1432         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1433
1434 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1435
1436         * gencode.c (build_instruction): DIV instructions: check
1437         for division by zero and integer overflow before using
1438         host's division operation.
1439
1440 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1441
1442         * Makefile.in (SIM_OBJS): Add sim-load.o.
1443         * interp.c: #include bfd.h.
1444         (target_byte_order): Delete.
1445         (sim_kind, myname, big_endian_p): New static locals.
1446         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1447         after argument parsing.  Recognize -E arg, set endianness accordingly.
1448         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1449         load file into simulator.  Set PC from bfd.
1450         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1451         (set_endianness): Use big_endian_p instead of target_byte_order.
1452
1453 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1454
1455         * interp.c (sim_size): Delete prototype - conflicts with
1456         definition in remote-sim.h.  Correct definition.
1457
1458 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1459
1460         * configure: Regenerated to track ../common/aclocal.m4 changes.
1461         * config.in: Ditto.
1462
1463 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1464
1465         * interp.c (sim_open): New arg `kind'.
1466
1467         * configure: Regenerated to track ../common/aclocal.m4 changes.
1468
1469 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1470
1471         * configure: Regenerated to track ../common/aclocal.m4 changes.
1472
1473 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1474
1475         * interp.c (sim_open): Set optind to 0 before calling getopt.
1476
1477 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1478
1479         * configure: Regenerated to track ../common/aclocal.m4 changes.
1480
1481 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1482
1483         * interp.c : Replace uses of pr_addr with pr_uword64
1484         where the bit length is always 64 independent of SIM_ADDR.
1485         (pr_uword64) : added.
1486
1487 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1488
1489         * configure: Re-generate.
1490
1491 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1492
1493         * configure: Regenerate to track ../common/aclocal.m4 changes.
1494
1495 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1496
1497         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1498         in argv form.
1499         (other sim_*): New SIM_DESC argument.
1500
1501 start-sanitize-r5900
1502 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1503
1504         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1505         Change values to avoid overloading DOUBLEWORD which is tested
1506         for all insns.
1507         * gencode.c: reinstate "offending code".
1508
1509 end-sanitize-r5900
1510 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1511
1512         * interp.c: Fix printing of addresses for non-64-bit targets.
1513         (pr_addr): Add function to print address based on size.
1514 start-sanitize-r5900
1515         * gencode.c: #ifdef out offending code until a permanent fix
1516         can be added.  Code is causing build errors for non-5900 mips targets.
1517 end-sanitize-r5900
1518
1519 start-sanitize-r5900
1520 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1521
1522         * gencode.c (process_instructions): Correct test for ISA dependent
1523         architecture bits in isa field of MIPS_DECODE.
1524
1525 end-sanitize-r5900
1526 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1527
1528         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1529
1530 start-sanitize-r5900
1531 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1532
1533         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1534         PMADDUW.
1535
1536 end-sanitize-r5900
1537 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1538
1539         * gencode.c (build_mips16_operands): Correct computation of base
1540         address for extended PC relative instruction.
1541
1542 start-sanitize-r5900
1543 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1544
1545         * Makefile.in, configure, configure.in, gencode.c,
1546         interp.c, support.h: add r5900.
1547
1548 end-sanitize-r5900
1549 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1550
1551         * interp.c (mips16_entry): Add support for floating point cases.
1552         (SignalException): Pass floating point cases to mips16_entry.
1553         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1554         registers.
1555         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1556         or fmt_word.
1557         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1558         and then set the state to fmt_uninterpreted.
1559         (COP_SW): Temporarily set the state to fmt_word while calling
1560         ValueFPR.
1561
1562 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1563
1564         * gencode.c (build_instruction): The high order may be set in the
1565         comparison flags at any ISA level, not just ISA 4.
1566
1567 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1568
1569         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1570         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1571         * configure.in: sinclude ../common/aclocal.m4.
1572         * configure: Regenerated.
1573
1574 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1575
1576         * configure: Rebuild after change to aclocal.m4.
1577
1578 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1579
1580         * configure configure.in Makefile.in:  Update to new configure
1581         scheme which is more compatible with WinGDB builds.
1582         * configure.in:  Improve comment on how to run autoconf.
1583         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1584         * Makefile.in:  Use autoconf substitution to install common
1585         makefile fragment.
1586
1587 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1588
1589         * gencode.c (build_instruction): Use BigEndianCPU instead of
1590         ByteSwapMem.
1591
1592 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1593
1594         * interp.c (sim_monitor): Make output to stdout visible in
1595         wingdb's I/O log window.
1596
1597 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1598
1599         * support.h: Undo previous change to SIGTRAP
1600         and SIGQUIT values.
1601
1602 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1603
1604         * interp.c (store_word, load_word): New static functions.
1605         (mips16_entry): New static function.
1606         (SignalException): Look for mips16 entry and exit instructions.
1607         (simulate): Use the correct index when setting fpr_state after
1608         doing a pending move.
1609
1610 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1611
1612         * interp.c: Fix byte-swapping code throughout to work on
1613         both little- and big-endian hosts.
1614
1615 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1616
1617         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1618         with gdb/config/i386/xm-windows.h.
1619
1620 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1621
1622         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1623         that messes up arithmetic shifts.
1624
1625 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1626
1627         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1628         SIGTRAP and SIGQUIT for _WIN32.
1629
1630 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1631
1632         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1633         force a 64 bit multiplication.
1634         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1635         destination register is 0, since that is the default mips16 nop
1636         instruction.
1637
1638 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1639
1640         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1641         (build_endian_shift): Don't check proc64.
1642         (build_instruction): Always set memval to uword64.  Cast op2 to
1643         uword64 when shifting it left in memory instructions.  Always use
1644         the same code for stores--don't special case proc64.
1645
1646         * gencode.c (build_mips16_operands): Fix base PC value for PC
1647         relative operands.
1648         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1649         jal instruction.
1650         * interp.c (simJALDELAYSLOT): Define.
1651         (JALDELAYSLOT): Define.
1652         (INDELAYSLOT, INJALDELAYSLOT): Define.
1653         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1654
1655 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1656
1657         * interp.c (sim_open): add flush_cache as a PMON routine
1658         (sim_monitor): handle flush_cache by ignoring it
1659
1660 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1661
1662         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1663         BigEndianMem.
1664         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1665         (BigEndianMem): Rename to ByteSwapMem and change sense.
1666         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1667         BigEndianMem references to !ByteSwapMem.
1668         (set_endianness): New function, with prototype.
1669         (sim_open): Call set_endianness.
1670         (sim_info): Use simBE instead of BigEndianMem.
1671         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1672         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1673         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1674         ifdefs, keeping the prototype declaration.
1675         (swap_word): Rewrite correctly.
1676         (ColdReset): Delete references to CONFIG.  Delete endianness related
1677         code; moved to set_endianness.
1678
1679 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1680
1681         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1682         * interp.c (CHECKHILO): Define away.
1683         (simSIGINT): New macro.
1684         (membank_size): Increase from 1MB to 2MB.
1685         (control_c): New function.
1686         (sim_resume): Rename parameter signal to signal_number.  Add local
1687         variable prev.  Call signal before and after simulate.
1688         (sim_stop_reason): Add simSIGINT support.
1689         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1690         functions always.
1691         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1692         if logfh is NULL.
1693         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1694         a call to sim_warning.
1695
1696 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1697
1698         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1699         16 bit instructions.
1700
1701 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1702
1703         Add support for mips16 (16 bit MIPS implementation):
1704         * gencode.c (inst_type): Add mips16 instruction encoding types.
1705         (GETDATASIZEINSN): Define.
1706         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1707         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1708         mtlo.
1709         (MIPS16_DECODE): New table, for mips16 instructions.
1710         (bitmap_val): New static function.
1711         (struct mips16_op): Define.
1712         (mips16_op_table): New table, for mips16 operands.
1713         (build_mips16_operands): New static function.
1714         (process_instructions): If PC is odd, decode a mips16
1715         instruction.  Break out instruction handling into new
1716         build_instruction function.
1717         (build_instruction): New static function, broken out of
1718         process_instructions.  Check modifiers rather than flags for SHIFT
1719         bit count and m[ft]{hi,lo} direction.
1720         (usage): Pass program name to fprintf.
1721         (main): Remove unused variable this_option_optind.  Change
1722         ``*loptarg++'' to ``loptarg++''.
1723         (my_strtoul): Parenthesize && within ||.
1724         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1725         (simulate): If PC is odd, fetch a 16 bit instruction, and
1726         increment PC by 2 rather than 4.
1727         * configure.in: Add case for mips16*-*-*.
1728         * configure: Rebuild.
1729
1730 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1731
1732         * interp.c: Allow -t to enable tracing in standalone simulator.
1733         Fix garbage output in trace file and error messages.
1734
1735 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1736
1737         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1738         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1739         * configure.in: Simplify using macros in ../common/aclocal.m4.
1740         * configure: Regenerated.
1741         * tconfig.in: New file.
1742
1743 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1744
1745         * interp.c: Fix bugs in 64-bit port.
1746         Use ansi function declarations for msvc compiler.
1747         Initialize and test file pointer in trace code.
1748         Prevent duplicate definition of LAST_EMED_REGNUM.
1749
1750 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1751
1752         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1753
1754 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1755
1756         * interp.c (SignalException): Check for explicit terminating
1757         breakpoint value.
1758         * gencode.c: Pass instruction value through SignalException()
1759         calls for Trap, Breakpoint and Syscall.
1760
1761 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1762
1763         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1764         only used on those hosts that provide it.
1765         * configure.in: Add sqrt() to list of functions to be checked for.
1766         * config.in: Re-generated.
1767         * configure: Re-generated.
1768
1769 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1770
1771         * gencode.c (process_instructions): Call build_endian_shift when
1772         expanding STORE RIGHT, to fix swr.
1773         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1774         clear the high bits.
1775         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1776         Fix float to int conversions to produce signed values.
1777
1778 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1779
1780         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1781         (process_instructions): Correct handling of nor instruction.
1782         Correct shift count for 32 bit shift instructions. Correct sign
1783         extension for arithmetic shifts to not shift the number of bits in
1784         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1785         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1786         Fix madd.
1787         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1788         It's OK to have a mult follow a mult.  What's not OK is to have a
1789         mult follow an mfhi.
1790         (Convert): Comment out incorrect rounding code.
1791
1792 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1793
1794         * interp.c (sim_monitor): Improved monitor printf
1795         simulation. Tidied up simulator warnings, and added "--log" option
1796         for directing warning message output.
1797         * gencode.c: Use sim_warning() rather than WARNING macro.
1798
1799 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1800
1801         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1802         getopt1.o, rather than on gencode.c.  Link objects together.
1803         Don't link against -liberty.
1804         (gencode.o, getopt.o, getopt1.o): New targets.
1805         * gencode.c: Include <ctype.h> and "ansidecl.h".
1806         (AND): Undefine after including "ansidecl.h".
1807         (ULONG_MAX): Define if not defined.
1808         (OP_*): Don't define macros; now defined in opcode/mips.h.
1809         (main): Call my_strtoul rather than strtoul.
1810         (my_strtoul): New static function.
1811
1812 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1813
1814         * gencode.c (process_instructions):  Generate word64 and uword64
1815         instead of `long long' and `unsigned long long' data types.
1816         * interp.c:  #include sysdep.h to get signals, and define default
1817         for SIGBUS.
1818         * (Convert):  Work around for Visual-C++ compiler bug with type
1819         conversion.
1820         * support.h:  Make things compile under Visual-C++ by using
1821         __int64 instead of `long long'.  Change many refs to long long
1822         into word64/uword64 typedefs.
1823
1824 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1825
1826         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1827         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1828         (docdir): Removed.
1829         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1830         (AC_PROG_INSTALL): Added.
1831         (AC_PROG_CC): Moved to before configure.host call.
1832         * configure: Rebuilt.
1833
1834 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1835
1836         * configure.in: Define @SIMCONF@ depending on mips target.
1837         * configure: Rebuild.
1838         * Makefile.in (run): Add @SIMCONF@ to control simulator
1839         construction.
1840         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1841         * interp.c: Remove some debugging, provide more detailed error
1842         messages, update memory accesses to use LOADDRMASK.
1843
1844 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1845
1846         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1847         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1848         stamp-h.
1849         * configure: Rebuild.
1850         * config.in: New file, generated by autoheader.
1851         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1852         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1853         HAVE_ANINT and HAVE_AINT, as appropriate.
1854         * Makefile.in (run): Use @LIBS@ rather than -lm.
1855         (interp.o): Depend upon config.h.
1856         (Makefile): Just rebuild Makefile.
1857         (clean): Remove stamp-h.
1858         (mostlyclean): Make the same as clean, not as distclean.
1859         (config.h, stamp-h): New targets.
1860
1861 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1862
1863         * interp.c (ColdReset): Fix boolean test. Make all simulator
1864         globals static.
1865
1866 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1867
1868         * interp.c (xfer_direct_word, xfer_direct_long,
1869         swap_direct_word, swap_direct_long, xfer_big_word,
1870         xfer_big_long, xfer_little_word, xfer_little_long,
1871         swap_word,swap_long): Added.
1872         * interp.c (ColdReset): Provide function indirection to
1873         host<->simulated_target transfer routines.
1874         * interp.c (sim_store_register, sim_fetch_register): Updated to
1875         make use of indirected transfer routines.
1876
1877 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1878
1879         * gencode.c (process_instructions): Ensure FP ABS instruction
1880         recognised.
1881         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1882         system call support.
1883
1884 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1885
1886         * interp.c (sim_do_command): Complain if callback structure not
1887         initialised.
1888
1889 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1890
1891         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1892         support for Sun hosts.
1893         * Makefile.in (gencode): Ensure the host compiler and libraries
1894         used for cross-hosted build.
1895
1896 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1897
1898         * interp.c, gencode.c: Some more (TODO) tidying.
1899
1900 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1901
1902         * gencode.c, interp.c: Replaced explicit long long references with
1903         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1904         * support.h (SET64LO, SET64HI): Macros added.
1905
1906 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1907
1908         * configure: Regenerate with autoconf 2.7.
1909
1910 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1911
1912         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1913         * support.h: Remove superfluous "1" from #if.
1914         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1915
1916 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1917
1918         * interp.c (StoreFPR): Control UndefinedResult() call on
1919         WARN_RESULT manifest.
1920
1921 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1922
1923         * gencode.c: Tidied instruction decoding, and added FP instruction
1924         support.
1925
1926         * interp.c: Added dineroIII, and BSD profiling support. Also
1927         run-time FP handling.
1928
1929 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1930
1931         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1932         gencode.c, interp.c, support.h: created.