1 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
6 * sim-main.h: Add 8*3*8 bit accumulator.
8 * vr5400.igen: Move mdmx instructins from here
9 * mdmx.igen: To here - new file. Add/fix missing instructions.
10 * mips.igen: Include mdmx.igen.
13 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
15 * sim-main.h (sim-fpu.h): Include.
17 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
18 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
19 using host independant sim_fpu module.
21 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
23 * interp.c (signal_exception): Report internal errors with SIGABRT
26 * sim-main.h (C0_CONFIG): New register.
27 (signal.h): No longer include.
29 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
31 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
33 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
35 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
37 * mips.igen: Tag vr5000 instructions.
38 (ANDI): Was missing mipsIV model, fix assembler syntax.
39 (do_c_cond_fmt): New function.
40 (C.cond.fmt): Handle mips I-III which do not support CC field
42 (bc1): Handle mips IV which do not have a delaed FCC separatly.
43 (SDR): Mask paddr when BigEndianMem, not the converse as specified
45 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
46 vr5000 which saves LO in a GPR separatly.
48 * configure.in (enable-sim-igen): For vr5000, select vr5000
49 specific instructions.
50 * configure: Re-generate.
52 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
54 * Makefile.in (SIM_OBJS): Add sim-fpu module.
56 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
57 fmt_uninterpreted_64 bit cases to switch. Convert to
60 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
62 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
63 as specified in IV3.2 spec.
64 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
66 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
68 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
69 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
70 (start-sanitize-r5900):
71 (LWXC1, SWXC1): Delete from r5900 instruction set.
73 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
74 PENDING_FILL versions of instructions. Simplify.
76 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
78 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
80 (MTHI, MFHI): Disable code checking HI-LO.
82 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
84 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
86 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
88 * gencode.c (build_mips16_operands): Replace IPC with cia.
90 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
91 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
93 (UndefinedResult): Replace function with macro/function
95 (sim_engine_run): Don't save PC in IPC.
97 * sim-main.h (IPC): Delete.
100 * vr5400.igen (vr): Add missing cia argument to value_fpr.
101 (do_select): Rename function select.
104 * interp.c (signal_exception, store_word, load_word,
105 address_translation, load_memory, store_memory, cache_op,
106 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
107 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
108 current instruction address - cia - argument.
109 (sim_read, sim_write): Call address_translation directly.
110 (sim_engine_run): Rename variable vaddr to cia.
111 (signal_exception): Pass cia to sim_monitor
113 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
114 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
115 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
117 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
118 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
121 * interp.c (signal_exception): Pass restart address to
124 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
125 idecode.o): Add dependency.
127 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
129 (DELAY_SLOT): Update NIA not PC with branch address.
130 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
132 * mips.igen: Use CIA not PC in branch calculations.
133 (illegal): Call SignalException.
134 (BEQ, ADDIU): Fix assembler.
136 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
138 * m16.igen (JALX): Was missing.
140 * configure.in (enable-sim-igen): New configuration option.
141 * configure: Re-generate.
143 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
145 * interp.c (load_memory, store_memory): Delete parameter RAW.
146 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
147 bypassing {load,store}_memory.
149 * sim-main.h (ByteSwapMem): Delete definition.
151 * Makefile.in (SIM_OBJS): Add sim-memopt module.
153 * interp.c (sim_do_command, sim_commands): Delete mips specific
154 commands. Handled by module sim-options.
156 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
157 (WITH_MODULO_MEMORY): Define.
159 * interp.c (sim_info): Delete code printing memory size.
161 * interp.c (mips_size): Nee sim_size, delete function.
163 (monitor, monitor_base, monitor_size): Delete global variables.
164 (sim_open, sim_close): Delete code creating monitor and other
165 memory regions. Use sim-memopts module, via sim_do_commandf, to
166 manage memory regions.
167 (load_memory, store_memory): Use sim-core for memory model.
169 * interp.c (address_translation): Delete all memory map code
170 except line forcing 32 bit addresses.
172 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
174 * sim-main.h (WITH_TRACE): Delete definition. Enables common
177 * interp.c (logfh, logfile): Delete globals.
178 (sim_open, sim_close): Delete code opening & closing log file.
179 (mips_option_handler): Delete -l and -n options.
180 (OPTION mips_options): Ditto.
182 * interp.c (OPTION mips_options): Rename option trace to dinero.
183 (mips_option_handler): Update.
185 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
187 * interp.c (fetch_str): New function.
188 (sim_monitor): Rewrite using sim_read & sim_write.
189 (sim_open): Check magic number.
190 (sim_open): Write monitor vectors into memory using sim_write.
191 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
192 (sim_read, sim_write): Simplify - transfer data one byte at a
194 (load_memory, store_memory): Clarify meaning of parameter RAW.
196 * sim-main.h (isHOST): Defete definition.
197 (isTARGET): Mark as depreciated.
198 (address_translation): Delete parameter HOST.
200 * interp.c (address_translation): Delete parameter HOST.
203 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
205 * gencode.c: Add tx49 configury and insns.
206 * configure.in: Add tx49 configury.
210 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
214 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
215 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
217 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
219 * mips.igen: Add model filter field to records.
221 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
223 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
225 interp.c (sim_engine_run): Do not compile function sim_engine_run
228 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
231 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
232 igen. Replace with configuration variables sim_igen_flags /
236 * r5900.igen: New file. Copy r5900 insns here.
238 start-sanitize-vr5400
239 * vr5400.igen: New file.
241 * m16.igen: New file. Copy mips16 insns here.
242 * mips.igen: From here.
244 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
246 start-sanitize-vr5400
247 * mips.igen: Tag all mipsIV instructions with vr5400 model.
249 * configure.in: Add mips64vr5400 target.
250 * configure: Re-generate.
253 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
255 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
257 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
259 * gencode.c (build_instruction): Follow sim_write's lead in using
260 BigEndianMem instead of !ByteSwapMem.
262 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
264 * configure.in (sim_gen): Dependent on target, select type of
265 generator. Always select old style generator.
267 configure: Re-generate.
269 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
271 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
272 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
273 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
274 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
275 SIM_@sim_gen@_*, set by autoconf.
277 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
279 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
281 * interp.c (ColdReset): Remove #ifdef HASFPU, check
282 CURRENT_FLOATING_POINT instead.
284 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
285 (address_translation): Raise exception InstructionFetch when
286 translation fails and isINSTRUCTION.
288 * interp.c (sim_open, sim_write, sim_monitor, store_word,
289 sim_engine_run): Change type of of vaddr and paddr to
291 (address_translation, prefetch, load_memory, store_memory,
292 cache_op): Change type of vAddr and pAddr to address_word.
294 * gencode.c (build_instruction): Change type of vaddr and paddr to
297 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
299 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
300 macro to obtain result of ALU op.
302 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
304 * interp.c (sim_info): Call profile_print.
306 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
308 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
310 * sim-main.h (WITH_PROFILE): Do not define, defined in
311 common/sim-config.h. Use sim-profile module.
312 (simPROFILE): Delete defintion.
314 * interp.c (PROFILE): Delete definition.
315 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
316 (sim_close): Delete code writing profile histogram.
317 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
319 (sim_engine_run): Delete code profiling the PC.
321 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
323 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
325 * interp.c (sim_monitor): Make register pointers of type
328 * sim-main.h: Make registers of type unsigned_word not
331 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
334 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
335 ...): Move to sim-main.h
338 * interp.c (sync_operation): Rename from SyncOperation, make
339 global, add SD argument.
340 (prefetch): Rename from Prefetch, make global, add SD argument.
341 (decode_coproc): Make global.
343 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
345 * gencode.c (build_instruction): Generate DecodeCoproc not
348 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
349 (SizeFGR): Move to sim-main.h
350 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
351 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
352 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
354 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
355 FP_RM_TOMINF, GETRM): Move to sim-main.h.
356 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
357 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
358 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
359 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
361 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
363 (sim-alu.h): Include.
364 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
365 (sim_cia): Typedef to instruction_address.
367 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
369 * Makefile.in (interp.o): Rename generated file engine.c to
374 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
376 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
378 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
380 * gencode.c (build_instruction): For "FPSQRT", output correct
381 number of arguments to Recip.
383 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
385 * Makefile.in (interp.o): Depends on sim-main.h
387 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
389 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
390 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
391 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
392 STATE, DSSTATE): Define
393 (GPR, FGRIDX, ..): Define.
395 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
396 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
397 (GPR, FGRIDX, ...): Delete macros.
399 * interp.c: Update names to match defines from sim-main.h
401 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
403 * interp.c (sim_monitor): Add SD argument.
404 (sim_warning): Delete. Replace calls with calls to
406 (sim_error): Delete. Replace calls with sim_io_error.
407 (open_trace, writeout32, writeout16, getnum): Add SD argument.
408 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
409 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
411 (mips_size): Rename from sim_size. Add SD argument.
413 * interp.c (simulator): Delete global variable.
414 (callback): Delete global variable.
415 (mips_option_handler, sim_open, sim_write, sim_read,
416 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
417 sim_size,sim_monitor): Use sim_io_* not callback->*.
418 (sim_open): ZALLOC simulator struct.
419 (PROFILE): Do not define.
421 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
423 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
424 support.h with corresponding code.
426 * sim-main.h (word64, uword64), support.h: Move definition to
428 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
431 * Makefile.in: Update dependencies
432 * interp.c: Do not include.
434 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
436 * interp.c (address_translation, load_memory, store_memory,
437 cache_op): Rename to from AddressTranslation et.al., make global,
440 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
443 * interp.c (SignalException): Rename to signal_exception, make
446 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
448 * sim-main.h (SignalException, SignalExceptionInterrupt,
449 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
450 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
451 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
454 * interp.c, support.h: Use.
456 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
458 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
459 to value_fpr / store_fpr. Add SD argument.
460 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
461 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
463 * sim-main.h (ValueFPR, StoreFPR): Define.
465 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
467 * interp.c (sim_engine_run): Check consistency between configure
468 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
471 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
472 (mips_fpu): Configure WITH_FLOATING_POINT.
473 (mips_endian): Configure WITH_TARGET_ENDIAN.
476 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
478 * configure: Regenerated to track ../common/aclocal.m4 changes.
481 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
483 * interp.c (MAX_REG): Allow up-to 128 registers.
484 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
485 (REGISTER_SA): Ditto.
486 (sim_open): Initialize register_widths for r5900 specific
488 (sim_fetch_register, sim_store_register): Check for request of
489 r5900 specific SA register. Check for request for hi 64 bits of
490 r5900 specific registers.
493 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
495 * configure: Regenerated.
497 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
499 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
501 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
503 * gencode.c (print_igen_insn_models): Assume certain architectures
504 include all mips* instructions.
505 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
508 * Makefile.in (tmp.igen): Add target. Generate igen input from
511 * gencode.c (FEATURE_IGEN): Define.
512 (main): Add --igen option. Generate output in igen format.
513 (process_instructions): Format output according to igen option.
514 (print_igen_insn_format): New function.
515 (print_igen_insn_models): New function.
516 (process_instructions): Only issue warnings and ignore
517 instructions when no FEATURE_IGEN.
519 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
521 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
524 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
526 * configure: Regenerated to track ../common/aclocal.m4 changes.
528 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
530 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
531 SIM_RESERVED_BITS): Delete, moved to common.
532 (SIM_EXTRA_CFLAGS): Update.
534 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
536 * configure.in: Configure non-strict memory alignment.
537 * configure: Regenerated to track ../common/aclocal.m4 changes.
539 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
541 * configure: Regenerated to track ../common/aclocal.m4 changes.
543 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
545 * gencode.c (SDBBP,DERET): Added (3900) insns.
546 (RFE): Turn on for 3900.
547 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
548 (dsstate): Made global.
549 (SUBTARGET_R3900): Added.
550 (CANCELDELAYSLOT): New.
551 (SignalException): Ignore SystemCall rather than ignore and
552 terminate. Add DebugBreakPoint handling.
553 (decode_coproc): New insns RFE, DERET; and new registers Debug
554 and DEPC protected by SUBTARGET_R3900.
555 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
557 * Makefile.in,configure.in: Add mips subtarget option.
560 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
562 * gencode.c: Add r3900 (tx39).
565 * gencode.c: Fix some configuration problems by improving
566 the relationship between tx19 and tx39.
569 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
571 * gencode.c (build_instruction): Don't need to subtract 4 for
574 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
576 * interp.c: Correct some HASFPU problems.
578 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
580 * configure: Regenerated to track ../common/aclocal.m4 changes.
582 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
584 * interp.c (mips_options): Fix samples option short form, should
587 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
589 * interp.c (sim_info): Enable info code. Was just returning.
591 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
593 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
596 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
598 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
600 (build_instruction): Ditto for LL.
603 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
605 * mips/configure.in, mips/gencode: Add tx19/r1900.
608 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
610 * configure: Regenerated to track ../common/aclocal.m4 changes.
613 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
615 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
616 for overflow due to ABS of MININT, set result to MAXINT.
617 (build_instruction): For "psrlvw", signextend bit 31.
620 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
622 * configure: Regenerated to track ../common/aclocal.m4 changes.
625 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
627 * interp.c (sim_open): Add call to sim_analyze_program, update
630 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
632 * interp.c (sim_kill): Delete.
633 (sim_create_inferior): Add ABFD argument. Set PC from same.
634 (sim_load): Move code initializing trap handlers from here.
636 (sim_load): Delete, use sim-hload.c.
638 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
640 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
642 * configure: Regenerated to track ../common/aclocal.m4 changes.
645 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
647 * interp.c (sim_open): Add ABFD argument.
648 (sim_load): Move call to sim_config from here.
649 (sim_open): To here. Check return status.
652 * gencode.c (build_instruction): Do not define x8000000000000000,
653 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
657 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
659 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
660 "pdivuw" check for overflow due to signed divide by -1.
663 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
665 * gencode.c (build_instruction): Two arg MADD should
666 not assign result to $0.
669 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
671 * gencode.c (build_instruction): For "ppac5" use unsigned
672 arrithmetic so that the sign bit doesn't smear when right shifted.
673 (build_instruction): For "pdiv" perform sign extension when
674 storing results in HI and LO.
675 (build_instructions): For "pdiv" and "pdivbw" check for
677 (build_instruction): For "pmfhl.slw" update hi part of dest
678 register as well as low part.
679 (build_instruction): For "pmfhl" portably handle long long values.
680 (build_instruction): For "pmfhl.sh" correctly negative values.
681 Store half words 2 and three in the correct place.
682 (build_instruction): For "psllvw", sign extend value after shift.
685 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
687 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
688 * sim/mips/configure.in: Regenerate.
690 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
692 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
693 signed8, unsigned8 et.al. types.
696 * gencode.c (build_instruction): For PMULTU* do not sign extend
697 registers. Make generated code easier to debug.
700 * interp.c (SUB_REG_FETCH): Handle both little and big endian
701 hosts when selecting subreg.
704 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
706 * gencode.c (type_for_data_len): For 32bit operations concerned
707 with overflow, perform op using 64bits.
708 (build_instruction): For PADD, always compute operation using type
709 returned by type_for_data_len.
710 (build_instruction): For PSUBU, when overflow, saturate to zero as
714 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
717 * gencode.c (build_instruction): Handle "pext5" according to
718 version 1.95 of the r5900 ISA.
720 * gencode.c (build_instruction): Handle "ppac5" according to
721 version 1.95 of the r5900 ISA.
724 * interp.c (sim_engine_run): Reset the ZERO register to zero
725 regardless of FEATURE_WARN_ZERO.
726 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
728 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
730 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
731 (SignalException): For BreakPoints ignore any mode bits and just
733 (SignalException): Always set the CAUSE register.
735 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
737 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
738 exception has been taken.
740 * interp.c: Implement the ERET and mt/f sr instructions.
743 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
745 * gencode.c (build_instruction): For paddu, extract unsigned
748 * gencode.c (build_instruction): Saturate padds instead of padd
752 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
754 * interp.c (SignalException): Don't bother restarting an
757 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
759 * interp.c (SignalException): Really take an interrupt.
760 (interrupt_event): Only deliver interrupts when enabled.
762 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
764 * interp.c (sim_info): Only print info when verbose.
765 (sim_info) Use sim_io_printf for output.
767 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
769 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
772 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
774 * interp.c (sim_do_command): Check for common commands if a
775 simulator specific command fails.
777 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
779 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
780 and simBE when DEBUG is defined.
782 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
784 * interp.c (interrupt_event): New function. Pass exception event
785 onto exception handler.
787 * configure.in: Check for stdlib.h.
788 * configure: Regenerate.
790 * gencode.c (build_instruction): Add UNUSED attribute to tempS
791 variable declaration.
792 (build_instruction): Initialize memval1.
793 (build_instruction): Add UNUSED attribute to byte, bigend,
795 (build_operands): Ditto.
797 * interp.c: Fix GCC warnings.
798 (sim_get_quit_code): Delete.
800 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
801 * Makefile.in: Ditto.
802 * configure: Re-generate.
804 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
806 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
808 * interp.c (mips_option_handler): New function parse argumes using
810 (myname): Replace with STATE_MY_NAME.
811 (sim_open): Delete check for host endianness - performed by
813 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
814 (sim_open): Move much of the initialization from here.
815 (sim_load): To here. After the image has been loaded and
817 (sim_open): Move ColdReset from here.
818 (sim_create_inferior): To here.
819 (sim_open): Make FP check less dependant on host endianness.
821 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
823 * interp.c (sim_set_callbacks): Delete.
825 * interp.c (membank, membank_base, membank_size): Replace with
826 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
827 (sim_open): Remove call to callback->init. gdb/run do this.
831 * sim-main.h (SIM_HAVE_FLATMEM): Define.
833 * interp.c (big_endian_p): Delete, replaced by
834 current_target_byte_order.
836 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
838 * interp.c (host_read_long, host_read_word, host_swap_word,
839 host_swap_long): Delete. Using common sim-endian.
840 (sim_fetch_register, sim_store_register): Use H2T.
841 (pipeline_ticks): Delete. Handled by sim-events.
843 (sim_engine_run): Update.
845 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
847 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
849 (SignalException): To here. Signal using sim_engine_halt.
850 (sim_stop_reason): Delete, moved to common.
852 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
854 * interp.c (sim_open): Add callback argument.
855 (sim_set_callbacks): Delete SIM_DESC argument.
858 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
860 * Makefile.in (SIM_OBJS): Add common modules.
862 * interp.c (sim_set_callbacks): Also set SD callback.
863 (set_endianness, xfer_*, swap_*): Delete.
864 (host_read_word, host_read_long, host_swap_word, host_swap_long):
865 Change to functions using sim-endian macros.
866 (control_c, sim_stop): Delete, use common version.
867 (simulate): Convert into.
868 (sim_engine_run): This function.
869 (sim_resume): Delete.
871 * interp.c (simulation): New variable - the simulator object.
872 (sim_kind): Delete global - merged into simulation.
873 (sim_load): Cleanup. Move PC assignment from here.
874 (sim_create_inferior): To here.
876 * sim-main.h: New file.
877 * interp.c (sim-main.h): Include.
879 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
881 * configure: Regenerated to track ../common/aclocal.m4 changes.
883 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
885 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
887 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
889 * gencode.c (build_instruction): DIV instructions: check
890 for division by zero and integer overflow before using
891 host's division operation.
893 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
895 * Makefile.in (SIM_OBJS): Add sim-load.o.
896 * interp.c: #include bfd.h.
897 (target_byte_order): Delete.
898 (sim_kind, myname, big_endian_p): New static locals.
899 (sim_open): Set sim_kind, myname. Move call to set_endianness to
900 after argument parsing. Recognize -E arg, set endianness accordingly.
901 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
902 load file into simulator. Set PC from bfd.
903 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
904 (set_endianness): Use big_endian_p instead of target_byte_order.
906 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
908 * interp.c (sim_size): Delete prototype - conflicts with
909 definition in remote-sim.h. Correct definition.
911 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
913 * configure: Regenerated to track ../common/aclocal.m4 changes.
916 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
918 * interp.c (sim_open): New arg `kind'.
920 * configure: Regenerated to track ../common/aclocal.m4 changes.
922 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
924 * configure: Regenerated to track ../common/aclocal.m4 changes.
926 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
928 * interp.c (sim_open): Set optind to 0 before calling getopt.
930 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
932 * configure: Regenerated to track ../common/aclocal.m4 changes.
934 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
936 * interp.c : Replace uses of pr_addr with pr_uword64
937 where the bit length is always 64 independent of SIM_ADDR.
938 (pr_uword64) : added.
940 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
942 * configure: Re-generate.
944 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
946 * configure: Regenerate to track ../common/aclocal.m4 changes.
948 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
950 * interp.c (sim_open): New SIM_DESC result. Argument is now
952 (other sim_*): New SIM_DESC argument.
955 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
957 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
958 Change values to avoid overloading DOUBLEWORD which is tested
960 * gencode.c: reinstate "offending code".
963 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
965 * interp.c: Fix printing of addresses for non-64-bit targets.
966 (pr_addr): Add function to print address based on size.
968 * gencode.c: #ifdef out offending code until a permanent fix
969 can be added. Code is causing build errors for non-5900 mips targets.
973 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
975 * gencode.c (process_instructions): Correct test for ISA dependent
976 architecture bits in isa field of MIPS_DECODE.
979 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
981 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
984 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
986 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
990 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
992 * gencode.c (build_mips16_operands): Correct computation of base
993 address for extended PC relative instruction.
996 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
998 * Makefile.in, configure, configure.in, gencode.c,
999 interp.c, support.h: add r5900.
1002 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1004 * interp.c (mips16_entry): Add support for floating point cases.
1005 (SignalException): Pass floating point cases to mips16_entry.
1006 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1008 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1010 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1011 and then set the state to fmt_uninterpreted.
1012 (COP_SW): Temporarily set the state to fmt_word while calling
1015 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1017 * gencode.c (build_instruction): The high order may be set in the
1018 comparison flags at any ISA level, not just ISA 4.
1020 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1022 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1023 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1024 * configure.in: sinclude ../common/aclocal.m4.
1025 * configure: Regenerated.
1027 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1029 * configure: Rebuild after change to aclocal.m4.
1031 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1033 * configure configure.in Makefile.in: Update to new configure
1034 scheme which is more compatible with WinGDB builds.
1035 * configure.in: Improve comment on how to run autoconf.
1036 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1037 * Makefile.in: Use autoconf substitution to install common
1040 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1042 * gencode.c (build_instruction): Use BigEndianCPU instead of
1045 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1047 * interp.c (sim_monitor): Make output to stdout visible in
1048 wingdb's I/O log window.
1050 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1052 * support.h: Undo previous change to SIGTRAP
1055 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1057 * interp.c (store_word, load_word): New static functions.
1058 (mips16_entry): New static function.
1059 (SignalException): Look for mips16 entry and exit instructions.
1060 (simulate): Use the correct index when setting fpr_state after
1061 doing a pending move.
1063 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1065 * interp.c: Fix byte-swapping code throughout to work on
1066 both little- and big-endian hosts.
1068 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1070 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1071 with gdb/config/i386/xm-windows.h.
1073 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1075 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1076 that messes up arithmetic shifts.
1078 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1080 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1081 SIGTRAP and SIGQUIT for _WIN32.
1083 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1085 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1086 force a 64 bit multiplication.
1087 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1088 destination register is 0, since that is the default mips16 nop
1091 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1093 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1094 (build_endian_shift): Don't check proc64.
1095 (build_instruction): Always set memval to uword64. Cast op2 to
1096 uword64 when shifting it left in memory instructions. Always use
1097 the same code for stores--don't special case proc64.
1099 * gencode.c (build_mips16_operands): Fix base PC value for PC
1101 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1103 * interp.c (simJALDELAYSLOT): Define.
1104 (JALDELAYSLOT): Define.
1105 (INDELAYSLOT, INJALDELAYSLOT): Define.
1106 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1108 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1110 * interp.c (sim_open): add flush_cache as a PMON routine
1111 (sim_monitor): handle flush_cache by ignoring it
1113 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1115 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1117 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1118 (BigEndianMem): Rename to ByteSwapMem and change sense.
1119 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1120 BigEndianMem references to !ByteSwapMem.
1121 (set_endianness): New function, with prototype.
1122 (sim_open): Call set_endianness.
1123 (sim_info): Use simBE instead of BigEndianMem.
1124 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1125 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1126 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1127 ifdefs, keeping the prototype declaration.
1128 (swap_word): Rewrite correctly.
1129 (ColdReset): Delete references to CONFIG. Delete endianness related
1130 code; moved to set_endianness.
1132 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1134 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1135 * interp.c (CHECKHILO): Define away.
1136 (simSIGINT): New macro.
1137 (membank_size): Increase from 1MB to 2MB.
1138 (control_c): New function.
1139 (sim_resume): Rename parameter signal to signal_number. Add local
1140 variable prev. Call signal before and after simulate.
1141 (sim_stop_reason): Add simSIGINT support.
1142 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1144 (sim_warning): Delete call to SignalException. Do call printf_filtered
1146 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1147 a call to sim_warning.
1149 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1151 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1152 16 bit instructions.
1154 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1156 Add support for mips16 (16 bit MIPS implementation):
1157 * gencode.c (inst_type): Add mips16 instruction encoding types.
1158 (GETDATASIZEINSN): Define.
1159 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1160 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1162 (MIPS16_DECODE): New table, for mips16 instructions.
1163 (bitmap_val): New static function.
1164 (struct mips16_op): Define.
1165 (mips16_op_table): New table, for mips16 operands.
1166 (build_mips16_operands): New static function.
1167 (process_instructions): If PC is odd, decode a mips16
1168 instruction. Break out instruction handling into new
1169 build_instruction function.
1170 (build_instruction): New static function, broken out of
1171 process_instructions. Check modifiers rather than flags for SHIFT
1172 bit count and m[ft]{hi,lo} direction.
1173 (usage): Pass program name to fprintf.
1174 (main): Remove unused variable this_option_optind. Change
1175 ``*loptarg++'' to ``loptarg++''.
1176 (my_strtoul): Parenthesize && within ||.
1177 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1178 (simulate): If PC is odd, fetch a 16 bit instruction, and
1179 increment PC by 2 rather than 4.
1180 * configure.in: Add case for mips16*-*-*.
1181 * configure: Rebuild.
1183 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1185 * interp.c: Allow -t to enable tracing in standalone simulator.
1186 Fix garbage output in trace file and error messages.
1188 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1190 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1191 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1192 * configure.in: Simplify using macros in ../common/aclocal.m4.
1193 * configure: Regenerated.
1194 * tconfig.in: New file.
1196 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1198 * interp.c: Fix bugs in 64-bit port.
1199 Use ansi function declarations for msvc compiler.
1200 Initialize and test file pointer in trace code.
1201 Prevent duplicate definition of LAST_EMED_REGNUM.
1203 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1205 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1207 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1209 * interp.c (SignalException): Check for explicit terminating
1211 * gencode.c: Pass instruction value through SignalException()
1212 calls for Trap, Breakpoint and Syscall.
1214 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1216 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1217 only used on those hosts that provide it.
1218 * configure.in: Add sqrt() to list of functions to be checked for.
1219 * config.in: Re-generated.
1220 * configure: Re-generated.
1222 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1224 * gencode.c (process_instructions): Call build_endian_shift when
1225 expanding STORE RIGHT, to fix swr.
1226 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1227 clear the high bits.
1228 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1229 Fix float to int conversions to produce signed values.
1231 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1233 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1234 (process_instructions): Correct handling of nor instruction.
1235 Correct shift count for 32 bit shift instructions. Correct sign
1236 extension for arithmetic shifts to not shift the number of bits in
1237 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1238 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1240 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1241 It's OK to have a mult follow a mult. What's not OK is to have a
1242 mult follow an mfhi.
1243 (Convert): Comment out incorrect rounding code.
1245 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1247 * interp.c (sim_monitor): Improved monitor printf
1248 simulation. Tidied up simulator warnings, and added "--log" option
1249 for directing warning message output.
1250 * gencode.c: Use sim_warning() rather than WARNING macro.
1252 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1254 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1255 getopt1.o, rather than on gencode.c. Link objects together.
1256 Don't link against -liberty.
1257 (gencode.o, getopt.o, getopt1.o): New targets.
1258 * gencode.c: Include <ctype.h> and "ansidecl.h".
1259 (AND): Undefine after including "ansidecl.h".
1260 (ULONG_MAX): Define if not defined.
1261 (OP_*): Don't define macros; now defined in opcode/mips.h.
1262 (main): Call my_strtoul rather than strtoul.
1263 (my_strtoul): New static function.
1265 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1267 * gencode.c (process_instructions): Generate word64 and uword64
1268 instead of `long long' and `unsigned long long' data types.
1269 * interp.c: #include sysdep.h to get signals, and define default
1271 * (Convert): Work around for Visual-C++ compiler bug with type
1273 * support.h: Make things compile under Visual-C++ by using
1274 __int64 instead of `long long'. Change many refs to long long
1275 into word64/uword64 typedefs.
1277 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1279 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1280 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1282 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1283 (AC_PROG_INSTALL): Added.
1284 (AC_PROG_CC): Moved to before configure.host call.
1285 * configure: Rebuilt.
1287 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1289 * configure.in: Define @SIMCONF@ depending on mips target.
1290 * configure: Rebuild.
1291 * Makefile.in (run): Add @SIMCONF@ to control simulator
1293 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1294 * interp.c: Remove some debugging, provide more detailed error
1295 messages, update memory accesses to use LOADDRMASK.
1297 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1299 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1300 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1302 * configure: Rebuild.
1303 * config.in: New file, generated by autoheader.
1304 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1305 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1306 HAVE_ANINT and HAVE_AINT, as appropriate.
1307 * Makefile.in (run): Use @LIBS@ rather than -lm.
1308 (interp.o): Depend upon config.h.
1309 (Makefile): Just rebuild Makefile.
1310 (clean): Remove stamp-h.
1311 (mostlyclean): Make the same as clean, not as distclean.
1312 (config.h, stamp-h): New targets.
1314 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1316 * interp.c (ColdReset): Fix boolean test. Make all simulator
1319 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1321 * interp.c (xfer_direct_word, xfer_direct_long,
1322 swap_direct_word, swap_direct_long, xfer_big_word,
1323 xfer_big_long, xfer_little_word, xfer_little_long,
1324 swap_word,swap_long): Added.
1325 * interp.c (ColdReset): Provide function indirection to
1326 host<->simulated_target transfer routines.
1327 * interp.c (sim_store_register, sim_fetch_register): Updated to
1328 make use of indirected transfer routines.
1330 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1332 * gencode.c (process_instructions): Ensure FP ABS instruction
1334 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1335 system call support.
1337 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1339 * interp.c (sim_do_command): Complain if callback structure not
1342 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1344 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1345 support for Sun hosts.
1346 * Makefile.in (gencode): Ensure the host compiler and libraries
1347 used for cross-hosted build.
1349 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1351 * interp.c, gencode.c: Some more (TODO) tidying.
1353 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1355 * gencode.c, interp.c: Replaced explicit long long references with
1356 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1357 * support.h (SET64LO, SET64HI): Macros added.
1359 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1361 * configure: Regenerate with autoconf 2.7.
1363 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1365 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1366 * support.h: Remove superfluous "1" from #if.
1367 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1369 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1371 * interp.c (StoreFPR): Control UndefinedResult() call on
1372 WARN_RESULT manifest.
1374 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1376 * gencode.c: Tidied instruction decoding, and added FP instruction
1379 * interp.c: Added dineroIII, and BSD profiling support. Also
1380 run-time FP handling.
1382 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1384 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1385 gencode.c, interp.c, support.h: created.