1 2012-10-04 Chao-ying Fu <fu@mips.com>
2 Steve Ellcey <sellcey@mips.com>
4 * mips/mips3264r2.igen (rdhwr): New.
6 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
8 * configure.ac: Always link against dv-sockser.o.
9 * configure: Regenerate.
11 2012-06-15 Joel Brobecker <brobecker@adacore.com>
13 * config.in, configure: Regenerate.
15 2012-05-18 Nick Clifton <nickc@redhat.com>
18 * interp.c: Include config.h before system header files.
20 2012-03-24 Mike Frysinger <vapier@gentoo.org>
22 * aclocal.m4, config.in, configure: Regenerate.
24 2011-12-03 Mike Frysinger <vapier@gentoo.org>
26 * aclocal.m4: New file.
27 * configure: Regenerate.
29 2011-10-19 Mike Frysinger <vapier@gentoo.org>
31 * configure: Regenerate after common/acinclude.m4 update.
33 2011-10-17 Mike Frysinger <vapier@gentoo.org>
35 * configure.ac: Change include to common/acinclude.m4.
37 2011-10-17 Mike Frysinger <vapier@gentoo.org>
39 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
40 call. Replace common.m4 include with SIM_AC_COMMON.
41 * configure: Regenerate.
43 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
45 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
47 (tmp-mach-multi): Exit early when igen fails.
49 2011-07-05 Mike Frysinger <vapier@gentoo.org>
51 * interp.c (sim_do_command): Delete.
53 2011-02-14 Mike Frysinger <vapier@gentoo.org>
55 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
56 (tx3904sio_fifo_reset): Likewise.
57 * interp.c (sim_monitor): Likewise.
59 2010-04-14 Mike Frysinger <vapier@gentoo.org>
61 * interp.c (sim_write): Add const to buffer arg.
63 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
65 * interp.c: Don't include sysdep.h
67 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
69 * configure: Regenerate.
71 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
73 * config.in: Regenerate.
74 * configure: Likewise.
76 * configure: Regenerate.
78 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
80 * configure: Regenerate to track ../common/common.m4 changes.
83 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
84 Daniel Jacobowitz <dan@codesourcery.com>
85 Joseph Myers <joseph@codesourcery.com>
87 * configure: Regenerate.
89 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
91 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
92 that unconditionally allows fmt_ps.
93 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
94 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
95 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
96 filter from 64,f to 32,f.
97 (PREFX): Change filter from 64 to 32.
98 (LDXC1, LUXC1): Provide separate mips32r2 implementations
99 that use do_load_double instead of do_load. Make both LUXC1
100 versions unpredictable if SizeFGR () != 64.
101 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
102 instead of do_store. Remove unused variable. Make both SUXC1
103 versions unpredictable if SizeFGR () != 64.
105 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
107 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
108 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
109 shifts for that case.
111 2007-09-04 Nick Clifton <nickc@redhat.com>
113 * interp.c (options enum): Add OPTION_INFO_MEMORY.
114 (display_mem_info): New static variable.
115 (mips_option_handler): Handle OPTION_INFO_MEMORY.
116 (mips_options): Add info-memory and memory-info.
117 (sim_open): After processing the command line and board
118 specification, check display_mem_info. If it is set then
119 call the real handler for the --memory-info command line
122 2007-08-24 Joel Brobecker <brobecker@adacore.com>
124 * configure.ac: Change license of multi-run.c to GPL version 3.
125 * configure: Regenerate.
127 2007-06-28 Richard Sandiford <richard@codesourcery.com>
129 * configure.ac, configure: Revert last patch.
131 2007-06-26 Richard Sandiford <richard@codesourcery.com>
133 * configure.ac (sim_mipsisa3264_configs): New variable.
134 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
135 every configuration support all four targets, using the triplet to
136 determine the default.
137 * configure: Regenerate.
139 2007-06-25 Richard Sandiford <richard@codesourcery.com>
141 * Makefile.in (m16run.o): New rule.
143 2007-05-15 Thiemo Seufer <ths@mips.com>
145 * mips3264r2.igen (DSHD): Fix compile warning.
147 2007-05-14 Thiemo Seufer <ths@mips.com>
149 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
150 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
151 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
152 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
155 2007-03-01 Thiemo Seufer <ths@mips.com>
157 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
160 2007-02-20 Thiemo Seufer <ths@mips.com>
162 * dsp.igen: Update copyright notice.
163 * dsp2.igen: Fix copyright notice.
165 2007-02-20 Thiemo Seufer <ths@mips.com>
166 Chao-Ying Fu <fu@mips.com>
168 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
169 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
170 Add dsp2 to sim_igen_machine.
171 * configure: Regenerate.
172 * dsp.igen (do_ph_op): Add MUL support when op = 2.
173 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
174 (mulq_rs.ph): Use do_ph_mulq.
175 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
176 * mips.igen: Add dsp2 model and include dsp2.igen.
177 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
178 for *mips32r2, *mips64r2, *dsp.
179 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
180 for *mips32r2, *mips64r2, *dsp2.
181 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
183 2007-02-19 Thiemo Seufer <ths@mips.com>
184 Nigel Stephens <nigel@mips.com>
186 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
187 jumps with hazard barrier.
189 2007-02-19 Thiemo Seufer <ths@mips.com>
190 Nigel Stephens <nigel@mips.com>
192 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
193 after each call to sim_io_write.
195 2007-02-19 Thiemo Seufer <ths@mips.com>
196 Nigel Stephens <nigel@mips.com>
198 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
199 supported by this simulator.
200 (decode_coproc): Recognise additional CP0 Config registers
203 2007-02-19 Thiemo Seufer <ths@mips.com>
204 Nigel Stephens <nigel@mips.com>
205 David Ung <davidu@mips.com>
207 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
208 uninterpreted formats. If fmt is one of the uninterpreted types
209 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
210 fmt_word, and fmt_uninterpreted_64 like fmt_long.
211 (store_fpr): When writing an invalid odd register, set the
212 matching even register to fmt_unknown, not the following register.
213 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
214 the the memory window at offset 0 set by --memory-size command
216 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
218 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
220 (sim_monitor): When returning the memory size to the MIPS
221 application, use the value in STATE_MEM_SIZE, not an arbitrary
223 (cop_lw): Don' mess around with FPR_STATE, just pass
224 fmt_uninterpreted_32 to StoreFPR.
226 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
228 * mips.igen (not_word_value): Single version for mips32, mips64
231 2007-02-19 Thiemo Seufer <ths@mips.com>
232 Nigel Stephens <nigel@mips.com>
234 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
237 2007-02-17 Thiemo Seufer <ths@mips.com>
239 * configure.ac (mips*-sde-elf*): Move in front of generic machine
241 * configure: Regenerate.
243 2007-02-17 Thiemo Seufer <ths@mips.com>
245 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
246 Add mdmx to sim_igen_machine.
247 (mipsisa64*-*-*): Likewise. Remove dsp.
248 (mipsisa32*-*-*): Remove dsp.
249 * configure: Regenerate.
251 2007-02-13 Thiemo Seufer <ths@mips.com>
253 * configure.ac: Add mips*-sde-elf* target.
254 * configure: Regenerate.
256 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
258 * acconfig.h: Remove.
259 * config.in, configure: Regenerate.
261 2006-11-07 Thiemo Seufer <ths@mips.com>
263 * dsp.igen (do_w_op): Fix compiler warning.
265 2006-08-29 Thiemo Seufer <ths@mips.com>
266 David Ung <davidu@mips.com>
268 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
270 * configure: Regenerate.
271 * mips.igen (model): Add smartmips.
272 (MADDU): Increment ACX if carry.
273 (do_mult): Clear ACX.
274 (ROR,RORV): Add smartmips.
275 (include): Include smartmips.igen.
276 * sim-main.h (ACX): Set to REGISTERS[89].
277 * smartmips.igen: New file.
279 2006-08-29 Thiemo Seufer <ths@mips.com>
280 David Ung <davidu@mips.com>
282 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
283 mips3264r2.igen. Add missing dependency rules.
284 * m16e.igen: Support for mips16e save/restore instructions.
286 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
288 * configure: Regenerated.
290 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
292 * configure: Regenerated.
294 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
296 * configure: Regenerated.
298 2006-05-15 Chao-ying Fu <fu@mips.com>
300 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
302 2006-04-18 Nick Clifton <nickc@redhat.com>
304 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
307 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
309 * configure: Regenerate.
311 2005-12-14 Chao-ying Fu <fu@mips.com>
313 * Makefile.in (SIM_OBJS): Add dsp.o.
314 (dsp.o): New dependency.
315 (IGEN_INCLUDE): Add dsp.igen.
316 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
317 mipsisa64*-*-*): Add dsp to sim_igen_machine.
318 * configure: Regenerate.
319 * mips.igen: Add dsp model and include dsp.igen.
320 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
321 because these instructions are extended in DSP ASE.
322 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
323 adding 6 DSP accumulator registers and 1 DSP control register.
324 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
325 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
326 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
327 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
328 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
329 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
330 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
331 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
332 DSPCR_CCOND_SMASK): New define.
333 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
334 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
336 2005-07-08 Ian Lance Taylor <ian@airs.com>
338 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
340 2005-06-16 David Ung <davidu@mips.com>
341 Nigel Stephens <nigel@mips.com>
343 * mips.igen: New mips16e model and include m16e.igen.
344 (check_u64): Add mips16e tag.
345 * m16e.igen: New file for MIPS16e instructions.
346 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
347 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
349 * configure: Regenerate.
351 2005-05-26 David Ung <davidu@mips.com>
353 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
354 tags to all instructions which are applicable to the new ISAs.
355 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
357 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
359 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
361 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
362 * configure: Regenerate.
364 2005-03-23 Mark Kettenis <kettenis@gnu.org>
366 * configure: Regenerate.
368 2005-01-14 Andrew Cagney <cagney@gnu.org>
370 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
371 explicit call to AC_CONFIG_HEADER.
372 * configure: Regenerate.
374 2005-01-12 Andrew Cagney <cagney@gnu.org>
376 * configure.ac: Update to use ../common/common.m4.
377 * configure: Re-generate.
379 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
381 * configure: Regenerated to track ../common/aclocal.m4 changes.
383 2005-01-07 Andrew Cagney <cagney@gnu.org>
385 * configure.ac: Rename configure.in, require autoconf 2.59.
386 * configure: Re-generate.
388 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
390 * configure: Regenerate for ../common/aclocal.m4 update.
392 2004-09-24 Monika Chaddha <monika@acmet.com>
394 Committed by Andrew Cagney.
395 * m16.igen (CMP, CMPI): Fix assembler.
397 2004-08-18 Chris Demetriou <cgd@broadcom.com>
399 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
400 * configure: Regenerate.
402 2004-06-25 Chris Demetriou <cgd@broadcom.com>
404 * configure.in (sim_m16_machine): Include mipsIII.
405 * configure: Regenerate.
407 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
409 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
411 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
413 2004-04-10 Chris Demetriou <cgd@broadcom.com>
415 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
417 2004-04-09 Chris Demetriou <cgd@broadcom.com>
419 * mips.igen (check_fmt): Remove.
420 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
421 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
422 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
423 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
424 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
425 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
426 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
427 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
428 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
429 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
431 2004-04-09 Chris Demetriou <cgd@broadcom.com>
433 * sb1.igen (check_sbx): New function.
434 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
436 2004-03-29 Chris Demetriou <cgd@broadcom.com>
437 Richard Sandiford <rsandifo@redhat.com>
439 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
440 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
441 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
442 separate implementations for mipsIV and mipsV. Use new macros to
443 determine whether the restrictions apply.
445 2004-01-19 Chris Demetriou <cgd@broadcom.com>
447 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
448 (check_mult_hilo): Improve comments.
449 (check_div_hilo): Likewise. Also, fork off a new version
450 to handle mips32/mips64 (since there are no hazards to check
453 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
455 * mips.igen (do_dmultx): Fix check for negative operands.
457 2003-05-16 Ian Lance Taylor <ian@airs.com>
459 * Makefile.in (SHELL): Make sure this is defined.
460 (various): Use $(SHELL) whenever we invoke move-if-change.
462 2003-05-03 Chris Demetriou <cgd@broadcom.com>
464 * cp1.c: Tweak attribution slightly.
467 * mdmx.igen: Likewise.
468 * mips3d.igen: Likewise.
469 * sb1.igen: Likewise.
471 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
473 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
476 2003-02-27 Andrew Cagney <cagney@redhat.com>
478 * interp.c (sim_open): Rename _bfd to bfd.
479 (sim_create_inferior): Ditto.
481 2003-01-14 Chris Demetriou <cgd@broadcom.com>
483 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
485 2003-01-14 Chris Demetriou <cgd@broadcom.com>
487 * mips.igen (EI, DI): Remove.
489 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
491 * Makefile.in (tmp-run-multi): Fix mips16 filter.
493 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
494 Andrew Cagney <ac131313@redhat.com>
495 Gavin Romig-Koch <gavin@redhat.com>
496 Graydon Hoare <graydon@redhat.com>
497 Aldy Hernandez <aldyh@redhat.com>
498 Dave Brolley <brolley@redhat.com>
499 Chris Demetriou <cgd@broadcom.com>
501 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
502 (sim_mach_default): New variable.
503 (mips64vr-*-*, mips64vrel-*-*): New configurations.
504 Add a new simulator generator, MULTI.
505 * configure: Regenerate.
506 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
507 (multi-run.o): New dependency.
508 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
509 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
510 (tmp-multi): Combine them.
511 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
512 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
513 (distclean-extra): New rule.
514 * sim-main.h: Include bfd.h.
515 (MIPS_MACH): New macro.
516 * mips.igen (vr4120, vr5400, vr5500): New models.
517 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
518 * vr.igen: Replace with new version.
520 2003-01-04 Chris Demetriou <cgd@broadcom.com>
522 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
523 * configure: Regenerate.
525 2002-12-31 Chris Demetriou <cgd@broadcom.com>
527 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
528 * mips.igen: Remove all invocations of check_branch_bug and
531 2002-12-16 Chris Demetriou <cgd@broadcom.com>
533 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
535 2002-07-30 Chris Demetriou <cgd@broadcom.com>
537 * mips.igen (do_load_double, do_store_double): New functions.
538 (LDC1, SDC1): Rename to...
539 (LDC1b, SDC1b): respectively.
540 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
542 2002-07-29 Michael Snyder <msnyder@redhat.com>
544 * cp1.c (fp_recip2): Modify initialization expression so that
545 GCC will recognize it as constant.
547 2002-06-18 Chris Demetriou <cgd@broadcom.com>
549 * mdmx.c (SD_): Delete.
550 (Unpredictable): Re-define, for now, to directly invoke
551 unpredictable_action().
552 (mdmx_acc_op): Fix error in .ob immediate handling.
554 2002-06-18 Andrew Cagney <cagney@redhat.com>
556 * interp.c (sim_firmware_command): Initialize `address'.
558 2002-06-16 Andrew Cagney <ac131313@redhat.com>
560 * configure: Regenerated to track ../common/aclocal.m4 changes.
562 2002-06-14 Chris Demetriou <cgd@broadcom.com>
563 Ed Satterthwaite <ehs@broadcom.com>
565 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
566 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
567 * mips.igen: Include mips3d.igen.
568 (mips3d): New model name for MIPS-3D ASE instructions.
569 (CVT.W.fmt): Don't use this instruction for word (source) format
571 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
572 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
573 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
574 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
575 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
576 (RSquareRoot1, RSquareRoot2): New macros.
577 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
578 (fp_rsqrt2): New functions.
579 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
580 * configure: Regenerate.
582 2002-06-13 Chris Demetriou <cgd@broadcom.com>
583 Ed Satterthwaite <ehs@broadcom.com>
585 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
586 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
587 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
588 (convert): Note that this function is not used for paired-single
590 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
591 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
592 (check_fmt_p): Enable paired-single support.
593 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
594 (PUU.PS): New instructions.
595 (CVT.S.fmt): Don't use this instruction for paired-single format
597 * sim-main.h (FP_formats): New value 'fmt_ps.'
598 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
599 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
601 2002-06-12 Chris Demetriou <cgd@broadcom.com>
603 * mips.igen: Fix formatting of function calls in
606 2002-06-12 Chris Demetriou <cgd@broadcom.com>
608 * mips.igen (MOVN, MOVZ): Trace result.
609 (TNEI): Print "tnei" as the opcode name in traces.
610 (CEIL.W): Add disassembly string for traces.
611 (RSQRT.fmt): Make location of disassembly string consistent
612 with other instructions.
614 2002-06-12 Chris Demetriou <cgd@broadcom.com>
616 * mips.igen (X): Delete unused function.
618 2002-06-08 Andrew Cagney <cagney@redhat.com>
620 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
622 2002-06-07 Chris Demetriou <cgd@broadcom.com>
623 Ed Satterthwaite <ehs@broadcom.com>
625 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
626 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
627 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
628 (fp_nmsub): New prototypes.
629 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
630 (NegMultiplySub): New defines.
631 * mips.igen (RSQRT.fmt): Use RSquareRoot().
632 (MADD.D, MADD.S): Replace with...
633 (MADD.fmt): New instruction.
634 (MSUB.D, MSUB.S): Replace with...
635 (MSUB.fmt): New instruction.
636 (NMADD.D, NMADD.S): Replace with...
637 (NMADD.fmt): New instruction.
638 (NMSUB.D, MSUB.S): Replace with...
639 (NMSUB.fmt): New instruction.
641 2002-06-07 Chris Demetriou <cgd@broadcom.com>
642 Ed Satterthwaite <ehs@broadcom.com>
644 * cp1.c: Fix more comment spelling and formatting.
645 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
646 (denorm_mode): New function.
647 (fpu_unary, fpu_binary): Round results after operation, collect
648 status from rounding operations, and update the FCSR.
649 (convert): Collect status from integer conversions and rounding
650 operations, and update the FCSR. Adjust NaN values that result
651 from conversions. Convert to use sim_io_eprintf rather than
652 fprintf, and remove some debugging code.
653 * cp1.h (fenr_FS): New define.
655 2002-06-07 Chris Demetriou <cgd@broadcom.com>
657 * cp1.c (convert): Remove unusable debugging code, and move MIPS
658 rounding mode to sim FP rounding mode flag conversion code into...
659 (rounding_mode): New function.
661 2002-06-07 Chris Demetriou <cgd@broadcom.com>
663 * cp1.c: Clean up formatting of a few comments.
664 (value_fpr): Reformat switch statement.
666 2002-06-06 Chris Demetriou <cgd@broadcom.com>
667 Ed Satterthwaite <ehs@broadcom.com>
670 * sim-main.h: Include cp1.h.
671 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
672 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
673 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
674 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
675 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
676 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
677 * cp1.c: Don't include sim-fpu.h; already included by
678 sim-main.h. Clean up formatting of some comments.
679 (NaN, Equal, Less): Remove.
680 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
681 (fp_cmp): New functions.
682 * mips.igen (do_c_cond_fmt): Remove.
683 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
684 Compare. Add result tracing.
685 (CxC1): Remove, replace with...
686 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
687 (DMxC1): Remove, replace with...
688 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
689 (MxC1): Remove, replace with...
690 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
692 2002-06-04 Chris Demetriou <cgd@broadcom.com>
694 * sim-main.h (FGRIDX): Remove, replace all uses with...
695 (FGR_BASE): New macro.
696 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
697 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
698 (NR_FGR, FGR): Likewise.
699 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
700 * mips.igen: Likewise.
702 2002-06-04 Chris Demetriou <cgd@broadcom.com>
704 * cp1.c: Add an FSF Copyright notice to this file.
706 2002-06-04 Chris Demetriou <cgd@broadcom.com>
707 Ed Satterthwaite <ehs@broadcom.com>
709 * cp1.c (Infinity): Remove.
710 * sim-main.h (Infinity): Likewise.
712 * cp1.c (fp_unary, fp_binary): New functions.
713 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
714 (fp_sqrt): New functions, implemented in terms of the above.
715 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
716 (Recip, SquareRoot): Remove (replaced by functions above).
717 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
718 (fp_recip, fp_sqrt): New prototypes.
719 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
720 (Recip, SquareRoot): Replace prototypes with #defines which
721 invoke the functions above.
723 2002-06-03 Chris Demetriou <cgd@broadcom.com>
725 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
726 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
727 file, remove PARAMS from prototypes.
728 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
729 simulator state arguments.
730 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
731 pass simulator state arguments.
732 * cp1.c (SD): Redefine as CPU_STATE(cpu).
733 (store_fpr, convert): Remove 'sd' argument.
734 (value_fpr): Likewise. Convert to use 'SD' instead.
736 2002-06-03 Chris Demetriou <cgd@broadcom.com>
738 * cp1.c (Min, Max): Remove #if 0'd functions.
739 * sim-main.h (Min, Max): Remove.
741 2002-06-03 Chris Demetriou <cgd@broadcom.com>
743 * cp1.c: fix formatting of switch case and default labels.
744 * interp.c: Likewise.
745 * sim-main.c: Likewise.
747 2002-06-03 Chris Demetriou <cgd@broadcom.com>
749 * cp1.c: Clean up comments which describe FP formats.
750 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
752 2002-06-03 Chris Demetriou <cgd@broadcom.com>
753 Ed Satterthwaite <ehs@broadcom.com>
755 * configure.in (mipsisa64sb1*-*-*): New target for supporting
756 Broadcom SiByte SB-1 processor configurations.
757 * configure: Regenerate.
758 * sb1.igen: New file.
759 * mips.igen: Include sb1.igen.
761 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
762 * mdmx.igen: Add "sb1" model to all appropriate functions and
764 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
765 (ob_func, ob_acc): Reference the above.
766 (qh_acc): Adjust to keep the same size as ob_acc.
767 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
768 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
770 2002-06-03 Chris Demetriou <cgd@broadcom.com>
772 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
774 2002-06-02 Chris Demetriou <cgd@broadcom.com>
775 Ed Satterthwaite <ehs@broadcom.com>
777 * mips.igen (mdmx): New (pseudo-)model.
778 * mdmx.c, mdmx.igen: New files.
779 * Makefile.in (SIM_OBJS): Add mdmx.o.
780 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
782 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
783 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
784 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
785 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
786 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
787 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
788 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
789 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
790 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
791 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
792 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
793 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
794 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
795 (qh_fmtsel): New macros.
796 (_sim_cpu): New member "acc".
797 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
798 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
800 2002-05-01 Chris Demetriou <cgd@broadcom.com>
802 * interp.c: Use 'deprecated' rather than 'depreciated.'
803 * sim-main.h: Likewise.
805 2002-05-01 Chris Demetriou <cgd@broadcom.com>
807 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
808 which wouldn't compile anyway.
809 * sim-main.h (unpredictable_action): New function prototype.
810 (Unpredictable): Define to call igen function unpredictable().
811 (NotWordValue): New macro to call igen function not_word_value().
812 (UndefinedResult): Remove.
813 * interp.c (undefined_result): Remove.
814 (unpredictable_action): New function.
815 * mips.igen (not_word_value, unpredictable): New functions.
816 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
817 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
818 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
819 NotWordValue() to check for unpredictable inputs, then
820 Unpredictable() to handle them.
822 2002-02-24 Chris Demetriou <cgd@broadcom.com>
824 * mips.igen: Fix formatting of calls to Unpredictable().
826 2002-04-20 Andrew Cagney <ac131313@redhat.com>
828 * interp.c (sim_open): Revert previous change.
830 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
832 * interp.c (sim_open): Disable chunk of code that wrote code in
833 vector table entries.
835 2002-03-19 Chris Demetriou <cgd@broadcom.com>
837 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
838 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
841 2002-03-19 Chris Demetriou <cgd@broadcom.com>
843 * cp1.c: Fix many formatting issues.
845 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
847 * cp1.c (fpu_format_name): New function to replace...
848 (DOFMT): This. Delete, and update all callers.
849 (fpu_rounding_mode_name): New function to replace...
850 (RMMODE): This. Delete, and update all callers.
852 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
854 * interp.c: Move FPU support routines from here to...
855 * cp1.c: Here. New file.
856 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
859 2002-03-12 Chris Demetriou <cgd@broadcom.com>
861 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
862 * mips.igen (mips32, mips64): New models, add to all instructions
863 and functions as appropriate.
864 (loadstore_ea, check_u64): New variant for model mips64.
865 (check_fmt_p): New variant for models mipsV and mips64, remove
866 mipsV model marking fro other variant.
869 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
870 for mips32 and mips64.
871 (DCLO, DCLZ): New instructions for mips64.
873 2002-03-07 Chris Demetriou <cgd@broadcom.com>
875 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
876 immediate or code as a hex value with the "%#lx" format.
877 (ANDI): Likewise, and fix printed instruction name.
879 2002-03-05 Chris Demetriou <cgd@broadcom.com>
881 * sim-main.h (UndefinedResult, Unpredictable): New macros
882 which currently do nothing.
884 2002-03-05 Chris Demetriou <cgd@broadcom.com>
886 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
887 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
888 (status_CU3): New definitions.
890 * sim-main.h (ExceptionCause): Add new values for MIPS32
891 and MIPS64: MDMX, MCheck, CacheErr. Update comments
892 for DebugBreakPoint and NMIReset to note their status in
894 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
895 (SignalExceptionCacheErr): New exception macros.
897 2002-03-05 Chris Demetriou <cgd@broadcom.com>
899 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
900 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
902 (SignalExceptionCoProcessorUnusable): Take as argument the
903 unusable coprocessor number.
905 2002-03-05 Chris Demetriou <cgd@broadcom.com>
907 * mips.igen: Fix formatting of all SignalException calls.
909 2002-03-05 Chris Demetriou <cgd@broadcom.com>
911 * sim-main.h (SIGNEXTEND): Remove.
913 2002-03-04 Chris Demetriou <cgd@broadcom.com>
915 * mips.igen: Remove gencode comment from top of file, fix
916 spelling in another comment.
918 2002-03-04 Chris Demetriou <cgd@broadcom.com>
920 * mips.igen (check_fmt, check_fmt_p): New functions to check
921 whether specific floating point formats are usable.
922 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
923 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
924 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
925 Use the new functions.
926 (do_c_cond_fmt): Remove format checks...
927 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
929 2002-03-03 Chris Demetriou <cgd@broadcom.com>
931 * mips.igen: Fix formatting of check_fpu calls.
933 2002-03-03 Chris Demetriou <cgd@broadcom.com>
935 * mips.igen (FLOOR.L.fmt): Store correct destination register.
937 2002-03-03 Chris Demetriou <cgd@broadcom.com>
939 * mips.igen: Remove whitespace at end of lines.
941 2002-03-02 Chris Demetriou <cgd@broadcom.com>
943 * mips.igen (loadstore_ea): New function to do effective
944 address calculations.
945 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
946 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
947 CACHE): Use loadstore_ea to do effective address computations.
949 2002-03-02 Chris Demetriou <cgd@broadcom.com>
951 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
952 * mips.igen (LL, CxC1, MxC1): Likewise.
954 2002-03-02 Chris Demetriou <cgd@broadcom.com>
956 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
957 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
958 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
959 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
960 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
961 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
962 Don't split opcode fields by hand, use the opcode field values
965 2002-03-01 Chris Demetriou <cgd@broadcom.com>
967 * mips.igen (do_divu): Fix spacing.
969 * mips.igen (do_dsllv): Move to be right before DSLLV,
970 to match the rest of the do_<shift> functions.
972 2002-03-01 Chris Demetriou <cgd@broadcom.com>
974 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
975 DSRL32, do_dsrlv): Trace inputs and results.
977 2002-03-01 Chris Demetriou <cgd@broadcom.com>
979 * mips.igen (CACHE): Provide instruction-printing string.
981 * interp.c (signal_exception): Comment tokens after #endif.
983 2002-02-28 Chris Demetriou <cgd@broadcom.com>
985 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
986 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
987 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
988 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
989 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
990 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
991 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
992 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
994 2002-02-28 Chris Demetriou <cgd@broadcom.com>
996 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
997 instruction-printing string.
998 (LWU): Use '64' as the filter flag.
1000 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1002 * mips.igen (SDXC1): Fix instruction-printing string.
1004 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1006 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1007 filter flags "32,f".
1009 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1011 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1014 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1016 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1017 add a comma) so that it more closely match the MIPS ISA
1018 documentation opcode partitioning.
1019 (PREF): Put useful names on opcode fields, and include
1020 instruction-printing string.
1022 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1024 * mips.igen (check_u64): New function which in the future will
1025 check whether 64-bit instructions are usable and signal an
1026 exception if not. Currently a no-op.
1027 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1028 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1029 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1030 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1032 * mips.igen (check_fpu): New function which in the future will
1033 check whether FPU instructions are usable and signal an exception
1034 if not. Currently a no-op.
1035 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1036 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1037 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1038 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1039 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1040 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1041 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1042 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1044 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1046 * mips.igen (do_load_left, do_load_right): Move to be immediately
1048 (do_store_left, do_store_right): Move to be immediately following
1051 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1053 * mips.igen (mipsV): New model name. Also, add it to
1054 all instructions and functions where it is appropriate.
1056 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1058 * mips.igen: For all functions and instructions, list model
1059 names that support that instruction one per line.
1061 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1063 * mips.igen: Add some additional comments about supported
1064 models, and about which instructions go where.
1065 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1066 order as is used in the rest of the file.
1068 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1070 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1071 indicating that ALU32_END or ALU64_END are there to check
1073 (DADD): Likewise, but also remove previous comment about
1076 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1078 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1079 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1080 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1081 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1082 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1083 fields (i.e., add and move commas) so that they more closely
1084 match the MIPS ISA documentation opcode partitioning.
1086 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1088 * mips.igen (ADDI): Print immediate value.
1089 (BREAK): Print code.
1090 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1091 (SLL): Print "nop" specially, and don't run the code
1092 that does the shift for the "nop" case.
1094 2001-11-17 Fred Fish <fnf@redhat.com>
1096 * sim-main.h (float_operation): Move enum declaration outside
1097 of _sim_cpu struct declaration.
1099 2001-04-12 Jim Blandy <jimb@redhat.com>
1101 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1102 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1104 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1105 PENDING_FILL, and you can get the intended effect gracefully by
1106 calling PENDING_SCHED directly.
1108 2001-02-23 Ben Elliston <bje@redhat.com>
1110 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1111 already defined elsewhere.
1113 2001-02-19 Ben Elliston <bje@redhat.com>
1115 * sim-main.h (sim_monitor): Return an int.
1116 * interp.c (sim_monitor): Add return values.
1117 (signal_exception): Handle error conditions from sim_monitor.
1119 2001-02-08 Ben Elliston <bje@redhat.com>
1121 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1122 (store_memory): Likewise, pass cia to sim_core_write*.
1124 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1126 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1127 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1129 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1131 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1132 * Makefile.in: Don't delete *.igen when cleaning directory.
1134 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1136 * m16.igen (break): Call SignalException not sim_engine_halt.
1138 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1140 From Jason Eckhardt:
1141 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1143 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1145 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1147 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1149 * mips.igen (do_dmultx): Fix typo.
1151 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1153 * configure: Regenerated to track ../common/aclocal.m4 changes.
1155 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1157 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1159 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1161 * sim-main.h (GPR_CLEAR): Define macro.
1163 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1165 * interp.c (decode_coproc): Output long using %lx and not %s.
1167 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1169 * interp.c (sim_open): Sort & extend dummy memory regions for
1170 --board=jmr3904 for eCos.
1172 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1174 * configure: Regenerated.
1176 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1178 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1179 calls, conditional on the simulator being in verbose mode.
1181 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1183 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1184 cache don't get ReservedInstruction traps.
1186 1999-11-29 Mark Salter <msalter@cygnus.com>
1188 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1189 to clear status bits in sdisr register. This is how the hardware works.
1191 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1192 being used by cygmon.
1194 1999-11-11 Andrew Haley <aph@cygnus.com>
1196 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1199 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1201 * mips.igen (MULT): Correct previous mis-applied patch.
1203 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1205 * mips.igen (delayslot32): Handle sequence like
1206 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1207 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1208 (MULT): Actually pass the third register...
1210 1999-09-03 Mark Salter <msalter@cygnus.com>
1212 * interp.c (sim_open): Added more memory aliases for additional
1213 hardware being touched by cygmon on jmr3904 board.
1215 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1217 * configure: Regenerated to track ../common/aclocal.m4 changes.
1219 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1221 * interp.c (sim_store_register): Handle case where client - GDB -
1222 specifies that a 4 byte register is 8 bytes in size.
1223 (sim_fetch_register): Ditto.
1225 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1227 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1228 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1229 (idt_monitor_base): Base address for IDT monitor traps.
1230 (pmon_monitor_base): Ditto for PMON.
1231 (lsipmon_monitor_base): Ditto for LSI PMON.
1232 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1233 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1234 (sim_firmware_command): New function.
1235 (mips_option_handler): Call it for OPTION_FIRMWARE.
1236 (sim_open): Allocate memory for idt_monitor region. If "--board"
1237 option was given, add no monitor by default. Add BREAK hooks only if
1238 monitors are also there.
1240 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1242 * interp.c (sim_monitor): Flush output before reading input.
1244 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1246 * tconfig.in (SIM_HANDLES_LMA): Always define.
1248 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1250 From Mark Salter <msalter@cygnus.com>:
1251 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1252 (sim_open): Add setup for BSP board.
1254 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1256 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1257 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1258 them as unimplemented.
1260 1999-05-08 Felix Lee <flee@cygnus.com>
1262 * configure: Regenerated to track ../common/aclocal.m4 changes.
1264 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1266 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1268 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1270 * configure.in: Any mips64vr5*-*-* target should have
1271 -DTARGET_ENABLE_FR=1.
1272 (default_endian): Any mips64vr*el-*-* target should default to
1274 * configure: Re-generate.
1276 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1278 * mips.igen (ldl): Extend from _16_, not 32.
1280 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1282 * interp.c (sim_store_register): Force registers written to by GDB
1283 into an un-interpreted state.
1285 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1287 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1288 CPU, start periodic background I/O polls.
1289 (tx3904sio_poll): New function: periodic I/O poller.
1291 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1293 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1295 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1297 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1300 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1302 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1303 (load_word): Call SIM_CORE_SIGNAL hook on error.
1304 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1305 starting. For exception dispatching, pass PC instead of NULL_CIA.
1306 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1307 * sim-main.h (COP0_BADVADDR): Define.
1308 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1309 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1310 (_sim_cpu): Add exc_* fields to store register value snapshots.
1311 * mips.igen (*): Replace memory-related SignalException* calls
1312 with references to SIM_CORE_SIGNAL hook.
1314 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1316 * sim-main.c (*): Minor warning cleanups.
1318 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1320 * m16.igen (DADDIU5): Correct type-o.
1322 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1324 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1327 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1329 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1331 (interp.o): Add dependency on itable.h
1332 (oengine.c, gencode): Delete remaining references.
1333 (BUILT_SRC_FROM_GEN): Clean up.
1335 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1338 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1339 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1340 tmp-run-hack) : New.
1341 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1342 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1343 Drop the "64" qualifier to get the HACK generator working.
1344 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1345 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1346 qualifier to get the hack generator working.
1347 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1348 (DSLL): Use do_dsll.
1349 (DSLLV): Use do_dsllv.
1350 (DSRA): Use do_dsra.
1351 (DSRL): Use do_dsrl.
1352 (DSRLV): Use do_dsrlv.
1353 (BC1): Move *vr4100 to get the HACK generator working.
1354 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1355 get the HACK generator working.
1356 (MACC) Rename to get the HACK generator working.
1357 (DMACC,MACCS,DMACCS): Add the 64.
1359 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1361 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1362 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1364 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1366 * mips/interp.c (DEBUG): Cleanups.
1368 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1370 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1371 (tx3904sio_tickle): fflush after a stdout character output.
1373 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1375 * interp.c (sim_close): Uninstall modules.
1377 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1379 * sim-main.h, interp.c (sim_monitor): Change to global
1382 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1384 * configure.in (vr4100): Only include vr4100 instructions in
1386 * configure: Re-generate.
1387 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1389 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1391 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1392 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1395 * configure.in (sim_default_gen, sim_use_gen): Replace with
1397 (--enable-sim-igen): Delete config option. Always using IGEN.
1398 * configure: Re-generate.
1400 * Makefile.in (gencode): Kill, kill, kill.
1403 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1405 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1406 bit mips16 igen simulator.
1407 * configure: Re-generate.
1409 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1410 as part of vr4100 ISA.
1411 * vr.igen: Mark all instructions as 64 bit only.
1413 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1415 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1418 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1420 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1421 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1422 * configure: Re-generate.
1424 * m16.igen (BREAK): Define breakpoint instruction.
1425 (JALX32): Mark instruction as mips16 and not r3900.
1426 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1428 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1430 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1432 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1433 insn as a debug breakpoint.
1435 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1437 (PENDING_SCHED): Clean up trace statement.
1438 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1439 (PENDING_FILL): Delay write by only one cycle.
1440 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1442 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1444 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1446 (pending_tick): Move incrementing of index to FOR statement.
1447 (pending_tick): Only update PENDING_OUT after a write has occured.
1449 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1451 * configure: Re-generate.
1453 * interp.c (sim_engine_run OLD): Delete explicit call to
1454 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1456 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1458 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1459 interrupt level number to match changed SignalExceptionInterrupt
1462 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1464 * interp.c: #include "itable.h" if WITH_IGEN.
1465 (get_insn_name): New function.
1466 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1467 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1469 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1471 * configure: Rebuilt to inhale new common/aclocal.m4.
1473 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1475 * dv-tx3904sio.c: Include sim-assert.h.
1477 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1479 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1480 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1481 Reorganize target-specific sim-hardware checks.
1482 * configure: rebuilt.
1483 * interp.c (sim_open): For tx39 target boards, set
1484 OPERATING_ENVIRONMENT, add tx3904sio devices.
1485 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1486 ROM executables. Install dv-sockser into sim-modules list.
1488 * dv-tx3904irc.c: Compiler warning clean-up.
1489 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1490 frequent hw-trace messages.
1492 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1494 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1496 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1498 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1500 * vr.igen: New file.
1501 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1502 * mips.igen: Define vr4100 model. Include vr.igen.
1503 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1505 * mips.igen (check_mf_hilo): Correct check.
1507 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1509 * sim-main.h (interrupt_event): Add prototype.
1511 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1512 register_ptr, register_value.
1513 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1515 * sim-main.h (tracefh): Make extern.
1517 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1519 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1520 Reduce unnecessarily high timer event frequency.
1521 * dv-tx3904cpu.c: Ditto for interrupt event.
1523 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1525 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1527 (interrupt_event): Made non-static.
1529 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1530 interchange of configuration values for external vs. internal
1533 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1535 * mips.igen (BREAK): Moved code to here for
1536 simulator-reserved break instructions.
1537 * gencode.c (build_instruction): Ditto.
1538 * interp.c (signal_exception): Code moved from here. Non-
1539 reserved instructions now use exception vector, rather
1541 * sim-main.h: Moved magic constants to here.
1543 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1545 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1546 register upon non-zero interrupt event level, clear upon zero
1548 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1549 by passing zero event value.
1550 (*_io_{read,write}_buffer): Endianness fixes.
1551 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1552 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1554 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1555 serial I/O and timer module at base address 0xFFFF0000.
1557 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1559 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1562 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1564 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1566 * configure: Update.
1568 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1570 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1571 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1572 * configure.in: Include tx3904tmr in hw_device list.
1573 * configure: Rebuilt.
1574 * interp.c (sim_open): Instantiate three timer instances.
1575 Fix address typo of tx3904irc instance.
1577 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1579 * interp.c (signal_exception): SystemCall exception now uses
1580 the exception vector.
1582 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1584 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1587 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1589 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1591 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1593 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1595 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1596 sim-main.h. Declare a struct hw_descriptor instead of struct
1597 hw_device_descriptor.
1599 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1601 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1602 right bits and then re-align left hand bytes to correct byte
1603 lanes. Fix incorrect computation in do_store_left when loading
1604 bytes from second word.
1606 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1608 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1609 * interp.c (sim_open): Only create a device tree when HW is
1612 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1613 * interp.c (signal_exception): Ditto.
1615 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1617 * gencode.c: Mark BEGEZALL as LIKELY.
1619 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1621 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1622 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1624 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1626 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1627 modules. Recognize TX39 target with "mips*tx39" pattern.
1628 * configure: Rebuilt.
1629 * sim-main.h (*): Added many macros defining bits in
1630 TX39 control registers.
1631 (SignalInterrupt): Send actual PC instead of NULL.
1632 (SignalNMIReset): New exception type.
1633 * interp.c (board): New variable for future use to identify
1634 a particular board being simulated.
1635 (mips_option_handler,mips_options): Added "--board" option.
1636 (interrupt_event): Send actual PC.
1637 (sim_open): Make memory layout conditional on board setting.
1638 (signal_exception): Initial implementation of hardware interrupt
1639 handling. Accept another break instruction variant for simulator
1641 (decode_coproc): Implement RFE instruction for TX39.
1642 (mips.igen): Decode RFE instruction as such.
1643 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1644 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1645 bbegin to implement memory map.
1646 * dv-tx3904cpu.c: New file.
1647 * dv-tx3904irc.c: New file.
1649 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1651 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1653 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1655 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1656 with calls to check_div_hilo.
1658 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1660 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1661 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1662 Add special r3900 version of do_mult_hilo.
1663 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1664 with calls to check_mult_hilo.
1665 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1666 with calls to check_div_hilo.
1668 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1670 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1671 Document a replacement.
1673 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1675 * interp.c (sim_monitor): Make mon_printf work.
1677 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1679 * sim-main.h (INSN_NAME): New arg `cpu'.
1681 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1683 * configure: Regenerated to track ../common/aclocal.m4 changes.
1685 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1687 * configure: Regenerated to track ../common/aclocal.m4 changes.
1690 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1692 * acconfig.h: New file.
1693 * configure.in: Reverted change of Apr 24; use sinclude again.
1695 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1697 * configure: Regenerated to track ../common/aclocal.m4 changes.
1700 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1702 * configure.in: Don't call sinclude.
1704 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1706 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1708 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1710 * mips.igen (ERET): Implement.
1712 * interp.c (decode_coproc): Return sign-extended EPC.
1714 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1716 * interp.c (signal_exception): Do not ignore Trap.
1717 (signal_exception): On TRAP, restart at exception address.
1718 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1719 (signal_exception): Update.
1720 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1721 so that TRAP instructions are caught.
1723 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1725 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1726 contains HI/LO access history.
1727 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1728 (HIACCESS, LOACCESS): Delete, replace with
1729 (HIHISTORY, LOHISTORY): New macros.
1730 (CHECKHILO): Delete all, moved to mips.igen
1732 * gencode.c (build_instruction): Do not generate checks for
1733 correct HI/LO register usage.
1735 * interp.c (old_engine_run): Delete checks for correct HI/LO
1738 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1739 check_mf_cycles): New functions.
1740 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1741 do_divu, domultx, do_mult, do_multu): Use.
1743 * tx.igen ("madd", "maddu"): Use.
1745 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1747 * mips.igen (DSRAV): Use function do_dsrav.
1748 (SRAV): Use new function do_srav.
1750 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1751 (B): Sign extend 11 bit immediate.
1752 (EXT-B*): Shift 16 bit immediate left by 1.
1753 (ADDIU*): Don't sign extend immediate value.
1755 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1757 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1759 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1762 * mips.igen (delayslot32, nullify_next_insn): New functions.
1763 (m16.igen): Always include.
1764 (do_*): Add more tracing.
1766 * m16.igen (delayslot16): Add NIA argument, could be called by a
1767 32 bit MIPS16 instruction.
1769 * interp.c (ifetch16): Move function from here.
1770 * sim-main.c (ifetch16): To here.
1772 * sim-main.c (ifetch16, ifetch32): Update to match current
1773 implementations of LH, LW.
1774 (signal_exception): Don't print out incorrect hex value of illegal
1777 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1779 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1782 * m16.igen: Implement MIPS16 instructions.
1784 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1785 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1786 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1787 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1788 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1789 bodies of corresponding code from 32 bit insn to these. Also used
1790 by MIPS16 versions of functions.
1792 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1793 (IMEM16): Drop NR argument from macro.
1795 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * Makefile.in (SIM_OBJS): Add sim-main.o.
1799 * sim-main.h (address_translation, load_memory, store_memory,
1800 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1802 (pr_addr, pr_uword64): Declare.
1803 (sim-main.c): Include when H_REVEALS_MODULE_P.
1805 * interp.c (address_translation, load_memory, store_memory,
1806 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1808 * sim-main.c: To here. Fix compilation problems.
1810 * configure.in: Enable inlining.
1811 * configure: Re-config.
1813 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1815 * configure: Regenerated to track ../common/aclocal.m4 changes.
1817 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1819 * mips.igen: Include tx.igen.
1820 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1821 * tx.igen: New file, contains MADD and MADDU.
1823 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1824 the hardwired constant `7'.
1825 (store_memory): Ditto.
1826 (LOADDRMASK): Move definition to sim-main.h.
1828 mips.igen (MTC0): Enable for r3900.
1831 mips.igen (do_load_byte): Delete.
1832 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1833 do_store_right): New functions.
1834 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1836 configure.in: Let the tx39 use igen again.
1839 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1841 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1842 not an address sized quantity. Return zero for cache sizes.
1844 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1846 * mips.igen (r3900): r3900 does not support 64 bit integer
1849 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1851 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1853 * configure : Rebuild.
1855 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1857 * configure: Regenerated to track ../common/aclocal.m4 changes.
1859 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1861 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1863 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1865 * configure: Regenerated to track ../common/aclocal.m4 changes.
1866 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1868 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1870 * configure: Regenerated to track ../common/aclocal.m4 changes.
1872 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1874 * interp.c (Max, Min): Comment out functions. Not yet used.
1876 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1878 * configure: Regenerated to track ../common/aclocal.m4 changes.
1880 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1882 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1883 configurable settings for stand-alone simulator.
1885 * configure.in: Added X11 search, just in case.
1887 * configure: Regenerated.
1889 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * interp.c (sim_write, sim_read, load_memory, store_memory):
1892 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1894 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1896 * sim-main.h (GETFCC): Return an unsigned value.
1898 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1900 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1901 (DADD): Result destination is RD not RT.
1903 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1905 * sim-main.h (HIACCESS, LOACCESS): Always define.
1907 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1909 * interp.c (sim_info): Delete.
1911 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1913 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1914 (mips_option_handler): New argument `cpu'.
1915 (sim_open): Update call to sim_add_option_table.
1917 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1919 * mips.igen (CxC1): Add tracing.
1921 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1923 * sim-main.h (Max, Min): Declare.
1925 * interp.c (Max, Min): New functions.
1927 * mips.igen (BC1): Add tracing.
1929 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1931 * interp.c Added memory map for stack in vr4100
1933 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1935 * interp.c (load_memory): Add missing "break"'s.
1937 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1939 * interp.c (sim_store_register, sim_fetch_register): Pass in
1940 length parameter. Return -1.
1942 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1944 * interp.c: Added hardware init hook, fixed warnings.
1946 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1948 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1950 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1952 * interp.c (ifetch16): New function.
1954 * sim-main.h (IMEM32): Rename IMEM.
1955 (IMEM16_IMMED): Define.
1957 (DELAY_SLOT): Update.
1959 * m16run.c (sim_engine_run): New file.
1961 * m16.igen: All instructions except LB.
1962 (LB): Call do_load_byte.
1963 * mips.igen (do_load_byte): New function.
1964 (LB): Call do_load_byte.
1966 * mips.igen: Move spec for insn bit size and high bit from here.
1967 * Makefile.in (tmp-igen, tmp-m16): To here.
1969 * m16.dc: New file, decode mips16 instructions.
1971 * Makefile.in (SIM_NO_ALL): Define.
1972 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1974 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1976 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1977 point unit to 32 bit registers.
1978 * configure: Re-generate.
1980 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1982 * configure.in (sim_use_gen): Make IGEN the default simulator
1983 generator for generic 32 and 64 bit mips targets.
1984 * configure: Re-generate.
1986 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1988 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1991 * interp.c (sim_fetch_register, sim_store_register): Read/write
1992 FGR from correct location.
1993 (sim_open): Set size of FGR's according to
1994 WITH_TARGET_FLOATING_POINT_BITSIZE.
1996 * sim-main.h (FGR): Store floating point registers in a separate
1999 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2001 * configure: Regenerated to track ../common/aclocal.m4 changes.
2003 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2005 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2007 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2009 * interp.c (pending_tick): New function. Deliver pending writes.
2011 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2012 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2013 it can handle mixed sized quantites and single bits.
2015 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2017 * interp.c (oengine.h): Do not include when building with IGEN.
2018 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2019 (sim_info): Ditto for PROCESSOR_64BIT.
2020 (sim_monitor): Replace ut_reg with unsigned_word.
2021 (*): Ditto for t_reg.
2022 (LOADDRMASK): Define.
2023 (sim_open): Remove defunct check that host FP is IEEE compliant,
2024 using software to emulate floating point.
2025 (value_fpr, ...): Always compile, was conditional on HASFPU.
2027 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2029 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2032 * interp.c (SD, CPU): Define.
2033 (mips_option_handler): Set flags in each CPU.
2034 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2035 (sim_close): Do not clear STATE, deleted anyway.
2036 (sim_write, sim_read): Assume CPU zero's vm should be used for
2038 (sim_create_inferior): Set the PC for all processors.
2039 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2041 (mips16_entry): Pass correct nr of args to store_word, load_word.
2042 (ColdReset): Cold reset all cpu's.
2043 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2044 (sim_monitor, load_memory, store_memory, signal_exception): Use
2045 `CPU' instead of STATE_CPU.
2048 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2051 * sim-main.h (signal_exception): Add sim_cpu arg.
2052 (SignalException*): Pass both SD and CPU to signal_exception.
2053 * interp.c (signal_exception): Update.
2055 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2057 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2058 address_translation): Ditto
2059 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2061 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2063 * configure: Regenerated to track ../common/aclocal.m4 changes.
2065 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2067 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2069 * mips.igen (model): Map processor names onto BFD name.
2071 * sim-main.h (CPU_CIA): Delete.
2072 (SET_CIA, GET_CIA): Define
2074 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2076 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2079 * configure.in (default_endian): Configure a big-endian simulator
2081 * configure: Re-generate.
2083 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2085 * configure: Regenerated to track ../common/aclocal.m4 changes.
2087 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2089 * interp.c (sim_monitor): Handle Densan monitor outbyte
2090 and inbyte functions.
2092 1997-12-29 Felix Lee <flee@cygnus.com>
2094 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2096 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2098 * Makefile.in (tmp-igen): Arrange for $zero to always be
2099 reset to zero after every instruction.
2101 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2103 * configure: Regenerated to track ../common/aclocal.m4 changes.
2106 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2108 * mips.igen (MSUB): Fix to work like MADD.
2109 * gencode.c (MSUB): Similarly.
2111 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2113 * configure: Regenerated to track ../common/aclocal.m4 changes.
2115 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2117 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2119 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2121 * sim-main.h (sim-fpu.h): Include.
2123 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2124 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2125 using host independant sim_fpu module.
2127 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2129 * interp.c (signal_exception): Report internal errors with SIGABRT
2132 * sim-main.h (C0_CONFIG): New register.
2133 (signal.h): No longer include.
2135 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2137 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2139 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2141 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2143 * mips.igen: Tag vr5000 instructions.
2144 (ANDI): Was missing mipsIV model, fix assembler syntax.
2145 (do_c_cond_fmt): New function.
2146 (C.cond.fmt): Handle mips I-III which do not support CC field
2148 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2149 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2151 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2152 vr5000 which saves LO in a GPR separatly.
2154 * configure.in (enable-sim-igen): For vr5000, select vr5000
2155 specific instructions.
2156 * configure: Re-generate.
2158 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2160 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2162 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2163 fmt_uninterpreted_64 bit cases to switch. Convert to
2166 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2168 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2169 as specified in IV3.2 spec.
2170 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2172 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2174 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2175 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2176 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2177 PENDING_FILL versions of instructions. Simplify.
2179 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2181 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2183 (MTHI, MFHI): Disable code checking HI-LO.
2185 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2187 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2189 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2191 * gencode.c (build_mips16_operands): Replace IPC with cia.
2193 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2194 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2196 (UndefinedResult): Replace function with macro/function
2198 (sim_engine_run): Don't save PC in IPC.
2200 * sim-main.h (IPC): Delete.
2203 * interp.c (signal_exception, store_word, load_word,
2204 address_translation, load_memory, store_memory, cache_op,
2205 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2206 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2207 current instruction address - cia - argument.
2208 (sim_read, sim_write): Call address_translation directly.
2209 (sim_engine_run): Rename variable vaddr to cia.
2210 (signal_exception): Pass cia to sim_monitor
2212 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2213 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2214 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2216 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2217 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2220 * interp.c (signal_exception): Pass restart address to
2223 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2224 idecode.o): Add dependency.
2226 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2228 (DELAY_SLOT): Update NIA not PC with branch address.
2229 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2231 * mips.igen: Use CIA not PC in branch calculations.
2232 (illegal): Call SignalException.
2233 (BEQ, ADDIU): Fix assembler.
2235 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2237 * m16.igen (JALX): Was missing.
2239 * configure.in (enable-sim-igen): New configuration option.
2240 * configure: Re-generate.
2242 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2244 * interp.c (load_memory, store_memory): Delete parameter RAW.
2245 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2246 bypassing {load,store}_memory.
2248 * sim-main.h (ByteSwapMem): Delete definition.
2250 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2252 * interp.c (sim_do_command, sim_commands): Delete mips specific
2253 commands. Handled by module sim-options.
2255 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2256 (WITH_MODULO_MEMORY): Define.
2258 * interp.c (sim_info): Delete code printing memory size.
2260 * interp.c (mips_size): Nee sim_size, delete function.
2262 (monitor, monitor_base, monitor_size): Delete global variables.
2263 (sim_open, sim_close): Delete code creating monitor and other
2264 memory regions. Use sim-memopts module, via sim_do_commandf, to
2265 manage memory regions.
2266 (load_memory, store_memory): Use sim-core for memory model.
2268 * interp.c (address_translation): Delete all memory map code
2269 except line forcing 32 bit addresses.
2271 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2273 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2276 * interp.c (logfh, logfile): Delete globals.
2277 (sim_open, sim_close): Delete code opening & closing log file.
2278 (mips_option_handler): Delete -l and -n options.
2279 (OPTION mips_options): Ditto.
2281 * interp.c (OPTION mips_options): Rename option trace to dinero.
2282 (mips_option_handler): Update.
2284 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2286 * interp.c (fetch_str): New function.
2287 (sim_monitor): Rewrite using sim_read & sim_write.
2288 (sim_open): Check magic number.
2289 (sim_open): Write monitor vectors into memory using sim_write.
2290 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2291 (sim_read, sim_write): Simplify - transfer data one byte at a
2293 (load_memory, store_memory): Clarify meaning of parameter RAW.
2295 * sim-main.h (isHOST): Defete definition.
2296 (isTARGET): Mark as depreciated.
2297 (address_translation): Delete parameter HOST.
2299 * interp.c (address_translation): Delete parameter HOST.
2301 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2305 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2306 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2308 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2310 * mips.igen: Add model filter field to records.
2312 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2314 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2316 interp.c (sim_engine_run): Do not compile function sim_engine_run
2317 when WITH_IGEN == 1.
2319 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2320 target architecture.
2322 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2323 igen. Replace with configuration variables sim_igen_flags /
2326 * m16.igen: New file. Copy mips16 insns here.
2327 * mips.igen: From here.
2329 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2331 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2333 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2335 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2337 * gencode.c (build_instruction): Follow sim_write's lead in using
2338 BigEndianMem instead of !ByteSwapMem.
2340 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2342 * configure.in (sim_gen): Dependent on target, select type of
2343 generator. Always select old style generator.
2345 configure: Re-generate.
2347 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2349 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2350 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2351 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2352 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2353 SIM_@sim_gen@_*, set by autoconf.
2355 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2357 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2359 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2360 CURRENT_FLOATING_POINT instead.
2362 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2363 (address_translation): Raise exception InstructionFetch when
2364 translation fails and isINSTRUCTION.
2366 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2367 sim_engine_run): Change type of of vaddr and paddr to
2369 (address_translation, prefetch, load_memory, store_memory,
2370 cache_op): Change type of vAddr and pAddr to address_word.
2372 * gencode.c (build_instruction): Change type of vaddr and paddr to
2375 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2377 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2378 macro to obtain result of ALU op.
2380 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2382 * interp.c (sim_info): Call profile_print.
2384 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2386 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2388 * sim-main.h (WITH_PROFILE): Do not define, defined in
2389 common/sim-config.h. Use sim-profile module.
2390 (simPROFILE): Delete defintion.
2392 * interp.c (PROFILE): Delete definition.
2393 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2394 (sim_close): Delete code writing profile histogram.
2395 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2397 (sim_engine_run): Delete code profiling the PC.
2399 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2401 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2403 * interp.c (sim_monitor): Make register pointers of type
2406 * sim-main.h: Make registers of type unsigned_word not
2409 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2411 * interp.c (sync_operation): Rename from SyncOperation, make
2412 global, add SD argument.
2413 (prefetch): Rename from Prefetch, make global, add SD argument.
2414 (decode_coproc): Make global.
2416 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2418 * gencode.c (build_instruction): Generate DecodeCoproc not
2419 decode_coproc calls.
2421 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2422 (SizeFGR): Move to sim-main.h
2423 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2424 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2425 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2427 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2428 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2429 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2430 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2431 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2432 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2434 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2436 (sim-alu.h): Include.
2437 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2438 (sim_cia): Typedef to instruction_address.
2440 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2442 * Makefile.in (interp.o): Rename generated file engine.c to
2447 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2449 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2451 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2453 * gencode.c (build_instruction): For "FPSQRT", output correct
2454 number of arguments to Recip.
2456 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * Makefile.in (interp.o): Depends on sim-main.h
2460 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2462 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2463 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2464 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2465 STATE, DSSTATE): Define
2466 (GPR, FGRIDX, ..): Define.
2468 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2469 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2470 (GPR, FGRIDX, ...): Delete macros.
2472 * interp.c: Update names to match defines from sim-main.h
2474 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2476 * interp.c (sim_monitor): Add SD argument.
2477 (sim_warning): Delete. Replace calls with calls to
2479 (sim_error): Delete. Replace calls with sim_io_error.
2480 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2481 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2482 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2484 (mips_size): Rename from sim_size. Add SD argument.
2486 * interp.c (simulator): Delete global variable.
2487 (callback): Delete global variable.
2488 (mips_option_handler, sim_open, sim_write, sim_read,
2489 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2490 sim_size,sim_monitor): Use sim_io_* not callback->*.
2491 (sim_open): ZALLOC simulator struct.
2492 (PROFILE): Do not define.
2494 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2496 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2497 support.h with corresponding code.
2499 * sim-main.h (word64, uword64), support.h: Move definition to
2501 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2504 * Makefile.in: Update dependencies
2505 * interp.c: Do not include.
2507 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2509 * interp.c (address_translation, load_memory, store_memory,
2510 cache_op): Rename to from AddressTranslation et.al., make global,
2513 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2516 * interp.c (SignalException): Rename to signal_exception, make
2519 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2521 * sim-main.h (SignalException, SignalExceptionInterrupt,
2522 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2523 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2524 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2527 * interp.c, support.h: Use.
2529 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2531 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2532 to value_fpr / store_fpr. Add SD argument.
2533 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2534 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2536 * sim-main.h (ValueFPR, StoreFPR): Define.
2538 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2540 * interp.c (sim_engine_run): Check consistency between configure
2541 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2544 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2545 (mips_fpu): Configure WITH_FLOATING_POINT.
2546 (mips_endian): Configure WITH_TARGET_ENDIAN.
2547 * configure: Update.
2549 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2551 * configure: Regenerated to track ../common/aclocal.m4 changes.
2553 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2555 * configure: Regenerated.
2557 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2559 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2561 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2563 * gencode.c (print_igen_insn_models): Assume certain architectures
2564 include all mips* instructions.
2565 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2568 * Makefile.in (tmp.igen): Add target. Generate igen input from
2571 * gencode.c (FEATURE_IGEN): Define.
2572 (main): Add --igen option. Generate output in igen format.
2573 (process_instructions): Format output according to igen option.
2574 (print_igen_insn_format): New function.
2575 (print_igen_insn_models): New function.
2576 (process_instructions): Only issue warnings and ignore
2577 instructions when no FEATURE_IGEN.
2579 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2584 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2586 * configure: Regenerated to track ../common/aclocal.m4 changes.
2588 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2591 SIM_RESERVED_BITS): Delete, moved to common.
2592 (SIM_EXTRA_CFLAGS): Update.
2594 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2596 * configure.in: Configure non-strict memory alignment.
2597 * configure: Regenerated to track ../common/aclocal.m4 changes.
2599 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2601 * configure: Regenerated to track ../common/aclocal.m4 changes.
2603 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2605 * gencode.c (SDBBP,DERET): Added (3900) insns.
2606 (RFE): Turn on for 3900.
2607 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2608 (dsstate): Made global.
2609 (SUBTARGET_R3900): Added.
2610 (CANCELDELAYSLOT): New.
2611 (SignalException): Ignore SystemCall rather than ignore and
2612 terminate. Add DebugBreakPoint handling.
2613 (decode_coproc): New insns RFE, DERET; and new registers Debug
2614 and DEPC protected by SUBTARGET_R3900.
2615 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2617 * Makefile.in,configure.in: Add mips subtarget option.
2618 * configure: Update.
2620 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2622 * gencode.c: Add r3900 (tx39).
2625 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2627 * gencode.c (build_instruction): Don't need to subtract 4 for
2630 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2632 * interp.c: Correct some HASFPU problems.
2634 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2636 * configure: Regenerated to track ../common/aclocal.m4 changes.
2638 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2640 * interp.c (mips_options): Fix samples option short form, should
2643 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2645 * interp.c (sim_info): Enable info code. Was just returning.
2647 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2649 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2652 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2654 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2656 (build_instruction): Ditto for LL.
2658 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2660 * configure: Regenerated to track ../common/aclocal.m4 changes.
2662 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2664 * configure: Regenerated to track ../common/aclocal.m4 changes.
2667 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2669 * interp.c (sim_open): Add call to sim_analyze_program, update
2672 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2674 * interp.c (sim_kill): Delete.
2675 (sim_create_inferior): Add ABFD argument. Set PC from same.
2676 (sim_load): Move code initializing trap handlers from here.
2677 (sim_open): To here.
2678 (sim_load): Delete, use sim-hload.c.
2680 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2682 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2684 * configure: Regenerated to track ../common/aclocal.m4 changes.
2687 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2689 * interp.c (sim_open): Add ABFD argument.
2690 (sim_load): Move call to sim_config from here.
2691 (sim_open): To here. Check return status.
2693 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2695 * gencode.c (build_instruction): Two arg MADD should
2696 not assign result to $0.
2698 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2700 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2701 * sim/mips/configure.in: Regenerate.
2703 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2705 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2706 signed8, unsigned8 et.al. types.
2708 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2709 hosts when selecting subreg.
2711 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2713 * interp.c (sim_engine_run): Reset the ZERO register to zero
2714 regardless of FEATURE_WARN_ZERO.
2715 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2717 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2719 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2720 (SignalException): For BreakPoints ignore any mode bits and just
2722 (SignalException): Always set the CAUSE register.
2724 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2727 exception has been taken.
2729 * interp.c: Implement the ERET and mt/f sr instructions.
2731 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * interp.c (SignalException): Don't bother restarting an
2736 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2738 * interp.c (SignalException): Really take an interrupt.
2739 (interrupt_event): Only deliver interrupts when enabled.
2741 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2743 * interp.c (sim_info): Only print info when verbose.
2744 (sim_info) Use sim_io_printf for output.
2746 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2748 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2751 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * interp.c (sim_do_command): Check for common commands if a
2754 simulator specific command fails.
2756 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2758 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2759 and simBE when DEBUG is defined.
2761 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2763 * interp.c (interrupt_event): New function. Pass exception event
2764 onto exception handler.
2766 * configure.in: Check for stdlib.h.
2767 * configure: Regenerate.
2769 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2770 variable declaration.
2771 (build_instruction): Initialize memval1.
2772 (build_instruction): Add UNUSED attribute to byte, bigend,
2774 (build_operands): Ditto.
2776 * interp.c: Fix GCC warnings.
2777 (sim_get_quit_code): Delete.
2779 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2780 * Makefile.in: Ditto.
2781 * configure: Re-generate.
2783 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2785 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2787 * interp.c (mips_option_handler): New function parse argumes using
2789 (myname): Replace with STATE_MY_NAME.
2790 (sim_open): Delete check for host endianness - performed by
2792 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2793 (sim_open): Move much of the initialization from here.
2794 (sim_load): To here. After the image has been loaded and
2796 (sim_open): Move ColdReset from here.
2797 (sim_create_inferior): To here.
2798 (sim_open): Make FP check less dependant on host endianness.
2800 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2802 * interp.c (sim_set_callbacks): Delete.
2804 * interp.c (membank, membank_base, membank_size): Replace with
2805 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2806 (sim_open): Remove call to callback->init. gdb/run do this.
2810 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2812 * interp.c (big_endian_p): Delete, replaced by
2813 current_target_byte_order.
2815 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2817 * interp.c (host_read_long, host_read_word, host_swap_word,
2818 host_swap_long): Delete. Using common sim-endian.
2819 (sim_fetch_register, sim_store_register): Use H2T.
2820 (pipeline_ticks): Delete. Handled by sim-events.
2822 (sim_engine_run): Update.
2824 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2826 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2828 (SignalException): To here. Signal using sim_engine_halt.
2829 (sim_stop_reason): Delete, moved to common.
2831 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2833 * interp.c (sim_open): Add callback argument.
2834 (sim_set_callbacks): Delete SIM_DESC argument.
2837 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * Makefile.in (SIM_OBJS): Add common modules.
2841 * interp.c (sim_set_callbacks): Also set SD callback.
2842 (set_endianness, xfer_*, swap_*): Delete.
2843 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2844 Change to functions using sim-endian macros.
2845 (control_c, sim_stop): Delete, use common version.
2846 (simulate): Convert into.
2847 (sim_engine_run): This function.
2848 (sim_resume): Delete.
2850 * interp.c (simulation): New variable - the simulator object.
2851 (sim_kind): Delete global - merged into simulation.
2852 (sim_load): Cleanup. Move PC assignment from here.
2853 (sim_create_inferior): To here.
2855 * sim-main.h: New file.
2856 * interp.c (sim-main.h): Include.
2858 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2860 * configure: Regenerated to track ../common/aclocal.m4 changes.
2862 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2864 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2866 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2868 * gencode.c (build_instruction): DIV instructions: check
2869 for division by zero and integer overflow before using
2870 host's division operation.
2872 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2874 * Makefile.in (SIM_OBJS): Add sim-load.o.
2875 * interp.c: #include bfd.h.
2876 (target_byte_order): Delete.
2877 (sim_kind, myname, big_endian_p): New static locals.
2878 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2879 after argument parsing. Recognize -E arg, set endianness accordingly.
2880 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2881 load file into simulator. Set PC from bfd.
2882 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2883 (set_endianness): Use big_endian_p instead of target_byte_order.
2885 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2887 * interp.c (sim_size): Delete prototype - conflicts with
2888 definition in remote-sim.h. Correct definition.
2890 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2892 * configure: Regenerated to track ../common/aclocal.m4 changes.
2895 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2897 * interp.c (sim_open): New arg `kind'.
2899 * configure: Regenerated to track ../common/aclocal.m4 changes.
2901 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2903 * configure: Regenerated to track ../common/aclocal.m4 changes.
2905 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2907 * interp.c (sim_open): Set optind to 0 before calling getopt.
2909 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2911 * configure: Regenerated to track ../common/aclocal.m4 changes.
2913 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2915 * interp.c : Replace uses of pr_addr with pr_uword64
2916 where the bit length is always 64 independent of SIM_ADDR.
2917 (pr_uword64) : added.
2919 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2921 * configure: Re-generate.
2923 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2925 * configure: Regenerate to track ../common/aclocal.m4 changes.
2927 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2929 * interp.c (sim_open): New SIM_DESC result. Argument is now
2931 (other sim_*): New SIM_DESC argument.
2933 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2935 * interp.c: Fix printing of addresses for non-64-bit targets.
2936 (pr_addr): Add function to print address based on size.
2938 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2940 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2942 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2944 * gencode.c (build_mips16_operands): Correct computation of base
2945 address for extended PC relative instruction.
2947 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2949 * interp.c (mips16_entry): Add support for floating point cases.
2950 (SignalException): Pass floating point cases to mips16_entry.
2951 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2953 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2955 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2956 and then set the state to fmt_uninterpreted.
2957 (COP_SW): Temporarily set the state to fmt_word while calling
2960 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2962 * gencode.c (build_instruction): The high order may be set in the
2963 comparison flags at any ISA level, not just ISA 4.
2965 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2967 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2968 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2969 * configure.in: sinclude ../common/aclocal.m4.
2970 * configure: Regenerated.
2972 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2974 * configure: Rebuild after change to aclocal.m4.
2976 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2978 * configure configure.in Makefile.in: Update to new configure
2979 scheme which is more compatible with WinGDB builds.
2980 * configure.in: Improve comment on how to run autoconf.
2981 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2982 * Makefile.in: Use autoconf substitution to install common
2985 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2987 * gencode.c (build_instruction): Use BigEndianCPU instead of
2990 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2992 * interp.c (sim_monitor): Make output to stdout visible in
2993 wingdb's I/O log window.
2995 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2997 * support.h: Undo previous change to SIGTRAP
3000 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3002 * interp.c (store_word, load_word): New static functions.
3003 (mips16_entry): New static function.
3004 (SignalException): Look for mips16 entry and exit instructions.
3005 (simulate): Use the correct index when setting fpr_state after
3006 doing a pending move.
3008 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3010 * interp.c: Fix byte-swapping code throughout to work on
3011 both little- and big-endian hosts.
3013 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3015 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3016 with gdb/config/i386/xm-windows.h.
3018 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3020 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3021 that messes up arithmetic shifts.
3023 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3025 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3026 SIGTRAP and SIGQUIT for _WIN32.
3028 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3030 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3031 force a 64 bit multiplication.
3032 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3033 destination register is 0, since that is the default mips16 nop
3036 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3038 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3039 (build_endian_shift): Don't check proc64.
3040 (build_instruction): Always set memval to uword64. Cast op2 to
3041 uword64 when shifting it left in memory instructions. Always use
3042 the same code for stores--don't special case proc64.
3044 * gencode.c (build_mips16_operands): Fix base PC value for PC
3046 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3048 * interp.c (simJALDELAYSLOT): Define.
3049 (JALDELAYSLOT): Define.
3050 (INDELAYSLOT, INJALDELAYSLOT): Define.
3051 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3053 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3055 * interp.c (sim_open): add flush_cache as a PMON routine
3056 (sim_monitor): handle flush_cache by ignoring it
3058 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3060 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3062 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3063 (BigEndianMem): Rename to ByteSwapMem and change sense.
3064 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3065 BigEndianMem references to !ByteSwapMem.
3066 (set_endianness): New function, with prototype.
3067 (sim_open): Call set_endianness.
3068 (sim_info): Use simBE instead of BigEndianMem.
3069 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3070 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3071 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3072 ifdefs, keeping the prototype declaration.
3073 (swap_word): Rewrite correctly.
3074 (ColdReset): Delete references to CONFIG. Delete endianness related
3075 code; moved to set_endianness.
3077 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3079 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3080 * interp.c (CHECKHILO): Define away.
3081 (simSIGINT): New macro.
3082 (membank_size): Increase from 1MB to 2MB.
3083 (control_c): New function.
3084 (sim_resume): Rename parameter signal to signal_number. Add local
3085 variable prev. Call signal before and after simulate.
3086 (sim_stop_reason): Add simSIGINT support.
3087 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3089 (sim_warning): Delete call to SignalException. Do call printf_filtered
3091 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3092 a call to sim_warning.
3094 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3096 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3097 16 bit instructions.
3099 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3101 Add support for mips16 (16 bit MIPS implementation):
3102 * gencode.c (inst_type): Add mips16 instruction encoding types.
3103 (GETDATASIZEINSN): Define.
3104 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3105 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3107 (MIPS16_DECODE): New table, for mips16 instructions.
3108 (bitmap_val): New static function.
3109 (struct mips16_op): Define.
3110 (mips16_op_table): New table, for mips16 operands.
3111 (build_mips16_operands): New static function.
3112 (process_instructions): If PC is odd, decode a mips16
3113 instruction. Break out instruction handling into new
3114 build_instruction function.
3115 (build_instruction): New static function, broken out of
3116 process_instructions. Check modifiers rather than flags for SHIFT
3117 bit count and m[ft]{hi,lo} direction.
3118 (usage): Pass program name to fprintf.
3119 (main): Remove unused variable this_option_optind. Change
3120 ``*loptarg++'' to ``loptarg++''.
3121 (my_strtoul): Parenthesize && within ||.
3122 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3123 (simulate): If PC is odd, fetch a 16 bit instruction, and
3124 increment PC by 2 rather than 4.
3125 * configure.in: Add case for mips16*-*-*.
3126 * configure: Rebuild.
3128 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3130 * interp.c: Allow -t to enable tracing in standalone simulator.
3131 Fix garbage output in trace file and error messages.
3133 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3135 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3136 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3137 * configure.in: Simplify using macros in ../common/aclocal.m4.
3138 * configure: Regenerated.
3139 * tconfig.in: New file.
3141 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3143 * interp.c: Fix bugs in 64-bit port.
3144 Use ansi function declarations for msvc compiler.
3145 Initialize and test file pointer in trace code.
3146 Prevent duplicate definition of LAST_EMED_REGNUM.
3148 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3150 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3152 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3154 * interp.c (SignalException): Check for explicit terminating
3156 * gencode.c: Pass instruction value through SignalException()
3157 calls for Trap, Breakpoint and Syscall.
3159 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3161 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3162 only used on those hosts that provide it.
3163 * configure.in: Add sqrt() to list of functions to be checked for.
3164 * config.in: Re-generated.
3165 * configure: Re-generated.
3167 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3169 * gencode.c (process_instructions): Call build_endian_shift when
3170 expanding STORE RIGHT, to fix swr.
3171 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3172 clear the high bits.
3173 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3174 Fix float to int conversions to produce signed values.
3176 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3178 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3179 (process_instructions): Correct handling of nor instruction.
3180 Correct shift count for 32 bit shift instructions. Correct sign
3181 extension for arithmetic shifts to not shift the number of bits in
3182 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3183 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3185 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3186 It's OK to have a mult follow a mult. What's not OK is to have a
3187 mult follow an mfhi.
3188 (Convert): Comment out incorrect rounding code.
3190 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3192 * interp.c (sim_monitor): Improved monitor printf
3193 simulation. Tidied up simulator warnings, and added "--log" option
3194 for directing warning message output.
3195 * gencode.c: Use sim_warning() rather than WARNING macro.
3197 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3199 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3200 getopt1.o, rather than on gencode.c. Link objects together.
3201 Don't link against -liberty.
3202 (gencode.o, getopt.o, getopt1.o): New targets.
3203 * gencode.c: Include <ctype.h> and "ansidecl.h".
3204 (AND): Undefine after including "ansidecl.h".
3205 (ULONG_MAX): Define if not defined.
3206 (OP_*): Don't define macros; now defined in opcode/mips.h.
3207 (main): Call my_strtoul rather than strtoul.
3208 (my_strtoul): New static function.
3210 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3212 * gencode.c (process_instructions): Generate word64 and uword64
3213 instead of `long long' and `unsigned long long' data types.
3214 * interp.c: #include sysdep.h to get signals, and define default
3216 * (Convert): Work around for Visual-C++ compiler bug with type
3218 * support.h: Make things compile under Visual-C++ by using
3219 __int64 instead of `long long'. Change many refs to long long
3220 into word64/uword64 typedefs.
3222 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3224 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3225 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3227 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3228 (AC_PROG_INSTALL): Added.
3229 (AC_PROG_CC): Moved to before configure.host call.
3230 * configure: Rebuilt.
3232 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3234 * configure.in: Define @SIMCONF@ depending on mips target.
3235 * configure: Rebuild.
3236 * Makefile.in (run): Add @SIMCONF@ to control simulator
3238 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3239 * interp.c: Remove some debugging, provide more detailed error
3240 messages, update memory accesses to use LOADDRMASK.
3242 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3244 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3245 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3247 * configure: Rebuild.
3248 * config.in: New file, generated by autoheader.
3249 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3250 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3251 HAVE_ANINT and HAVE_AINT, as appropriate.
3252 * Makefile.in (run): Use @LIBS@ rather than -lm.
3253 (interp.o): Depend upon config.h.
3254 (Makefile): Just rebuild Makefile.
3255 (clean): Remove stamp-h.
3256 (mostlyclean): Make the same as clean, not as distclean.
3257 (config.h, stamp-h): New targets.
3259 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3261 * interp.c (ColdReset): Fix boolean test. Make all simulator
3264 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3266 * interp.c (xfer_direct_word, xfer_direct_long,
3267 swap_direct_word, swap_direct_long, xfer_big_word,
3268 xfer_big_long, xfer_little_word, xfer_little_long,
3269 swap_word,swap_long): Added.
3270 * interp.c (ColdReset): Provide function indirection to
3271 host<->simulated_target transfer routines.
3272 * interp.c (sim_store_register, sim_fetch_register): Updated to
3273 make use of indirected transfer routines.
3275 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3277 * gencode.c (process_instructions): Ensure FP ABS instruction
3279 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3280 system call support.
3282 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3284 * interp.c (sim_do_command): Complain if callback structure not
3287 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3289 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3290 support for Sun hosts.
3291 * Makefile.in (gencode): Ensure the host compiler and libraries
3292 used for cross-hosted build.
3294 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3296 * interp.c, gencode.c: Some more (TODO) tidying.
3298 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3300 * gencode.c, interp.c: Replaced explicit long long references with
3301 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3302 * support.h (SET64LO, SET64HI): Macros added.
3304 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3306 * configure: Regenerate with autoconf 2.7.
3308 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3310 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3311 * support.h: Remove superfluous "1" from #if.
3312 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3314 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3316 * interp.c (StoreFPR): Control UndefinedResult() call on
3317 WARN_RESULT manifest.
3319 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3321 * gencode.c: Tidied instruction decoding, and added FP instruction
3324 * interp.c: Added dineroIII, and BSD profiling support. Also
3325 run-time FP handling.
3327 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3329 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3330 gencode.c, interp.c, support.h: created.