sim/mips/ChangeLog

   1 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
   4         * sim-main.h (STATE_CPU): Delete.
   5
   6 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * configure: Regenerate.
   9
  10 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
  13         * interp.c (mips_pc_get, mips_pc_set): New functions.
  14         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
  15         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
  16         (sim_pc_get): Delete.
  17         * sim-main.h (SIM_CPU): Define.
  18         (struct sim_state): Change cpu to an array of pointers.
  19         (STATE_CPU): Drop &.
  20
  21 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  22
  23         * interp.c (mips_option_handler, open_trace, sim_close,
  24         sim_write, sim_read, sim_store_register, sim_fetch_register,
  25         sim_create_inferior, pr_addr, pr_uword64): Convert old style
  26         prototypes.
  27         (sim_open): Convert old style prototype.  Change casts with
  28         sim_write to unsigned char *.
  29         (fetch_str): Change null to unsigned char, and change cast to
  30         unsigned char *.
  31         (sim_monitor): Change c & ch to unsigned char.  Change cast to
  32         unsigned char *.
  33
  34 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
  37
  38 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
  41
  42 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * tconfig.h (SIM_HAVE_PROFILE): Delete.
  45
  46 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * config.in, configure: Regenerate.
  49
  50 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  51
  52         * interp.c (sim_pc_get): New function.
  53
  54 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  57         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  58
  59 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * configure: Regenerate.
  62
  63 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  64
  65         * configure: Regenerate.
  66
  67 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  68
  69         * configure: Regenerate.
  70         * configure.ac (mips_extra_objs): Delete.
  71         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
  72         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
  73
  74 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * configure: Regenerate.
  77         * configure.ac: Delete sim_hw checks for dv-sockser.
  78
  79 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
  80
  81         * config.in, configure: Regenerate.
  82         * tconfig.in: Rename file ...
  83         * tconfig.h: ... here.
  84
  85 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
  86
  87         * tconfig.in: Delete includes.
  88         [HAVE_DV_SOCKSER]: Delete.
  89
  90 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * Makefile.in (SIM_RUN_OBJS): Delete.
  93
  94 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  95
  96         * configure.ac (AC_CHECK_HEADERS): Delete.
  97         * aclocal.m4, configure: Regenerate.
  98
  99 2014-08-19  Alan Modra  <amodra@gmail.com>
 100
 101         * configure: Regenerate.
 102
 103 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 104
 105         * configure: Regenerate.
 106         * config.in: Regenerate.
 107
 108 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 109
 110         * configure: Regenerate.
 111
 112 2013-09-23  Alan Modra  <amodra@gmail.com>
 113
 114         * configure: Regenerate.
 115
 116 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * aclocal.m4, configure: Regenerate.
 119
 120 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 121
 122         * configure: Rebuild.
 123
 124 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * configure: Regenerate.
 127
 128 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 129
 130         * configure.ac: Address use of dv-sockser.o.
 131         * tconfig.in: Conditionalize use of dv_sockser_install.
 132         * configure: Regenerated.
 133         * config.in: Regenerated.
 134
 135 2012-10-04  Chao-ying Fu  <fu@mips.com>
 136             Steve Ellcey  <sellcey@mips.com>
 137
 138         * mips/mips3264r2.igen (rdhwr): New.
 139
 140 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 141
 142         * configure.ac: Always link against dv-sockser.o.
 143         * configure: Regenerate.
 144
 145 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 146
 147         * config.in, configure: Regenerate.
 148
 149 2012-05-18  Nick Clifton  <nickc@redhat.com>
 150
 151         PR 14072
 152         * interp.c: Include config.h before system header files.
 153
 154 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * aclocal.m4, config.in, configure: Regenerate.
 157
 158 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * aclocal.m4: New file.
 161         * configure: Regenerate.
 162
 163 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 164
 165         * configure: Regenerate after common/acinclude.m4 update.
 166
 167 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 168
 169         * configure.ac: Change include to common/acinclude.m4.
 170
 171 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 172
 173         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 174         call.  Replace common.m4 include with SIM_AC_COMMON.
 175         * configure: Regenerate.
 176
 177 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 178
 179         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 180         $(SIM_EXTRA_DEPS).
 181         (tmp-mach-multi): Exit early when igen fails.
 182
 183 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 184
 185         * interp.c (sim_do_command): Delete.
 186
 187 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 190         (tx3904sio_fifo_reset): Likewise.
 191         * interp.c (sim_monitor): Likewise.
 192
 193 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * interp.c (sim_write): Add const to buffer arg.
 196
 197 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 198
 199         * interp.c: Don't include sysdep.h
 200
 201 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 202
 203         * configure: Regenerate.
 204
 205 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 206
 207         * config.in: Regenerate.
 208         * configure: Likewise.
 209
 210         * configure: Regenerate.
 211
 212 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 213
 214         * configure: Regenerate to track ../common/common.m4 changes.
 215         * config.in: Ditto.
 216
 217 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 218             Daniel Jacobowitz  <dan@codesourcery.com>
 219             Joseph Myers  <joseph@codesourcery.com>
 220
 221         * configure: Regenerate.
 222
 223 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 224
 225         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 226         that unconditionally allows fmt_ps.
 227         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 228         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 229         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 230         filter from 64,f to 32,f.
 231         (PREFX): Change filter from 64 to 32.
 232         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 233         that use do_load_double instead of do_load.  Make both LUXC1
 234         versions unpredictable if SizeFGR () != 64.
 235         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 236         instead of do_store.  Remove unused variable.  Make both SUXC1
 237         versions unpredictable if SizeFGR () != 64.
 238
 239 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 240
 241         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 242         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 243         shifts for that case.
 244
 245 2007-09-04  Nick Clifton  <nickc@redhat.com>
 246
 247         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 248         (display_mem_info): New static variable.
 249         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 250         (mips_options): Add info-memory and memory-info.
 251         (sim_open): After processing the command line and board
 252         specification, check display_mem_info.  If it is set then
 253         call the real handler for the --memory-info command line
 254         switch.
 255
 256 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 257
 258         * configure.ac: Change license of multi-run.c to GPL version 3.
 259         * configure: Regenerate.
 260
 261 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 262
 263         * configure.ac, configure: Revert last patch.
 264
 265 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 266
 267         * configure.ac (sim_mipsisa3264_configs): New variable.
 268         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 269         every configuration support all four targets, using the triplet to
 270         determine the default.
 271         * configure: Regenerate.
 272
 273 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 274
 275         * Makefile.in (m16run.o): New rule.
 276
 277 2007-05-15  Thiemo Seufer  <ths@mips.com>
 278
 279         * mips3264r2.igen (DSHD): Fix compile warning.
 280
 281 2007-05-14  Thiemo Seufer  <ths@mips.com>
 282
 283         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 284         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 285         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 286         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 287         for mips32r2.
 288
 289 2007-03-01  Thiemo Seufer  <ths@mips.com>
 290
 291         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 292         and mips64.
 293
 294 2007-02-20  Thiemo Seufer  <ths@mips.com>
 295
 296         * dsp.igen: Update copyright notice.
 297         * dsp2.igen: Fix copyright notice.
 298
 299 2007-02-20  Thiemo Seufer  <ths@mips.com>
 300             Chao-Ying Fu  <fu@mips.com>
 301
 302         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 303         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 304         Add dsp2 to sim_igen_machine.
 305         * configure: Regenerate.
 306         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 307         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 308         (mulq_rs.ph): Use do_ph_mulq.
 309         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 310         * mips.igen: Add dsp2 model and include dsp2.igen.
 311         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 312         for *mips32r2, *mips64r2, *dsp.
 313         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 314         for *mips32r2, *mips64r2, *dsp2.
 315         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 316
 317 2007-02-19  Thiemo Seufer  <ths@mips.com>
 318             Nigel Stephens  <nigel@mips.com>
 319
 320         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 321         jumps with hazard barrier.
 322
 323 2007-02-19  Thiemo Seufer  <ths@mips.com>
 324             Nigel Stephens  <nigel@mips.com>
 325
 326         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 327         after each call to sim_io_write.
 328
 329 2007-02-19  Thiemo Seufer  <ths@mips.com>
 330             Nigel Stephens  <nigel@mips.com>
 331
 332         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 333         supported by this simulator.
 334         (decode_coproc): Recognise additional CP0 Config registers
 335         correctly.
 336
 337 2007-02-19  Thiemo Seufer  <ths@mips.com>
 338             Nigel Stephens  <nigel@mips.com>
 339             David Ung  <davidu@mips.com>
 340
 341         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 342         uninterpreted formats. If fmt is one of the uninterpreted types
 343         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 344         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 345         (store_fpr): When writing an invalid odd register, set the
 346         matching even register to fmt_unknown, not the following register.
 347         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 348         the the memory window at offset 0 set by --memory-size command
 349         line option.
 350         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 351         point register.
 352         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 353         register.
 354         (sim_monitor): When returning the memory size to the MIPS
 355         application, use the value in STATE_MEM_SIZE, not an arbitrary
 356         hardcoded value.
 357         (cop_lw): Don' mess around with FPR_STATE, just pass
 358         fmt_uninterpreted_32 to StoreFPR.
 359         (cop_sw): Similarly.
 360         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 361         (cop_sd): Similarly.
 362         * mips.igen (not_word_value): Single version for mips32, mips64
 363         and mips16.
 364
 365 2007-02-19  Thiemo Seufer <ths@mips.com>
 366             Nigel Stephens  <nigel@mips.com>
 367
 368         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 369         MBytes.
 370
 371 2007-02-17  Thiemo Seufer  <ths@mips.com>
 372
 373         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 374         configuration.
 375         * configure: Regenerate.
 376
 377 2007-02-17  Thiemo Seufer  <ths@mips.com>
 378
 379         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 380         Add mdmx to sim_igen_machine.
 381         (mipsisa64*-*-*): Likewise. Remove dsp.
 382         (mipsisa32*-*-*): Remove dsp.
 383         * configure: Regenerate.
 384
 385 2007-02-13  Thiemo Seufer  <ths@mips.com>
 386
 387         * configure.ac: Add mips*-sde-elf* target.
 388         * configure: Regenerate.
 389
 390 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 391
 392         * acconfig.h: Remove.
 393         * config.in, configure: Regenerate.
 394
 395 2006-11-07  Thiemo Seufer  <ths@mips.com>
 396
 397         * dsp.igen (do_w_op): Fix compiler warning.
 398
 399 2006-08-29  Thiemo Seufer  <ths@mips.com>
 400             David Ung  <davidu@mips.com>
 401
 402         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 403         sim_igen_machine.
 404         * configure: Regenerate.
 405         * mips.igen (model): Add smartmips.
 406         (MADDU): Increment ACX if carry.
 407         (do_mult): Clear ACX.
 408         (ROR,RORV): Add smartmips.
 409         (include): Include smartmips.igen.
 410         * sim-main.h (ACX): Set to REGISTERS[89].
 411         * smartmips.igen: New file.
 412
 413 2006-08-29  Thiemo Seufer  <ths@mips.com>
 414             David Ung  <davidu@mips.com>
 415
 416         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 417         mips3264r2.igen. Add missing dependency rules.
 418         * m16e.igen: Support for mips16e save/restore instructions.
 419
 420 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 421
 422         * configure: Regenerated.
 423
 424 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 425
 426         * configure: Regenerated.
 427
 428 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 429
 430         * configure: Regenerated.
 431
 432 2006-05-15 Chao-ying Fu  <fu@mips.com>
 433
 434         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 435
 436 2006-04-18  Nick Clifton  <nickc@redhat.com>
 437
 438         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 439         statement.
 440
 441 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 442
 443         * configure: Regenerate.
 444
 445 2005-12-14  Chao-ying Fu  <fu@mips.com>
 446
 447         * Makefile.in (SIM_OBJS): Add dsp.o.
 448         (dsp.o): New dependency.
 449         (IGEN_INCLUDE): Add dsp.igen.
 450         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 451         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 452         * configure: Regenerate.
 453         * mips.igen: Add dsp model and include dsp.igen.
 454         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 455         because these instructions are extended in DSP ASE.
 456         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 457         adding 6 DSP accumulator registers and 1 DSP control register.
 458         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 459         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 460         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 461         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 462         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 463         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 464         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 465         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 466         DSPCR_CCOND_SMASK): New define.
 467         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 468         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 469
 470 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 471
 472         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 473
 474 2005-06-16  David Ung  <davidu@mips.com>
 475             Nigel Stephens  <nigel@mips.com>
 476
 477         * mips.igen: New mips16e model and include m16e.igen.
 478         (check_u64): Add mips16e tag.
 479         * m16e.igen: New file for MIPS16e instructions.
 480         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 481         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 482         models.
 483         * configure: Regenerate.
 484
 485 2005-05-26  David Ung  <davidu@mips.com>
 486
 487         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 488         tags to all instructions which are applicable to the new ISAs.
 489         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 490         vr.igen.
 491         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 492         instructions.
 493         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 494         to mips.igen.
 495         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 496         * configure: Regenerate.
 497
 498 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 499
 500         * configure: Regenerate.
 501
 502 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 503
 504         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 505         explicit call to AC_CONFIG_HEADER.
 506         * configure: Regenerate.
 507
 508 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 509
 510         * configure.ac: Update to use ../common/common.m4.
 511         * configure: Re-generate.
 512
 513 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 514
 515         * configure: Regenerated to track ../common/aclocal.m4 changes.
 516
 517 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 518
 519         * configure.ac: Rename configure.in, require autoconf 2.59.
 520         * configure: Re-generate.
 521
 522 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 523
 524         * configure: Regenerate for ../common/aclocal.m4 update.
 525
 526 2004-09-24  Monika Chaddha  <monika@acmet.com>
 527
 528         Committed by Andrew Cagney.
 529         * m16.igen (CMP, CMPI): Fix assembler.
 530
 531 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 532
 533         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 534         * configure: Regenerate.
 535
 536 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 537
 538         * configure.in (sim_m16_machine): Include mipsIII.
 539         * configure: Regenerate.
 540
 541 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 542
 543         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 544         from COP0_BADVADDR.
 545         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 546
 547 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 548
 549         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 550
 551 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 552
 553         * mips.igen (check_fmt): Remove.
 554         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 555         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 556         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 557         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 558         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 559         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 560         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 561         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 562         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 563         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 564
 565 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 566
 567         * sb1.igen (check_sbx): New function.
 568         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 569
 570 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 571             Richard Sandiford  <rsandifo@redhat.com>
 572
 573         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 574         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 575         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 576         separate implementations for mipsIV and mipsV.  Use new macros to
 577         determine whether the restrictions apply.
 578
 579 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 580
 581         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 582         (check_mult_hilo): Improve comments.
 583         (check_div_hilo): Likewise.  Also, fork off a new version
 584         to handle mips32/mips64 (since there are no hazards to check
 585         in MIPS32/MIPS64).
 586
 587 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 588
 589         * mips.igen (do_dmultx): Fix check for negative operands.
 590
 591 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 592
 593         * Makefile.in (SHELL): Make sure this is defined.
 594         (various): Use $(SHELL) whenever we invoke move-if-change.
 595
 596 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 597
 598         * cp1.c: Tweak attribution slightly.
 599         * cp1.h: Likewise.
 600         * mdmx.c: Likewise.
 601         * mdmx.igen: Likewise.
 602         * mips3d.igen: Likewise.
 603         * sb1.igen: Likewise.
 604
 605 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 606
 607         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 608         unsigned operands.
 609
 610 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 611
 612         * interp.c (sim_open): Rename _bfd to bfd.
 613         (sim_create_inferior): Ditto.
 614
 615 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 616
 617         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 618
 619 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 620
 621         * mips.igen (EI, DI): Remove.
 622
 623 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 624
 625         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 626
 627 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 628             Andrew Cagney  <ac131313@redhat.com>
 629             Gavin Romig-Koch  <gavin@redhat.com>
 630             Graydon Hoare  <graydon@redhat.com>
 631             Aldy Hernandez  <aldyh@redhat.com>
 632             Dave Brolley  <brolley@redhat.com>
 633             Chris Demetriou  <cgd@broadcom.com>
 634
 635         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 636         (sim_mach_default): New variable.
 637         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 638         Add a new simulator generator, MULTI.
 639         * configure: Regenerate.
 640         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 641         (multi-run.o): New dependency.
 642         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 643         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 644         (tmp-multi): Combine them.
 645         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 646         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 647         (distclean-extra): New rule.
 648         * sim-main.h: Include bfd.h.
 649         (MIPS_MACH): New macro.
 650         * mips.igen (vr4120, vr5400, vr5500): New models.
 651         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 652         * vr.igen: Replace with new version.
 653
 654 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 655
 656         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 657         * configure: Regenerate.
 658
 659 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 660
 661         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 662         * mips.igen: Remove all invocations of check_branch_bug and
 663         mark_branch_bug.
 664
 665 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 666
 667         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 668
 669 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 670
 671         * mips.igen (do_load_double, do_store_double): New functions.
 672         (LDC1, SDC1): Rename to...
 673         (LDC1b, SDC1b): respectively.
 674         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 675
 676 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 677
 678         * cp1.c (fp_recip2): Modify initialization expression so that
 679         GCC will recognize it as constant.
 680
 681 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 682
 683         * mdmx.c (SD_): Delete.
 684         (Unpredictable): Re-define, for now, to directly invoke
 685         unpredictable_action().
 686         (mdmx_acc_op): Fix error in .ob immediate handling.
 687
 688 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 689
 690         * interp.c (sim_firmware_command): Initialize `address'.
 691
 692 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 693
 694         * configure: Regenerated to track ../common/aclocal.m4 changes.
 695
 696 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 697             Ed Satterthwaite  <ehs@broadcom.com>
 698
 699         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 700         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 701         * mips.igen: Include mips3d.igen.
 702         (mips3d): New model name for MIPS-3D ASE instructions.
 703         (CVT.W.fmt): Don't use this instruction for word (source) format
 704         instructions.
 705         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 706         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 707         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 708         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 709         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 710         (RSquareRoot1, RSquareRoot2): New macros.
 711         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 712         (fp_rsqrt2): New functions.
 713         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 714         * configure: Regenerate.
 715
 716 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 717             Ed Satterthwaite  <ehs@broadcom.com>
 718
 719         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 720         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 721         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 722         (convert): Note that this function is not used for paired-single
 723         format conversions.
 724         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 725         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 726         (check_fmt_p): Enable paired-single support.
 727         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 728         (PUU.PS): New instructions.
 729         (CVT.S.fmt): Don't use this instruction for paired-single format
 730         destinations.
 731         * sim-main.h (FP_formats): New value 'fmt_ps.'
 732         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 733         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 734
 735 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 736
 737         * mips.igen: Fix formatting of function calls in
 738         many FP operations.
 739
 740 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 741
 742         * mips.igen (MOVN, MOVZ): Trace result.
 743         (TNEI): Print "tnei" as the opcode name in traces.
 744         (CEIL.W): Add disassembly string for traces.
 745         (RSQRT.fmt): Make location of disassembly string consistent
 746         with other instructions.
 747
 748 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 749
 750         * mips.igen (X): Delete unused function.
 751
 752 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 753
 754         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 755
 756 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 757             Ed Satterthwaite  <ehs@broadcom.com>
 758
 759         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 760         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 761         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 762         (fp_nmsub): New prototypes.
 763         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 764         (NegMultiplySub): New defines.
 765         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 766         (MADD.D, MADD.S): Replace with...
 767         (MADD.fmt): New instruction.
 768         (MSUB.D, MSUB.S): Replace with...
 769         (MSUB.fmt): New instruction.
 770         (NMADD.D, NMADD.S): Replace with...
 771         (NMADD.fmt): New instruction.
 772         (NMSUB.D, MSUB.S): Replace with...
 773         (NMSUB.fmt): New instruction.
 774
 775 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 776             Ed Satterthwaite  <ehs@broadcom.com>
 777
 778         * cp1.c: Fix more comment spelling and formatting.
 779         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 780         (denorm_mode): New function.
 781         (fpu_unary, fpu_binary): Round results after operation, collect
 782         status from rounding operations, and update the FCSR.
 783         (convert): Collect status from integer conversions and rounding
 784         operations, and update the FCSR.  Adjust NaN values that result
 785         from conversions.  Convert to use sim_io_eprintf rather than
 786         fprintf, and remove some debugging code.
 787         * cp1.h (fenr_FS): New define.
 788
 789 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 790
 791         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 792         rounding mode to sim FP rounding mode flag conversion code into...
 793         (rounding_mode): New function.
 794
 795 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 796
 797         * cp1.c: Clean up formatting of a few comments.
 798         (value_fpr): Reformat switch statement.
 799
 800 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 801             Ed Satterthwaite  <ehs@broadcom.com>
 802
 803         * cp1.h: New file.
 804         * sim-main.h: Include cp1.h.
 805         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 806         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 807         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 808         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 809         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 810         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 811         * cp1.c: Don't include sim-fpu.h; already included by
 812         sim-main.h.  Clean up formatting of some comments.
 813         (NaN, Equal, Less): Remove.
 814         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 815         (fp_cmp): New functions.
 816         * mips.igen (do_c_cond_fmt): Remove.
 817         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 818         Compare.  Add result tracing.
 819         (CxC1): Remove, replace with...
 820         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 821         (DMxC1): Remove, replace with...
 822         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 823         (MxC1): Remove, replace with...
 824         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 825
 826 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 827
 828         * sim-main.h (FGRIDX): Remove, replace all uses with...
 829         (FGR_BASE): New macro.
 830         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 831         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 832         (NR_FGR, FGR): Likewise.
 833         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 834         * mips.igen: Likewise.
 835
 836 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 837
 838         * cp1.c: Add an FSF Copyright notice to this file.
 839
 840 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 841             Ed Satterthwaite  <ehs@broadcom.com>
 842
 843         * cp1.c (Infinity): Remove.
 844         * sim-main.h (Infinity): Likewise.
 845
 846         * cp1.c (fp_unary, fp_binary): New functions.
 847         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 848         (fp_sqrt): New functions, implemented in terms of the above.
 849         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 850         (Recip, SquareRoot): Remove (replaced by functions above).
 851         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 852         (fp_recip, fp_sqrt): New prototypes.
 853         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 854         (Recip, SquareRoot): Replace prototypes with #defines which
 855         invoke the functions above.
 856
 857 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 858
 859         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 860         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 861         file, remove PARAMS from prototypes.
 862         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 863         simulator state arguments.
 864         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 865         pass simulator state arguments.
 866         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 867         (store_fpr, convert): Remove 'sd' argument.
 868         (value_fpr): Likewise.  Convert to use 'SD' instead.
 869
 870 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 871
 872         * cp1.c (Min, Max): Remove #if 0'd functions.
 873         * sim-main.h (Min, Max): Remove.
 874
 875 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 876
 877         * cp1.c: fix formatting of switch case and default labels.
 878         * interp.c: Likewise.
 879         * sim-main.c: Likewise.
 880
 881 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 882
 883         * cp1.c: Clean up comments which describe FP formats.
 884          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 885
 886 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 887             Ed Satterthwaite  <ehs@broadcom.com>
 888
 889         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 890         Broadcom SiByte SB-1 processor configurations.
 891         * configure: Regenerate.
 892         * sb1.igen: New file.
 893         * mips.igen: Include sb1.igen.
 894         (sb1): New model.
 895         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 896         * mdmx.igen: Add "sb1" model to all appropriate functions and
 897         instructions.
 898         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 899         (ob_func, ob_acc): Reference the above.
 900         (qh_acc): Adjust to keep the same size as ob_acc.
 901         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 902         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 903
 904 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 905
 906         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 907
 908 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 909             Ed Satterthwaite  <ehs@broadcom.com>
 910
 911         * mips.igen (mdmx): New (pseudo-)model.
 912         * mdmx.c, mdmx.igen: New files.
 913         * Makefile.in (SIM_OBJS): Add mdmx.o.
 914         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 915         New typedefs.
 916         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 917         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 918         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 919         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 920         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 921         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 922         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 923         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 924         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 925         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 926         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 927         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 928         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 929         (qh_fmtsel): New macros.
 930         (_sim_cpu): New member "acc".
 931         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 932         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 933
 934 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 935
 936         * interp.c: Use 'deprecated' rather than 'depreciated.'
 937         * sim-main.h: Likewise.
 938
 939 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 940
 941         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 942         which wouldn't compile anyway.
 943         * sim-main.h (unpredictable_action): New function prototype.
 944         (Unpredictable): Define to call igen function unpredictable().
 945         (NotWordValue): New macro to call igen function not_word_value().
 946         (UndefinedResult): Remove.
 947         * interp.c (undefined_result): Remove.
 948         (unpredictable_action): New function.
 949         * mips.igen (not_word_value, unpredictable): New functions.
 950         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 951         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 952         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 953         NotWordValue() to check for unpredictable inputs, then
 954         Unpredictable() to handle them.
 955
 956 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 957
 958         * mips.igen: Fix formatting of calls to Unpredictable().
 959
 960 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 961
 962         * interp.c (sim_open): Revert previous change.
 963
 964 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 965
 966         * interp.c (sim_open): Disable chunk of code that wrote code in
 967         vector table entries.
 968
 969 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 970
 971         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 972         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 973         unused definitions.
 974
 975 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 976
 977         * cp1.c: Fix many formatting issues.
 978
 979 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 980
 981         * cp1.c (fpu_format_name): New function to replace...
 982         (DOFMT): This.  Delete, and update all callers.
 983         (fpu_rounding_mode_name): New function to replace...
 984         (RMMODE): This.  Delete, and update all callers.
 985
 986 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 987
 988         * interp.c: Move FPU support routines from here to...
 989         * cp1.c: Here.  New file.
 990         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 991         (cp1.o): New target.
 992
 993 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 994
 995         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 996         * mips.igen (mips32, mips64): New models, add to all instructions
 997         and functions as appropriate.
 998         (loadstore_ea, check_u64): New variant for model mips64.
 999         (check_fmt_p): New variant for models mipsV and mips64, remove
1000         mipsV model marking fro other variant.
1001         (SLL) Rename to...
1002         (SLLa) this.
1003         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1004         for mips32 and mips64.
1005         (DCLO, DCLZ): New instructions for mips64.
1006
1007 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1008
1009         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1010         immediate or code as a hex value with the "%#lx" format.
1011         (ANDI): Likewise, and fix printed instruction name.
1012
1013 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1014
1015         * sim-main.h (UndefinedResult, Unpredictable): New macros
1016         which currently do nothing.
1017
1018 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1019
1020         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1021         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1022         (status_CU3): New definitions.
1023
1024         * sim-main.h (ExceptionCause): Add new values for MIPS32
1025         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1026         for DebugBreakPoint and NMIReset to note their status in
1027         MIPS32 and MIPS64.
1028         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1029         (SignalExceptionCacheErr): New exception macros.
1030
1031 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1032
1033         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1034         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1035         is always enabled.
1036         (SignalExceptionCoProcessorUnusable): Take as argument the
1037         unusable coprocessor number.
1038
1039 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1040
1041         * mips.igen: Fix formatting of all SignalException calls.
1042
1043 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1044
1045         * sim-main.h (SIGNEXTEND): Remove.
1046
1047 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1048
1049         * mips.igen: Remove gencode comment from top of file, fix
1050         spelling in another comment.
1051
1052 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1053
1054         * mips.igen (check_fmt, check_fmt_p): New functions to check
1055         whether specific floating point formats are usable.
1056         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1057         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1058         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1059         Use the new functions.
1060         (do_c_cond_fmt): Remove format checks...
1061         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1062
1063 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1064
1065         * mips.igen: Fix formatting of check_fpu calls.
1066
1067 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1068
1069         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1070
1071 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1072
1073         * mips.igen: Remove whitespace at end of lines.
1074
1075 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1076
1077         * mips.igen (loadstore_ea): New function to do effective
1078         address calculations.
1079         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1080         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1081         CACHE): Use loadstore_ea to do effective address computations.
1082
1083 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1084
1085         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1086         * mips.igen (LL, CxC1, MxC1): Likewise.
1087
1088 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1089
1090         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1091         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1092         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1093         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1094         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1095         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1096         Don't split opcode fields by hand, use the opcode field values
1097         provided by igen.
1098
1099 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1100
1101         * mips.igen (do_divu): Fix spacing.
1102
1103         * mips.igen (do_dsllv): Move to be right before DSLLV,
1104         to match the rest of the do_<shift> functions.
1105
1106 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1107
1108         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1109         DSRL32, do_dsrlv): Trace inputs and results.
1110
1111 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1112
1113         * mips.igen (CACHE): Provide instruction-printing string.
1114
1115         * interp.c (signal_exception): Comment tokens after #endif.
1116
1117 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1118
1119         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1120         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1121         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1122         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1123         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1124         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1125         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1126         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1127
1128 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1129
1130         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1131         instruction-printing string.
1132         (LWU): Use '64' as the filter flag.
1133
1134 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1135
1136         * mips.igen (SDXC1): Fix instruction-printing string.
1137
1138 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1139
1140         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1141         filter flags "32,f".
1142
1143 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1144
1145         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1146         as the filter flag.
1147
1148 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1149
1150         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1151         add a comma) so that it more closely match the MIPS ISA
1152         documentation opcode partitioning.
1153         (PREF): Put useful names on opcode fields, and include
1154         instruction-printing string.
1155
1156 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1157
1158         * mips.igen (check_u64): New function which in the future will
1159         check whether 64-bit instructions are usable and signal an
1160         exception if not.  Currently a no-op.
1161         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1162         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1163         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1164         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1165
1166         * mips.igen (check_fpu): New function which in the future will
1167         check whether FPU instructions are usable and signal an exception
1168         if not.  Currently a no-op.
1169         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1170         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1171         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1172         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1173         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1174         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1175         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1176         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1177
1178 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1179
1180         * mips.igen (do_load_left, do_load_right): Move to be immediately
1181         following do_load.
1182         (do_store_left, do_store_right): Move to be immediately following
1183         do_store.
1184
1185 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1186
1187         * mips.igen (mipsV): New model name.  Also, add it to
1188         all instructions and functions where it is appropriate.
1189
1190 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1191
1192         * mips.igen: For all functions and instructions, list model
1193         names that support that instruction one per line.
1194
1195 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1196
1197         * mips.igen: Add some additional comments about supported
1198         models, and about which instructions go where.
1199         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1200         order as is used in the rest of the file.
1201
1202 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1203
1204         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1205         indicating that ALU32_END or ALU64_END are there to check
1206         for overflow.
1207         (DADD): Likewise, but also remove previous comment about
1208         overflow checking.
1209
1210 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1211
1212         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1213         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1214         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1215         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1216         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1217         fields (i.e., add and move commas) so that they more closely
1218         match the MIPS ISA documentation opcode partitioning.
1219
1220 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1221
1222         * mips.igen (ADDI): Print immediate value.
1223         (BREAK): Print code.
1224         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1225         (SLL): Print "nop" specially, and don't run the code
1226         that does the shift for the "nop" case.
1227
1228 2001-11-17  Fred Fish  <fnf@redhat.com>
1229
1230         * sim-main.h (float_operation): Move enum declaration outside
1231         of _sim_cpu struct declaration.
1232
1233 2001-04-12  Jim Blandy  <jimb@redhat.com>
1234
1235         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1236         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1237         set of the FCSR.
1238         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1239         PENDING_FILL, and you can get the intended effect gracefully by
1240         calling PENDING_SCHED directly.
1241
1242 2001-02-23  Ben Elliston  <bje@redhat.com>
1243
1244         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1245         already defined elsewhere.
1246
1247 2001-02-19  Ben Elliston  <bje@redhat.com>
1248
1249         * sim-main.h (sim_monitor): Return an int.
1250         * interp.c (sim_monitor): Add return values.
1251         (signal_exception): Handle error conditions from sim_monitor.
1252
1253 2001-02-08  Ben Elliston  <bje@redhat.com>
1254
1255         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1256         (store_memory): Likewise, pass cia to sim_core_write*.
1257
1258 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1259
1260         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1261         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1262
1263 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1264
1265         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1266         * Makefile.in: Don't delete *.igen when cleaning directory.
1267
1268 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1269
1270         * m16.igen (break): Call SignalException not sim_engine_halt.
1271
1272 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1273
1274         From Jason Eckhardt:
1275         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1276
1277 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1278
1279         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1280
1281 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1282
1283         * mips.igen (do_dmultx): Fix typo.
1284
1285 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1286
1287         * configure: Regenerated to track ../common/aclocal.m4 changes.
1288
1289 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1290
1291         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1292
1293 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1294
1295         * sim-main.h (GPR_CLEAR): Define macro.
1296
1297 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1298
1299         * interp.c (decode_coproc): Output long using %lx and not %s.
1300
1301 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1302
1303         * interp.c (sim_open): Sort & extend dummy memory regions for
1304         --board=jmr3904 for eCos.
1305
1306 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1307
1308         * configure: Regenerated.
1309
1310 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1311
1312         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1313         calls, conditional on the simulator being in verbose mode.
1314
1315 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1316
1317         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1318         cache don't get ReservedInstruction traps.
1319
1320 1999-11-29  Mark Salter  <msalter@cygnus.com>
1321
1322         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1323         to clear status bits in sdisr register. This is how the hardware works.
1324
1325         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1326         being used by cygmon.
1327
1328 1999-11-11  Andrew Haley  <aph@cygnus.com>
1329
1330         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1331         instructions.
1332
1333 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1334
1335         * mips.igen (MULT): Correct previous mis-applied patch.
1336
1337 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1338
1339         * mips.igen (delayslot32): Handle sequence like
1340         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1341         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1342         (MULT): Actually pass the third register...
1343
1344 1999-09-03  Mark Salter  <msalter@cygnus.com>
1345
1346         * interp.c (sim_open): Added more memory aliases for additional
1347         hardware being touched by cygmon on jmr3904 board.
1348
1349 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1350
1351         * configure: Regenerated to track ../common/aclocal.m4 changes.
1352
1353 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1354
1355         * interp.c (sim_store_register): Handle case where client - GDB -
1356         specifies that a 4 byte register is 8 bytes in size.
1357         (sim_fetch_register): Ditto.
1358
1359 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1360
1361         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1362         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1363         (idt_monitor_base): Base address for IDT monitor traps.
1364         (pmon_monitor_base): Ditto for PMON.
1365         (lsipmon_monitor_base): Ditto for LSI PMON.
1366         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1367         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1368         (sim_firmware_command): New function.
1369         (mips_option_handler): Call it for OPTION_FIRMWARE.
1370         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1371         option was given, add no monitor by default.  Add BREAK hooks only if
1372         monitors are also there.
1373
1374 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1375
1376         * interp.c (sim_monitor): Flush output before reading input.
1377
1378 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1379
1380         * tconfig.in (SIM_HANDLES_LMA): Always define.
1381
1382 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1383
1384         From Mark Salter <msalter@cygnus.com>:
1385         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1386         (sim_open): Add setup for BSP board.
1387
1388 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1389
1390         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1391         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1392         them as unimplemented.
1393
1394 1999-05-08  Felix Lee  <flee@cygnus.com>
1395
1396         * configure: Regenerated to track ../common/aclocal.m4 changes.
1397
1398 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1399
1400         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1401
1402 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1403
1404         * configure.in: Any mips64vr5*-*-* target should have
1405         -DTARGET_ENABLE_FR=1.
1406         (default_endian): Any mips64vr*el-*-* target should default to
1407         LITTLE_ENDIAN.
1408         * configure: Re-generate.
1409
1410 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1411
1412         * mips.igen (ldl): Extend from _16_, not 32.
1413
1414 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1415
1416         * interp.c (sim_store_register): Force registers written to by GDB
1417         into an un-interpreted state.
1418
1419 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1420
1421         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1422         CPU, start periodic background I/O polls.
1423         (tx3904sio_poll): New function: periodic I/O poller.
1424
1425 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1426
1427         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1428
1429 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1430
1431         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1432         case statement.
1433
1434 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1435
1436         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1437         (load_word): Call SIM_CORE_SIGNAL hook on error.
1438         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1439         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1440         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1441         * sim-main.h (COP0_BADVADDR): Define.
1442         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1443         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1444         (_sim_cpu): Add exc_* fields to store register value snapshots.
1445         * mips.igen (*): Replace memory-related SignalException* calls
1446         with references to SIM_CORE_SIGNAL hook.
1447
1448         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1449         fix.
1450         * sim-main.c (*): Minor warning cleanups.
1451
1452 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1453
1454         * m16.igen (DADDIU5): Correct type-o.
1455
1456 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1457
1458         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1459         variables.
1460
1461 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1462
1463         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1464         to include path.
1465         (interp.o): Add dependency on itable.h
1466         (oengine.c, gencode): Delete remaining references.
1467         (BUILT_SRC_FROM_GEN): Clean up.
1468
1469 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1470
1471         * vr4run.c: New.
1472         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1473         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1474         tmp-run-hack) : New.
1475         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1476         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1477         Drop the "64" qualifier to get the HACK generator working.
1478         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1479         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1480         qualifier to get the hack generator working.
1481         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1482         (DSLL): Use do_dsll.
1483         (DSLLV): Use do_dsllv.
1484         (DSRA): Use do_dsra.
1485         (DSRL): Use do_dsrl.
1486         (DSRLV): Use do_dsrlv.
1487         (BC1): Move *vr4100 to get the HACK generator working.
1488         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1489         get the HACK generator working.
1490         (MACC) Rename to get the HACK generator working.
1491         (DMACC,MACCS,DMACCS): Add the 64.
1492
1493 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1494
1495         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1496         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1497
1498 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1499
1500     * mips/interp.c (DEBUG): Cleanups.
1501
1502 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1503
1504         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1505         (tx3904sio_tickle): fflush after a stdout character output.
1506
1507 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1508
1509         * interp.c (sim_close): Uninstall modules.
1510
1511 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1512
1513         * sim-main.h, interp.c (sim_monitor): Change to global
1514         function.
1515
1516 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1517
1518         * configure.in (vr4100): Only include vr4100 instructions in
1519         simulator.
1520         * configure: Re-generate.
1521         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1522
1523 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1524
1525         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1526         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1527         true alternative.
1528
1529         * configure.in (sim_default_gen, sim_use_gen): Replace with
1530         sim_gen.
1531         (--enable-sim-igen): Delete config option. Always using IGEN.
1532         * configure: Re-generate.
1533
1534         * Makefile.in (gencode): Kill, kill, kill.
1535         * gencode.c: Ditto.
1536
1537 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1538
1539         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1540         bit mips16 igen simulator.
1541         * configure: Re-generate.
1542
1543         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1544         as part of vr4100 ISA.
1545         * vr.igen: Mark all instructions as 64 bit only.
1546
1547 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1548
1549         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1550         Pacify GCC.
1551
1552 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1553
1554         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1555         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1556         * configure: Re-generate.
1557
1558         * m16.igen (BREAK): Define breakpoint instruction.
1559         (JALX32): Mark instruction as mips16 and not r3900.
1560         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1561
1562         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1563
1564 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1565
1566         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1567         insn as a debug breakpoint.
1568
1569         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1570         pending.slot_size.
1571         (PENDING_SCHED): Clean up trace statement.
1572         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1573         (PENDING_FILL): Delay write by only one cycle.
1574         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1575
1576         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1577         of pending writes.
1578         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1579         32 & 64.
1580         (pending_tick): Move incrementing of index to FOR statement.
1581         (pending_tick): Only update PENDING_OUT after a write has occured.
1582
1583         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1584         build simulator.
1585         * configure: Re-generate.
1586
1587         * interp.c (sim_engine_run OLD): Delete explicit call to
1588         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1589
1590 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1591
1592         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1593         interrupt level number to match changed SignalExceptionInterrupt
1594         macro.
1595
1596 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1597
1598         * interp.c: #include "itable.h" if WITH_IGEN.
1599         (get_insn_name): New function.
1600         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1601         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1602
1603 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1604
1605         * configure: Rebuilt to inhale new common/aclocal.m4.
1606
1607 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1608
1609         * dv-tx3904sio.c: Include sim-assert.h.
1610
1611 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1612
1613         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1614         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1615         Reorganize target-specific sim-hardware checks.
1616         * configure: rebuilt.
1617         * interp.c (sim_open): For tx39 target boards, set
1618         OPERATING_ENVIRONMENT, add tx3904sio devices.
1619         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1620         ROM executables.  Install dv-sockser into sim-modules list.
1621
1622         * dv-tx3904irc.c: Compiler warning clean-up.
1623         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1624         frequent hw-trace messages.
1625
1626 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1627
1628         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1629
1630 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1631
1632         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1633
1634         * vr.igen: New file.
1635         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1636         * mips.igen: Define vr4100 model. Include vr.igen.
1637 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1638
1639         * mips.igen (check_mf_hilo): Correct check.
1640
1641 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1642
1643         * sim-main.h (interrupt_event): Add prototype.
1644
1645         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1646         register_ptr, register_value.
1647         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1648
1649         * sim-main.h (tracefh): Make extern.
1650
1651 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1652
1653         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1654         Reduce unnecessarily high timer event frequency.
1655         * dv-tx3904cpu.c: Ditto for interrupt event.
1656
1657 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1658
1659         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1660         to allay warnings.
1661         (interrupt_event): Made non-static.
1662
1663         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1664         interchange of configuration values for external vs. internal
1665         clock dividers.
1666
1667 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1668
1669         * mips.igen (BREAK): Moved code to here for
1670         simulator-reserved break instructions.
1671         * gencode.c (build_instruction): Ditto.
1672         * interp.c (signal_exception): Code moved from here.  Non-
1673         reserved instructions now use exception vector, rather
1674         than halting sim.
1675         * sim-main.h: Moved magic constants to here.
1676
1677 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1678
1679         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1680         register upon non-zero interrupt event level, clear upon zero
1681         event value.
1682         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1683         by passing zero event value.
1684         (*_io_{read,write}_buffer): Endianness fixes.
1685         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1686         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1687
1688         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1689         serial I/O and timer module at base address 0xFFFF0000.
1690
1691 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1692
1693         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1694         and BigEndianCPU.
1695
1696 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1697
1698         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1699         parts.
1700         * configure: Update.
1701
1702 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1703
1704         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1705         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1706         * configure.in: Include tx3904tmr in hw_device list.
1707         * configure: Rebuilt.
1708         * interp.c (sim_open): Instantiate three timer instances.
1709         Fix address typo of tx3904irc instance.
1710
1711 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1712
1713         * interp.c (signal_exception): SystemCall exception now uses
1714         the exception vector.
1715
1716 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1717
1718         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1719         to allay warnings.
1720
1721 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1722
1723         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1724
1725 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1726
1727         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1728
1729         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1730         sim-main.h. Declare a struct hw_descriptor instead of struct
1731         hw_device_descriptor.
1732
1733 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1734
1735         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1736         right bits and then re-align left hand bytes to correct byte
1737         lanes.  Fix incorrect computation in do_store_left when loading
1738         bytes from second word.
1739
1740 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1741
1742         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1743         * interp.c (sim_open): Only create a device tree when HW is
1744         enabled.
1745
1746         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1747         * interp.c (signal_exception): Ditto.
1748
1749 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1750
1751         * gencode.c: Mark BEGEZALL as LIKELY.
1752
1753 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1754
1755         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1756         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1757
1758 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1759
1760         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1761         modules.  Recognize TX39 target with "mips*tx39" pattern.
1762         * configure: Rebuilt.
1763         * sim-main.h (*): Added many macros defining bits in
1764         TX39 control registers.
1765         (SignalInterrupt): Send actual PC instead of NULL.
1766         (SignalNMIReset): New exception type.
1767         * interp.c (board): New variable for future use to identify
1768         a particular board being simulated.
1769         (mips_option_handler,mips_options): Added "--board" option.
1770         (interrupt_event): Send actual PC.
1771         (sim_open): Make memory layout conditional on board setting.
1772         (signal_exception): Initial implementation of hardware interrupt
1773         handling.  Accept another break instruction variant for simulator
1774         exit.
1775         (decode_coproc): Implement RFE instruction for TX39.
1776         (mips.igen): Decode RFE instruction as such.
1777         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1778         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1779         bbegin to implement memory map.
1780         * dv-tx3904cpu.c: New file.
1781         * dv-tx3904irc.c: New file.
1782
1783 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1784
1785         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1786
1787 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1788
1789         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1790         with calls to check_div_hilo.
1791
1792 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1793
1794         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1795         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1796         Add special r3900 version of do_mult_hilo.
1797         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1798         with calls to check_mult_hilo.
1799         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1800         with calls to check_div_hilo.
1801
1802 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1803
1804         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1805         Document a replacement.
1806
1807 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1808
1809         * interp.c (sim_monitor): Make mon_printf work.
1810
1811 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1812
1813         * sim-main.h (INSN_NAME): New arg `cpu'.
1814
1815 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1816
1817         * configure: Regenerated to track ../common/aclocal.m4 changes.
1818
1819 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1820
1821         * configure: Regenerated to track ../common/aclocal.m4 changes.
1822         * config.in: Ditto.
1823
1824 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1825
1826         * acconfig.h: New file.
1827         * configure.in: Reverted change of Apr 24; use sinclude again.
1828
1829 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1830
1831         * configure: Regenerated to track ../common/aclocal.m4 changes.
1832         * config.in: Ditto.
1833
1834 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1835
1836         * configure.in: Don't call sinclude.
1837
1838 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1839
1840         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1841
1842 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1843
1844         * mips.igen (ERET): Implement.
1845
1846         * interp.c (decode_coproc): Return sign-extended EPC.
1847
1848         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1849
1850         * interp.c (signal_exception): Do not ignore Trap.
1851         (signal_exception): On TRAP, restart at exception address.
1852         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1853         (signal_exception): Update.
1854         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1855         so that TRAP instructions are caught.
1856
1857 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1858
1859         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1860         contains HI/LO access history.
1861         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1862         (HIACCESS, LOACCESS): Delete, replace with
1863         (HIHISTORY, LOHISTORY): New macros.
1864         (CHECKHILO): Delete all, moved to mips.igen
1865
1866         * gencode.c (build_instruction): Do not generate checks for
1867         correct HI/LO register usage.
1868
1869         * interp.c (old_engine_run): Delete checks for correct HI/LO
1870         register usage.
1871
1872         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1873         check_mf_cycles): New functions.
1874         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1875         do_divu, domultx, do_mult, do_multu): Use.
1876
1877         * tx.igen ("madd", "maddu"): Use.
1878
1879 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1880
1881         * mips.igen (DSRAV): Use function do_dsrav.
1882         (SRAV): Use new function do_srav.
1883
1884         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1885         (B): Sign extend 11 bit immediate.
1886         (EXT-B*): Shift 16 bit immediate left by 1.
1887         (ADDIU*): Don't sign extend immediate value.
1888
1889 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1890
1891         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1892
1893         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1894         functions.
1895
1896         * mips.igen (delayslot32, nullify_next_insn): New functions.
1897         (m16.igen): Always include.
1898         (do_*): Add more tracing.
1899
1900         * m16.igen (delayslot16): Add NIA argument, could be called by a
1901         32 bit MIPS16 instruction.
1902
1903         * interp.c (ifetch16): Move function from here.
1904         * sim-main.c (ifetch16): To here.
1905
1906         * sim-main.c (ifetch16, ifetch32): Update to match current
1907         implementations of LH, LW.
1908         (signal_exception): Don't print out incorrect hex value of illegal
1909         instruction.
1910
1911 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1912
1913         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1914         instruction.
1915
1916         * m16.igen: Implement MIPS16 instructions.
1917
1918         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1919         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1920         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1921         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1922         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1923         bodies of corresponding code from 32 bit insn to these.  Also used
1924         by MIPS16 versions of functions.
1925
1926         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1927         (IMEM16): Drop NR argument from macro.
1928
1929 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1930
1931         * Makefile.in (SIM_OBJS): Add sim-main.o.
1932
1933         * sim-main.h (address_translation, load_memory, store_memory,
1934         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1935         as INLINE_SIM_MAIN.
1936         (pr_addr, pr_uword64): Declare.
1937         (sim-main.c): Include when H_REVEALS_MODULE_P.
1938
1939         * interp.c (address_translation, load_memory, store_memory,
1940         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1941         from here.
1942         * sim-main.c: To here. Fix compilation problems.
1943
1944         * configure.in: Enable inlining.
1945         * configure: Re-config.
1946
1947 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * configure: Regenerated to track ../common/aclocal.m4 changes.
1950
1951 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1952
1953         * mips.igen: Include tx.igen.
1954         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1955         * tx.igen: New file, contains MADD and MADDU.
1956
1957         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1958         the hardwired constant `7'.
1959         (store_memory): Ditto.
1960         (LOADDRMASK): Move definition to sim-main.h.
1961
1962         mips.igen (MTC0): Enable for r3900.
1963         (ADDU): Add trace.
1964
1965         mips.igen (do_load_byte): Delete.
1966         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1967         do_store_right): New functions.
1968         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1969
1970         configure.in: Let the tx39 use igen again.
1971         configure: Update.
1972
1973 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1974
1975         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1976         not an address sized quantity.  Return zero for cache sizes.
1977
1978 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1979
1980         * mips.igen (r3900): r3900 does not support 64 bit integer
1981         operations.
1982
1983 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1984
1985         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1986         than igen one.
1987         * configure : Rebuild.
1988
1989 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1990
1991         * configure: Regenerated to track ../common/aclocal.m4 changes.
1992
1993 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1994
1995         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1996
1997 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1998
1999         * configure: Regenerated to track ../common/aclocal.m4 changes.
2000         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2001
2002 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2003
2004         * configure: Regenerated to track ../common/aclocal.m4 changes.
2005
2006 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2007
2008         * interp.c (Max, Min): Comment out functions. Not yet used.
2009
2010 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2011
2012         * configure: Regenerated to track ../common/aclocal.m4 changes.
2013
2014 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2015
2016         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2017         configurable settings for stand-alone simulator.
2018
2019         * configure.in: Added X11 search, just in case.
2020
2021         * configure: Regenerated.
2022
2023 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2024
2025         * interp.c (sim_write, sim_read, load_memory, store_memory):
2026         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2027
2028 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2029
2030         * sim-main.h (GETFCC): Return an unsigned value.
2031
2032 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2033
2034         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2035         (DADD): Result destination is RD not RT.
2036
2037 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2038
2039         * sim-main.h (HIACCESS, LOACCESS): Always define.
2040
2041         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2042
2043         * interp.c (sim_info): Delete.
2044
2045 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2046
2047         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2048         (mips_option_handler): New argument `cpu'.
2049         (sim_open): Update call to sim_add_option_table.
2050
2051 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2052
2053         * mips.igen (CxC1): Add tracing.
2054
2055 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2056
2057         * sim-main.h (Max, Min): Declare.
2058
2059         * interp.c (Max, Min): New functions.
2060
2061         * mips.igen (BC1): Add tracing.
2062
2063 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2064
2065         * interp.c Added memory map for stack in vr4100
2066
2067 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2068
2069         * interp.c (load_memory): Add missing "break"'s.
2070
2071 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2072
2073         * interp.c (sim_store_register, sim_fetch_register): Pass in
2074         length parameter.  Return -1.
2075
2076 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2077
2078         * interp.c: Added hardware init hook, fixed warnings.
2079
2080 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2081
2082         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2083
2084 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2085
2086         * interp.c (ifetch16): New function.
2087
2088         * sim-main.h (IMEM32): Rename IMEM.
2089         (IMEM16_IMMED): Define.
2090         (IMEM16): Define.
2091         (DELAY_SLOT): Update.
2092
2093         * m16run.c (sim_engine_run): New file.
2094
2095         * m16.igen: All instructions except LB.
2096         (LB): Call do_load_byte.
2097         * mips.igen (do_load_byte): New function.
2098         (LB): Call do_load_byte.
2099
2100         * mips.igen: Move spec for insn bit size and high bit from here.
2101         * Makefile.in (tmp-igen, tmp-m16): To here.
2102
2103         * m16.dc: New file, decode mips16 instructions.
2104
2105         * Makefile.in (SIM_NO_ALL): Define.
2106         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2107
2108 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2109
2110         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2111         point unit to 32 bit registers.
2112         * configure: Re-generate.
2113
2114 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2115
2116         * configure.in (sim_use_gen): Make IGEN the default simulator
2117         generator for generic 32 and 64 bit mips targets.
2118         * configure: Re-generate.
2119
2120 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2121
2122         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2123         bitsize.
2124
2125         * interp.c (sim_fetch_register, sim_store_register): Read/write
2126         FGR from correct location.
2127         (sim_open): Set size of FGR's according to
2128         WITH_TARGET_FLOATING_POINT_BITSIZE.
2129
2130         * sim-main.h (FGR): Store floating point registers in a separate
2131         array.
2132
2133 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2134
2135         * configure: Regenerated to track ../common/aclocal.m4 changes.
2136
2137 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2138
2139         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2140
2141         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2142
2143         * interp.c (pending_tick): New function.  Deliver pending writes.
2144
2145         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2146         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2147         it can handle mixed sized quantites and single bits.
2148
2149 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2150
2151         * interp.c (oengine.h): Do not include when building with IGEN.
2152         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2153         (sim_info): Ditto for PROCESSOR_64BIT.
2154         (sim_monitor): Replace ut_reg with unsigned_word.
2155         (*): Ditto for t_reg.
2156         (LOADDRMASK): Define.
2157         (sim_open): Remove defunct check that host FP is IEEE compliant,
2158         using software to emulate floating point.
2159         (value_fpr, ...): Always compile, was conditional on HASFPU.
2160
2161 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2162
2163         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2164         size.
2165
2166         * interp.c (SD, CPU): Define.
2167         (mips_option_handler): Set flags in each CPU.
2168         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2169         (sim_close): Do not clear STATE, deleted anyway.
2170         (sim_write, sim_read): Assume CPU zero's vm should be used for
2171         data transfers.
2172         (sim_create_inferior): Set the PC for all processors.
2173         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2174         argument.
2175         (mips16_entry): Pass correct nr of args to store_word, load_word.
2176         (ColdReset): Cold reset all cpu's.
2177         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2178         (sim_monitor, load_memory, store_memory, signal_exception): Use
2179         `CPU' instead of STATE_CPU.
2180
2181
2182         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2183         SD or CPU_.
2184
2185         * sim-main.h (signal_exception): Add sim_cpu arg.
2186         (SignalException*): Pass both SD and CPU to signal_exception.
2187         * interp.c (signal_exception): Update.
2188
2189         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2190         Ditto
2191         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2192         address_translation): Ditto
2193         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2194
2195 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2196
2197         * configure: Regenerated to track ../common/aclocal.m4 changes.
2198
2199 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2200
2201         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2202
2203         * mips.igen (model): Map processor names onto BFD name.
2204
2205         * sim-main.h (CPU_CIA): Delete.
2206         (SET_CIA, GET_CIA): Define
2207
2208 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2209
2210         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2211         regiser.
2212
2213         * configure.in (default_endian): Configure a big-endian simulator
2214         by default.
2215         * configure: Re-generate.
2216
2217 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2218
2219         * configure: Regenerated to track ../common/aclocal.m4 changes.
2220
2221 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2222
2223         * interp.c (sim_monitor): Handle Densan monitor outbyte
2224         and inbyte functions.
2225
2226 1997-12-29  Felix Lee  <flee@cygnus.com>
2227
2228         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2229
2230 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2231
2232         * Makefile.in (tmp-igen): Arrange for $zero to always be
2233         reset to zero after every instruction.
2234
2235 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2236
2237         * configure: Regenerated to track ../common/aclocal.m4 changes.
2238         * config.in: Ditto.
2239
2240 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2241
2242         * mips.igen (MSUB): Fix to work like MADD.
2243         * gencode.c (MSUB): Similarly.
2244
2245 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2246
2247         * configure: Regenerated to track ../common/aclocal.m4 changes.
2248
2249 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2250
2251         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2252
2253 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2254
2255         * sim-main.h (sim-fpu.h): Include.
2256
2257         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2258         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2259         using host independant sim_fpu module.
2260
2261 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2262
2263         * interp.c (signal_exception): Report internal errors with SIGABRT
2264         not SIGQUIT.
2265
2266         * sim-main.h (C0_CONFIG): New register.
2267         (signal.h): No longer include.
2268
2269         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2270
2271 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2272
2273         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2274
2275 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * mips.igen: Tag vr5000 instructions.
2278         (ANDI): Was missing mipsIV model, fix assembler syntax.
2279         (do_c_cond_fmt): New function.
2280         (C.cond.fmt): Handle mips I-III which do not support CC field
2281         separatly.
2282         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2283         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2284         in IV3.2 spec.
2285         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2286         vr5000 which saves LO in a GPR separatly.
2287
2288         * configure.in (enable-sim-igen): For vr5000, select vr5000
2289         specific instructions.
2290         * configure: Re-generate.
2291
2292 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2293
2294         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2295
2296         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2297         fmt_uninterpreted_64 bit cases to switch.  Convert to
2298         fmt_formatted,
2299
2300         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2301
2302         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2303         as specified in IV3.2 spec.
2304         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2305
2306 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2307
2308         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2309         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2310         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2311         PENDING_FILL versions of instructions.  Simplify.
2312         (X): New function.
2313         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2314         instructions.
2315         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2316         a signed value.
2317         (MTHI, MFHI): Disable code checking HI-LO.
2318
2319         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2320         global.
2321         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2322
2323 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2324
2325         * gencode.c (build_mips16_operands): Replace IPC with cia.
2326
2327         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2328         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2329         IPC to `cia'.
2330         (UndefinedResult): Replace function with macro/function
2331         combination.
2332         (sim_engine_run): Don't save PC in IPC.
2333
2334         * sim-main.h (IPC): Delete.
2335
2336
2337         * interp.c (signal_exception, store_word, load_word,
2338         address_translation, load_memory, store_memory, cache_op,
2339         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2340         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2341         current instruction address - cia - argument.
2342         (sim_read, sim_write): Call address_translation directly.
2343         (sim_engine_run): Rename variable vaddr to cia.
2344         (signal_exception): Pass cia to sim_monitor
2345
2346         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2347         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2348         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2349
2350         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2351         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2352         SIM_ASSERT.
2353
2354         * interp.c (signal_exception): Pass restart address to
2355         sim_engine_restart.
2356
2357         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2358         idecode.o): Add dependency.
2359
2360         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2361         Delete definitions
2362         (DELAY_SLOT): Update NIA not PC with branch address.
2363         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2364
2365         * mips.igen: Use CIA not PC in branch calculations.
2366         (illegal): Call SignalException.
2367         (BEQ, ADDIU): Fix assembler.
2368
2369 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2370
2371         * m16.igen (JALX): Was missing.
2372
2373         * configure.in (enable-sim-igen): New configuration option.
2374         * configure: Re-generate.
2375
2376         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2377
2378         * interp.c (load_memory, store_memory): Delete parameter RAW.
2379         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2380         bypassing {load,store}_memory.
2381
2382         * sim-main.h (ByteSwapMem): Delete definition.
2383
2384         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2385
2386         * interp.c (sim_do_command, sim_commands): Delete mips specific
2387         commands.  Handled by module sim-options.
2388
2389         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2390         (WITH_MODULO_MEMORY): Define.
2391
2392         * interp.c (sim_info): Delete code printing memory size.
2393
2394         * interp.c (mips_size): Nee sim_size, delete function.
2395         (power2): Delete.
2396         (monitor, monitor_base, monitor_size): Delete global variables.
2397         (sim_open, sim_close): Delete code creating monitor and other
2398         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2399         manage memory regions.
2400         (load_memory, store_memory): Use sim-core for memory model.
2401
2402         * interp.c (address_translation): Delete all memory map code
2403         except line forcing 32 bit addresses.
2404
2405 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2408         trace options.
2409
2410         * interp.c (logfh, logfile): Delete globals.
2411         (sim_open, sim_close): Delete code opening & closing log file.
2412         (mips_option_handler): Delete -l and -n options.
2413         (OPTION mips_options): Ditto.
2414
2415         * interp.c (OPTION mips_options): Rename option trace to dinero.
2416         (mips_option_handler): Update.
2417
2418 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2419
2420         * interp.c (fetch_str): New function.
2421         (sim_monitor): Rewrite using sim_read & sim_write.
2422         (sim_open): Check magic number.
2423         (sim_open): Write monitor vectors into memory using sim_write.
2424         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2425         (sim_read, sim_write): Simplify - transfer data one byte at a
2426         time.
2427         (load_memory, store_memory): Clarify meaning of parameter RAW.
2428
2429         * sim-main.h (isHOST): Defete definition.
2430         (isTARGET): Mark as depreciated.
2431         (address_translation): Delete parameter HOST.
2432
2433         * interp.c (address_translation): Delete parameter HOST.
2434
2435 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2436
2437         * mips.igen:
2438
2439         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2440         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2441
2442 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * mips.igen: Add model filter field to records.
2445
2446 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2447
2448         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2449
2450         interp.c (sim_engine_run): Do not compile function sim_engine_run
2451         when WITH_IGEN == 1.
2452
2453         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2454         target architecture.
2455
2456         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2457         igen. Replace with configuration variables sim_igen_flags /
2458         sim_m16_flags.
2459
2460         * m16.igen: New file.  Copy mips16 insns here.
2461         * mips.igen: From here.
2462
2463 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2464
2465         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2466         to top.
2467         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2468
2469 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2470
2471         * gencode.c (build_instruction): Follow sim_write's lead in using
2472         BigEndianMem instead of !ByteSwapMem.
2473
2474 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2475
2476         * configure.in (sim_gen): Dependent on target, select type of
2477         generator.  Always select old style generator.
2478
2479         configure: Re-generate.
2480
2481         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2482         targets.
2483         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2484         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2485         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2486         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2487         SIM_@sim_gen@_*, set by autoconf.
2488
2489 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2490
2491         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2492
2493         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2494         CURRENT_FLOATING_POINT instead.
2495
2496         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2497         (address_translation): Raise exception InstructionFetch when
2498         translation fails and isINSTRUCTION.
2499
2500         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2501         sim_engine_run): Change type of of vaddr and paddr to
2502         address_word.
2503         (address_translation, prefetch, load_memory, store_memory,
2504         cache_op): Change type of vAddr and pAddr to address_word.
2505
2506         * gencode.c (build_instruction): Change type of vaddr and paddr to
2507         address_word.
2508
2509 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2510
2511         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2512         macro to obtain result of ALU op.
2513
2514 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2515
2516         * interp.c (sim_info): Call profile_print.
2517
2518 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2519
2520         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2521
2522         * sim-main.h (WITH_PROFILE): Do not define, defined in
2523         common/sim-config.h.  Use sim-profile module.
2524         (simPROFILE): Delete defintion.
2525
2526         * interp.c (PROFILE): Delete definition.
2527         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2528         (sim_close): Delete code writing profile histogram.
2529         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2530         Delete.
2531         (sim_engine_run): Delete code profiling the PC.
2532
2533 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2534
2535         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2536
2537         * interp.c (sim_monitor): Make register pointers of type
2538         unsigned_word*.
2539
2540         * sim-main.h: Make registers of type unsigned_word not
2541         signed_word.
2542
2543 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2544
2545         * interp.c (sync_operation): Rename from SyncOperation, make
2546         global, add SD argument.
2547         (prefetch): Rename from Prefetch, make global, add SD argument.
2548         (decode_coproc): Make global.
2549
2550         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2551
2552         * gencode.c (build_instruction): Generate DecodeCoproc not
2553         decode_coproc calls.
2554
2555         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2556         (SizeFGR): Move to sim-main.h
2557         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2558         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2559         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2560         sim-main.h.
2561         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2562         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2563         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2564         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2565         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2566         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2567
2568         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2569         exception.
2570         (sim-alu.h): Include.
2571         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2572         (sim_cia): Typedef to instruction_address.
2573
2574 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2575
2576         * Makefile.in (interp.o): Rename generated file engine.c to
2577         oengine.c.
2578
2579         * interp.c: Update.
2580
2581 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2584
2585 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * gencode.c (build_instruction): For "FPSQRT", output correct
2588         number of arguments to Recip.
2589
2590 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2591
2592         * Makefile.in (interp.o): Depends on sim-main.h
2593
2594         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2595
2596         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2597         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2598         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2599         STATE, DSSTATE): Define
2600         (GPR, FGRIDX, ..): Define.
2601
2602         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2603         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2604         (GPR, FGRIDX, ...): Delete macros.
2605
2606         * interp.c: Update names to match defines from sim-main.h
2607
2608 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2609
2610         * interp.c (sim_monitor): Add SD argument.
2611         (sim_warning): Delete.  Replace calls with calls to
2612         sim_io_eprintf.
2613         (sim_error): Delete. Replace calls with sim_io_error.
2614         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2615         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2616         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2617         argument.
2618         (mips_size): Rename from sim_size. Add SD argument.
2619
2620         * interp.c (simulator): Delete global variable.
2621         (callback): Delete global variable.
2622         (mips_option_handler, sim_open, sim_write, sim_read,
2623         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2624         sim_size,sim_monitor): Use sim_io_* not callback->*.
2625         (sim_open): ZALLOC simulator struct.
2626         (PROFILE): Do not define.
2627
2628 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2629
2630         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2631         support.h with corresponding code.
2632
2633         * sim-main.h (word64, uword64), support.h: Move definition to
2634         sim-main.h.
2635         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2636
2637         * support.h: Delete
2638         * Makefile.in: Update dependencies
2639         * interp.c: Do not include.
2640
2641 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2642
2643         * interp.c (address_translation, load_memory, store_memory,
2644         cache_op): Rename to from AddressTranslation et.al., make global,
2645         add SD argument
2646
2647         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2648         CacheOp): Define.
2649
2650         * interp.c (SignalException): Rename to signal_exception, make
2651         global.
2652
2653         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2654
2655         * sim-main.h (SignalException, SignalExceptionInterrupt,
2656         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2657         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2658         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2659         Define.
2660
2661         * interp.c, support.h: Use.
2662
2663 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2664
2665         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2666         to value_fpr / store_fpr. Add SD argument.
2667         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2668         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2669
2670         * sim-main.h (ValueFPR, StoreFPR): Define.
2671
2672 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2673
2674         * interp.c (sim_engine_run): Check consistency between configure
2675         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2676         and HASFPU.
2677
2678         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2679         (mips_fpu): Configure WITH_FLOATING_POINT.
2680         (mips_endian): Configure WITH_TARGET_ENDIAN.
2681         * configure: Update.
2682
2683 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2684
2685         * configure: Regenerated to track ../common/aclocal.m4 changes.
2686
2687 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2688
2689         * configure: Regenerated.
2690
2691 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2692
2693         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2694
2695 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2696
2697         * gencode.c (print_igen_insn_models): Assume certain architectures
2698         include all mips* instructions.
2699         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2700         instruction.
2701
2702         * Makefile.in (tmp.igen): Add target. Generate igen input from
2703         gencode file.
2704
2705         * gencode.c (FEATURE_IGEN): Define.
2706         (main): Add --igen option.  Generate output in igen format.
2707         (process_instructions): Format output according to igen option.
2708         (print_igen_insn_format): New function.
2709         (print_igen_insn_models): New function.
2710         (process_instructions): Only issue warnings and ignore
2711         instructions when no FEATURE_IGEN.
2712
2713 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2714
2715         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2716         MIPS targets.
2717
2718 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2719
2720         * configure: Regenerated to track ../common/aclocal.m4 changes.
2721
2722 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2723
2724         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2725         SIM_RESERVED_BITS): Delete, moved to common.
2726         (SIM_EXTRA_CFLAGS): Update.
2727
2728 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2729
2730         * configure.in: Configure non-strict memory alignment.
2731         * configure: Regenerated to track ../common/aclocal.m4 changes.
2732
2733 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2734
2735         * configure: Regenerated to track ../common/aclocal.m4 changes.
2736
2737 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2738
2739         * gencode.c (SDBBP,DERET): Added (3900) insns.
2740         (RFE): Turn on for 3900.
2741         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2742         (dsstate): Made global.
2743         (SUBTARGET_R3900): Added.
2744         (CANCELDELAYSLOT): New.
2745         (SignalException): Ignore SystemCall rather than ignore and
2746         terminate.  Add DebugBreakPoint handling.
2747         (decode_coproc): New insns RFE, DERET; and new registers Debug
2748         and DEPC protected by SUBTARGET_R3900.
2749         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2750         bits explicitly.
2751         * Makefile.in,configure.in: Add mips subtarget option.
2752         * configure: Update.
2753
2754 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2755
2756         * gencode.c: Add r3900 (tx39).
2757
2758
2759 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2760
2761         * gencode.c (build_instruction): Don't need to subtract 4 for
2762         JALR, just 2.
2763
2764 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2765
2766         * interp.c: Correct some HASFPU problems.
2767
2768 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2769
2770         * configure: Regenerated to track ../common/aclocal.m4 changes.
2771
2772 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2773
2774         * interp.c (mips_options): Fix samples option short form, should
2775         be `x'.
2776
2777 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2778
2779         * interp.c (sim_info): Enable info code.  Was just returning.
2780
2781 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2782
2783         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2784         MFC0.
2785
2786 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2787
2788         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2789         constants.
2790         (build_instruction): Ditto for LL.
2791
2792 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2793
2794         * configure: Regenerated to track ../common/aclocal.m4 changes.
2795
2796 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2797
2798         * configure: Regenerated to track ../common/aclocal.m4 changes.
2799         * config.in: Ditto.
2800
2801 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2802
2803         * interp.c (sim_open): Add call to sim_analyze_program, update
2804         call to sim_config.
2805
2806 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2807
2808         * interp.c (sim_kill): Delete.
2809         (sim_create_inferior): Add ABFD argument. Set PC from same.
2810         (sim_load): Move code initializing trap handlers from here.
2811         (sim_open): To here.
2812         (sim_load): Delete, use sim-hload.c.
2813
2814         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2815
2816 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2817
2818         * configure: Regenerated to track ../common/aclocal.m4 changes.
2819         * config.in: Ditto.
2820
2821 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2822
2823         * interp.c (sim_open): Add ABFD argument.
2824         (sim_load): Move call to sim_config from here.
2825         (sim_open): To here.  Check return status.
2826
2827 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2828
2829         * gencode.c (build_instruction): Two arg MADD should
2830         not assign result to $0.
2831
2832 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2833
2834         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2835         * sim/mips/configure.in: Regenerate.
2836
2837 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2838
2839         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2840         signed8, unsigned8 et.al. types.
2841
2842         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2843         hosts when selecting subreg.
2844
2845 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2846
2847         * interp.c (sim_engine_run): Reset the ZERO register to zero
2848         regardless of FEATURE_WARN_ZERO.
2849         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2850
2851 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2852
2853         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2854         (SignalException): For BreakPoints ignore any mode bits and just
2855         save the PC.
2856         (SignalException): Always set the CAUSE register.
2857
2858 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2859
2860         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2861         exception has been taken.
2862
2863         * interp.c: Implement the ERET and mt/f sr instructions.
2864
2865 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2866
2867         * interp.c (SignalException): Don't bother restarting an
2868         interrupt.
2869
2870 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2871
2872         * interp.c (SignalException): Really take an interrupt.
2873         (interrupt_event): Only deliver interrupts when enabled.
2874
2875 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2876
2877         * interp.c (sim_info): Only print info when verbose.
2878         (sim_info) Use sim_io_printf for output.
2879
2880 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2881
2882         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2883         mips architectures.
2884
2885 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2886
2887         * interp.c (sim_do_command): Check for common commands if a
2888         simulator specific command fails.
2889
2890 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2891
2892         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2893         and simBE when DEBUG is defined.
2894
2895 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2896
2897         * interp.c (interrupt_event): New function.  Pass exception event
2898         onto exception handler.
2899
2900         * configure.in: Check for stdlib.h.
2901         * configure: Regenerate.
2902
2903         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2904         variable declaration.
2905         (build_instruction): Initialize memval1.
2906         (build_instruction): Add UNUSED attribute to byte, bigend,
2907         reverse.
2908         (build_operands): Ditto.
2909
2910         * interp.c: Fix GCC warnings.
2911         (sim_get_quit_code): Delete.
2912
2913         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2914         * Makefile.in: Ditto.
2915         * configure: Re-generate.
2916
2917         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2918
2919 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2920
2921         * interp.c (mips_option_handler): New function parse argumes using
2922         sim-options.
2923         (myname): Replace with STATE_MY_NAME.
2924         (sim_open): Delete check for host endianness - performed by
2925         sim_config.
2926         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2927         (sim_open): Move much of the initialization from here.
2928         (sim_load): To here.  After the image has been loaded and
2929         endianness set.
2930         (sim_open): Move ColdReset from here.
2931         (sim_create_inferior): To here.
2932         (sim_open): Make FP check less dependant on host endianness.
2933
2934         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2935         run.
2936         * interp.c (sim_set_callbacks): Delete.
2937
2938         * interp.c (membank, membank_base, membank_size): Replace with
2939         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2940         (sim_open): Remove call to callback->init. gdb/run do this.
2941
2942         * interp.c: Update
2943
2944         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2945
2946         * interp.c (big_endian_p): Delete, replaced by
2947         current_target_byte_order.
2948
2949 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * interp.c (host_read_long, host_read_word, host_swap_word,
2952         host_swap_long): Delete. Using common sim-endian.
2953         (sim_fetch_register, sim_store_register): Use H2T.
2954         (pipeline_ticks): Delete.  Handled by sim-events.
2955         (sim_info): Update.
2956         (sim_engine_run): Update.
2957
2958 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2959
2960         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2961         reason from here.
2962         (SignalException): To here. Signal using sim_engine_halt.
2963         (sim_stop_reason): Delete, moved to common.
2964
2965 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2966
2967         * interp.c (sim_open): Add callback argument.
2968         (sim_set_callbacks): Delete SIM_DESC argument.
2969         (sim_size): Ditto.
2970
2971 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2972
2973         * Makefile.in (SIM_OBJS): Add common modules.
2974
2975         * interp.c (sim_set_callbacks): Also set SD callback.
2976         (set_endianness, xfer_*, swap_*): Delete.
2977         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2978         Change to functions using sim-endian macros.
2979         (control_c, sim_stop): Delete, use common version.
2980         (simulate): Convert into.
2981         (sim_engine_run): This function.
2982         (sim_resume): Delete.
2983
2984         * interp.c (simulation): New variable - the simulator object.
2985         (sim_kind): Delete global - merged into simulation.
2986         (sim_load): Cleanup.  Move PC assignment from here.
2987         (sim_create_inferior): To here.
2988
2989         * sim-main.h: New file.
2990         * interp.c (sim-main.h): Include.
2991
2992 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2993
2994         * configure: Regenerated to track ../common/aclocal.m4 changes.
2995
2996 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2997
2998         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2999
3000 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3001
3002         * gencode.c (build_instruction): DIV instructions: check
3003         for division by zero and integer overflow before using
3004         host's division operation.
3005
3006 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3007
3008         * Makefile.in (SIM_OBJS): Add sim-load.o.
3009         * interp.c: #include bfd.h.
3010         (target_byte_order): Delete.
3011         (sim_kind, myname, big_endian_p): New static locals.
3012         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3013         after argument parsing.  Recognize -E arg, set endianness accordingly.
3014         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3015         load file into simulator.  Set PC from bfd.
3016         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3017         (set_endianness): Use big_endian_p instead of target_byte_order.
3018
3019 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3020
3021         * interp.c (sim_size): Delete prototype - conflicts with
3022         definition in remote-sim.h.  Correct definition.
3023
3024 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3025
3026         * configure: Regenerated to track ../common/aclocal.m4 changes.
3027         * config.in: Ditto.
3028
3029 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3030
3031         * interp.c (sim_open): New arg `kind'.
3032
3033         * configure: Regenerated to track ../common/aclocal.m4 changes.
3034
3035 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3036
3037         * configure: Regenerated to track ../common/aclocal.m4 changes.
3038
3039 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3040
3041         * interp.c (sim_open): Set optind to 0 before calling getopt.
3042
3043 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3044
3045         * configure: Regenerated to track ../common/aclocal.m4 changes.
3046
3047 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3048
3049         * interp.c : Replace uses of pr_addr with pr_uword64
3050         where the bit length is always 64 independent of SIM_ADDR.
3051         (pr_uword64) : added.
3052
3053 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3054
3055         * configure: Re-generate.
3056
3057 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3058
3059         * configure: Regenerate to track ../common/aclocal.m4 changes.
3060
3061 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3062
3063         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3064         in argv form.
3065         (other sim_*): New SIM_DESC argument.
3066
3067 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3068
3069         * interp.c: Fix printing of addresses for non-64-bit targets.
3070         (pr_addr): Add function to print address based on size.
3071
3072 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3073
3074         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3075
3076 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3077
3078         * gencode.c (build_mips16_operands): Correct computation of base
3079         address for extended PC relative instruction.
3080
3081 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3082
3083         * interp.c (mips16_entry): Add support for floating point cases.
3084         (SignalException): Pass floating point cases to mips16_entry.
3085         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3086         registers.
3087         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3088         or fmt_word.
3089         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3090         and then set the state to fmt_uninterpreted.
3091         (COP_SW): Temporarily set the state to fmt_word while calling
3092         ValueFPR.
3093
3094 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3095
3096         * gencode.c (build_instruction): The high order may be set in the
3097         comparison flags at any ISA level, not just ISA 4.
3098
3099 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3100
3101         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3102         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3103         * configure.in: sinclude ../common/aclocal.m4.
3104         * configure: Regenerated.
3105
3106 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3107
3108         * configure: Rebuild after change to aclocal.m4.
3109
3110 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3111
3112         * configure configure.in Makefile.in:  Update to new configure
3113         scheme which is more compatible with WinGDB builds.
3114         * configure.in:  Improve comment on how to run autoconf.
3115         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3116         * Makefile.in:  Use autoconf substitution to install common
3117         makefile fragment.
3118
3119 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3120
3121         * gencode.c (build_instruction): Use BigEndianCPU instead of
3122         ByteSwapMem.
3123
3124 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3125
3126         * interp.c (sim_monitor): Make output to stdout visible in
3127         wingdb's I/O log window.
3128
3129 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3130
3131         * support.h: Undo previous change to SIGTRAP
3132         and SIGQUIT values.
3133
3134 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3135
3136         * interp.c (store_word, load_word): New static functions.
3137         (mips16_entry): New static function.
3138         (SignalException): Look for mips16 entry and exit instructions.
3139         (simulate): Use the correct index when setting fpr_state after
3140         doing a pending move.
3141
3142 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3143
3144         * interp.c: Fix byte-swapping code throughout to work on
3145         both little- and big-endian hosts.
3146
3147 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3148
3149         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3150         with gdb/config/i386/xm-windows.h.
3151
3152 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3153
3154         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3155         that messes up arithmetic shifts.
3156
3157 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3158
3159         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3160         SIGTRAP and SIGQUIT for _WIN32.
3161
3162 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3163
3164         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3165         force a 64 bit multiplication.
3166         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3167         destination register is 0, since that is the default mips16 nop
3168         instruction.
3169
3170 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3171
3172         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3173         (build_endian_shift): Don't check proc64.
3174         (build_instruction): Always set memval to uword64.  Cast op2 to
3175         uword64 when shifting it left in memory instructions.  Always use
3176         the same code for stores--don't special case proc64.
3177
3178         * gencode.c (build_mips16_operands): Fix base PC value for PC
3179         relative operands.
3180         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3181         jal instruction.
3182         * interp.c (simJALDELAYSLOT): Define.
3183         (JALDELAYSLOT): Define.
3184         (INDELAYSLOT, INJALDELAYSLOT): Define.
3185         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3186
3187 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3188
3189         * interp.c (sim_open): add flush_cache as a PMON routine
3190         (sim_monitor): handle flush_cache by ignoring it
3191
3192 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3193
3194         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3195         BigEndianMem.
3196         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3197         (BigEndianMem): Rename to ByteSwapMem and change sense.
3198         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3199         BigEndianMem references to !ByteSwapMem.
3200         (set_endianness): New function, with prototype.
3201         (sim_open): Call set_endianness.
3202         (sim_info): Use simBE instead of BigEndianMem.
3203         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3204         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3205         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3206         ifdefs, keeping the prototype declaration.
3207         (swap_word): Rewrite correctly.
3208         (ColdReset): Delete references to CONFIG.  Delete endianness related
3209         code; moved to set_endianness.
3210
3211 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3212
3213         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3214         * interp.c (CHECKHILO): Define away.
3215         (simSIGINT): New macro.
3216         (membank_size): Increase from 1MB to 2MB.
3217         (control_c): New function.
3218         (sim_resume): Rename parameter signal to signal_number.  Add local
3219         variable prev.  Call signal before and after simulate.
3220         (sim_stop_reason): Add simSIGINT support.
3221         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3222         functions always.
3223         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3224         if logfh is NULL.
3225         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3226         a call to sim_warning.
3227
3228 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3229
3230         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3231         16 bit instructions.
3232
3233 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3234
3235         Add support for mips16 (16 bit MIPS implementation):
3236         * gencode.c (inst_type): Add mips16 instruction encoding types.
3237         (GETDATASIZEINSN): Define.
3238         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3239         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3240         mtlo.
3241         (MIPS16_DECODE): New table, for mips16 instructions.
3242         (bitmap_val): New static function.
3243         (struct mips16_op): Define.
3244         (mips16_op_table): New table, for mips16 operands.
3245         (build_mips16_operands): New static function.
3246         (process_instructions): If PC is odd, decode a mips16
3247         instruction.  Break out instruction handling into new
3248         build_instruction function.
3249         (build_instruction): New static function, broken out of
3250         process_instructions.  Check modifiers rather than flags for SHIFT
3251         bit count and m[ft]{hi,lo} direction.
3252         (usage): Pass program name to fprintf.
3253         (main): Remove unused variable this_option_optind.  Change
3254         ``*loptarg++'' to ``loptarg++''.
3255         (my_strtoul): Parenthesize && within ||.
3256         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3257         (simulate): If PC is odd, fetch a 16 bit instruction, and
3258         increment PC by 2 rather than 4.
3259         * configure.in: Add case for mips16*-*-*.
3260         * configure: Rebuild.
3261
3262 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3263
3264         * interp.c: Allow -t to enable tracing in standalone simulator.
3265         Fix garbage output in trace file and error messages.
3266
3267 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3268
3269         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3270         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3271         * configure.in: Simplify using macros in ../common/aclocal.m4.
3272         * configure: Regenerated.
3273         * tconfig.in: New file.
3274
3275 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3276
3277         * interp.c: Fix bugs in 64-bit port.
3278         Use ansi function declarations for msvc compiler.
3279         Initialize and test file pointer in trace code.
3280         Prevent duplicate definition of LAST_EMED_REGNUM.
3281
3282 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3283
3284         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3285
3286 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3287
3288         * interp.c (SignalException): Check for explicit terminating
3289         breakpoint value.
3290         * gencode.c: Pass instruction value through SignalException()
3291         calls for Trap, Breakpoint and Syscall.
3292
3293 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3294
3295         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3296         only used on those hosts that provide it.
3297         * configure.in: Add sqrt() to list of functions to be checked for.
3298         * config.in: Re-generated.
3299         * configure: Re-generated.
3300
3301 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3302
3303         * gencode.c (process_instructions): Call build_endian_shift when
3304         expanding STORE RIGHT, to fix swr.
3305         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3306         clear the high bits.
3307         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3308         Fix float to int conversions to produce signed values.
3309
3310 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3311
3312         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3313         (process_instructions): Correct handling of nor instruction.
3314         Correct shift count for 32 bit shift instructions. Correct sign
3315         extension for arithmetic shifts to not shift the number of bits in
3316         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3317         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3318         Fix madd.
3319         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3320         It's OK to have a mult follow a mult.  What's not OK is to have a
3321         mult follow an mfhi.
3322         (Convert): Comment out incorrect rounding code.
3323
3324 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3325
3326         * interp.c (sim_monitor): Improved monitor printf
3327         simulation. Tidied up simulator warnings, and added "--log" option
3328         for directing warning message output.
3329         * gencode.c: Use sim_warning() rather than WARNING macro.
3330
3331 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3332
3333         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3334         getopt1.o, rather than on gencode.c.  Link objects together.
3335         Don't link against -liberty.
3336         (gencode.o, getopt.o, getopt1.o): New targets.
3337         * gencode.c: Include <ctype.h> and "ansidecl.h".
3338         (AND): Undefine after including "ansidecl.h".
3339         (ULONG_MAX): Define if not defined.
3340         (OP_*): Don't define macros; now defined in opcode/mips.h.
3341         (main): Call my_strtoul rather than strtoul.
3342         (my_strtoul): New static function.
3343
3344 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3345
3346         * gencode.c (process_instructions):  Generate word64 and uword64
3347         instead of `long long' and `unsigned long long' data types.
3348         * interp.c:  #include sysdep.h to get signals, and define default
3349         for SIGBUS.
3350         * (Convert):  Work around for Visual-C++ compiler bug with type
3351         conversion.
3352         * support.h:  Make things compile under Visual-C++ by using
3353         __int64 instead of `long long'.  Change many refs to long long
3354         into word64/uword64 typedefs.
3355
3356 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3357
3358         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3359         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3360         (docdir): Removed.
3361         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3362         (AC_PROG_INSTALL): Added.
3363         (AC_PROG_CC): Moved to before configure.host call.
3364         * configure: Rebuilt.
3365
3366 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3367
3368         * configure.in: Define @SIMCONF@ depending on mips target.
3369         * configure: Rebuild.
3370         * Makefile.in (run): Add @SIMCONF@ to control simulator
3371         construction.
3372         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3373         * interp.c: Remove some debugging, provide more detailed error
3374         messages, update memory accesses to use LOADDRMASK.
3375
3376 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3377
3378         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3379         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3380         stamp-h.
3381         * configure: Rebuild.
3382         * config.in: New file, generated by autoheader.
3383         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3384         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3385         HAVE_ANINT and HAVE_AINT, as appropriate.
3386         * Makefile.in (run): Use @LIBS@ rather than -lm.
3387         (interp.o): Depend upon config.h.
3388         (Makefile): Just rebuild Makefile.
3389         (clean): Remove stamp-h.
3390         (mostlyclean): Make the same as clean, not as distclean.
3391         (config.h, stamp-h): New targets.
3392
3393 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3394
3395         * interp.c (ColdReset): Fix boolean test. Make all simulator
3396         globals static.
3397
3398 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3399
3400         * interp.c (xfer_direct_word, xfer_direct_long,
3401         swap_direct_word, swap_direct_long, xfer_big_word,
3402         xfer_big_long, xfer_little_word, xfer_little_long,
3403         swap_word,swap_long): Added.
3404         * interp.c (ColdReset): Provide function indirection to
3405         host<->simulated_target transfer routines.
3406         * interp.c (sim_store_register, sim_fetch_register): Updated to
3407         make use of indirected transfer routines.
3408
3409 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3410
3411         * gencode.c (process_instructions): Ensure FP ABS instruction
3412         recognised.
3413         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3414         system call support.
3415
3416 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3417
3418         * interp.c (sim_do_command): Complain if callback structure not
3419         initialised.
3420
3421 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3422
3423         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3424         support for Sun hosts.
3425         * Makefile.in (gencode): Ensure the host compiler and libraries
3426         used for cross-hosted build.
3427
3428 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3429
3430         * interp.c, gencode.c: Some more (TODO) tidying.
3431
3432 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3433
3434         * gencode.c, interp.c: Replaced explicit long long references with
3435         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3436         * support.h (SET64LO, SET64HI): Macros added.
3437
3438 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3439
3440         * configure: Regenerate with autoconf 2.7.
3441
3442 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3443
3444         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3445         * support.h: Remove superfluous "1" from #if.
3446         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3447
3448 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3449
3450         * interp.c (StoreFPR): Control UndefinedResult() call on
3451         WARN_RESULT manifest.
3452
3453 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3454
3455         * gencode.c: Tidied instruction decoding, and added FP instruction
3456         support.
3457
3458         * interp.c: Added dineroIII, and BSD profiling support. Also
3459         run-time FP handling.
3460
3461 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3462
3463         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3464         gencode.c, interp.c, support.h: created.