sim/mips/ChangeLog

   1 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
   4         * interp.c (mips_pc_get, mips_pc_set): New functions.
   5         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
   6         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
   7         (sim_pc_get): Delete.
   8         * sim-main.h (SIM_CPU): Define.
   9         (struct sim_state): Change cpu to an array of pointers.
  10         (STATE_CPU): Drop &.
  11
  12 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
  13
  14         * interp.c (mips_option_handler, open_trace, sim_close,
  15         sim_write, sim_read, sim_store_register, sim_fetch_register,
  16         sim_create_inferior, pr_addr, pr_uword64): Convert old style
  17         prototypes.
  18         (sim_open): Convert old style prototype.  Change casts with
  19         sim_write to unsigned char *.
  20         (fetch_str): Change null to unsigned char, and change cast to
  21         unsigned char *.
  22         (sim_monitor): Change c & ch to unsigned char.  Change cast to
  23         unsigned char *.
  24
  25 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
  26
  27         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
  28
  29 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
  32
  33 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * tconfig.h (SIM_HAVE_PROFILE): Delete.
  36
  37 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
  38
  39         * config.in, configure: Regenerate.
  40
  41 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * interp.c (sim_pc_get): New function.
  44
  45 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  48         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  49
  50 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  51
  52         * configure: Regenerate.
  53
  54 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * configure: Regenerate.
  57
  58 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  59
  60         * configure: Regenerate.
  61         * configure.ac (mips_extra_objs): Delete.
  62         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
  63         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
  64
  65 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * configure: Regenerate.
  68         * configure.ac: Delete sim_hw checks for dv-sockser.
  69
  70 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * config.in, configure: Regenerate.
  73         * tconfig.in: Rename file ...
  74         * tconfig.h: ... here.
  75
  76 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
  77
  78         * tconfig.in: Delete includes.
  79         [HAVE_DV_SOCKSER]: Delete.
  80
  81 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  82
  83         * Makefile.in (SIM_RUN_OBJS): Delete.
  84
  85 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  86
  87         * configure.ac (AC_CHECK_HEADERS): Delete.
  88         * aclocal.m4, configure: Regenerate.
  89
  90 2014-08-19  Alan Modra  <amodra@gmail.com>
  91
  92         * configure: Regenerate.
  93
  94 2014-08-15  Roland McGrath  <mcgrathr@google.com>
  95
  96         * configure: Regenerate.
  97         * config.in: Regenerate.
  98
  99 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * configure: Regenerate.
 102
 103 2013-09-23  Alan Modra  <amodra@gmail.com>
 104
 105         * configure: Regenerate.
 106
 107 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * aclocal.m4, configure: Regenerate.
 110
 111 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 112
 113         * configure: Rebuild.
 114
 115 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * configure: Regenerate.
 118
 119 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 120
 121         * configure.ac: Address use of dv-sockser.o.
 122         * tconfig.in: Conditionalize use of dv_sockser_install.
 123         * configure: Regenerated.
 124         * config.in: Regenerated.
 125
 126 2012-10-04  Chao-ying Fu  <fu@mips.com>
 127             Steve Ellcey  <sellcey@mips.com>
 128
 129         * mips/mips3264r2.igen (rdhwr): New.
 130
 131 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 132
 133         * configure.ac: Always link against dv-sockser.o.
 134         * configure: Regenerate.
 135
 136 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 137
 138         * config.in, configure: Regenerate.
 139
 140 2012-05-18  Nick Clifton  <nickc@redhat.com>
 141
 142         PR 14072
 143         * interp.c: Include config.h before system header files.
 144
 145 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * aclocal.m4, config.in, configure: Regenerate.
 148
 149 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 150
 151         * aclocal.m4: New file.
 152         * configure: Regenerate.
 153
 154 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure: Regenerate after common/acinclude.m4 update.
 157
 158 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * configure.ac: Change include to common/acinclude.m4.
 161
 162 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 165         call.  Replace common.m4 include with SIM_AC_COMMON.
 166         * configure: Regenerate.
 167
 168 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 169
 170         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 171         $(SIM_EXTRA_DEPS).
 172         (tmp-mach-multi): Exit early when igen fails.
 173
 174 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * interp.c (sim_do_command): Delete.
 177
 178 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 181         (tx3904sio_fifo_reset): Likewise.
 182         * interp.c (sim_monitor): Likewise.
 183
 184 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * interp.c (sim_write): Add const to buffer arg.
 187
 188 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 189
 190         * interp.c: Don't include sysdep.h
 191
 192 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 193
 194         * configure: Regenerate.
 195
 196 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 197
 198         * config.in: Regenerate.
 199         * configure: Likewise.
 200
 201         * configure: Regenerate.
 202
 203 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 204
 205         * configure: Regenerate to track ../common/common.m4 changes.
 206         * config.in: Ditto.
 207
 208 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 209             Daniel Jacobowitz  <dan@codesourcery.com>
 210             Joseph Myers  <joseph@codesourcery.com>
 211
 212         * configure: Regenerate.
 213
 214 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 215
 216         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 217         that unconditionally allows fmt_ps.
 218         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 219         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 220         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 221         filter from 64,f to 32,f.
 222         (PREFX): Change filter from 64 to 32.
 223         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 224         that use do_load_double instead of do_load.  Make both LUXC1
 225         versions unpredictable if SizeFGR () != 64.
 226         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 227         instead of do_store.  Remove unused variable.  Make both SUXC1
 228         versions unpredictable if SizeFGR () != 64.
 229
 230 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 231
 232         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 233         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 234         shifts for that case.
 235
 236 2007-09-04  Nick Clifton  <nickc@redhat.com>
 237
 238         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 239         (display_mem_info): New static variable.
 240         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 241         (mips_options): Add info-memory and memory-info.
 242         (sim_open): After processing the command line and board
 243         specification, check display_mem_info.  If it is set then
 244         call the real handler for the --memory-info command line
 245         switch.
 246
 247 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 248
 249         * configure.ac: Change license of multi-run.c to GPL version 3.
 250         * configure: Regenerate.
 251
 252 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 253
 254         * configure.ac, configure: Revert last patch.
 255
 256 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 257
 258         * configure.ac (sim_mipsisa3264_configs): New variable.
 259         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 260         every configuration support all four targets, using the triplet to
 261         determine the default.
 262         * configure: Regenerate.
 263
 264 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 265
 266         * Makefile.in (m16run.o): New rule.
 267
 268 2007-05-15  Thiemo Seufer  <ths@mips.com>
 269
 270         * mips3264r2.igen (DSHD): Fix compile warning.
 271
 272 2007-05-14  Thiemo Seufer  <ths@mips.com>
 273
 274         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 275         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 276         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 277         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 278         for mips32r2.
 279
 280 2007-03-01  Thiemo Seufer  <ths@mips.com>
 281
 282         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 283         and mips64.
 284
 285 2007-02-20  Thiemo Seufer  <ths@mips.com>
 286
 287         * dsp.igen: Update copyright notice.
 288         * dsp2.igen: Fix copyright notice.
 289
 290 2007-02-20  Thiemo Seufer  <ths@mips.com>
 291             Chao-Ying Fu  <fu@mips.com>
 292
 293         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 294         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 295         Add dsp2 to sim_igen_machine.
 296         * configure: Regenerate.
 297         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 298         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 299         (mulq_rs.ph): Use do_ph_mulq.
 300         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 301         * mips.igen: Add dsp2 model and include dsp2.igen.
 302         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 303         for *mips32r2, *mips64r2, *dsp.
 304         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 305         for *mips32r2, *mips64r2, *dsp2.
 306         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 307
 308 2007-02-19  Thiemo Seufer  <ths@mips.com>
 309             Nigel Stephens  <nigel@mips.com>
 310
 311         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 312         jumps with hazard barrier.
 313
 314 2007-02-19  Thiemo Seufer  <ths@mips.com>
 315             Nigel Stephens  <nigel@mips.com>
 316
 317         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 318         after each call to sim_io_write.
 319
 320 2007-02-19  Thiemo Seufer  <ths@mips.com>
 321             Nigel Stephens  <nigel@mips.com>
 322
 323         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 324         supported by this simulator.
 325         (decode_coproc): Recognise additional CP0 Config registers
 326         correctly.
 327
 328 2007-02-19  Thiemo Seufer  <ths@mips.com>
 329             Nigel Stephens  <nigel@mips.com>
 330             David Ung  <davidu@mips.com>
 331
 332         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 333         uninterpreted formats. If fmt is one of the uninterpreted types
 334         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 335         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 336         (store_fpr): When writing an invalid odd register, set the
 337         matching even register to fmt_unknown, not the following register.
 338         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 339         the the memory window at offset 0 set by --memory-size command
 340         line option.
 341         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 342         point register.
 343         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 344         register.
 345         (sim_monitor): When returning the memory size to the MIPS
 346         application, use the value in STATE_MEM_SIZE, not an arbitrary
 347         hardcoded value.
 348         (cop_lw): Don' mess around with FPR_STATE, just pass
 349         fmt_uninterpreted_32 to StoreFPR.
 350         (cop_sw): Similarly.
 351         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 352         (cop_sd): Similarly.
 353         * mips.igen (not_word_value): Single version for mips32, mips64
 354         and mips16.
 355
 356 2007-02-19  Thiemo Seufer <ths@mips.com>
 357             Nigel Stephens  <nigel@mips.com>
 358
 359         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 360         MBytes.
 361
 362 2007-02-17  Thiemo Seufer  <ths@mips.com>
 363
 364         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 365         configuration.
 366         * configure: Regenerate.
 367
 368 2007-02-17  Thiemo Seufer  <ths@mips.com>
 369
 370         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 371         Add mdmx to sim_igen_machine.
 372         (mipsisa64*-*-*): Likewise. Remove dsp.
 373         (mipsisa32*-*-*): Remove dsp.
 374         * configure: Regenerate.
 375
 376 2007-02-13  Thiemo Seufer  <ths@mips.com>
 377
 378         * configure.ac: Add mips*-sde-elf* target.
 379         * configure: Regenerate.
 380
 381 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 382
 383         * acconfig.h: Remove.
 384         * config.in, configure: Regenerate.
 385
 386 2006-11-07  Thiemo Seufer  <ths@mips.com>
 387
 388         * dsp.igen (do_w_op): Fix compiler warning.
 389
 390 2006-08-29  Thiemo Seufer  <ths@mips.com>
 391             David Ung  <davidu@mips.com>
 392
 393         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 394         sim_igen_machine.
 395         * configure: Regenerate.
 396         * mips.igen (model): Add smartmips.
 397         (MADDU): Increment ACX if carry.
 398         (do_mult): Clear ACX.
 399         (ROR,RORV): Add smartmips.
 400         (include): Include smartmips.igen.
 401         * sim-main.h (ACX): Set to REGISTERS[89].
 402         * smartmips.igen: New file.
 403
 404 2006-08-29  Thiemo Seufer  <ths@mips.com>
 405             David Ung  <davidu@mips.com>
 406
 407         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 408         mips3264r2.igen. Add missing dependency rules.
 409         * m16e.igen: Support for mips16e save/restore instructions.
 410
 411 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 412
 413         * configure: Regenerated.
 414
 415 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 416
 417         * configure: Regenerated.
 418
 419 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 420
 421         * configure: Regenerated.
 422
 423 2006-05-15 Chao-ying Fu  <fu@mips.com>
 424
 425         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 426
 427 2006-04-18  Nick Clifton  <nickc@redhat.com>
 428
 429         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 430         statement.
 431
 432 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 433
 434         * configure: Regenerate.
 435
 436 2005-12-14  Chao-ying Fu  <fu@mips.com>
 437
 438         * Makefile.in (SIM_OBJS): Add dsp.o.
 439         (dsp.o): New dependency.
 440         (IGEN_INCLUDE): Add dsp.igen.
 441         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 442         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 443         * configure: Regenerate.
 444         * mips.igen: Add dsp model and include dsp.igen.
 445         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 446         because these instructions are extended in DSP ASE.
 447         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 448         adding 6 DSP accumulator registers and 1 DSP control register.
 449         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 450         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 451         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 452         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 453         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 454         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 455         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 456         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 457         DSPCR_CCOND_SMASK): New define.
 458         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 459         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 460
 461 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 462
 463         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 464
 465 2005-06-16  David Ung  <davidu@mips.com>
 466             Nigel Stephens  <nigel@mips.com>
 467
 468         * mips.igen: New mips16e model and include m16e.igen.
 469         (check_u64): Add mips16e tag.
 470         * m16e.igen: New file for MIPS16e instructions.
 471         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 472         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 473         models.
 474         * configure: Regenerate.
 475
 476 2005-05-26  David Ung  <davidu@mips.com>
 477
 478         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 479         tags to all instructions which are applicable to the new ISAs.
 480         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 481         vr.igen.
 482         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 483         instructions.
 484         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 485         to mips.igen.
 486         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 487         * configure: Regenerate.
 488
 489 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 490
 491         * configure: Regenerate.
 492
 493 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 494
 495         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 496         explicit call to AC_CONFIG_HEADER.
 497         * configure: Regenerate.
 498
 499 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 500
 501         * configure.ac: Update to use ../common/common.m4.
 502         * configure: Re-generate.
 503
 504 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 505
 506         * configure: Regenerated to track ../common/aclocal.m4 changes.
 507
 508 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 509
 510         * configure.ac: Rename configure.in, require autoconf 2.59.
 511         * configure: Re-generate.
 512
 513 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 514
 515         * configure: Regenerate for ../common/aclocal.m4 update.
 516
 517 2004-09-24  Monika Chaddha  <monika@acmet.com>
 518
 519         Committed by Andrew Cagney.
 520         * m16.igen (CMP, CMPI): Fix assembler.
 521
 522 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 523
 524         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 525         * configure: Regenerate.
 526
 527 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 528
 529         * configure.in (sim_m16_machine): Include mipsIII.
 530         * configure: Regenerate.
 531
 532 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 533
 534         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 535         from COP0_BADVADDR.
 536         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 537
 538 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 539
 540         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 541
 542 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 543
 544         * mips.igen (check_fmt): Remove.
 545         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 546         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 547         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 548         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 549         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 550         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 551         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 552         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 553         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 554         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 555
 556 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 557
 558         * sb1.igen (check_sbx): New function.
 559         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 560
 561 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 562             Richard Sandiford  <rsandifo@redhat.com>
 563
 564         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 565         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 566         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 567         separate implementations for mipsIV and mipsV.  Use new macros to
 568         determine whether the restrictions apply.
 569
 570 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 571
 572         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 573         (check_mult_hilo): Improve comments.
 574         (check_div_hilo): Likewise.  Also, fork off a new version
 575         to handle mips32/mips64 (since there are no hazards to check
 576         in MIPS32/MIPS64).
 577
 578 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 579
 580         * mips.igen (do_dmultx): Fix check for negative operands.
 581
 582 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 583
 584         * Makefile.in (SHELL): Make sure this is defined.
 585         (various): Use $(SHELL) whenever we invoke move-if-change.
 586
 587 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 588
 589         * cp1.c: Tweak attribution slightly.
 590         * cp1.h: Likewise.
 591         * mdmx.c: Likewise.
 592         * mdmx.igen: Likewise.
 593         * mips3d.igen: Likewise.
 594         * sb1.igen: Likewise.
 595
 596 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 597
 598         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 599         unsigned operands.
 600
 601 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 602
 603         * interp.c (sim_open): Rename _bfd to bfd.
 604         (sim_create_inferior): Ditto.
 605
 606 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 607
 608         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 609
 610 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 611
 612         * mips.igen (EI, DI): Remove.
 613
 614 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 615
 616         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 617
 618 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 619             Andrew Cagney  <ac131313@redhat.com>
 620             Gavin Romig-Koch  <gavin@redhat.com>
 621             Graydon Hoare  <graydon@redhat.com>
 622             Aldy Hernandez  <aldyh@redhat.com>
 623             Dave Brolley  <brolley@redhat.com>
 624             Chris Demetriou  <cgd@broadcom.com>
 625
 626         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 627         (sim_mach_default): New variable.
 628         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 629         Add a new simulator generator, MULTI.
 630         * configure: Regenerate.
 631         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 632         (multi-run.o): New dependency.
 633         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 634         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 635         (tmp-multi): Combine them.
 636         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 637         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 638         (distclean-extra): New rule.
 639         * sim-main.h: Include bfd.h.
 640         (MIPS_MACH): New macro.
 641         * mips.igen (vr4120, vr5400, vr5500): New models.
 642         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 643         * vr.igen: Replace with new version.
 644
 645 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 646
 647         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 648         * configure: Regenerate.
 649
 650 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 651
 652         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 653         * mips.igen: Remove all invocations of check_branch_bug and
 654         mark_branch_bug.
 655
 656 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 657
 658         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 659
 660 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 661
 662         * mips.igen (do_load_double, do_store_double): New functions.
 663         (LDC1, SDC1): Rename to...
 664         (LDC1b, SDC1b): respectively.
 665         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 666
 667 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 668
 669         * cp1.c (fp_recip2): Modify initialization expression so that
 670         GCC will recognize it as constant.
 671
 672 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 673
 674         * mdmx.c (SD_): Delete.
 675         (Unpredictable): Re-define, for now, to directly invoke
 676         unpredictable_action().
 677         (mdmx_acc_op): Fix error in .ob immediate handling.
 678
 679 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 680
 681         * interp.c (sim_firmware_command): Initialize `address'.
 682
 683 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 684
 685         * configure: Regenerated to track ../common/aclocal.m4 changes.
 686
 687 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 688             Ed Satterthwaite  <ehs@broadcom.com>
 689
 690         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 691         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 692         * mips.igen: Include mips3d.igen.
 693         (mips3d): New model name for MIPS-3D ASE instructions.
 694         (CVT.W.fmt): Don't use this instruction for word (source) format
 695         instructions.
 696         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 697         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 698         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 699         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 700         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 701         (RSquareRoot1, RSquareRoot2): New macros.
 702         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 703         (fp_rsqrt2): New functions.
 704         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 705         * configure: Regenerate.
 706
 707 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 708             Ed Satterthwaite  <ehs@broadcom.com>
 709
 710         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 711         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 712         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 713         (convert): Note that this function is not used for paired-single
 714         format conversions.
 715         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 716         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 717         (check_fmt_p): Enable paired-single support.
 718         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 719         (PUU.PS): New instructions.
 720         (CVT.S.fmt): Don't use this instruction for paired-single format
 721         destinations.
 722         * sim-main.h (FP_formats): New value 'fmt_ps.'
 723         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 724         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 725
 726 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 727
 728         * mips.igen: Fix formatting of function calls in
 729         many FP operations.
 730
 731 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 732
 733         * mips.igen (MOVN, MOVZ): Trace result.
 734         (TNEI): Print "tnei" as the opcode name in traces.
 735         (CEIL.W): Add disassembly string for traces.
 736         (RSQRT.fmt): Make location of disassembly string consistent
 737         with other instructions.
 738
 739 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 740
 741         * mips.igen (X): Delete unused function.
 742
 743 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 744
 745         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 746
 747 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 748             Ed Satterthwaite  <ehs@broadcom.com>
 749
 750         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 751         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 752         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 753         (fp_nmsub): New prototypes.
 754         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 755         (NegMultiplySub): New defines.
 756         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 757         (MADD.D, MADD.S): Replace with...
 758         (MADD.fmt): New instruction.
 759         (MSUB.D, MSUB.S): Replace with...
 760         (MSUB.fmt): New instruction.
 761         (NMADD.D, NMADD.S): Replace with...
 762         (NMADD.fmt): New instruction.
 763         (NMSUB.D, MSUB.S): Replace with...
 764         (NMSUB.fmt): New instruction.
 765
 766 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 767             Ed Satterthwaite  <ehs@broadcom.com>
 768
 769         * cp1.c: Fix more comment spelling and formatting.
 770         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 771         (denorm_mode): New function.
 772         (fpu_unary, fpu_binary): Round results after operation, collect
 773         status from rounding operations, and update the FCSR.
 774         (convert): Collect status from integer conversions and rounding
 775         operations, and update the FCSR.  Adjust NaN values that result
 776         from conversions.  Convert to use sim_io_eprintf rather than
 777         fprintf, and remove some debugging code.
 778         * cp1.h (fenr_FS): New define.
 779
 780 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 781
 782         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 783         rounding mode to sim FP rounding mode flag conversion code into...
 784         (rounding_mode): New function.
 785
 786 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 787
 788         * cp1.c: Clean up formatting of a few comments.
 789         (value_fpr): Reformat switch statement.
 790
 791 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 792             Ed Satterthwaite  <ehs@broadcom.com>
 793
 794         * cp1.h: New file.
 795         * sim-main.h: Include cp1.h.
 796         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 797         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 798         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 799         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 800         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 801         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 802         * cp1.c: Don't include sim-fpu.h; already included by
 803         sim-main.h.  Clean up formatting of some comments.
 804         (NaN, Equal, Less): Remove.
 805         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 806         (fp_cmp): New functions.
 807         * mips.igen (do_c_cond_fmt): Remove.
 808         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 809         Compare.  Add result tracing.
 810         (CxC1): Remove, replace with...
 811         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 812         (DMxC1): Remove, replace with...
 813         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 814         (MxC1): Remove, replace with...
 815         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 816
 817 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 818
 819         * sim-main.h (FGRIDX): Remove, replace all uses with...
 820         (FGR_BASE): New macro.
 821         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 822         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 823         (NR_FGR, FGR): Likewise.
 824         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 825         * mips.igen: Likewise.
 826
 827 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 828
 829         * cp1.c: Add an FSF Copyright notice to this file.
 830
 831 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 832             Ed Satterthwaite  <ehs@broadcom.com>
 833
 834         * cp1.c (Infinity): Remove.
 835         * sim-main.h (Infinity): Likewise.
 836
 837         * cp1.c (fp_unary, fp_binary): New functions.
 838         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 839         (fp_sqrt): New functions, implemented in terms of the above.
 840         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 841         (Recip, SquareRoot): Remove (replaced by functions above).
 842         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 843         (fp_recip, fp_sqrt): New prototypes.
 844         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 845         (Recip, SquareRoot): Replace prototypes with #defines which
 846         invoke the functions above.
 847
 848 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 849
 850         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 851         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 852         file, remove PARAMS from prototypes.
 853         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 854         simulator state arguments.
 855         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 856         pass simulator state arguments.
 857         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 858         (store_fpr, convert): Remove 'sd' argument.
 859         (value_fpr): Likewise.  Convert to use 'SD' instead.
 860
 861 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 862
 863         * cp1.c (Min, Max): Remove #if 0'd functions.
 864         * sim-main.h (Min, Max): Remove.
 865
 866 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 867
 868         * cp1.c: fix formatting of switch case and default labels.
 869         * interp.c: Likewise.
 870         * sim-main.c: Likewise.
 871
 872 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 873
 874         * cp1.c: Clean up comments which describe FP formats.
 875          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 876
 877 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 878             Ed Satterthwaite  <ehs@broadcom.com>
 879
 880         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 881         Broadcom SiByte SB-1 processor configurations.
 882         * configure: Regenerate.
 883         * sb1.igen: New file.
 884         * mips.igen: Include sb1.igen.
 885         (sb1): New model.
 886         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 887         * mdmx.igen: Add "sb1" model to all appropriate functions and
 888         instructions.
 889         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 890         (ob_func, ob_acc): Reference the above.
 891         (qh_acc): Adjust to keep the same size as ob_acc.
 892         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 893         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 894
 895 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 896
 897         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 898
 899 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 900             Ed Satterthwaite  <ehs@broadcom.com>
 901
 902         * mips.igen (mdmx): New (pseudo-)model.
 903         * mdmx.c, mdmx.igen: New files.
 904         * Makefile.in (SIM_OBJS): Add mdmx.o.
 905         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 906         New typedefs.
 907         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 908         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 909         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 910         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 911         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 912         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 913         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 914         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 915         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 916         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 917         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 918         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 919         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 920         (qh_fmtsel): New macros.
 921         (_sim_cpu): New member "acc".
 922         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 923         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 924
 925 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 926
 927         * interp.c: Use 'deprecated' rather than 'depreciated.'
 928         * sim-main.h: Likewise.
 929
 930 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 931
 932         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 933         which wouldn't compile anyway.
 934         * sim-main.h (unpredictable_action): New function prototype.
 935         (Unpredictable): Define to call igen function unpredictable().
 936         (NotWordValue): New macro to call igen function not_word_value().
 937         (UndefinedResult): Remove.
 938         * interp.c (undefined_result): Remove.
 939         (unpredictable_action): New function.
 940         * mips.igen (not_word_value, unpredictable): New functions.
 941         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 942         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 943         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 944         NotWordValue() to check for unpredictable inputs, then
 945         Unpredictable() to handle them.
 946
 947 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 948
 949         * mips.igen: Fix formatting of calls to Unpredictable().
 950
 951 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 952
 953         * interp.c (sim_open): Revert previous change.
 954
 955 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 956
 957         * interp.c (sim_open): Disable chunk of code that wrote code in
 958         vector table entries.
 959
 960 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 961
 962         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 963         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 964         unused definitions.
 965
 966 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 967
 968         * cp1.c: Fix many formatting issues.
 969
 970 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 971
 972         * cp1.c (fpu_format_name): New function to replace...
 973         (DOFMT): This.  Delete, and update all callers.
 974         (fpu_rounding_mode_name): New function to replace...
 975         (RMMODE): This.  Delete, and update all callers.
 976
 977 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 978
 979         * interp.c: Move FPU support routines from here to...
 980         * cp1.c: Here.  New file.
 981         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 982         (cp1.o): New target.
 983
 984 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 985
 986         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 987         * mips.igen (mips32, mips64): New models, add to all instructions
 988         and functions as appropriate.
 989         (loadstore_ea, check_u64): New variant for model mips64.
 990         (check_fmt_p): New variant for models mipsV and mips64, remove
 991         mipsV model marking fro other variant.
 992         (SLL) Rename to...
 993         (SLLa) this.
 994         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 995         for mips32 and mips64.
 996         (DCLO, DCLZ): New instructions for mips64.
 997
 998 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 999
1000         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1001         immediate or code as a hex value with the "%#lx" format.
1002         (ANDI): Likewise, and fix printed instruction name.
1003
1004 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1005
1006         * sim-main.h (UndefinedResult, Unpredictable): New macros
1007         which currently do nothing.
1008
1009 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1010
1011         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1012         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1013         (status_CU3): New definitions.
1014
1015         * sim-main.h (ExceptionCause): Add new values for MIPS32
1016         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1017         for DebugBreakPoint and NMIReset to note their status in
1018         MIPS32 and MIPS64.
1019         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1020         (SignalExceptionCacheErr): New exception macros.
1021
1022 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1023
1024         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1025         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1026         is always enabled.
1027         (SignalExceptionCoProcessorUnusable): Take as argument the
1028         unusable coprocessor number.
1029
1030 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1031
1032         * mips.igen: Fix formatting of all SignalException calls.
1033
1034 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1035
1036         * sim-main.h (SIGNEXTEND): Remove.
1037
1038 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1039
1040         * mips.igen: Remove gencode comment from top of file, fix
1041         spelling in another comment.
1042
1043 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1044
1045         * mips.igen (check_fmt, check_fmt_p): New functions to check
1046         whether specific floating point formats are usable.
1047         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1048         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1049         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1050         Use the new functions.
1051         (do_c_cond_fmt): Remove format checks...
1052         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1053
1054 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1055
1056         * mips.igen: Fix formatting of check_fpu calls.
1057
1058 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1059
1060         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1061
1062 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1063
1064         * mips.igen: Remove whitespace at end of lines.
1065
1066 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1067
1068         * mips.igen (loadstore_ea): New function to do effective
1069         address calculations.
1070         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1071         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1072         CACHE): Use loadstore_ea to do effective address computations.
1073
1074 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1075
1076         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1077         * mips.igen (LL, CxC1, MxC1): Likewise.
1078
1079 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1080
1081         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1082         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1083         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1084         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1085         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1086         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1087         Don't split opcode fields by hand, use the opcode field values
1088         provided by igen.
1089
1090 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1091
1092         * mips.igen (do_divu): Fix spacing.
1093
1094         * mips.igen (do_dsllv): Move to be right before DSLLV,
1095         to match the rest of the do_<shift> functions.
1096
1097 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1098
1099         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1100         DSRL32, do_dsrlv): Trace inputs and results.
1101
1102 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1103
1104         * mips.igen (CACHE): Provide instruction-printing string.
1105
1106         * interp.c (signal_exception): Comment tokens after #endif.
1107
1108 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1109
1110         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1111         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1112         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1113         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1114         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1115         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1116         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1117         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1118
1119 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1120
1121         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1122         instruction-printing string.
1123         (LWU): Use '64' as the filter flag.
1124
1125 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1126
1127         * mips.igen (SDXC1): Fix instruction-printing string.
1128
1129 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1130
1131         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1132         filter flags "32,f".
1133
1134 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1135
1136         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1137         as the filter flag.
1138
1139 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1140
1141         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1142         add a comma) so that it more closely match the MIPS ISA
1143         documentation opcode partitioning.
1144         (PREF): Put useful names on opcode fields, and include
1145         instruction-printing string.
1146
1147 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1148
1149         * mips.igen (check_u64): New function which in the future will
1150         check whether 64-bit instructions are usable and signal an
1151         exception if not.  Currently a no-op.
1152         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1153         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1154         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1155         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1156
1157         * mips.igen (check_fpu): New function which in the future will
1158         check whether FPU instructions are usable and signal an exception
1159         if not.  Currently a no-op.
1160         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1161         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1162         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1163         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1164         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1165         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1166         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1167         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1168
1169 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1170
1171         * mips.igen (do_load_left, do_load_right): Move to be immediately
1172         following do_load.
1173         (do_store_left, do_store_right): Move to be immediately following
1174         do_store.
1175
1176 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1177
1178         * mips.igen (mipsV): New model name.  Also, add it to
1179         all instructions and functions where it is appropriate.
1180
1181 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1182
1183         * mips.igen: For all functions and instructions, list model
1184         names that support that instruction one per line.
1185
1186 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1187
1188         * mips.igen: Add some additional comments about supported
1189         models, and about which instructions go where.
1190         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1191         order as is used in the rest of the file.
1192
1193 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1194
1195         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1196         indicating that ALU32_END or ALU64_END are there to check
1197         for overflow.
1198         (DADD): Likewise, but also remove previous comment about
1199         overflow checking.
1200
1201 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1202
1203         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1204         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1205         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1206         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1207         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1208         fields (i.e., add and move commas) so that they more closely
1209         match the MIPS ISA documentation opcode partitioning.
1210
1211 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1212
1213         * mips.igen (ADDI): Print immediate value.
1214         (BREAK): Print code.
1215         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1216         (SLL): Print "nop" specially, and don't run the code
1217         that does the shift for the "nop" case.
1218
1219 2001-11-17  Fred Fish  <fnf@redhat.com>
1220
1221         * sim-main.h (float_operation): Move enum declaration outside
1222         of _sim_cpu struct declaration.
1223
1224 2001-04-12  Jim Blandy  <jimb@redhat.com>
1225
1226         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1227         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1228         set of the FCSR.
1229         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1230         PENDING_FILL, and you can get the intended effect gracefully by
1231         calling PENDING_SCHED directly.
1232
1233 2001-02-23  Ben Elliston  <bje@redhat.com>
1234
1235         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1236         already defined elsewhere.
1237
1238 2001-02-19  Ben Elliston  <bje@redhat.com>
1239
1240         * sim-main.h (sim_monitor): Return an int.
1241         * interp.c (sim_monitor): Add return values.
1242         (signal_exception): Handle error conditions from sim_monitor.
1243
1244 2001-02-08  Ben Elliston  <bje@redhat.com>
1245
1246         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1247         (store_memory): Likewise, pass cia to sim_core_write*.
1248
1249 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1250
1251         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1252         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1253
1254 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1255
1256         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1257         * Makefile.in: Don't delete *.igen when cleaning directory.
1258
1259 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1260
1261         * m16.igen (break): Call SignalException not sim_engine_halt.
1262
1263 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1264
1265         From Jason Eckhardt:
1266         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1267
1268 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1269
1270         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1271
1272 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1273
1274         * mips.igen (do_dmultx): Fix typo.
1275
1276 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1277
1278         * configure: Regenerated to track ../common/aclocal.m4 changes.
1279
1280 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1281
1282         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1283
1284 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1285
1286         * sim-main.h (GPR_CLEAR): Define macro.
1287
1288 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1289
1290         * interp.c (decode_coproc): Output long using %lx and not %s.
1291
1292 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1293
1294         * interp.c (sim_open): Sort & extend dummy memory regions for
1295         --board=jmr3904 for eCos.
1296
1297 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1298
1299         * configure: Regenerated.
1300
1301 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1302
1303         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1304         calls, conditional on the simulator being in verbose mode.
1305
1306 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1307
1308         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1309         cache don't get ReservedInstruction traps.
1310
1311 1999-11-29  Mark Salter  <msalter@cygnus.com>
1312
1313         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1314         to clear status bits in sdisr register. This is how the hardware works.
1315
1316         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1317         being used by cygmon.
1318
1319 1999-11-11  Andrew Haley  <aph@cygnus.com>
1320
1321         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1322         instructions.
1323
1324 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1325
1326         * mips.igen (MULT): Correct previous mis-applied patch.
1327
1328 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1329
1330         * mips.igen (delayslot32): Handle sequence like
1331         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1332         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1333         (MULT): Actually pass the third register...
1334
1335 1999-09-03  Mark Salter  <msalter@cygnus.com>
1336
1337         * interp.c (sim_open): Added more memory aliases for additional
1338         hardware being touched by cygmon on jmr3904 board.
1339
1340 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1341
1342         * configure: Regenerated to track ../common/aclocal.m4 changes.
1343
1344 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1345
1346         * interp.c (sim_store_register): Handle case where client - GDB -
1347         specifies that a 4 byte register is 8 bytes in size.
1348         (sim_fetch_register): Ditto.
1349
1350 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1351
1352         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1353         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1354         (idt_monitor_base): Base address for IDT monitor traps.
1355         (pmon_monitor_base): Ditto for PMON.
1356         (lsipmon_monitor_base): Ditto for LSI PMON.
1357         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1358         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1359         (sim_firmware_command): New function.
1360         (mips_option_handler): Call it for OPTION_FIRMWARE.
1361         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1362         option was given, add no monitor by default.  Add BREAK hooks only if
1363         monitors are also there.
1364
1365 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1366
1367         * interp.c (sim_monitor): Flush output before reading input.
1368
1369 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1370
1371         * tconfig.in (SIM_HANDLES_LMA): Always define.
1372
1373 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1374
1375         From Mark Salter <msalter@cygnus.com>:
1376         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1377         (sim_open): Add setup for BSP board.
1378
1379 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1380
1381         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1382         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1383         them as unimplemented.
1384
1385 1999-05-08  Felix Lee  <flee@cygnus.com>
1386
1387         * configure: Regenerated to track ../common/aclocal.m4 changes.
1388
1389 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1390
1391         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1392
1393 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1394
1395         * configure.in: Any mips64vr5*-*-* target should have
1396         -DTARGET_ENABLE_FR=1.
1397         (default_endian): Any mips64vr*el-*-* target should default to
1398         LITTLE_ENDIAN.
1399         * configure: Re-generate.
1400
1401 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1402
1403         * mips.igen (ldl): Extend from _16_, not 32.
1404
1405 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1406
1407         * interp.c (sim_store_register): Force registers written to by GDB
1408         into an un-interpreted state.
1409
1410 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1411
1412         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1413         CPU, start periodic background I/O polls.
1414         (tx3904sio_poll): New function: periodic I/O poller.
1415
1416 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1417
1418         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1419
1420 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1421
1422         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1423         case statement.
1424
1425 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1426
1427         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1428         (load_word): Call SIM_CORE_SIGNAL hook on error.
1429         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1430         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1431         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1432         * sim-main.h (COP0_BADVADDR): Define.
1433         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1434         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1435         (_sim_cpu): Add exc_* fields to store register value snapshots.
1436         * mips.igen (*): Replace memory-related SignalException* calls
1437         with references to SIM_CORE_SIGNAL hook.
1438
1439         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1440         fix.
1441         * sim-main.c (*): Minor warning cleanups.
1442
1443 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1444
1445         * m16.igen (DADDIU5): Correct type-o.
1446
1447 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1448
1449         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1450         variables.
1451
1452 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1453
1454         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1455         to include path.
1456         (interp.o): Add dependency on itable.h
1457         (oengine.c, gencode): Delete remaining references.
1458         (BUILT_SRC_FROM_GEN): Clean up.
1459
1460 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1461
1462         * vr4run.c: New.
1463         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1464         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1465         tmp-run-hack) : New.
1466         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1467         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1468         Drop the "64" qualifier to get the HACK generator working.
1469         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1470         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1471         qualifier to get the hack generator working.
1472         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1473         (DSLL): Use do_dsll.
1474         (DSLLV): Use do_dsllv.
1475         (DSRA): Use do_dsra.
1476         (DSRL): Use do_dsrl.
1477         (DSRLV): Use do_dsrlv.
1478         (BC1): Move *vr4100 to get the HACK generator working.
1479         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1480         get the HACK generator working.
1481         (MACC) Rename to get the HACK generator working.
1482         (DMACC,MACCS,DMACCS): Add the 64.
1483
1484 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1485
1486         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1487         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1488
1489 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1490
1491     * mips/interp.c (DEBUG): Cleanups.
1492
1493 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1494
1495         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1496         (tx3904sio_tickle): fflush after a stdout character output.
1497
1498 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1499
1500         * interp.c (sim_close): Uninstall modules.
1501
1502 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1503
1504         * sim-main.h, interp.c (sim_monitor): Change to global
1505         function.
1506
1507 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1508
1509         * configure.in (vr4100): Only include vr4100 instructions in
1510         simulator.
1511         * configure: Re-generate.
1512         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1513
1514 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1515
1516         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1517         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1518         true alternative.
1519
1520         * configure.in (sim_default_gen, sim_use_gen): Replace with
1521         sim_gen.
1522         (--enable-sim-igen): Delete config option. Always using IGEN.
1523         * configure: Re-generate.
1524
1525         * Makefile.in (gencode): Kill, kill, kill.
1526         * gencode.c: Ditto.
1527
1528 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1529
1530         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1531         bit mips16 igen simulator.
1532         * configure: Re-generate.
1533
1534         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1535         as part of vr4100 ISA.
1536         * vr.igen: Mark all instructions as 64 bit only.
1537
1538 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1539
1540         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1541         Pacify GCC.
1542
1543 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1544
1545         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1546         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1547         * configure: Re-generate.
1548
1549         * m16.igen (BREAK): Define breakpoint instruction.
1550         (JALX32): Mark instruction as mips16 and not r3900.
1551         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1552
1553         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1554
1555 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1556
1557         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1558         insn as a debug breakpoint.
1559
1560         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1561         pending.slot_size.
1562         (PENDING_SCHED): Clean up trace statement.
1563         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1564         (PENDING_FILL): Delay write by only one cycle.
1565         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1566
1567         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1568         of pending writes.
1569         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1570         32 & 64.
1571         (pending_tick): Move incrementing of index to FOR statement.
1572         (pending_tick): Only update PENDING_OUT after a write has occured.
1573
1574         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1575         build simulator.
1576         * configure: Re-generate.
1577
1578         * interp.c (sim_engine_run OLD): Delete explicit call to
1579         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1580
1581 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1582
1583         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1584         interrupt level number to match changed SignalExceptionInterrupt
1585         macro.
1586
1587 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1588
1589         * interp.c: #include "itable.h" if WITH_IGEN.
1590         (get_insn_name): New function.
1591         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1592         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1593
1594 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1595
1596         * configure: Rebuilt to inhale new common/aclocal.m4.
1597
1598 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1599
1600         * dv-tx3904sio.c: Include sim-assert.h.
1601
1602 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1603
1604         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1605         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1606         Reorganize target-specific sim-hardware checks.
1607         * configure: rebuilt.
1608         * interp.c (sim_open): For tx39 target boards, set
1609         OPERATING_ENVIRONMENT, add tx3904sio devices.
1610         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1611         ROM executables.  Install dv-sockser into sim-modules list.
1612
1613         * dv-tx3904irc.c: Compiler warning clean-up.
1614         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1615         frequent hw-trace messages.
1616
1617 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1618
1619         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1620
1621 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1622
1623         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1624
1625         * vr.igen: New file.
1626         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1627         * mips.igen: Define vr4100 model. Include vr.igen.
1628 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1629
1630         * mips.igen (check_mf_hilo): Correct check.
1631
1632 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1633
1634         * sim-main.h (interrupt_event): Add prototype.
1635
1636         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1637         register_ptr, register_value.
1638         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1639
1640         * sim-main.h (tracefh): Make extern.
1641
1642 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1643
1644         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1645         Reduce unnecessarily high timer event frequency.
1646         * dv-tx3904cpu.c: Ditto for interrupt event.
1647
1648 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1649
1650         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1651         to allay warnings.
1652         (interrupt_event): Made non-static.
1653
1654         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1655         interchange of configuration values for external vs. internal
1656         clock dividers.
1657
1658 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1659
1660         * mips.igen (BREAK): Moved code to here for
1661         simulator-reserved break instructions.
1662         * gencode.c (build_instruction): Ditto.
1663         * interp.c (signal_exception): Code moved from here.  Non-
1664         reserved instructions now use exception vector, rather
1665         than halting sim.
1666         * sim-main.h: Moved magic constants to here.
1667
1668 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1669
1670         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1671         register upon non-zero interrupt event level, clear upon zero
1672         event value.
1673         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1674         by passing zero event value.
1675         (*_io_{read,write}_buffer): Endianness fixes.
1676         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1677         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1678
1679         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1680         serial I/O and timer module at base address 0xFFFF0000.
1681
1682 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1683
1684         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1685         and BigEndianCPU.
1686
1687 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1688
1689         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1690         parts.
1691         * configure: Update.
1692
1693 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1694
1695         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1696         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1697         * configure.in: Include tx3904tmr in hw_device list.
1698         * configure: Rebuilt.
1699         * interp.c (sim_open): Instantiate three timer instances.
1700         Fix address typo of tx3904irc instance.
1701
1702 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1703
1704         * interp.c (signal_exception): SystemCall exception now uses
1705         the exception vector.
1706
1707 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1708
1709         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1710         to allay warnings.
1711
1712 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1713
1714         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1715
1716 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1717
1718         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1719
1720         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1721         sim-main.h. Declare a struct hw_descriptor instead of struct
1722         hw_device_descriptor.
1723
1724 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1725
1726         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1727         right bits and then re-align left hand bytes to correct byte
1728         lanes.  Fix incorrect computation in do_store_left when loading
1729         bytes from second word.
1730
1731 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1732
1733         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1734         * interp.c (sim_open): Only create a device tree when HW is
1735         enabled.
1736
1737         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1738         * interp.c (signal_exception): Ditto.
1739
1740 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1741
1742         * gencode.c: Mark BEGEZALL as LIKELY.
1743
1744 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1745
1746         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1747         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1748
1749 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1750
1751         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1752         modules.  Recognize TX39 target with "mips*tx39" pattern.
1753         * configure: Rebuilt.
1754         * sim-main.h (*): Added many macros defining bits in
1755         TX39 control registers.
1756         (SignalInterrupt): Send actual PC instead of NULL.
1757         (SignalNMIReset): New exception type.
1758         * interp.c (board): New variable for future use to identify
1759         a particular board being simulated.
1760         (mips_option_handler,mips_options): Added "--board" option.
1761         (interrupt_event): Send actual PC.
1762         (sim_open): Make memory layout conditional on board setting.
1763         (signal_exception): Initial implementation of hardware interrupt
1764         handling.  Accept another break instruction variant for simulator
1765         exit.
1766         (decode_coproc): Implement RFE instruction for TX39.
1767         (mips.igen): Decode RFE instruction as such.
1768         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1769         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1770         bbegin to implement memory map.
1771         * dv-tx3904cpu.c: New file.
1772         * dv-tx3904irc.c: New file.
1773
1774 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1775
1776         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1777
1778 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1779
1780         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1781         with calls to check_div_hilo.
1782
1783 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1784
1785         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1786         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1787         Add special r3900 version of do_mult_hilo.
1788         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1789         with calls to check_mult_hilo.
1790         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1791         with calls to check_div_hilo.
1792
1793 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1794
1795         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1796         Document a replacement.
1797
1798 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1799
1800         * interp.c (sim_monitor): Make mon_printf work.
1801
1802 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1803
1804         * sim-main.h (INSN_NAME): New arg `cpu'.
1805
1806 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1807
1808         * configure: Regenerated to track ../common/aclocal.m4 changes.
1809
1810 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1811
1812         * configure: Regenerated to track ../common/aclocal.m4 changes.
1813         * config.in: Ditto.
1814
1815 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1816
1817         * acconfig.h: New file.
1818         * configure.in: Reverted change of Apr 24; use sinclude again.
1819
1820 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1821
1822         * configure: Regenerated to track ../common/aclocal.m4 changes.
1823         * config.in: Ditto.
1824
1825 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1826
1827         * configure.in: Don't call sinclude.
1828
1829 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1830
1831         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1832
1833 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1834
1835         * mips.igen (ERET): Implement.
1836
1837         * interp.c (decode_coproc): Return sign-extended EPC.
1838
1839         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1840
1841         * interp.c (signal_exception): Do not ignore Trap.
1842         (signal_exception): On TRAP, restart at exception address.
1843         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1844         (signal_exception): Update.
1845         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1846         so that TRAP instructions are caught.
1847
1848 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1849
1850         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1851         contains HI/LO access history.
1852         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1853         (HIACCESS, LOACCESS): Delete, replace with
1854         (HIHISTORY, LOHISTORY): New macros.
1855         (CHECKHILO): Delete all, moved to mips.igen
1856
1857         * gencode.c (build_instruction): Do not generate checks for
1858         correct HI/LO register usage.
1859
1860         * interp.c (old_engine_run): Delete checks for correct HI/LO
1861         register usage.
1862
1863         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1864         check_mf_cycles): New functions.
1865         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1866         do_divu, domultx, do_mult, do_multu): Use.
1867
1868         * tx.igen ("madd", "maddu"): Use.
1869
1870 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1871
1872         * mips.igen (DSRAV): Use function do_dsrav.
1873         (SRAV): Use new function do_srav.
1874
1875         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1876         (B): Sign extend 11 bit immediate.
1877         (EXT-B*): Shift 16 bit immediate left by 1.
1878         (ADDIU*): Don't sign extend immediate value.
1879
1880 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1881
1882         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1883
1884         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1885         functions.
1886
1887         * mips.igen (delayslot32, nullify_next_insn): New functions.
1888         (m16.igen): Always include.
1889         (do_*): Add more tracing.
1890
1891         * m16.igen (delayslot16): Add NIA argument, could be called by a
1892         32 bit MIPS16 instruction.
1893
1894         * interp.c (ifetch16): Move function from here.
1895         * sim-main.c (ifetch16): To here.
1896
1897         * sim-main.c (ifetch16, ifetch32): Update to match current
1898         implementations of LH, LW.
1899         (signal_exception): Don't print out incorrect hex value of illegal
1900         instruction.
1901
1902 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1903
1904         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1905         instruction.
1906
1907         * m16.igen: Implement MIPS16 instructions.
1908
1909         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1910         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1911         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1912         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1913         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1914         bodies of corresponding code from 32 bit insn to these.  Also used
1915         by MIPS16 versions of functions.
1916
1917         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1918         (IMEM16): Drop NR argument from macro.
1919
1920 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1921
1922         * Makefile.in (SIM_OBJS): Add sim-main.o.
1923
1924         * sim-main.h (address_translation, load_memory, store_memory,
1925         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1926         as INLINE_SIM_MAIN.
1927         (pr_addr, pr_uword64): Declare.
1928         (sim-main.c): Include when H_REVEALS_MODULE_P.
1929
1930         * interp.c (address_translation, load_memory, store_memory,
1931         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1932         from here.
1933         * sim-main.c: To here. Fix compilation problems.
1934
1935         * configure.in: Enable inlining.
1936         * configure: Re-config.
1937
1938 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1939
1940         * configure: Regenerated to track ../common/aclocal.m4 changes.
1941
1942 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1943
1944         * mips.igen: Include tx.igen.
1945         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1946         * tx.igen: New file, contains MADD and MADDU.
1947
1948         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1949         the hardwired constant `7'.
1950         (store_memory): Ditto.
1951         (LOADDRMASK): Move definition to sim-main.h.
1952
1953         mips.igen (MTC0): Enable for r3900.
1954         (ADDU): Add trace.
1955
1956         mips.igen (do_load_byte): Delete.
1957         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1958         do_store_right): New functions.
1959         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1960
1961         configure.in: Let the tx39 use igen again.
1962         configure: Update.
1963
1964 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1965
1966         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1967         not an address sized quantity.  Return zero for cache sizes.
1968
1969 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1970
1971         * mips.igen (r3900): r3900 does not support 64 bit integer
1972         operations.
1973
1974 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1975
1976         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1977         than igen one.
1978         * configure : Rebuild.
1979
1980 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1981
1982         * configure: Regenerated to track ../common/aclocal.m4 changes.
1983
1984 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1985
1986         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1987
1988 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1989
1990         * configure: Regenerated to track ../common/aclocal.m4 changes.
1991         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1992
1993 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1994
1995         * configure: Regenerated to track ../common/aclocal.m4 changes.
1996
1997 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1998
1999         * interp.c (Max, Min): Comment out functions. Not yet used.
2000
2001 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2002
2003         * configure: Regenerated to track ../common/aclocal.m4 changes.
2004
2005 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2006
2007         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2008         configurable settings for stand-alone simulator.
2009
2010         * configure.in: Added X11 search, just in case.
2011
2012         * configure: Regenerated.
2013
2014 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2015
2016         * interp.c (sim_write, sim_read, load_memory, store_memory):
2017         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2018
2019 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2020
2021         * sim-main.h (GETFCC): Return an unsigned value.
2022
2023 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2024
2025         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2026         (DADD): Result destination is RD not RT.
2027
2028 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2029
2030         * sim-main.h (HIACCESS, LOACCESS): Always define.
2031
2032         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2033
2034         * interp.c (sim_info): Delete.
2035
2036 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2037
2038         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2039         (mips_option_handler): New argument `cpu'.
2040         (sim_open): Update call to sim_add_option_table.
2041
2042 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * mips.igen (CxC1): Add tracing.
2045
2046 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * sim-main.h (Max, Min): Declare.
2049
2050         * interp.c (Max, Min): New functions.
2051
2052         * mips.igen (BC1): Add tracing.
2053
2054 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2055
2056         * interp.c Added memory map for stack in vr4100
2057
2058 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2059
2060         * interp.c (load_memory): Add missing "break"'s.
2061
2062 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2063
2064         * interp.c (sim_store_register, sim_fetch_register): Pass in
2065         length parameter.  Return -1.
2066
2067 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2068
2069         * interp.c: Added hardware init hook, fixed warnings.
2070
2071 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2072
2073         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2074
2075 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2076
2077         * interp.c (ifetch16): New function.
2078
2079         * sim-main.h (IMEM32): Rename IMEM.
2080         (IMEM16_IMMED): Define.
2081         (IMEM16): Define.
2082         (DELAY_SLOT): Update.
2083
2084         * m16run.c (sim_engine_run): New file.
2085
2086         * m16.igen: All instructions except LB.
2087         (LB): Call do_load_byte.
2088         * mips.igen (do_load_byte): New function.
2089         (LB): Call do_load_byte.
2090
2091         * mips.igen: Move spec for insn bit size and high bit from here.
2092         * Makefile.in (tmp-igen, tmp-m16): To here.
2093
2094         * m16.dc: New file, decode mips16 instructions.
2095
2096         * Makefile.in (SIM_NO_ALL): Define.
2097         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2098
2099 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2100
2101         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2102         point unit to 32 bit registers.
2103         * configure: Re-generate.
2104
2105 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2106
2107         * configure.in (sim_use_gen): Make IGEN the default simulator
2108         generator for generic 32 and 64 bit mips targets.
2109         * configure: Re-generate.
2110
2111 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2112
2113         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2114         bitsize.
2115
2116         * interp.c (sim_fetch_register, sim_store_register): Read/write
2117         FGR from correct location.
2118         (sim_open): Set size of FGR's according to
2119         WITH_TARGET_FLOATING_POINT_BITSIZE.
2120
2121         * sim-main.h (FGR): Store floating point registers in a separate
2122         array.
2123
2124 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2125
2126         * configure: Regenerated to track ../common/aclocal.m4 changes.
2127
2128 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2129
2130         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2131
2132         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2133
2134         * interp.c (pending_tick): New function.  Deliver pending writes.
2135
2136         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2137         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2138         it can handle mixed sized quantites and single bits.
2139
2140 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2141
2142         * interp.c (oengine.h): Do not include when building with IGEN.
2143         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2144         (sim_info): Ditto for PROCESSOR_64BIT.
2145         (sim_monitor): Replace ut_reg with unsigned_word.
2146         (*): Ditto for t_reg.
2147         (LOADDRMASK): Define.
2148         (sim_open): Remove defunct check that host FP is IEEE compliant,
2149         using software to emulate floating point.
2150         (value_fpr, ...): Always compile, was conditional on HASFPU.
2151
2152 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2153
2154         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2155         size.
2156
2157         * interp.c (SD, CPU): Define.
2158         (mips_option_handler): Set flags in each CPU.
2159         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2160         (sim_close): Do not clear STATE, deleted anyway.
2161         (sim_write, sim_read): Assume CPU zero's vm should be used for
2162         data transfers.
2163         (sim_create_inferior): Set the PC for all processors.
2164         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2165         argument.
2166         (mips16_entry): Pass correct nr of args to store_word, load_word.
2167         (ColdReset): Cold reset all cpu's.
2168         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2169         (sim_monitor, load_memory, store_memory, signal_exception): Use
2170         `CPU' instead of STATE_CPU.
2171
2172
2173         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2174         SD or CPU_.
2175
2176         * sim-main.h (signal_exception): Add sim_cpu arg.
2177         (SignalException*): Pass both SD and CPU to signal_exception.
2178         * interp.c (signal_exception): Update.
2179
2180         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2181         Ditto
2182         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2183         address_translation): Ditto
2184         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2185
2186 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2187
2188         * configure: Regenerated to track ../common/aclocal.m4 changes.
2189
2190 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2191
2192         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2193
2194         * mips.igen (model): Map processor names onto BFD name.
2195
2196         * sim-main.h (CPU_CIA): Delete.
2197         (SET_CIA, GET_CIA): Define
2198
2199 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2200
2201         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2202         regiser.
2203
2204         * configure.in (default_endian): Configure a big-endian simulator
2205         by default.
2206         * configure: Re-generate.
2207
2208 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2209
2210         * configure: Regenerated to track ../common/aclocal.m4 changes.
2211
2212 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2213
2214         * interp.c (sim_monitor): Handle Densan monitor outbyte
2215         and inbyte functions.
2216
2217 1997-12-29  Felix Lee  <flee@cygnus.com>
2218
2219         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2220
2221 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2222
2223         * Makefile.in (tmp-igen): Arrange for $zero to always be
2224         reset to zero after every instruction.
2225
2226 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2227
2228         * configure: Regenerated to track ../common/aclocal.m4 changes.
2229         * config.in: Ditto.
2230
2231 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2232
2233         * mips.igen (MSUB): Fix to work like MADD.
2234         * gencode.c (MSUB): Similarly.
2235
2236 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2237
2238         * configure: Regenerated to track ../common/aclocal.m4 changes.
2239
2240 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2241
2242         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2243
2244 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2245
2246         * sim-main.h (sim-fpu.h): Include.
2247
2248         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2249         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2250         using host independant sim_fpu module.
2251
2252 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2253
2254         * interp.c (signal_exception): Report internal errors with SIGABRT
2255         not SIGQUIT.
2256
2257         * sim-main.h (C0_CONFIG): New register.
2258         (signal.h): No longer include.
2259
2260         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2261
2262 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2263
2264         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2265
2266 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2267
2268         * mips.igen: Tag vr5000 instructions.
2269         (ANDI): Was missing mipsIV model, fix assembler syntax.
2270         (do_c_cond_fmt): New function.
2271         (C.cond.fmt): Handle mips I-III which do not support CC field
2272         separatly.
2273         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2274         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2275         in IV3.2 spec.
2276         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2277         vr5000 which saves LO in a GPR separatly.
2278
2279         * configure.in (enable-sim-igen): For vr5000, select vr5000
2280         specific instructions.
2281         * configure: Re-generate.
2282
2283 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2286
2287         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2288         fmt_uninterpreted_64 bit cases to switch.  Convert to
2289         fmt_formatted,
2290
2291         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2292
2293         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2294         as specified in IV3.2 spec.
2295         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2296
2297 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2298
2299         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2300         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2301         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2302         PENDING_FILL versions of instructions.  Simplify.
2303         (X): New function.
2304         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2305         instructions.
2306         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2307         a signed value.
2308         (MTHI, MFHI): Disable code checking HI-LO.
2309
2310         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2311         global.
2312         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2313
2314 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2315
2316         * gencode.c (build_mips16_operands): Replace IPC with cia.
2317
2318         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2319         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2320         IPC to `cia'.
2321         (UndefinedResult): Replace function with macro/function
2322         combination.
2323         (sim_engine_run): Don't save PC in IPC.
2324
2325         * sim-main.h (IPC): Delete.
2326
2327
2328         * interp.c (signal_exception, store_word, load_word,
2329         address_translation, load_memory, store_memory, cache_op,
2330         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2331         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2332         current instruction address - cia - argument.
2333         (sim_read, sim_write): Call address_translation directly.
2334         (sim_engine_run): Rename variable vaddr to cia.
2335         (signal_exception): Pass cia to sim_monitor
2336
2337         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2338         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2339         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2340
2341         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2342         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2343         SIM_ASSERT.
2344
2345         * interp.c (signal_exception): Pass restart address to
2346         sim_engine_restart.
2347
2348         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2349         idecode.o): Add dependency.
2350
2351         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2352         Delete definitions
2353         (DELAY_SLOT): Update NIA not PC with branch address.
2354         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2355
2356         * mips.igen: Use CIA not PC in branch calculations.
2357         (illegal): Call SignalException.
2358         (BEQ, ADDIU): Fix assembler.
2359
2360 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2361
2362         * m16.igen (JALX): Was missing.
2363
2364         * configure.in (enable-sim-igen): New configuration option.
2365         * configure: Re-generate.
2366
2367         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2368
2369         * interp.c (load_memory, store_memory): Delete parameter RAW.
2370         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2371         bypassing {load,store}_memory.
2372
2373         * sim-main.h (ByteSwapMem): Delete definition.
2374
2375         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2376
2377         * interp.c (sim_do_command, sim_commands): Delete mips specific
2378         commands.  Handled by module sim-options.
2379
2380         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2381         (WITH_MODULO_MEMORY): Define.
2382
2383         * interp.c (sim_info): Delete code printing memory size.
2384
2385         * interp.c (mips_size): Nee sim_size, delete function.
2386         (power2): Delete.
2387         (monitor, monitor_base, monitor_size): Delete global variables.
2388         (sim_open, sim_close): Delete code creating monitor and other
2389         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2390         manage memory regions.
2391         (load_memory, store_memory): Use sim-core for memory model.
2392
2393         * interp.c (address_translation): Delete all memory map code
2394         except line forcing 32 bit addresses.
2395
2396 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2397
2398         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2399         trace options.
2400
2401         * interp.c (logfh, logfile): Delete globals.
2402         (sim_open, sim_close): Delete code opening & closing log file.
2403         (mips_option_handler): Delete -l and -n options.
2404         (OPTION mips_options): Ditto.
2405
2406         * interp.c (OPTION mips_options): Rename option trace to dinero.
2407         (mips_option_handler): Update.
2408
2409 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2410
2411         * interp.c (fetch_str): New function.
2412         (sim_monitor): Rewrite using sim_read & sim_write.
2413         (sim_open): Check magic number.
2414         (sim_open): Write monitor vectors into memory using sim_write.
2415         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2416         (sim_read, sim_write): Simplify - transfer data one byte at a
2417         time.
2418         (load_memory, store_memory): Clarify meaning of parameter RAW.
2419
2420         * sim-main.h (isHOST): Defete definition.
2421         (isTARGET): Mark as depreciated.
2422         (address_translation): Delete parameter HOST.
2423
2424         * interp.c (address_translation): Delete parameter HOST.
2425
2426 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2427
2428         * mips.igen:
2429
2430         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2431         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2432
2433 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2434
2435         * mips.igen: Add model filter field to records.
2436
2437 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2438
2439         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2440
2441         interp.c (sim_engine_run): Do not compile function sim_engine_run
2442         when WITH_IGEN == 1.
2443
2444         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2445         target architecture.
2446
2447         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2448         igen. Replace with configuration variables sim_igen_flags /
2449         sim_m16_flags.
2450
2451         * m16.igen: New file.  Copy mips16 insns here.
2452         * mips.igen: From here.
2453
2454 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2457         to top.
2458         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2459
2460 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2461
2462         * gencode.c (build_instruction): Follow sim_write's lead in using
2463         BigEndianMem instead of !ByteSwapMem.
2464
2465 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2466
2467         * configure.in (sim_gen): Dependent on target, select type of
2468         generator.  Always select old style generator.
2469
2470         configure: Re-generate.
2471
2472         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2473         targets.
2474         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2475         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2476         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2477         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2478         SIM_@sim_gen@_*, set by autoconf.
2479
2480 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2481
2482         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2483
2484         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2485         CURRENT_FLOATING_POINT instead.
2486
2487         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2488         (address_translation): Raise exception InstructionFetch when
2489         translation fails and isINSTRUCTION.
2490
2491         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2492         sim_engine_run): Change type of of vaddr and paddr to
2493         address_word.
2494         (address_translation, prefetch, load_memory, store_memory,
2495         cache_op): Change type of vAddr and pAddr to address_word.
2496
2497         * gencode.c (build_instruction): Change type of vaddr and paddr to
2498         address_word.
2499
2500 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2501
2502         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2503         macro to obtain result of ALU op.
2504
2505 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2506
2507         * interp.c (sim_info): Call profile_print.
2508
2509 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2510
2511         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2512
2513         * sim-main.h (WITH_PROFILE): Do not define, defined in
2514         common/sim-config.h.  Use sim-profile module.
2515         (simPROFILE): Delete defintion.
2516
2517         * interp.c (PROFILE): Delete definition.
2518         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2519         (sim_close): Delete code writing profile histogram.
2520         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2521         Delete.
2522         (sim_engine_run): Delete code profiling the PC.
2523
2524 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2525
2526         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2527
2528         * interp.c (sim_monitor): Make register pointers of type
2529         unsigned_word*.
2530
2531         * sim-main.h: Make registers of type unsigned_word not
2532         signed_word.
2533
2534 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * interp.c (sync_operation): Rename from SyncOperation, make
2537         global, add SD argument.
2538         (prefetch): Rename from Prefetch, make global, add SD argument.
2539         (decode_coproc): Make global.
2540
2541         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2542
2543         * gencode.c (build_instruction): Generate DecodeCoproc not
2544         decode_coproc calls.
2545
2546         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2547         (SizeFGR): Move to sim-main.h
2548         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2549         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2550         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2551         sim-main.h.
2552         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2553         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2554         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2555         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2556         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2557         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2558
2559         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2560         exception.
2561         (sim-alu.h): Include.
2562         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2563         (sim_cia): Typedef to instruction_address.
2564
2565 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2566
2567         * Makefile.in (interp.o): Rename generated file engine.c to
2568         oengine.c.
2569
2570         * interp.c: Update.
2571
2572 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2573
2574         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2575
2576 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2577
2578         * gencode.c (build_instruction): For "FPSQRT", output correct
2579         number of arguments to Recip.
2580
2581 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * Makefile.in (interp.o): Depends on sim-main.h
2584
2585         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2586
2587         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2588         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2589         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2590         STATE, DSSTATE): Define
2591         (GPR, FGRIDX, ..): Define.
2592
2593         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2594         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2595         (GPR, FGRIDX, ...): Delete macros.
2596
2597         * interp.c: Update names to match defines from sim-main.h
2598
2599 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2600
2601         * interp.c (sim_monitor): Add SD argument.
2602         (sim_warning): Delete.  Replace calls with calls to
2603         sim_io_eprintf.
2604         (sim_error): Delete. Replace calls with sim_io_error.
2605         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2606         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2607         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2608         argument.
2609         (mips_size): Rename from sim_size. Add SD argument.
2610
2611         * interp.c (simulator): Delete global variable.
2612         (callback): Delete global variable.
2613         (mips_option_handler, sim_open, sim_write, sim_read,
2614         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2615         sim_size,sim_monitor): Use sim_io_* not callback->*.
2616         (sim_open): ZALLOC simulator struct.
2617         (PROFILE): Do not define.
2618
2619 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2620
2621         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2622         support.h with corresponding code.
2623
2624         * sim-main.h (word64, uword64), support.h: Move definition to
2625         sim-main.h.
2626         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2627
2628         * support.h: Delete
2629         * Makefile.in: Update dependencies
2630         * interp.c: Do not include.
2631
2632 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2633
2634         * interp.c (address_translation, load_memory, store_memory,
2635         cache_op): Rename to from AddressTranslation et.al., make global,
2636         add SD argument
2637
2638         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2639         CacheOp): Define.
2640
2641         * interp.c (SignalException): Rename to signal_exception, make
2642         global.
2643
2644         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2645
2646         * sim-main.h (SignalException, SignalExceptionInterrupt,
2647         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2648         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2649         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2650         Define.
2651
2652         * interp.c, support.h: Use.
2653
2654 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2655
2656         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2657         to value_fpr / store_fpr. Add SD argument.
2658         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2659         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2660
2661         * sim-main.h (ValueFPR, StoreFPR): Define.
2662
2663 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2664
2665         * interp.c (sim_engine_run): Check consistency between configure
2666         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2667         and HASFPU.
2668
2669         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2670         (mips_fpu): Configure WITH_FLOATING_POINT.
2671         (mips_endian): Configure WITH_TARGET_ENDIAN.
2672         * configure: Update.
2673
2674 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2675
2676         * configure: Regenerated to track ../common/aclocal.m4 changes.
2677
2678 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2679
2680         * configure: Regenerated.
2681
2682 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2683
2684         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2685
2686 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2687
2688         * gencode.c (print_igen_insn_models): Assume certain architectures
2689         include all mips* instructions.
2690         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2691         instruction.
2692
2693         * Makefile.in (tmp.igen): Add target. Generate igen input from
2694         gencode file.
2695
2696         * gencode.c (FEATURE_IGEN): Define.
2697         (main): Add --igen option.  Generate output in igen format.
2698         (process_instructions): Format output according to igen option.
2699         (print_igen_insn_format): New function.
2700         (print_igen_insn_models): New function.
2701         (process_instructions): Only issue warnings and ignore
2702         instructions when no FEATURE_IGEN.
2703
2704 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2705
2706         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2707         MIPS targets.
2708
2709 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2710
2711         * configure: Regenerated to track ../common/aclocal.m4 changes.
2712
2713 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2714
2715         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2716         SIM_RESERVED_BITS): Delete, moved to common.
2717         (SIM_EXTRA_CFLAGS): Update.
2718
2719 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2720
2721         * configure.in: Configure non-strict memory alignment.
2722         * configure: Regenerated to track ../common/aclocal.m4 changes.
2723
2724 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2725
2726         * configure: Regenerated to track ../common/aclocal.m4 changes.
2727
2728 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2729
2730         * gencode.c (SDBBP,DERET): Added (3900) insns.
2731         (RFE): Turn on for 3900.
2732         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2733         (dsstate): Made global.
2734         (SUBTARGET_R3900): Added.
2735         (CANCELDELAYSLOT): New.
2736         (SignalException): Ignore SystemCall rather than ignore and
2737         terminate.  Add DebugBreakPoint handling.
2738         (decode_coproc): New insns RFE, DERET; and new registers Debug
2739         and DEPC protected by SUBTARGET_R3900.
2740         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2741         bits explicitly.
2742         * Makefile.in,configure.in: Add mips subtarget option.
2743         * configure: Update.
2744
2745 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2746
2747         * gencode.c: Add r3900 (tx39).
2748
2749
2750 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2751
2752         * gencode.c (build_instruction): Don't need to subtract 4 for
2753         JALR, just 2.
2754
2755 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2756
2757         * interp.c: Correct some HASFPU problems.
2758
2759 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2760
2761         * configure: Regenerated to track ../common/aclocal.m4 changes.
2762
2763 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2764
2765         * interp.c (mips_options): Fix samples option short form, should
2766         be `x'.
2767
2768 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2769
2770         * interp.c (sim_info): Enable info code.  Was just returning.
2771
2772 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2773
2774         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2775         MFC0.
2776
2777 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2778
2779         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2780         constants.
2781         (build_instruction): Ditto for LL.
2782
2783 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2784
2785         * configure: Regenerated to track ../common/aclocal.m4 changes.
2786
2787 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2788
2789         * configure: Regenerated to track ../common/aclocal.m4 changes.
2790         * config.in: Ditto.
2791
2792 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2793
2794         * interp.c (sim_open): Add call to sim_analyze_program, update
2795         call to sim_config.
2796
2797 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2798
2799         * interp.c (sim_kill): Delete.
2800         (sim_create_inferior): Add ABFD argument. Set PC from same.
2801         (sim_load): Move code initializing trap handlers from here.
2802         (sim_open): To here.
2803         (sim_load): Delete, use sim-hload.c.
2804
2805         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2806
2807 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2808
2809         * configure: Regenerated to track ../common/aclocal.m4 changes.
2810         * config.in: Ditto.
2811
2812 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2813
2814         * interp.c (sim_open): Add ABFD argument.
2815         (sim_load): Move call to sim_config from here.
2816         (sim_open): To here.  Check return status.
2817
2818 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2819
2820         * gencode.c (build_instruction): Two arg MADD should
2821         not assign result to $0.
2822
2823 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2824
2825         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2826         * sim/mips/configure.in: Regenerate.
2827
2828 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2829
2830         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2831         signed8, unsigned8 et.al. types.
2832
2833         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2834         hosts when selecting subreg.
2835
2836 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2837
2838         * interp.c (sim_engine_run): Reset the ZERO register to zero
2839         regardless of FEATURE_WARN_ZERO.
2840         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2841
2842 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2843
2844         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2845         (SignalException): For BreakPoints ignore any mode bits and just
2846         save the PC.
2847         (SignalException): Always set the CAUSE register.
2848
2849 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2850
2851         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2852         exception has been taken.
2853
2854         * interp.c: Implement the ERET and mt/f sr instructions.
2855
2856 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2857
2858         * interp.c (SignalException): Don't bother restarting an
2859         interrupt.
2860
2861 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2862
2863         * interp.c (SignalException): Really take an interrupt.
2864         (interrupt_event): Only deliver interrupts when enabled.
2865
2866 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2867
2868         * interp.c (sim_info): Only print info when verbose.
2869         (sim_info) Use sim_io_printf for output.
2870
2871 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2872
2873         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2874         mips architectures.
2875
2876 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2877
2878         * interp.c (sim_do_command): Check for common commands if a
2879         simulator specific command fails.
2880
2881 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2882
2883         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2884         and simBE when DEBUG is defined.
2885
2886 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2887
2888         * interp.c (interrupt_event): New function.  Pass exception event
2889         onto exception handler.
2890
2891         * configure.in: Check for stdlib.h.
2892         * configure: Regenerate.
2893
2894         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2895         variable declaration.
2896         (build_instruction): Initialize memval1.
2897         (build_instruction): Add UNUSED attribute to byte, bigend,
2898         reverse.
2899         (build_operands): Ditto.
2900
2901         * interp.c: Fix GCC warnings.
2902         (sim_get_quit_code): Delete.
2903
2904         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2905         * Makefile.in: Ditto.
2906         * configure: Re-generate.
2907
2908         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2909
2910 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2911
2912         * interp.c (mips_option_handler): New function parse argumes using
2913         sim-options.
2914         (myname): Replace with STATE_MY_NAME.
2915         (sim_open): Delete check for host endianness - performed by
2916         sim_config.
2917         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2918         (sim_open): Move much of the initialization from here.
2919         (sim_load): To here.  After the image has been loaded and
2920         endianness set.
2921         (sim_open): Move ColdReset from here.
2922         (sim_create_inferior): To here.
2923         (sim_open): Make FP check less dependant on host endianness.
2924
2925         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2926         run.
2927         * interp.c (sim_set_callbacks): Delete.
2928
2929         * interp.c (membank, membank_base, membank_size): Replace with
2930         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2931         (sim_open): Remove call to callback->init. gdb/run do this.
2932
2933         * interp.c: Update
2934
2935         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2936
2937         * interp.c (big_endian_p): Delete, replaced by
2938         current_target_byte_order.
2939
2940 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2941
2942         * interp.c (host_read_long, host_read_word, host_swap_word,
2943         host_swap_long): Delete. Using common sim-endian.
2944         (sim_fetch_register, sim_store_register): Use H2T.
2945         (pipeline_ticks): Delete.  Handled by sim-events.
2946         (sim_info): Update.
2947         (sim_engine_run): Update.
2948
2949 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2952         reason from here.
2953         (SignalException): To here. Signal using sim_engine_halt.
2954         (sim_stop_reason): Delete, moved to common.
2955
2956 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2957
2958         * interp.c (sim_open): Add callback argument.
2959         (sim_set_callbacks): Delete SIM_DESC argument.
2960         (sim_size): Ditto.
2961
2962 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2963
2964         * Makefile.in (SIM_OBJS): Add common modules.
2965
2966         * interp.c (sim_set_callbacks): Also set SD callback.
2967         (set_endianness, xfer_*, swap_*): Delete.
2968         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2969         Change to functions using sim-endian macros.
2970         (control_c, sim_stop): Delete, use common version.
2971         (simulate): Convert into.
2972         (sim_engine_run): This function.
2973         (sim_resume): Delete.
2974
2975         * interp.c (simulation): New variable - the simulator object.
2976         (sim_kind): Delete global - merged into simulation.
2977         (sim_load): Cleanup.  Move PC assignment from here.
2978         (sim_create_inferior): To here.
2979
2980         * sim-main.h: New file.
2981         * interp.c (sim-main.h): Include.
2982
2983 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2984
2985         * configure: Regenerated to track ../common/aclocal.m4 changes.
2986
2987 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2988
2989         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2990
2991 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2992
2993         * gencode.c (build_instruction): DIV instructions: check
2994         for division by zero and integer overflow before using
2995         host's division operation.
2996
2997 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2998
2999         * Makefile.in (SIM_OBJS): Add sim-load.o.
3000         * interp.c: #include bfd.h.
3001         (target_byte_order): Delete.
3002         (sim_kind, myname, big_endian_p): New static locals.
3003         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3004         after argument parsing.  Recognize -E arg, set endianness accordingly.
3005         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3006         load file into simulator.  Set PC from bfd.
3007         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3008         (set_endianness): Use big_endian_p instead of target_byte_order.
3009
3010 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3011
3012         * interp.c (sim_size): Delete prototype - conflicts with
3013         definition in remote-sim.h.  Correct definition.
3014
3015 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3016
3017         * configure: Regenerated to track ../common/aclocal.m4 changes.
3018         * config.in: Ditto.
3019
3020 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3021
3022         * interp.c (sim_open): New arg `kind'.
3023
3024         * configure: Regenerated to track ../common/aclocal.m4 changes.
3025
3026 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3027
3028         * configure: Regenerated to track ../common/aclocal.m4 changes.
3029
3030 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3031
3032         * interp.c (sim_open): Set optind to 0 before calling getopt.
3033
3034 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3035
3036         * configure: Regenerated to track ../common/aclocal.m4 changes.
3037
3038 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3039
3040         * interp.c : Replace uses of pr_addr with pr_uword64
3041         where the bit length is always 64 independent of SIM_ADDR.
3042         (pr_uword64) : added.
3043
3044 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3045
3046         * configure: Re-generate.
3047
3048 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3049
3050         * configure: Regenerate to track ../common/aclocal.m4 changes.
3051
3052 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3053
3054         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3055         in argv form.
3056         (other sim_*): New SIM_DESC argument.
3057
3058 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3059
3060         * interp.c: Fix printing of addresses for non-64-bit targets.
3061         (pr_addr): Add function to print address based on size.
3062
3063 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3064
3065         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3066
3067 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3068
3069         * gencode.c (build_mips16_operands): Correct computation of base
3070         address for extended PC relative instruction.
3071
3072 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3073
3074         * interp.c (mips16_entry): Add support for floating point cases.
3075         (SignalException): Pass floating point cases to mips16_entry.
3076         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3077         registers.
3078         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3079         or fmt_word.
3080         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3081         and then set the state to fmt_uninterpreted.
3082         (COP_SW): Temporarily set the state to fmt_word while calling
3083         ValueFPR.
3084
3085 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3086
3087         * gencode.c (build_instruction): The high order may be set in the
3088         comparison flags at any ISA level, not just ISA 4.
3089
3090 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3091
3092         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3093         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3094         * configure.in: sinclude ../common/aclocal.m4.
3095         * configure: Regenerated.
3096
3097 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3098
3099         * configure: Rebuild after change to aclocal.m4.
3100
3101 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3102
3103         * configure configure.in Makefile.in:  Update to new configure
3104         scheme which is more compatible with WinGDB builds.
3105         * configure.in:  Improve comment on how to run autoconf.
3106         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3107         * Makefile.in:  Use autoconf substitution to install common
3108         makefile fragment.
3109
3110 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3111
3112         * gencode.c (build_instruction): Use BigEndianCPU instead of
3113         ByteSwapMem.
3114
3115 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3116
3117         * interp.c (sim_monitor): Make output to stdout visible in
3118         wingdb's I/O log window.
3119
3120 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3121
3122         * support.h: Undo previous change to SIGTRAP
3123         and SIGQUIT values.
3124
3125 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3126
3127         * interp.c (store_word, load_word): New static functions.
3128         (mips16_entry): New static function.
3129         (SignalException): Look for mips16 entry and exit instructions.
3130         (simulate): Use the correct index when setting fpr_state after
3131         doing a pending move.
3132
3133 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3134
3135         * interp.c: Fix byte-swapping code throughout to work on
3136         both little- and big-endian hosts.
3137
3138 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3139
3140         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3141         with gdb/config/i386/xm-windows.h.
3142
3143 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3144
3145         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3146         that messes up arithmetic shifts.
3147
3148 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3149
3150         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3151         SIGTRAP and SIGQUIT for _WIN32.
3152
3153 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3154
3155         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3156         force a 64 bit multiplication.
3157         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3158         destination register is 0, since that is the default mips16 nop
3159         instruction.
3160
3161 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3162
3163         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3164         (build_endian_shift): Don't check proc64.
3165         (build_instruction): Always set memval to uword64.  Cast op2 to
3166         uword64 when shifting it left in memory instructions.  Always use
3167         the same code for stores--don't special case proc64.
3168
3169         * gencode.c (build_mips16_operands): Fix base PC value for PC
3170         relative operands.
3171         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3172         jal instruction.
3173         * interp.c (simJALDELAYSLOT): Define.
3174         (JALDELAYSLOT): Define.
3175         (INDELAYSLOT, INJALDELAYSLOT): Define.
3176         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3177
3178 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3179
3180         * interp.c (sim_open): add flush_cache as a PMON routine
3181         (sim_monitor): handle flush_cache by ignoring it
3182
3183 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3184
3185         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3186         BigEndianMem.
3187         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3188         (BigEndianMem): Rename to ByteSwapMem and change sense.
3189         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3190         BigEndianMem references to !ByteSwapMem.
3191         (set_endianness): New function, with prototype.
3192         (sim_open): Call set_endianness.
3193         (sim_info): Use simBE instead of BigEndianMem.
3194         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3195         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3196         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3197         ifdefs, keeping the prototype declaration.
3198         (swap_word): Rewrite correctly.
3199         (ColdReset): Delete references to CONFIG.  Delete endianness related
3200         code; moved to set_endianness.
3201
3202 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3203
3204         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3205         * interp.c (CHECKHILO): Define away.
3206         (simSIGINT): New macro.
3207         (membank_size): Increase from 1MB to 2MB.
3208         (control_c): New function.
3209         (sim_resume): Rename parameter signal to signal_number.  Add local
3210         variable prev.  Call signal before and after simulate.
3211         (sim_stop_reason): Add simSIGINT support.
3212         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3213         functions always.
3214         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3215         if logfh is NULL.
3216         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3217         a call to sim_warning.
3218
3219 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3220
3221         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3222         16 bit instructions.
3223
3224 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3225
3226         Add support for mips16 (16 bit MIPS implementation):
3227         * gencode.c (inst_type): Add mips16 instruction encoding types.
3228         (GETDATASIZEINSN): Define.
3229         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3230         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3231         mtlo.
3232         (MIPS16_DECODE): New table, for mips16 instructions.
3233         (bitmap_val): New static function.
3234         (struct mips16_op): Define.
3235         (mips16_op_table): New table, for mips16 operands.
3236         (build_mips16_operands): New static function.
3237         (process_instructions): If PC is odd, decode a mips16
3238         instruction.  Break out instruction handling into new
3239         build_instruction function.
3240         (build_instruction): New static function, broken out of
3241         process_instructions.  Check modifiers rather than flags for SHIFT
3242         bit count and m[ft]{hi,lo} direction.
3243         (usage): Pass program name to fprintf.
3244         (main): Remove unused variable this_option_optind.  Change
3245         ``*loptarg++'' to ``loptarg++''.
3246         (my_strtoul): Parenthesize && within ||.
3247         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3248         (simulate): If PC is odd, fetch a 16 bit instruction, and
3249         increment PC by 2 rather than 4.
3250         * configure.in: Add case for mips16*-*-*.
3251         * configure: Rebuild.
3252
3253 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3254
3255         * interp.c: Allow -t to enable tracing in standalone simulator.
3256         Fix garbage output in trace file and error messages.
3257
3258 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3259
3260         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3261         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3262         * configure.in: Simplify using macros in ../common/aclocal.m4.
3263         * configure: Regenerated.
3264         * tconfig.in: New file.
3265
3266 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3267
3268         * interp.c: Fix bugs in 64-bit port.
3269         Use ansi function declarations for msvc compiler.
3270         Initialize and test file pointer in trace code.
3271         Prevent duplicate definition of LAST_EMED_REGNUM.
3272
3273 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3274
3275         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3276
3277 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3278
3279         * interp.c (SignalException): Check for explicit terminating
3280         breakpoint value.
3281         * gencode.c: Pass instruction value through SignalException()
3282         calls for Trap, Breakpoint and Syscall.
3283
3284 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3285
3286         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3287         only used on those hosts that provide it.
3288         * configure.in: Add sqrt() to list of functions to be checked for.
3289         * config.in: Re-generated.
3290         * configure: Re-generated.
3291
3292 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3293
3294         * gencode.c (process_instructions): Call build_endian_shift when
3295         expanding STORE RIGHT, to fix swr.
3296         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3297         clear the high bits.
3298         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3299         Fix float to int conversions to produce signed values.
3300
3301 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3302
3303         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3304         (process_instructions): Correct handling of nor instruction.
3305         Correct shift count for 32 bit shift instructions. Correct sign
3306         extension for arithmetic shifts to not shift the number of bits in
3307         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3308         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3309         Fix madd.
3310         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3311         It's OK to have a mult follow a mult.  What's not OK is to have a
3312         mult follow an mfhi.
3313         (Convert): Comment out incorrect rounding code.
3314
3315 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3316
3317         * interp.c (sim_monitor): Improved monitor printf
3318         simulation. Tidied up simulator warnings, and added "--log" option
3319         for directing warning message output.
3320         * gencode.c: Use sim_warning() rather than WARNING macro.
3321
3322 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3323
3324         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3325         getopt1.o, rather than on gencode.c.  Link objects together.
3326         Don't link against -liberty.
3327         (gencode.o, getopt.o, getopt1.o): New targets.
3328         * gencode.c: Include <ctype.h> and "ansidecl.h".
3329         (AND): Undefine after including "ansidecl.h".
3330         (ULONG_MAX): Define if not defined.
3331         (OP_*): Don't define macros; now defined in opcode/mips.h.
3332         (main): Call my_strtoul rather than strtoul.
3333         (my_strtoul): New static function.
3334
3335 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3336
3337         * gencode.c (process_instructions):  Generate word64 and uword64
3338         instead of `long long' and `unsigned long long' data types.
3339         * interp.c:  #include sysdep.h to get signals, and define default
3340         for SIGBUS.
3341         * (Convert):  Work around for Visual-C++ compiler bug with type
3342         conversion.
3343         * support.h:  Make things compile under Visual-C++ by using
3344         __int64 instead of `long long'.  Change many refs to long long
3345         into word64/uword64 typedefs.
3346
3347 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3348
3349         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3350         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3351         (docdir): Removed.
3352         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3353         (AC_PROG_INSTALL): Added.
3354         (AC_PROG_CC): Moved to before configure.host call.
3355         * configure: Rebuilt.
3356
3357 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3358
3359         * configure.in: Define @SIMCONF@ depending on mips target.
3360         * configure: Rebuild.
3361         * Makefile.in (run): Add @SIMCONF@ to control simulator
3362         construction.
3363         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3364         * interp.c: Remove some debugging, provide more detailed error
3365         messages, update memory accesses to use LOADDRMASK.
3366
3367 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3368
3369         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3370         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3371         stamp-h.
3372         * configure: Rebuild.
3373         * config.in: New file, generated by autoheader.
3374         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3375         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3376         HAVE_ANINT and HAVE_AINT, as appropriate.
3377         * Makefile.in (run): Use @LIBS@ rather than -lm.
3378         (interp.o): Depend upon config.h.
3379         (Makefile): Just rebuild Makefile.
3380         (clean): Remove stamp-h.
3381         (mostlyclean): Make the same as clean, not as distclean.
3382         (config.h, stamp-h): New targets.
3383
3384 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3385
3386         * interp.c (ColdReset): Fix boolean test. Make all simulator
3387         globals static.
3388
3389 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3390
3391         * interp.c (xfer_direct_word, xfer_direct_long,
3392         swap_direct_word, swap_direct_long, xfer_big_word,
3393         xfer_big_long, xfer_little_word, xfer_little_long,
3394         swap_word,swap_long): Added.
3395         * interp.c (ColdReset): Provide function indirection to
3396         host<->simulated_target transfer routines.
3397         * interp.c (sim_store_register, sim_fetch_register): Updated to
3398         make use of indirected transfer routines.
3399
3400 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3401
3402         * gencode.c (process_instructions): Ensure FP ABS instruction
3403         recognised.
3404         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3405         system call support.
3406
3407 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3408
3409         * interp.c (sim_do_command): Complain if callback structure not
3410         initialised.
3411
3412 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3413
3414         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3415         support for Sun hosts.
3416         * Makefile.in (gencode): Ensure the host compiler and libraries
3417         used for cross-hosted build.
3418
3419 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3420
3421         * interp.c, gencode.c: Some more (TODO) tidying.
3422
3423 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3424
3425         * gencode.c, interp.c: Replaced explicit long long references with
3426         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3427         * support.h (SET64LO, SET64HI): Macros added.
3428
3429 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3430
3431         * configure: Regenerate with autoconf 2.7.
3432
3433 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3434
3435         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3436         * support.h: Remove superfluous "1" from #if.
3437         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3438
3439 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3440
3441         * interp.c (StoreFPR): Control UndefinedResult() call on
3442         WARN_RESULT manifest.
3443
3444 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3445
3446         * gencode.c: Tidied instruction decoding, and added FP instruction
3447         support.
3448
3449         * interp.c: Added dineroIII, and BSD profiling support. Also
3450         run-time FP handling.
3451
3452 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3453
3454         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3455         gencode.c, interp.c, support.h: created.