1 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
3 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
4 configurable settings for stand-alone simulator.
7 * configure.in: Added --with-sim-gpu2 option to specify path of
8 sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
9 links/compiles stand-alone simulator with this library.
11 * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
14 * configure.in: Added X11 search, just in case.
16 * configure: Regenerated.
18 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
20 * interp.c (sim_write, sim_read, load_memory, store_memory):
21 Replace sim_core_*_map with read_map, write_map, exec_map resp.
24 Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
26 * vr4320.igen (clz,dclz) : Added.
27 (dmac): Replaced 99, with LO.
31 Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
33 * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
37 Tue Mar 3 11:56:29 1998 Gavin Koch <gavin@cygnus.com>
39 * vr4320.igen: New file.
40 * Makefile.in (vr4320.igen) : Added.
41 * configure.in (mips64vr4320-*-*): Added.
42 * configure : Rebuilt.
43 * mips.igen : Correct the bfd-names in the mips-ISA model entries.
44 Add the vr4320 model entry and mark the vr4320 insn as necessary.
47 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
49 * sim-main.h (GETFCC): Return an unsigned value.
52 * r5900.igen: Use an unsigned array index variable `i'.
53 (QFSRV): Ditto for variable bytes.
56 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
58 * mips.igen (DIV): Fix check for -1 / MIN_INT.
59 (DADD): Result destination is RD not RT.
62 * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
63 (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
67 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
69 * sim-main.h (HIACCESS, LOACCESS): Always define.
71 * mdmx.igen (Maxi, Mini): Rename Max, Min.
73 * interp.c (sim_info): Delete.
75 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
77 * interp.c (DECLARE_OPTION_HANDLER): Use it.
78 (mips_option_handler): New argument `cpu'.
79 (sim_open): Update call to sim_add_option_table.
81 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
83 * mips.igen (CxC1): Add tracing.
86 Wed Feb 25 13:59:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
88 * r5900.igen (StoreFP): Delete.
89 (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
91 (rsqrt.s, sqrt.s): Implement.
92 (r59cond): New function.
93 (C.COND.S): Call r59cond in assembler line.
94 (cvt.w.s, cvt.s.w): Implement.
96 * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
99 * sim-main.h: Define an enum of r5900 FCSR bit fields.
103 Tue Feb 24 14:44:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
105 * r5900.igen: Add tracing to all p* instructions.
107 Tue Feb 24 02:47:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
109 * interp.c (sim_store_register, sim_fetch_register): Pull swifty
110 to get gdb talking to re-aranged sim_cpu register structure.
113 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
115 * sim-main.h (Max, Min): Declare.
117 * interp.c (Max, Min): New functions.
119 * mips.igen (BC1): Add tracing.
121 start-sanitize-vr5400
122 Fri Feb 20 16:27:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
124 * mdmx.igen: Tag all functions as requiring either with mdmx or
129 Fri Feb 20 15:55:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
131 * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
133 (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
135 * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
137 * r5900.igen: Rewrite.
139 * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
141 (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
142 Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
145 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
147 * interp.c Added memory map for stack in vr4100
149 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
151 * interp.c (load_memory): Add missing "break"'s.
153 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
155 * interp.c (sim_store_register, sim_fetch_register): Pass in
156 length parameter. Return -1.
158 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
160 * interp.c: Added hardware init hook, fixed warnings.
162 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
164 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
166 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
168 * interp.c (ifetch16): New function.
170 * sim-main.h (IMEM32): Rename IMEM.
171 (IMEM16_IMMED): Define.
173 (DELAY_SLOT): Update.
175 * m16run.c (sim_engine_run): New file.
177 * m16.igen: All instructions except LB.
178 (LB): Call do_load_byte.
179 * mips.igen (do_load_byte): New function.
180 (LB): Call do_load_byte.
182 * mips.igen: Move spec for insn bit size and high bit from here.
183 * Makefile.in (tmp-igen, tmp-m16): To here.
185 * m16.dc: New file, decode mips16 instructions.
187 * Makefile.in (SIM_NO_ALL): Define.
188 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
191 * m16.igen: Mark all mips16 insns as being part of the tx19 insn
195 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
197 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
198 point unit to 32 bit registers.
199 * configure: Re-generate.
201 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
203 * configure.in (sim_use_gen): Make IGEN the default simulator
204 generator for generic 32 and 64 bit mips targets.
205 * configure: Re-generate.
207 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
209 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
212 * interp.c (sim_fetch_register, sim_store_register): Read/write
213 FGR from correct location.
214 (sim_open): Set size of FGR's according to
215 WITH_TARGET_FLOATING_POINT_BITSIZE.
217 * sim-main.h (FGR): Store floating point registers in a separate
220 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
222 * configure: Regenerated to track ../common/aclocal.m4 changes.
224 start-sanitize-vr5400
225 * mdmx.igen: Mark all instructions as 64bit/fp specific.
228 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
230 * interp.c (ColdReset): Call PENDING_INVALIDATE.
232 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
234 * interp.c (pending_tick): New function. Deliver pending writes.
236 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
237 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
238 it can handle mixed sized quantites and single bits.
240 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
242 * interp.c (oengine.h): Do not include when building with IGEN.
243 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
244 (sim_info): Ditto for PROCESSOR_64BIT.
245 (sim_monitor): Replace ut_reg with unsigned_word.
246 (*): Ditto for t_reg.
247 (LOADDRMASK): Define.
248 (sim_open): Remove defunct check that host FP is IEEE compliant,
249 using software to emulate floating point.
250 (value_fpr, ...): Always compile, was conditional on HASFPU.
252 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
254 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
257 * interp.c (SD, CPU): Define.
258 (mips_option_handler): Set flags in each CPU.
259 (interrupt_event): Assume CPU 0 is the one being iterrupted.
260 (sim_close): Do not clear STATE, deleted anyway.
261 (sim_write, sim_read): Assume CPU zero's vm should be used for
263 (sim_create_inferior): Set the PC for all processors.
264 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
266 (mips16_entry): Pass correct nr of args to store_word, load_word.
267 (ColdReset): Cold reset all cpu's.
268 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
269 (sim_monitor, load_memory, store_memory, signal_exception): Use
270 `CPU' instead of STATE_CPU.
273 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
276 * sim-main.h (signal_exception): Add sim_cpu arg.
277 (SignalException*): Pass both SD and CPU to signal_exception.
278 * interp.c (signal_exception): Update.
280 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
282 (sync_operation, prefetch, cache_op, store_memory, load_memory,
283 address_translation): Ditto
284 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
286 start-sanitize-vr5400
287 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
289 (ByteAlign): Use StoreFPR, pass args in correct order.
293 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
295 * configure.in (sim_igen_filter): For r5900, configure as SMP.
298 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
300 * configure: Regenerated to track ../common/aclocal.m4 changes.
302 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
305 * configure.in (sim_igen_filter): For r5900, use igen.
306 * configure: Re-generate.
309 * interp.c (sim_engine_run): Add `nr_cpus' argument.
311 * mips.igen (model): Map processor names onto BFD name.
313 * sim-main.h (CPU_CIA): Delete.
314 (SET_CIA, GET_CIA): Define
316 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
318 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
321 * configure.in (default_endian): Configure a big-endian simulator
323 * configure: Re-generate.
325 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
327 * configure: Regenerated to track ../common/aclocal.m4 changes.
329 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
331 * interp.c (sim_monitor): Handle Densan monitor outbyte
332 and inbyte functions.
334 1997-12-29 Felix Lee <flee@cygnus.com>
336 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
338 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
340 * Makefile.in (tmp-igen): Arrange for $zero to always be
341 reset to zero after every instruction.
343 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
345 * configure: Regenerated to track ../common/aclocal.m4 changes.
348 start-sanitize-vr5400
349 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
351 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
355 start-sanitize-vr5400
356 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
358 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
359 vr5400 with the vr5000 as the default.
362 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
364 * mips.igen (MSUB): Fix to work like MADD.
365 * gencode.c (MSUB): Similarly.
367 start-sanitize-vr5400
368 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
370 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
374 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
376 * configure: Regenerated to track ../common/aclocal.m4 changes.
378 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
380 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
382 start-sanitize-vr5400
383 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
384 (value_cc, store_cc): Implement.
386 * sim-main.h: Add 8*3*8 bit accumulator.
388 * vr5400.igen: Move mdmx instructins from here
389 * mdmx.igen: To here - new file. Add/fix missing instructions.
390 * mips.igen: Include mdmx.igen.
391 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
394 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
396 * sim-main.h (sim-fpu.h): Include.
398 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
399 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
400 using host independant sim_fpu module.
402 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
404 * interp.c (signal_exception): Report internal errors with SIGABRT
407 * sim-main.h (C0_CONFIG): New register.
408 (signal.h): No longer include.
410 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
412 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
414 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
416 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
418 * mips.igen: Tag vr5000 instructions.
419 (ANDI): Was missing mipsIV model, fix assembler syntax.
420 (do_c_cond_fmt): New function.
421 (C.cond.fmt): Handle mips I-III which do not support CC field
423 (bc1): Handle mips IV which do not have a delaed FCC separatly.
424 (SDR): Mask paddr when BigEndianMem, not the converse as specified
426 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
427 vr5000 which saves LO in a GPR separatly.
429 * configure.in (enable-sim-igen): For vr5000, select vr5000
430 specific instructions.
431 * configure: Re-generate.
433 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
435 * Makefile.in (SIM_OBJS): Add sim-fpu module.
437 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
438 fmt_uninterpreted_64 bit cases to switch. Convert to
441 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
443 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
444 as specified in IV3.2 spec.
445 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
447 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
449 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
450 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
451 (start-sanitize-r5900):
452 (LWXC1, SWXC1): Delete from r5900 instruction set.
453 (end-sanitize-r5900):
454 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
455 PENDING_FILL versions of instructions. Simplify.
457 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
459 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
461 (MTHI, MFHI): Disable code checking HI-LO.
463 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
465 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
467 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
469 * gencode.c (build_mips16_operands): Replace IPC with cia.
471 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
472 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
474 (UndefinedResult): Replace function with macro/function
476 (sim_engine_run): Don't save PC in IPC.
478 * sim-main.h (IPC): Delete.
480 start-sanitize-vr5400
481 * vr5400.igen (vr): Add missing cia argument to value_fpr.
482 (do_select): Rename function select.
485 * interp.c (signal_exception, store_word, load_word,
486 address_translation, load_memory, store_memory, cache_op,
487 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
488 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
489 current instruction address - cia - argument.
490 (sim_read, sim_write): Call address_translation directly.
491 (sim_engine_run): Rename variable vaddr to cia.
492 (signal_exception): Pass cia to sim_monitor
494 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
495 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
496 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
498 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
499 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
502 * interp.c (signal_exception): Pass restart address to
505 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
506 idecode.o): Add dependency.
508 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
510 (DELAY_SLOT): Update NIA not PC with branch address.
511 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
513 * mips.igen: Use CIA not PC in branch calculations.
514 (illegal): Call SignalException.
515 (BEQ, ADDIU): Fix assembler.
517 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
519 * m16.igen (JALX): Was missing.
521 * configure.in (enable-sim-igen): New configuration option.
522 * configure: Re-generate.
524 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
526 * interp.c (load_memory, store_memory): Delete parameter RAW.
527 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
528 bypassing {load,store}_memory.
530 * sim-main.h (ByteSwapMem): Delete definition.
532 * Makefile.in (SIM_OBJS): Add sim-memopt module.
534 * interp.c (sim_do_command, sim_commands): Delete mips specific
535 commands. Handled by module sim-options.
537 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
538 (WITH_MODULO_MEMORY): Define.
540 * interp.c (sim_info): Delete code printing memory size.
542 * interp.c (mips_size): Nee sim_size, delete function.
544 (monitor, monitor_base, monitor_size): Delete global variables.
545 (sim_open, sim_close): Delete code creating monitor and other
546 memory regions. Use sim-memopts module, via sim_do_commandf, to
547 manage memory regions.
548 (load_memory, store_memory): Use sim-core for memory model.
550 * interp.c (address_translation): Delete all memory map code
551 except line forcing 32 bit addresses.
553 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
555 * sim-main.h (WITH_TRACE): Delete definition. Enables common
558 * interp.c (logfh, logfile): Delete globals.
559 (sim_open, sim_close): Delete code opening & closing log file.
560 (mips_option_handler): Delete -l and -n options.
561 (OPTION mips_options): Ditto.
563 * interp.c (OPTION mips_options): Rename option trace to dinero.
564 (mips_option_handler): Update.
566 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
568 * interp.c (fetch_str): New function.
569 (sim_monitor): Rewrite using sim_read & sim_write.
570 (sim_open): Check magic number.
571 (sim_open): Write monitor vectors into memory using sim_write.
572 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
573 (sim_read, sim_write): Simplify - transfer data one byte at a
575 (load_memory, store_memory): Clarify meaning of parameter RAW.
577 * sim-main.h (isHOST): Defete definition.
578 (isTARGET): Mark as depreciated.
579 (address_translation): Delete parameter HOST.
581 * interp.c (address_translation): Delete parameter HOST.
584 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
586 * gencode.c: Add tx49 configury and insns.
587 * configure.in: Add tx49 configury.
591 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
595 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
596 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
598 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
600 * mips.igen: Add model filter field to records.
602 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
604 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
606 interp.c (sim_engine_run): Do not compile function sim_engine_run
609 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
612 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
613 igen. Replace with configuration variables sim_igen_flags /
617 * r5900.igen: New file. Copy r5900 insns here.
619 start-sanitize-vr5400
620 * vr5400.igen: New file.
622 * m16.igen: New file. Copy mips16 insns here.
623 * mips.igen: From here.
625 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
627 start-sanitize-vr5400
628 * mips.igen: Tag all mipsIV instructions with vr5400 model.
630 * configure.in: Add mips64vr5400 target.
631 * configure: Re-generate.
634 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
636 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
638 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
640 * gencode.c (build_instruction): Follow sim_write's lead in using
641 BigEndianMem instead of !ByteSwapMem.
643 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
645 * configure.in (sim_gen): Dependent on target, select type of
646 generator. Always select old style generator.
648 configure: Re-generate.
650 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
652 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
653 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
654 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
655 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
656 SIM_@sim_gen@_*, set by autoconf.
658 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
660 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
662 * interp.c (ColdReset): Remove #ifdef HASFPU, check
663 CURRENT_FLOATING_POINT instead.
665 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
666 (address_translation): Raise exception InstructionFetch when
667 translation fails and isINSTRUCTION.
669 * interp.c (sim_open, sim_write, sim_monitor, store_word,
670 sim_engine_run): Change type of of vaddr and paddr to
672 (address_translation, prefetch, load_memory, store_memory,
673 cache_op): Change type of vAddr and pAddr to address_word.
675 * gencode.c (build_instruction): Change type of vaddr and paddr to
678 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
680 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
681 macro to obtain result of ALU op.
683 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
685 * interp.c (sim_info): Call profile_print.
687 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
689 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
691 * sim-main.h (WITH_PROFILE): Do not define, defined in
692 common/sim-config.h. Use sim-profile module.
693 (simPROFILE): Delete defintion.
695 * interp.c (PROFILE): Delete definition.
696 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
697 (sim_close): Delete code writing profile histogram.
698 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
700 (sim_engine_run): Delete code profiling the PC.
702 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
704 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
706 * interp.c (sim_monitor): Make register pointers of type
709 * sim-main.h: Make registers of type unsigned_word not
712 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
715 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
716 ...): Move to sim-main.h
719 * interp.c (sync_operation): Rename from SyncOperation, make
720 global, add SD argument.
721 (prefetch): Rename from Prefetch, make global, add SD argument.
722 (decode_coproc): Make global.
724 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
726 * gencode.c (build_instruction): Generate DecodeCoproc not
729 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
730 (SizeFGR): Move to sim-main.h
731 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
732 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
733 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
735 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
736 FP_RM_TOMINF, GETRM): Move to sim-main.h.
737 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
738 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
739 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
740 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
742 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
744 (sim-alu.h): Include.
745 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
746 (sim_cia): Typedef to instruction_address.
748 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
750 * Makefile.in (interp.o): Rename generated file engine.c to
755 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
757 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
759 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
761 * gencode.c (build_instruction): For "FPSQRT", output correct
762 number of arguments to Recip.
764 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
766 * Makefile.in (interp.o): Depends on sim-main.h
768 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
770 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
771 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
772 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
773 STATE, DSSTATE): Define
774 (GPR, FGRIDX, ..): Define.
776 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
777 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
778 (GPR, FGRIDX, ...): Delete macros.
780 * interp.c: Update names to match defines from sim-main.h
782 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
784 * interp.c (sim_monitor): Add SD argument.
785 (sim_warning): Delete. Replace calls with calls to
787 (sim_error): Delete. Replace calls with sim_io_error.
788 (open_trace, writeout32, writeout16, getnum): Add SD argument.
789 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
790 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
792 (mips_size): Rename from sim_size. Add SD argument.
794 * interp.c (simulator): Delete global variable.
795 (callback): Delete global variable.
796 (mips_option_handler, sim_open, sim_write, sim_read,
797 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
798 sim_size,sim_monitor): Use sim_io_* not callback->*.
799 (sim_open): ZALLOC simulator struct.
800 (PROFILE): Do not define.
802 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
804 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
805 support.h with corresponding code.
807 * sim-main.h (word64, uword64), support.h: Move definition to
809 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
812 * Makefile.in: Update dependencies
813 * interp.c: Do not include.
815 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
817 * interp.c (address_translation, load_memory, store_memory,
818 cache_op): Rename to from AddressTranslation et.al., make global,
821 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
824 * interp.c (SignalException): Rename to signal_exception, make
827 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
829 * sim-main.h (SignalException, SignalExceptionInterrupt,
830 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
831 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
832 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
835 * interp.c, support.h: Use.
837 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
839 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
840 to value_fpr / store_fpr. Add SD argument.
841 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
842 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
844 * sim-main.h (ValueFPR, StoreFPR): Define.
846 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
848 * interp.c (sim_engine_run): Check consistency between configure
849 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
852 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
853 (mips_fpu): Configure WITH_FLOATING_POINT.
854 (mips_endian): Configure WITH_TARGET_ENDIAN.
857 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
859 * configure: Regenerated to track ../common/aclocal.m4 changes.
862 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
864 * interp.c (MAX_REG): Allow up-to 128 registers.
865 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
866 (REGISTER_SA): Ditto.
867 (sim_open): Initialize register_widths for r5900 specific
869 (sim_fetch_register, sim_store_register): Check for request of
870 r5900 specific SA register. Check for request for hi 64 bits of
871 r5900 specific registers.
874 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
876 * configure: Regenerated.
878 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
880 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
882 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
884 * gencode.c (print_igen_insn_models): Assume certain architectures
885 include all mips* instructions.
886 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
889 * Makefile.in (tmp.igen): Add target. Generate igen input from
892 * gencode.c (FEATURE_IGEN): Define.
893 (main): Add --igen option. Generate output in igen format.
894 (process_instructions): Format output according to igen option.
895 (print_igen_insn_format): New function.
896 (print_igen_insn_models): New function.
897 (process_instructions): Only issue warnings and ignore
898 instructions when no FEATURE_IGEN.
900 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
902 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
905 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
907 * configure: Regenerated to track ../common/aclocal.m4 changes.
909 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
911 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
912 SIM_RESERVED_BITS): Delete, moved to common.
913 (SIM_EXTRA_CFLAGS): Update.
915 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
917 * configure.in: Configure non-strict memory alignment.
918 * configure: Regenerated to track ../common/aclocal.m4 changes.
920 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
922 * configure: Regenerated to track ../common/aclocal.m4 changes.
924 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
926 * gencode.c (SDBBP,DERET): Added (3900) insns.
927 (RFE): Turn on for 3900.
928 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
929 (dsstate): Made global.
930 (SUBTARGET_R3900): Added.
931 (CANCELDELAYSLOT): New.
932 (SignalException): Ignore SystemCall rather than ignore and
933 terminate. Add DebugBreakPoint handling.
934 (decode_coproc): New insns RFE, DERET; and new registers Debug
935 and DEPC protected by SUBTARGET_R3900.
936 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
938 * Makefile.in,configure.in: Add mips subtarget option.
941 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
943 * gencode.c: Add r3900 (tx39).
946 * gencode.c: Fix some configuration problems by improving
947 the relationship between tx19 and tx39.
950 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
952 * gencode.c (build_instruction): Don't need to subtract 4 for
955 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
957 * interp.c: Correct some HASFPU problems.
959 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
961 * configure: Regenerated to track ../common/aclocal.m4 changes.
963 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
965 * interp.c (mips_options): Fix samples option short form, should
968 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
970 * interp.c (sim_info): Enable info code. Was just returning.
972 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
974 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
977 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
979 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
981 (build_instruction): Ditto for LL.
984 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
986 * mips/configure.in, mips/gencode: Add tx19/r1900.
989 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
991 * configure: Regenerated to track ../common/aclocal.m4 changes.
994 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
996 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
997 for overflow due to ABS of MININT, set result to MAXINT.
998 (build_instruction): For "psrlvw", signextend bit 31.
1001 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1003 * configure: Regenerated to track ../common/aclocal.m4 changes.
1006 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1008 * interp.c (sim_open): Add call to sim_analyze_program, update
1011 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1013 * interp.c (sim_kill): Delete.
1014 (sim_create_inferior): Add ABFD argument. Set PC from same.
1015 (sim_load): Move code initializing trap handlers from here.
1016 (sim_open): To here.
1017 (sim_load): Delete, use sim-hload.c.
1019 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1021 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1023 * configure: Regenerated to track ../common/aclocal.m4 changes.
1026 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1028 * interp.c (sim_open): Add ABFD argument.
1029 (sim_load): Move call to sim_config from here.
1030 (sim_open): To here. Check return status.
1032 start-sanitize-r5900
1033 * gencode.c (build_instruction): Do not define x8000000000000000,
1034 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1037 start-sanitize-r5900
1038 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1040 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1041 "pdivuw" check for overflow due to signed divide by -1.
1044 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1046 * gencode.c (build_instruction): Two arg MADD should
1047 not assign result to $0.
1049 start-sanitize-r5900
1050 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1052 * gencode.c (build_instruction): For "ppac5" use unsigned
1053 arrithmetic so that the sign bit doesn't smear when right shifted.
1054 (build_instruction): For "pdiv" perform sign extension when
1055 storing results in HI and LO.
1056 (build_instructions): For "pdiv" and "pdivbw" check for
1058 (build_instruction): For "pmfhl.slw" update hi part of dest
1059 register as well as low part.
1060 (build_instruction): For "pmfhl" portably handle long long values.
1061 (build_instruction): For "pmfhl.sh" correctly negative values.
1062 Store half words 2 and three in the correct place.
1063 (build_instruction): For "psllvw", sign extend value after shift.
1066 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1068 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1069 * sim/mips/configure.in: Regenerate.
1071 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1073 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1074 signed8, unsigned8 et.al. types.
1076 start-sanitize-r5900
1077 * gencode.c (build_instruction): For PMULTU* do not sign extend
1078 registers. Make generated code easier to debug.
1081 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1082 hosts when selecting subreg.
1084 start-sanitize-r5900
1085 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
1087 * gencode.c (type_for_data_len): For 32bit operations concerned
1088 with overflow, perform op using 64bits.
1089 (build_instruction): For PADD, always compute operation using type
1090 returned by type_for_data_len.
1091 (build_instruction): For PSUBU, when overflow, saturate to zero as
1095 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1097 start-sanitize-r5900
1098 * gencode.c (build_instruction): Handle "pext5" according to
1099 version 1.95 of the r5900 ISA.
1101 * gencode.c (build_instruction): Handle "ppac5" according to
1102 version 1.95 of the r5900 ISA.
1105 * interp.c (sim_engine_run): Reset the ZERO register to zero
1106 regardless of FEATURE_WARN_ZERO.
1107 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1109 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1111 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1112 (SignalException): For BreakPoints ignore any mode bits and just
1114 (SignalException): Always set the CAUSE register.
1116 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1118 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1119 exception has been taken.
1121 * interp.c: Implement the ERET and mt/f sr instructions.
1123 start-sanitize-r5900
1124 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
1126 * gencode.c (build_instruction): For paddu, extract unsigned
1129 * gencode.c (build_instruction): Saturate padds instead of padd
1133 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1135 * interp.c (SignalException): Don't bother restarting an
1138 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1140 * interp.c (SignalException): Really take an interrupt.
1141 (interrupt_event): Only deliver interrupts when enabled.
1143 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1145 * interp.c (sim_info): Only print info when verbose.
1146 (sim_info) Use sim_io_printf for output.
1148 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1150 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1153 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1155 * interp.c (sim_do_command): Check for common commands if a
1156 simulator specific command fails.
1158 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1160 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1161 and simBE when DEBUG is defined.
1163 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1165 * interp.c (interrupt_event): New function. Pass exception event
1166 onto exception handler.
1168 * configure.in: Check for stdlib.h.
1169 * configure: Regenerate.
1171 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1172 variable declaration.
1173 (build_instruction): Initialize memval1.
1174 (build_instruction): Add UNUSED attribute to byte, bigend,
1176 (build_operands): Ditto.
1178 * interp.c: Fix GCC warnings.
1179 (sim_get_quit_code): Delete.
1181 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1182 * Makefile.in: Ditto.
1183 * configure: Re-generate.
1185 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1187 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1189 * interp.c (mips_option_handler): New function parse argumes using
1191 (myname): Replace with STATE_MY_NAME.
1192 (sim_open): Delete check for host endianness - performed by
1194 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1195 (sim_open): Move much of the initialization from here.
1196 (sim_load): To here. After the image has been loaded and
1198 (sim_open): Move ColdReset from here.
1199 (sim_create_inferior): To here.
1200 (sim_open): Make FP check less dependant on host endianness.
1202 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1204 * interp.c (sim_set_callbacks): Delete.
1206 * interp.c (membank, membank_base, membank_size): Replace with
1207 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1208 (sim_open): Remove call to callback->init. gdb/run do this.
1212 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1214 * interp.c (big_endian_p): Delete, replaced by
1215 current_target_byte_order.
1217 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1219 * interp.c (host_read_long, host_read_word, host_swap_word,
1220 host_swap_long): Delete. Using common sim-endian.
1221 (sim_fetch_register, sim_store_register): Use H2T.
1222 (pipeline_ticks): Delete. Handled by sim-events.
1224 (sim_engine_run): Update.
1226 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1228 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1230 (SignalException): To here. Signal using sim_engine_halt.
1231 (sim_stop_reason): Delete, moved to common.
1233 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1235 * interp.c (sim_open): Add callback argument.
1236 (sim_set_callbacks): Delete SIM_DESC argument.
1239 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1241 * Makefile.in (SIM_OBJS): Add common modules.
1243 * interp.c (sim_set_callbacks): Also set SD callback.
1244 (set_endianness, xfer_*, swap_*): Delete.
1245 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1246 Change to functions using sim-endian macros.
1247 (control_c, sim_stop): Delete, use common version.
1248 (simulate): Convert into.
1249 (sim_engine_run): This function.
1250 (sim_resume): Delete.
1252 * interp.c (simulation): New variable - the simulator object.
1253 (sim_kind): Delete global - merged into simulation.
1254 (sim_load): Cleanup. Move PC assignment from here.
1255 (sim_create_inferior): To here.
1257 * sim-main.h: New file.
1258 * interp.c (sim-main.h): Include.
1260 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1262 * configure: Regenerated to track ../common/aclocal.m4 changes.
1264 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1266 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1268 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1270 * gencode.c (build_instruction): DIV instructions: check
1271 for division by zero and integer overflow before using
1272 host's division operation.
1274 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1276 * Makefile.in (SIM_OBJS): Add sim-load.o.
1277 * interp.c: #include bfd.h.
1278 (target_byte_order): Delete.
1279 (sim_kind, myname, big_endian_p): New static locals.
1280 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1281 after argument parsing. Recognize -E arg, set endianness accordingly.
1282 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1283 load file into simulator. Set PC from bfd.
1284 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1285 (set_endianness): Use big_endian_p instead of target_byte_order.
1287 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1289 * interp.c (sim_size): Delete prototype - conflicts with
1290 definition in remote-sim.h. Correct definition.
1292 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1294 * configure: Regenerated to track ../common/aclocal.m4 changes.
1297 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1299 * interp.c (sim_open): New arg `kind'.
1301 * configure: Regenerated to track ../common/aclocal.m4 changes.
1303 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1305 * configure: Regenerated to track ../common/aclocal.m4 changes.
1307 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1309 * interp.c (sim_open): Set optind to 0 before calling getopt.
1311 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1313 * configure: Regenerated to track ../common/aclocal.m4 changes.
1315 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1317 * interp.c : Replace uses of pr_addr with pr_uword64
1318 where the bit length is always 64 independent of SIM_ADDR.
1319 (pr_uword64) : added.
1321 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1323 * configure: Re-generate.
1325 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1327 * configure: Regenerate to track ../common/aclocal.m4 changes.
1329 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1331 * interp.c (sim_open): New SIM_DESC result. Argument is now
1333 (other sim_*): New SIM_DESC argument.
1335 start-sanitize-r5900
1336 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
1338 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1339 Change values to avoid overloading DOUBLEWORD which is tested
1341 * gencode.c: reinstate "offending code".
1344 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1346 * interp.c: Fix printing of addresses for non-64-bit targets.
1347 (pr_addr): Add function to print address based on size.
1348 start-sanitize-r5900
1349 * gencode.c: #ifdef out offending code until a permanent fix
1350 can be added. Code is causing build errors for non-5900 mips targets.
1353 start-sanitize-r5900
1354 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
1356 * gencode.c (process_instructions): Correct test for ISA dependent
1357 architecture bits in isa field of MIPS_DECODE.
1360 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1362 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1364 start-sanitize-r5900
1365 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
1367 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1371 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1373 * gencode.c (build_mips16_operands): Correct computation of base
1374 address for extended PC relative instruction.
1376 start-sanitize-r5900
1377 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1379 * Makefile.in, configure, configure.in, gencode.c,
1380 interp.c, support.h: add r5900.
1383 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1385 * interp.c (mips16_entry): Add support for floating point cases.
1386 (SignalException): Pass floating point cases to mips16_entry.
1387 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1389 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1391 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1392 and then set the state to fmt_uninterpreted.
1393 (COP_SW): Temporarily set the state to fmt_word while calling
1396 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1398 * gencode.c (build_instruction): The high order may be set in the
1399 comparison flags at any ISA level, not just ISA 4.
1401 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1403 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1404 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1405 * configure.in: sinclude ../common/aclocal.m4.
1406 * configure: Regenerated.
1408 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1410 * configure: Rebuild after change to aclocal.m4.
1412 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1414 * configure configure.in Makefile.in: Update to new configure
1415 scheme which is more compatible with WinGDB builds.
1416 * configure.in: Improve comment on how to run autoconf.
1417 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1418 * Makefile.in: Use autoconf substitution to install common
1421 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1423 * gencode.c (build_instruction): Use BigEndianCPU instead of
1426 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1428 * interp.c (sim_monitor): Make output to stdout visible in
1429 wingdb's I/O log window.
1431 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1433 * support.h: Undo previous change to SIGTRAP
1436 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1438 * interp.c (store_word, load_word): New static functions.
1439 (mips16_entry): New static function.
1440 (SignalException): Look for mips16 entry and exit instructions.
1441 (simulate): Use the correct index when setting fpr_state after
1442 doing a pending move.
1444 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1446 * interp.c: Fix byte-swapping code throughout to work on
1447 both little- and big-endian hosts.
1449 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1451 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1452 with gdb/config/i386/xm-windows.h.
1454 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1456 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1457 that messes up arithmetic shifts.
1459 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1461 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1462 SIGTRAP and SIGQUIT for _WIN32.
1464 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1466 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1467 force a 64 bit multiplication.
1468 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1469 destination register is 0, since that is the default mips16 nop
1472 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1474 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1475 (build_endian_shift): Don't check proc64.
1476 (build_instruction): Always set memval to uword64. Cast op2 to
1477 uword64 when shifting it left in memory instructions. Always use
1478 the same code for stores--don't special case proc64.
1480 * gencode.c (build_mips16_operands): Fix base PC value for PC
1482 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1484 * interp.c (simJALDELAYSLOT): Define.
1485 (JALDELAYSLOT): Define.
1486 (INDELAYSLOT, INJALDELAYSLOT): Define.
1487 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1489 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1491 * interp.c (sim_open): add flush_cache as a PMON routine
1492 (sim_monitor): handle flush_cache by ignoring it
1494 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1496 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1498 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1499 (BigEndianMem): Rename to ByteSwapMem and change sense.
1500 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1501 BigEndianMem references to !ByteSwapMem.
1502 (set_endianness): New function, with prototype.
1503 (sim_open): Call set_endianness.
1504 (sim_info): Use simBE instead of BigEndianMem.
1505 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1506 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1507 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1508 ifdefs, keeping the prototype declaration.
1509 (swap_word): Rewrite correctly.
1510 (ColdReset): Delete references to CONFIG. Delete endianness related
1511 code; moved to set_endianness.
1513 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1515 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1516 * interp.c (CHECKHILO): Define away.
1517 (simSIGINT): New macro.
1518 (membank_size): Increase from 1MB to 2MB.
1519 (control_c): New function.
1520 (sim_resume): Rename parameter signal to signal_number. Add local
1521 variable prev. Call signal before and after simulate.
1522 (sim_stop_reason): Add simSIGINT support.
1523 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1525 (sim_warning): Delete call to SignalException. Do call printf_filtered
1527 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1528 a call to sim_warning.
1530 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1532 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1533 16 bit instructions.
1535 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1537 Add support for mips16 (16 bit MIPS implementation):
1538 * gencode.c (inst_type): Add mips16 instruction encoding types.
1539 (GETDATASIZEINSN): Define.
1540 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1541 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1543 (MIPS16_DECODE): New table, for mips16 instructions.
1544 (bitmap_val): New static function.
1545 (struct mips16_op): Define.
1546 (mips16_op_table): New table, for mips16 operands.
1547 (build_mips16_operands): New static function.
1548 (process_instructions): If PC is odd, decode a mips16
1549 instruction. Break out instruction handling into new
1550 build_instruction function.
1551 (build_instruction): New static function, broken out of
1552 process_instructions. Check modifiers rather than flags for SHIFT
1553 bit count and m[ft]{hi,lo} direction.
1554 (usage): Pass program name to fprintf.
1555 (main): Remove unused variable this_option_optind. Change
1556 ``*loptarg++'' to ``loptarg++''.
1557 (my_strtoul): Parenthesize && within ||.
1558 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1559 (simulate): If PC is odd, fetch a 16 bit instruction, and
1560 increment PC by 2 rather than 4.
1561 * configure.in: Add case for mips16*-*-*.
1562 * configure: Rebuild.
1564 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1566 * interp.c: Allow -t to enable tracing in standalone simulator.
1567 Fix garbage output in trace file and error messages.
1569 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1571 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1572 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1573 * configure.in: Simplify using macros in ../common/aclocal.m4.
1574 * configure: Regenerated.
1575 * tconfig.in: New file.
1577 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1579 * interp.c: Fix bugs in 64-bit port.
1580 Use ansi function declarations for msvc compiler.
1581 Initialize and test file pointer in trace code.
1582 Prevent duplicate definition of LAST_EMED_REGNUM.
1584 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1586 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1588 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1590 * interp.c (SignalException): Check for explicit terminating
1592 * gencode.c: Pass instruction value through SignalException()
1593 calls for Trap, Breakpoint and Syscall.
1595 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1597 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1598 only used on those hosts that provide it.
1599 * configure.in: Add sqrt() to list of functions to be checked for.
1600 * config.in: Re-generated.
1601 * configure: Re-generated.
1603 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1605 * gencode.c (process_instructions): Call build_endian_shift when
1606 expanding STORE RIGHT, to fix swr.
1607 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1608 clear the high bits.
1609 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1610 Fix float to int conversions to produce signed values.
1612 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1614 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1615 (process_instructions): Correct handling of nor instruction.
1616 Correct shift count for 32 bit shift instructions. Correct sign
1617 extension for arithmetic shifts to not shift the number of bits in
1618 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1619 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1621 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1622 It's OK to have a mult follow a mult. What's not OK is to have a
1623 mult follow an mfhi.
1624 (Convert): Comment out incorrect rounding code.
1626 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1628 * interp.c (sim_monitor): Improved monitor printf
1629 simulation. Tidied up simulator warnings, and added "--log" option
1630 for directing warning message output.
1631 * gencode.c: Use sim_warning() rather than WARNING macro.
1633 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1635 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1636 getopt1.o, rather than on gencode.c. Link objects together.
1637 Don't link against -liberty.
1638 (gencode.o, getopt.o, getopt1.o): New targets.
1639 * gencode.c: Include <ctype.h> and "ansidecl.h".
1640 (AND): Undefine after including "ansidecl.h".
1641 (ULONG_MAX): Define if not defined.
1642 (OP_*): Don't define macros; now defined in opcode/mips.h.
1643 (main): Call my_strtoul rather than strtoul.
1644 (my_strtoul): New static function.
1646 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1648 * gencode.c (process_instructions): Generate word64 and uword64
1649 instead of `long long' and `unsigned long long' data types.
1650 * interp.c: #include sysdep.h to get signals, and define default
1652 * (Convert): Work around for Visual-C++ compiler bug with type
1654 * support.h: Make things compile under Visual-C++ by using
1655 __int64 instead of `long long'. Change many refs to long long
1656 into word64/uword64 typedefs.
1658 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1660 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1661 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1663 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1664 (AC_PROG_INSTALL): Added.
1665 (AC_PROG_CC): Moved to before configure.host call.
1666 * configure: Rebuilt.
1668 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1670 * configure.in: Define @SIMCONF@ depending on mips target.
1671 * configure: Rebuild.
1672 * Makefile.in (run): Add @SIMCONF@ to control simulator
1674 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1675 * interp.c: Remove some debugging, provide more detailed error
1676 messages, update memory accesses to use LOADDRMASK.
1678 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1680 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1681 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1683 * configure: Rebuild.
1684 * config.in: New file, generated by autoheader.
1685 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1686 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1687 HAVE_ANINT and HAVE_AINT, as appropriate.
1688 * Makefile.in (run): Use @LIBS@ rather than -lm.
1689 (interp.o): Depend upon config.h.
1690 (Makefile): Just rebuild Makefile.
1691 (clean): Remove stamp-h.
1692 (mostlyclean): Make the same as clean, not as distclean.
1693 (config.h, stamp-h): New targets.
1695 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1697 * interp.c (ColdReset): Fix boolean test. Make all simulator
1700 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1702 * interp.c (xfer_direct_word, xfer_direct_long,
1703 swap_direct_word, swap_direct_long, xfer_big_word,
1704 xfer_big_long, xfer_little_word, xfer_little_long,
1705 swap_word,swap_long): Added.
1706 * interp.c (ColdReset): Provide function indirection to
1707 host<->simulated_target transfer routines.
1708 * interp.c (sim_store_register, sim_fetch_register): Updated to
1709 make use of indirected transfer routines.
1711 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1713 * gencode.c (process_instructions): Ensure FP ABS instruction
1715 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1716 system call support.
1718 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1720 * interp.c (sim_do_command): Complain if callback structure not
1723 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1725 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1726 support for Sun hosts.
1727 * Makefile.in (gencode): Ensure the host compiler and libraries
1728 used for cross-hosted build.
1730 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1732 * interp.c, gencode.c: Some more (TODO) tidying.
1734 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1736 * gencode.c, interp.c: Replaced explicit long long references with
1737 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1738 * support.h (SET64LO, SET64HI): Macros added.
1740 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1742 * configure: Regenerate with autoconf 2.7.
1744 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1746 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1747 * support.h: Remove superfluous "1" from #if.
1748 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1750 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1752 * interp.c (StoreFPR): Control UndefinedResult() call on
1753 WARN_RESULT manifest.
1755 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1757 * gencode.c: Tidied instruction decoding, and added FP instruction
1760 * interp.c: Added dineroIII, and BSD profiling support. Also
1761 run-time FP handling.
1763 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1765 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1766 gencode.c, interp.c, support.h: created.