sim/mips/ChangeLog

   1 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
   8
   9 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * config.in, configure: Regenerate.
  12         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  13         and strings.h include.
  14
  15 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * configure: Regenerate.
  18
  19 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  22         * configure: Regenerate.
  23
  24 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * configure: Regenerate.
  27
  28 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * configure: Regenerate.
  31
  32 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  33
  34         *  sim-main.c: Include <stdlib.h>.
  35
  36 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  37
  38         * cp1.c: Include <stdlib.h>.
  39
  40 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  41
  42         * configure: Re-generate.
  43
  44 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  45
  46         * configure: Regenerate.
  47
  48 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  49
  50         PR sim/20808
  51         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  52         and SD to sd.
  53
  54 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  55
  56         PR sim/20809
  57         * mips.igen (check_u64): Enable for `r3900'.
  58
  59 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  62         STATE_PROG_BFD (sd).
  63         * configure: Regenerate.
  64
  65 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  66             Maciej W. Rozycki  <macro@imgtec.com>
  67
  68         PR sim/19441
  69         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  70         `micromips64' and `micromipsdsp' only.
  71         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  72         (do_micromips_jalr, do_micromips_jal): Likewise.
  73         (compute_movep_src_reg): Likewise.
  74         (compute_andi16_imm): Likewise.
  75         (convert_fmt_micromips): Likewise.
  76         (convert_fmt_micromips_cvt_d): Likewise.
  77         (convert_fmt_micromips_cvt_s): Likewise.
  78         (FMT_MICROMIPS): Likewise.
  79         (FMT_MICROMIPS_CVT_D): Likewise.
  80         (FMT_MICROMIPS_CVT_S): Likewise.
  81
  82 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * interp.c: Include elf-bfd.h.
  85         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
  86         ELFCLASS32.
  87
  88 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  89
  90         * config.in, configure: Regenerate.
  91
  92 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  93
  94         * configure: Regenerate.
  95
  96 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  97
  98         * configure: Regenerate.
  99
 100 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 101
 102         * configure: Regenerate.
 103
 104 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 105
 106         * configure: Regenerate.
 107
 108 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 109
 110         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 111         * configure: Regenerate.
 112
 113 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 114
 115         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 116         * configure: Regenerate.
 117
 118 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 119
 120         * configure: Regenerate.
 121
 122 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 123
 124         * configure: Regenerate.
 125
 126 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * config.in, configure: Regenerate.
 129
 130 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 131
 132         * interp.c (sim_open): Mark argv const.
 133         (sim_create_inferior): Mark argv and env const.
 134
 135 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * configure: Regenerate.
 138
 139 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 140
 141         * interp.c (sim_open): Update sim_parse_args comment.
 142
 143 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 144
 145         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 146         * configure: Regenerate.
 147
 148 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 151         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 152         * configure: Regenerate.
 153         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 154
 155 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 156
 157         * dv-tx3904cpu.c (CPU, SD): Delete.
 158
 159 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 162         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 163         (sim_store_register): Rename to ...
 164         (mips_reg_store): ... this.  Delete local cpu var.
 165         Update sim_io_eprintf calls.
 166         (sim_fetch_register): Rename to ...
 167         (mips_reg_fetch): ... this.  Delete local cpu var.
 168         Update sim_io_eprintf calls.
 169
 170 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 173
 174 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * config.in, configure: Regenerate.
 177
 178 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * interp.c (sim_write, sim_read): Delete.
 181         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 182         (load_word): Likewise.
 183         * micromips.igen (cache): Likewise.
 184         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 185         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 186         do_store_left, do_store_right, do_load_double, do_store_double):
 187         Likewise.
 188         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 189         (do_prefx): Likewise.
 190         * sim-main.c (address_translation, prefetch): Delete.
 191         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 192         paddr=vaddr.
 193         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 194         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 195         (LoadMemory, StoreMemory): Delete CCA arg.
 196
 197 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 200         * configure: Regenerated.
 201
 202 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 203
 204         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 205         * tconfig.h: Delete.
 206
 207 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * tconfig.h (SIM_HANDLES_LMA): Delete.
 210
 211 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 212
 213         * sim-main.h (WITH_WATCHPOINTS): Delete.
 214
 215 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 216
 217         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 218
 219 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 220
 221         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 222
 223 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 224
 225         * micromips.igen (process_isa_mode): Fix left shift of negative
 226         value.
 227
 228 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 229
 230         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 231
 232 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 233
 234         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 235
 236 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 237
 238         * interp.c (sim_close): Rename to ...
 239         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 240         sim_io_shutdown.
 241         * sim-main.h (mips_sim_close): Declare.
 242         (SIM_CLOSE_HOOK): Define.
 243
 244 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 245             Ali Lown  <ali.lown@imgtec.com>
 246
 247         * Makefile.in (tmp-micromips): New rule.
 248         (tmp-mach-multi): Add support for micromips.
 249         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 250         that works for both mips64 and micromips64.
 251         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 252         micromips32.
 253         Add build support for micromips.
 254         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 255         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 256         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 257         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 258         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 259         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 260         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 261         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 262         Refactored instruction code to use these functions.
 263         * dsp2.igen: Refactored instruction code to use the new functions.
 264         * interp.c (decode_coproc): Refactored to work with any instruction
 265         encoding.
 266         (isa_mode): New variable
 267         (RSVD_INSTRUCTION): Changed to 0x00000039.
 268         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 269         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 270         * micromips.dc: New file.
 271         * micromips.igen: New file.
 272         * micromips16.dc: New file.
 273         * micromipsdsp.igen: New file.
 274         * micromipsrun.c: New file.
 275         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 276         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 277         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 278         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 279         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 280         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 281         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 282         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 283         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 284         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 285         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 286         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 287         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 288         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 289         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 290         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 291         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 292         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 293         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 294         instructions.
 295         Refactored instruction code to use these functions.
 296         (RSVD): Changed to use new reserved instruction.
 297         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 298         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 299         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 300         do_store_double):  Added micromips32 and micromips64 models.
 301         Added include for micromips.igen and micromipsdsp.igen
 302         Add micromips32 and micromips64 models.
 303         (DecodeCoproc): Updated to use new macro definition.
 304         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 305         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 306         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 307         Refactored instruction code to use these functions.
 308         * sim-main.h (CP0_operation): New enum.
 309         (DecodeCoproc): Updated macro.
 310         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 311         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 312         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 313         ISA_MODE_MICROMIPS): New defines.
 314         (sim_state): Add isa_mode field.
 315
 316 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 317
 318         * configure: Regenerate.
 319
 320 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 321
 322         * configure.ac: Change configure.in to configure.ac.
 323         * configure: Regenerate.
 324
 325 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 326
 327         * configure: Regenerate.
 328
 329 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 330
 331         * interp.c [TRACE]: Delete.
 332         (TRACE): Change to WITH_TRACE_ANY_P.
 333         [!WITH_TRACE_ANY_P] (open_trace): Define.
 334         (mips_option_handler, open_trace, sim_close, dotrace):
 335         Change defined(TRACE) to WITH_TRACE_ANY_P.
 336         (sim_open): Delete TRACE ifdef check.
 337         * sim-main.c (load_memory): Delete TRACE ifdef check.
 338         (store_memory): Likewise.
 339         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 340         [!WITH_TRACE_ANY_P] (dotrace): Define.
 341
 342 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 343
 344         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 345         comments.
 346
 347 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 348
 349         * sim-main.h (SIM_CPU): Delete.
 350
 351 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 352
 353         * sim-main.h (sim_cia): Delete.
 354
 355 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 356
 357         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 358         PU_PC_GET.
 359         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 360         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 361         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 362         CIA_SET to CPU_PC_SET.
 363         * sim-main.h (CIA_GET, CIA_SET): Delete.
 364
 365 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 366
 367         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 368         * sim-main.h (STATE_CPU): Delete.
 369
 370 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * configure: Regenerate.
 373
 374 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 377         * interp.c (mips_pc_get, mips_pc_set): New functions.
 378         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 379         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 380         (sim_pc_get): Delete.
 381         * sim-main.h (SIM_CPU): Define.
 382         (struct sim_state): Change cpu to an array of pointers.
 383         (STATE_CPU): Drop &.
 384
 385 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 386
 387         * interp.c (mips_option_handler, open_trace, sim_close,
 388         sim_write, sim_read, sim_store_register, sim_fetch_register,
 389         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 390         prototypes.
 391         (sim_open): Convert old style prototype.  Change casts with
 392         sim_write to unsigned char *.
 393         (fetch_str): Change null to unsigned char, and change cast to
 394         unsigned char *.
 395         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 396         unsigned char *.
 397
 398 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 399
 400         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 401
 402 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 403
 404         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 405
 406 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 407
 408         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 409
 410 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 411
 412         * config.in, configure: Regenerate.
 413
 414 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 415
 416         * interp.c (sim_pc_get): New function.
 417
 418 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 419
 420         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 421         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 422
 423 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 424
 425         * configure: Regenerate.
 426
 427 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * configure: Regenerate.
 430
 431 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 432
 433         * configure: Regenerate.
 434         * configure.ac (mips_extra_objs): Delete.
 435         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 436         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 437
 438 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 439
 440         * configure: Regenerate.
 441         * configure.ac: Delete sim_hw checks for dv-sockser.
 442
 443 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 444
 445         * config.in, configure: Regenerate.
 446         * tconfig.in: Rename file ...
 447         * tconfig.h: ... here.
 448
 449 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 450
 451         * tconfig.in: Delete includes.
 452         [HAVE_DV_SOCKSER]: Delete.
 453
 454 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 455
 456         * Makefile.in (SIM_RUN_OBJS): Delete.
 457
 458 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 459
 460         * configure.ac (AC_CHECK_HEADERS): Delete.
 461         * aclocal.m4, configure: Regenerate.
 462
 463 2014-08-19  Alan Modra  <amodra@gmail.com>
 464
 465         * configure: Regenerate.
 466
 467 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 468
 469         * configure: Regenerate.
 470         * config.in: Regenerate.
 471
 472 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 473
 474         * configure: Regenerate.
 475
 476 2013-09-23  Alan Modra  <amodra@gmail.com>
 477
 478         * configure: Regenerate.
 479
 480 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 481
 482         * aclocal.m4, configure: Regenerate.
 483
 484 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 485
 486         * configure: Rebuild.
 487
 488 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 489
 490         * configure: Regenerate.
 491
 492 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 493
 494         * configure.ac: Address use of dv-sockser.o.
 495         * tconfig.in: Conditionalize use of dv_sockser_install.
 496         * configure: Regenerated.
 497         * config.in: Regenerated.
 498
 499 2012-10-04  Chao-ying Fu  <fu@mips.com>
 500             Steve Ellcey  <sellcey@mips.com>
 501
 502         * mips/mips3264r2.igen (rdhwr): New.
 503
 504 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 505
 506         * configure.ac: Always link against dv-sockser.o.
 507         * configure: Regenerate.
 508
 509 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 510
 511         * config.in, configure: Regenerate.
 512
 513 2012-05-18  Nick Clifton  <nickc@redhat.com>
 514
 515         PR 14072
 516         * interp.c: Include config.h before system header files.
 517
 518 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 519
 520         * aclocal.m4, config.in, configure: Regenerate.
 521
 522 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 523
 524         * aclocal.m4: New file.
 525         * configure: Regenerate.
 526
 527 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 528
 529         * configure: Regenerate after common/acinclude.m4 update.
 530
 531 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 532
 533         * configure.ac: Change include to common/acinclude.m4.
 534
 535 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 536
 537         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 538         call.  Replace common.m4 include with SIM_AC_COMMON.
 539         * configure: Regenerate.
 540
 541 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 542
 543         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 544         $(SIM_EXTRA_DEPS).
 545         (tmp-mach-multi): Exit early when igen fails.
 546
 547 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 548
 549         * interp.c (sim_do_command): Delete.
 550
 551 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 552
 553         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 554         (tx3904sio_fifo_reset): Likewise.
 555         * interp.c (sim_monitor): Likewise.
 556
 557 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 558
 559         * interp.c (sim_write): Add const to buffer arg.
 560
 561 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 562
 563         * interp.c: Don't include sysdep.h
 564
 565 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 566
 567         * configure: Regenerate.
 568
 569 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 570
 571         * config.in: Regenerate.
 572         * configure: Likewise.
 573
 574         * configure: Regenerate.
 575
 576 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 577
 578         * configure: Regenerate to track ../common/common.m4 changes.
 579         * config.in: Ditto.
 580
 581 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 582             Daniel Jacobowitz  <dan@codesourcery.com>
 583             Joseph Myers  <joseph@codesourcery.com>
 584
 585         * configure: Regenerate.
 586
 587 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 588
 589         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 590         that unconditionally allows fmt_ps.
 591         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 592         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 593         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 594         filter from 64,f to 32,f.
 595         (PREFX): Change filter from 64 to 32.
 596         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 597         that use do_load_double instead of do_load.  Make both LUXC1
 598         versions unpredictable if SizeFGR () != 64.
 599         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 600         instead of do_store.  Remove unused variable.  Make both SUXC1
 601         versions unpredictable if SizeFGR () != 64.
 602
 603 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 604
 605         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 606         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 607         shifts for that case.
 608
 609 2007-09-04  Nick Clifton  <nickc@redhat.com>
 610
 611         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 612         (display_mem_info): New static variable.
 613         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 614         (mips_options): Add info-memory and memory-info.
 615         (sim_open): After processing the command line and board
 616         specification, check display_mem_info.  If it is set then
 617         call the real handler for the --memory-info command line
 618         switch.
 619
 620 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 621
 622         * configure.ac: Change license of multi-run.c to GPL version 3.
 623         * configure: Regenerate.
 624
 625 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 626
 627         * configure.ac, configure: Revert last patch.
 628
 629 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 630
 631         * configure.ac (sim_mipsisa3264_configs): New variable.
 632         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 633         every configuration support all four targets, using the triplet to
 634         determine the default.
 635         * configure: Regenerate.
 636
 637 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 638
 639         * Makefile.in (m16run.o): New rule.
 640
 641 2007-05-15  Thiemo Seufer  <ths@mips.com>
 642
 643         * mips3264r2.igen (DSHD): Fix compile warning.
 644
 645 2007-05-14  Thiemo Seufer  <ths@mips.com>
 646
 647         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 648         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 649         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 650         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 651         for mips32r2.
 652
 653 2007-03-01  Thiemo Seufer  <ths@mips.com>
 654
 655         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 656         and mips64.
 657
 658 2007-02-20  Thiemo Seufer  <ths@mips.com>
 659
 660         * dsp.igen: Update copyright notice.
 661         * dsp2.igen: Fix copyright notice.
 662
 663 2007-02-20  Thiemo Seufer  <ths@mips.com>
 664             Chao-Ying Fu  <fu@mips.com>
 665
 666         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 667         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 668         Add dsp2 to sim_igen_machine.
 669         * configure: Regenerate.
 670         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 671         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 672         (mulq_rs.ph): Use do_ph_mulq.
 673         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 674         * mips.igen: Add dsp2 model and include dsp2.igen.
 675         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 676         for *mips32r2, *mips64r2, *dsp.
 677         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 678         for *mips32r2, *mips64r2, *dsp2.
 679         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 680
 681 2007-02-19  Thiemo Seufer  <ths@mips.com>
 682             Nigel Stephens  <nigel@mips.com>
 683
 684         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 685         jumps with hazard barrier.
 686
 687 2007-02-19  Thiemo Seufer  <ths@mips.com>
 688             Nigel Stephens  <nigel@mips.com>
 689
 690         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 691         after each call to sim_io_write.
 692
 693 2007-02-19  Thiemo Seufer  <ths@mips.com>
 694             Nigel Stephens  <nigel@mips.com>
 695
 696         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 697         supported by this simulator.
 698         (decode_coproc): Recognise additional CP0 Config registers
 699         correctly.
 700
 701 2007-02-19  Thiemo Seufer  <ths@mips.com>
 702             Nigel Stephens  <nigel@mips.com>
 703             David Ung  <davidu@mips.com>
 704
 705         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 706         uninterpreted formats. If fmt is one of the uninterpreted types
 707         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 708         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 709         (store_fpr): When writing an invalid odd register, set the
 710         matching even register to fmt_unknown, not the following register.
 711         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 712         the the memory window at offset 0 set by --memory-size command
 713         line option.
 714         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 715         point register.
 716         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 717         register.
 718         (sim_monitor): When returning the memory size to the MIPS
 719         application, use the value in STATE_MEM_SIZE, not an arbitrary
 720         hardcoded value.
 721         (cop_lw): Don' mess around with FPR_STATE, just pass
 722         fmt_uninterpreted_32 to StoreFPR.
 723         (cop_sw): Similarly.
 724         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 725         (cop_sd): Similarly.
 726         * mips.igen (not_word_value): Single version for mips32, mips64
 727         and mips16.
 728
 729 2007-02-19  Thiemo Seufer <ths@mips.com>
 730             Nigel Stephens  <nigel@mips.com>
 731
 732         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 733         MBytes.
 734
 735 2007-02-17  Thiemo Seufer  <ths@mips.com>
 736
 737         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 738         configuration.
 739         * configure: Regenerate.
 740
 741 2007-02-17  Thiemo Seufer  <ths@mips.com>
 742
 743         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 744         Add mdmx to sim_igen_machine.
 745         (mipsisa64*-*-*): Likewise. Remove dsp.
 746         (mipsisa32*-*-*): Remove dsp.
 747         * configure: Regenerate.
 748
 749 2007-02-13  Thiemo Seufer  <ths@mips.com>
 750
 751         * configure.ac: Add mips*-sde-elf* target.
 752         * configure: Regenerate.
 753
 754 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 755
 756         * acconfig.h: Remove.
 757         * config.in, configure: Regenerate.
 758
 759 2006-11-07  Thiemo Seufer  <ths@mips.com>
 760
 761         * dsp.igen (do_w_op): Fix compiler warning.
 762
 763 2006-08-29  Thiemo Seufer  <ths@mips.com>
 764             David Ung  <davidu@mips.com>
 765
 766         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 767         sim_igen_machine.
 768         * configure: Regenerate.
 769         * mips.igen (model): Add smartmips.
 770         (MADDU): Increment ACX if carry.
 771         (do_mult): Clear ACX.
 772         (ROR,RORV): Add smartmips.
 773         (include): Include smartmips.igen.
 774         * sim-main.h (ACX): Set to REGISTERS[89].
 775         * smartmips.igen: New file.
 776
 777 2006-08-29  Thiemo Seufer  <ths@mips.com>
 778             David Ung  <davidu@mips.com>
 779
 780         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 781         mips3264r2.igen. Add missing dependency rules.
 782         * m16e.igen: Support for mips16e save/restore instructions.
 783
 784 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 785
 786         * configure: Regenerated.
 787
 788 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 789
 790         * configure: Regenerated.
 791
 792 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 793
 794         * configure: Regenerated.
 795
 796 2006-05-15 Chao-ying Fu  <fu@mips.com>
 797
 798         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 799
 800 2006-04-18  Nick Clifton  <nickc@redhat.com>
 801
 802         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 803         statement.
 804
 805 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 806
 807         * configure: Regenerate.
 808
 809 2005-12-14  Chao-ying Fu  <fu@mips.com>
 810
 811         * Makefile.in (SIM_OBJS): Add dsp.o.
 812         (dsp.o): New dependency.
 813         (IGEN_INCLUDE): Add dsp.igen.
 814         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 815         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 816         * configure: Regenerate.
 817         * mips.igen: Add dsp model and include dsp.igen.
 818         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 819         because these instructions are extended in DSP ASE.
 820         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 821         adding 6 DSP accumulator registers and 1 DSP control register.
 822         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 823         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 824         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 825         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 826         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 827         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 828         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 829         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 830         DSPCR_CCOND_SMASK): New define.
 831         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 832         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 833
 834 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 835
 836         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 837
 838 2005-06-16  David Ung  <davidu@mips.com>
 839             Nigel Stephens  <nigel@mips.com>
 840
 841         * mips.igen: New mips16e model and include m16e.igen.
 842         (check_u64): Add mips16e tag.
 843         * m16e.igen: New file for MIPS16e instructions.
 844         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 845         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 846         models.
 847         * configure: Regenerate.
 848
 849 2005-05-26  David Ung  <davidu@mips.com>
 850
 851         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 852         tags to all instructions which are applicable to the new ISAs.
 853         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 854         vr.igen.
 855         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 856         instructions.
 857         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 858         to mips.igen.
 859         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 860         * configure: Regenerate.
 861
 862 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 863
 864         * configure: Regenerate.
 865
 866 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 867
 868         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 869         explicit call to AC_CONFIG_HEADER.
 870         * configure: Regenerate.
 871
 872 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 873
 874         * configure.ac: Update to use ../common/common.m4.
 875         * configure: Re-generate.
 876
 877 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 878
 879         * configure: Regenerated to track ../common/aclocal.m4 changes.
 880
 881 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 882
 883         * configure.ac: Rename configure.in, require autoconf 2.59.
 884         * configure: Re-generate.
 885
 886 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 887
 888         * configure: Regenerate for ../common/aclocal.m4 update.
 889
 890 2004-09-24  Monika Chaddha  <monika@acmet.com>
 891
 892         Committed by Andrew Cagney.
 893         * m16.igen (CMP, CMPI): Fix assembler.
 894
 895 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 896
 897         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 898         * configure: Regenerate.
 899
 900 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 901
 902         * configure.in (sim_m16_machine): Include mipsIII.
 903         * configure: Regenerate.
 904
 905 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 906
 907         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 908         from COP0_BADVADDR.
 909         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 910
 911 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 912
 913         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 914
 915 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 916
 917         * mips.igen (check_fmt): Remove.
 918         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 919         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 920         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 921         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 922         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 923         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 924         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 925         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 926         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 927         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 928
 929 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 930
 931         * sb1.igen (check_sbx): New function.
 932         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 933
 934 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 935             Richard Sandiford  <rsandifo@redhat.com>
 936
 937         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 938         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 939         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 940         separate implementations for mipsIV and mipsV.  Use new macros to
 941         determine whether the restrictions apply.
 942
 943 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 944
 945         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 946         (check_mult_hilo): Improve comments.
 947         (check_div_hilo): Likewise.  Also, fork off a new version
 948         to handle mips32/mips64 (since there are no hazards to check
 949         in MIPS32/MIPS64).
 950
 951 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 952
 953         * mips.igen (do_dmultx): Fix check for negative operands.
 954
 955 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 956
 957         * Makefile.in (SHELL): Make sure this is defined.
 958         (various): Use $(SHELL) whenever we invoke move-if-change.
 959
 960 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 961
 962         * cp1.c: Tweak attribution slightly.
 963         * cp1.h: Likewise.
 964         * mdmx.c: Likewise.
 965         * mdmx.igen: Likewise.
 966         * mips3d.igen: Likewise.
 967         * sb1.igen: Likewise.
 968
 969 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 970
 971         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 972         unsigned operands.
 973
 974 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 975
 976         * interp.c (sim_open): Rename _bfd to bfd.
 977         (sim_create_inferior): Ditto.
 978
 979 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 980
 981         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 982
 983 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 984
 985         * mips.igen (EI, DI): Remove.
 986
 987 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 988
 989         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 990
 991 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 992             Andrew Cagney  <ac131313@redhat.com>
 993             Gavin Romig-Koch  <gavin@redhat.com>
 994             Graydon Hoare  <graydon@redhat.com>
 995             Aldy Hernandez  <aldyh@redhat.com>
 996             Dave Brolley  <brolley@redhat.com>
 997             Chris Demetriou  <cgd@broadcom.com>
 998
 999         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1000         (sim_mach_default): New variable.
1001         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1002         Add a new simulator generator, MULTI.
1003         * configure: Regenerate.
1004         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1005         (multi-run.o): New dependency.
1006         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1007         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1008         (tmp-multi): Combine them.
1009         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1010         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1011         (distclean-extra): New rule.
1012         * sim-main.h: Include bfd.h.
1013         (MIPS_MACH): New macro.
1014         * mips.igen (vr4120, vr5400, vr5500): New models.
1015         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1016         * vr.igen: Replace with new version.
1017
1018 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1019
1020         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1021         * configure: Regenerate.
1022
1023 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1024
1025         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1026         * mips.igen: Remove all invocations of check_branch_bug and
1027         mark_branch_bug.
1028
1029 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1030
1031         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1032
1033 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1034
1035         * mips.igen (do_load_double, do_store_double): New functions.
1036         (LDC1, SDC1): Rename to...
1037         (LDC1b, SDC1b): respectively.
1038         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1039
1040 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1041
1042         * cp1.c (fp_recip2): Modify initialization expression so that
1043         GCC will recognize it as constant.
1044
1045 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1046
1047         * mdmx.c (SD_): Delete.
1048         (Unpredictable): Re-define, for now, to directly invoke
1049         unpredictable_action().
1050         (mdmx_acc_op): Fix error in .ob immediate handling.
1051
1052 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1053
1054         * interp.c (sim_firmware_command): Initialize `address'.
1055
1056 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1057
1058         * configure: Regenerated to track ../common/aclocal.m4 changes.
1059
1060 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1061             Ed Satterthwaite  <ehs@broadcom.com>
1062
1063         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1064         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1065         * mips.igen: Include mips3d.igen.
1066         (mips3d): New model name for MIPS-3D ASE instructions.
1067         (CVT.W.fmt): Don't use this instruction for word (source) format
1068         instructions.
1069         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1070         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1071         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1072         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1073         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1074         (RSquareRoot1, RSquareRoot2): New macros.
1075         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1076         (fp_rsqrt2): New functions.
1077         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1078         * configure: Regenerate.
1079
1080 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1081             Ed Satterthwaite  <ehs@broadcom.com>
1082
1083         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1084         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1085         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1086         (convert): Note that this function is not used for paired-single
1087         format conversions.
1088         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1089         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1090         (check_fmt_p): Enable paired-single support.
1091         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1092         (PUU.PS): New instructions.
1093         (CVT.S.fmt): Don't use this instruction for paired-single format
1094         destinations.
1095         * sim-main.h (FP_formats): New value 'fmt_ps.'
1096         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1097         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1098
1099 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1100
1101         * mips.igen: Fix formatting of function calls in
1102         many FP operations.
1103
1104 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1105
1106         * mips.igen (MOVN, MOVZ): Trace result.
1107         (TNEI): Print "tnei" as the opcode name in traces.
1108         (CEIL.W): Add disassembly string for traces.
1109         (RSQRT.fmt): Make location of disassembly string consistent
1110         with other instructions.
1111
1112 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1113
1114         * mips.igen (X): Delete unused function.
1115
1116 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1117
1118         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1119
1120 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1121             Ed Satterthwaite  <ehs@broadcom.com>
1122
1123         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1124         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1125         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1126         (fp_nmsub): New prototypes.
1127         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1128         (NegMultiplySub): New defines.
1129         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1130         (MADD.D, MADD.S): Replace with...
1131         (MADD.fmt): New instruction.
1132         (MSUB.D, MSUB.S): Replace with...
1133         (MSUB.fmt): New instruction.
1134         (NMADD.D, NMADD.S): Replace with...
1135         (NMADD.fmt): New instruction.
1136         (NMSUB.D, MSUB.S): Replace with...
1137         (NMSUB.fmt): New instruction.
1138
1139 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1140             Ed Satterthwaite  <ehs@broadcom.com>
1141
1142         * cp1.c: Fix more comment spelling and formatting.
1143         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1144         (denorm_mode): New function.
1145         (fpu_unary, fpu_binary): Round results after operation, collect
1146         status from rounding operations, and update the FCSR.
1147         (convert): Collect status from integer conversions and rounding
1148         operations, and update the FCSR.  Adjust NaN values that result
1149         from conversions.  Convert to use sim_io_eprintf rather than
1150         fprintf, and remove some debugging code.
1151         * cp1.h (fenr_FS): New define.
1152
1153 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1154
1155         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1156         rounding mode to sim FP rounding mode flag conversion code into...
1157         (rounding_mode): New function.
1158
1159 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1160
1161         * cp1.c: Clean up formatting of a few comments.
1162         (value_fpr): Reformat switch statement.
1163
1164 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1165             Ed Satterthwaite  <ehs@broadcom.com>
1166
1167         * cp1.h: New file.
1168         * sim-main.h: Include cp1.h.
1169         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1170         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1171         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1172         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1173         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1174         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1175         * cp1.c: Don't include sim-fpu.h; already included by
1176         sim-main.h.  Clean up formatting of some comments.
1177         (NaN, Equal, Less): Remove.
1178         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1179         (fp_cmp): New functions.
1180         * mips.igen (do_c_cond_fmt): Remove.
1181         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1182         Compare.  Add result tracing.
1183         (CxC1): Remove, replace with...
1184         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1185         (DMxC1): Remove, replace with...
1186         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1187         (MxC1): Remove, replace with...
1188         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1189
1190 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1191
1192         * sim-main.h (FGRIDX): Remove, replace all uses with...
1193         (FGR_BASE): New macro.
1194         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1195         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1196         (NR_FGR, FGR): Likewise.
1197         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1198         * mips.igen: Likewise.
1199
1200 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1201
1202         * cp1.c: Add an FSF Copyright notice to this file.
1203
1204 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1205             Ed Satterthwaite  <ehs@broadcom.com>
1206
1207         * cp1.c (Infinity): Remove.
1208         * sim-main.h (Infinity): Likewise.
1209
1210         * cp1.c (fp_unary, fp_binary): New functions.
1211         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1212         (fp_sqrt): New functions, implemented in terms of the above.
1213         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1214         (Recip, SquareRoot): Remove (replaced by functions above).
1215         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1216         (fp_recip, fp_sqrt): New prototypes.
1217         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1218         (Recip, SquareRoot): Replace prototypes with #defines which
1219         invoke the functions above.
1220
1221 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1222
1223         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1224         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1225         file, remove PARAMS from prototypes.
1226         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1227         simulator state arguments.
1228         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1229         pass simulator state arguments.
1230         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1231         (store_fpr, convert): Remove 'sd' argument.
1232         (value_fpr): Likewise.  Convert to use 'SD' instead.
1233
1234 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1235
1236         * cp1.c (Min, Max): Remove #if 0'd functions.
1237         * sim-main.h (Min, Max): Remove.
1238
1239 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1240
1241         * cp1.c: fix formatting of switch case and default labels.
1242         * interp.c: Likewise.
1243         * sim-main.c: Likewise.
1244
1245 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1246
1247         * cp1.c: Clean up comments which describe FP formats.
1248          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1249
1250 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1251             Ed Satterthwaite  <ehs@broadcom.com>
1252
1253         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1254         Broadcom SiByte SB-1 processor configurations.
1255         * configure: Regenerate.
1256         * sb1.igen: New file.
1257         * mips.igen: Include sb1.igen.
1258         (sb1): New model.
1259         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1260         * mdmx.igen: Add "sb1" model to all appropriate functions and
1261         instructions.
1262         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1263         (ob_func, ob_acc): Reference the above.
1264         (qh_acc): Adjust to keep the same size as ob_acc.
1265         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1266         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1267
1268 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1269
1270         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1271
1272 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1273             Ed Satterthwaite  <ehs@broadcom.com>
1274
1275         * mips.igen (mdmx): New (pseudo-)model.
1276         * mdmx.c, mdmx.igen: New files.
1277         * Makefile.in (SIM_OBJS): Add mdmx.o.
1278         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1279         New typedefs.
1280         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1281         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1282         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1283         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1284         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1285         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1286         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1287         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1288         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1289         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1290         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1291         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1292         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1293         (qh_fmtsel): New macros.
1294         (_sim_cpu): New member "acc".
1295         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1296         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1297
1298 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1299
1300         * interp.c: Use 'deprecated' rather than 'depreciated.'
1301         * sim-main.h: Likewise.
1302
1303 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1304
1305         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1306         which wouldn't compile anyway.
1307         * sim-main.h (unpredictable_action): New function prototype.
1308         (Unpredictable): Define to call igen function unpredictable().
1309         (NotWordValue): New macro to call igen function not_word_value().
1310         (UndefinedResult): Remove.
1311         * interp.c (undefined_result): Remove.
1312         (unpredictable_action): New function.
1313         * mips.igen (not_word_value, unpredictable): New functions.
1314         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1315         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1316         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1317         NotWordValue() to check for unpredictable inputs, then
1318         Unpredictable() to handle them.
1319
1320 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1321
1322         * mips.igen: Fix formatting of calls to Unpredictable().
1323
1324 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1325
1326         * interp.c (sim_open): Revert previous change.
1327
1328 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1329
1330         * interp.c (sim_open): Disable chunk of code that wrote code in
1331         vector table entries.
1332
1333 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1334
1335         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1336         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1337         unused definitions.
1338
1339 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1340
1341         * cp1.c: Fix many formatting issues.
1342
1343 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1344
1345         * cp1.c (fpu_format_name): New function to replace...
1346         (DOFMT): This.  Delete, and update all callers.
1347         (fpu_rounding_mode_name): New function to replace...
1348         (RMMODE): This.  Delete, and update all callers.
1349
1350 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1351
1352         * interp.c: Move FPU support routines from here to...
1353         * cp1.c: Here.  New file.
1354         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1355         (cp1.o): New target.
1356
1357 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1358
1359         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1360         * mips.igen (mips32, mips64): New models, add to all instructions
1361         and functions as appropriate.
1362         (loadstore_ea, check_u64): New variant for model mips64.
1363         (check_fmt_p): New variant for models mipsV and mips64, remove
1364         mipsV model marking fro other variant.
1365         (SLL) Rename to...
1366         (SLLa) this.
1367         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1368         for mips32 and mips64.
1369         (DCLO, DCLZ): New instructions for mips64.
1370
1371 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1372
1373         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1374         immediate or code as a hex value with the "%#lx" format.
1375         (ANDI): Likewise, and fix printed instruction name.
1376
1377 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1378
1379         * sim-main.h (UndefinedResult, Unpredictable): New macros
1380         which currently do nothing.
1381
1382 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1383
1384         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1385         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1386         (status_CU3): New definitions.
1387
1388         * sim-main.h (ExceptionCause): Add new values for MIPS32
1389         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1390         for DebugBreakPoint and NMIReset to note their status in
1391         MIPS32 and MIPS64.
1392         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1393         (SignalExceptionCacheErr): New exception macros.
1394
1395 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1396
1397         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1398         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1399         is always enabled.
1400         (SignalExceptionCoProcessorUnusable): Take as argument the
1401         unusable coprocessor number.
1402
1403 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1404
1405         * mips.igen: Fix formatting of all SignalException calls.
1406
1407 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1408
1409         * sim-main.h (SIGNEXTEND): Remove.
1410
1411 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1412
1413         * mips.igen: Remove gencode comment from top of file, fix
1414         spelling in another comment.
1415
1416 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1417
1418         * mips.igen (check_fmt, check_fmt_p): New functions to check
1419         whether specific floating point formats are usable.
1420         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1421         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1422         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1423         Use the new functions.
1424         (do_c_cond_fmt): Remove format checks...
1425         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1426
1427 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1428
1429         * mips.igen: Fix formatting of check_fpu calls.
1430
1431 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1432
1433         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1434
1435 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1436
1437         * mips.igen: Remove whitespace at end of lines.
1438
1439 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1440
1441         * mips.igen (loadstore_ea): New function to do effective
1442         address calculations.
1443         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1444         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1445         CACHE): Use loadstore_ea to do effective address computations.
1446
1447 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1448
1449         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1450         * mips.igen (LL, CxC1, MxC1): Likewise.
1451
1452 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1453
1454         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1455         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1456         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1457         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1458         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1459         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1460         Don't split opcode fields by hand, use the opcode field values
1461         provided by igen.
1462
1463 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1464
1465         * mips.igen (do_divu): Fix spacing.
1466
1467         * mips.igen (do_dsllv): Move to be right before DSLLV,
1468         to match the rest of the do_<shift> functions.
1469
1470 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1471
1472         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1473         DSRL32, do_dsrlv): Trace inputs and results.
1474
1475 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1476
1477         * mips.igen (CACHE): Provide instruction-printing string.
1478
1479         * interp.c (signal_exception): Comment tokens after #endif.
1480
1481 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1482
1483         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1484         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1485         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1486         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1487         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1488         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1489         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1490         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1491
1492 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1493
1494         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1495         instruction-printing string.
1496         (LWU): Use '64' as the filter flag.
1497
1498 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1499
1500         * mips.igen (SDXC1): Fix instruction-printing string.
1501
1502 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1503
1504         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1505         filter flags "32,f".
1506
1507 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1508
1509         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1510         as the filter flag.
1511
1512 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1513
1514         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1515         add a comma) so that it more closely match the MIPS ISA
1516         documentation opcode partitioning.
1517         (PREF): Put useful names on opcode fields, and include
1518         instruction-printing string.
1519
1520 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1521
1522         * mips.igen (check_u64): New function which in the future will
1523         check whether 64-bit instructions are usable and signal an
1524         exception if not.  Currently a no-op.
1525         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1526         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1527         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1528         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1529
1530         * mips.igen (check_fpu): New function which in the future will
1531         check whether FPU instructions are usable and signal an exception
1532         if not.  Currently a no-op.
1533         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1534         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1535         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1536         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1537         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1538         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1539         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1540         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1541
1542 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1543
1544         * mips.igen (do_load_left, do_load_right): Move to be immediately
1545         following do_load.
1546         (do_store_left, do_store_right): Move to be immediately following
1547         do_store.
1548
1549 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1550
1551         * mips.igen (mipsV): New model name.  Also, add it to
1552         all instructions and functions where it is appropriate.
1553
1554 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1555
1556         * mips.igen: For all functions and instructions, list model
1557         names that support that instruction one per line.
1558
1559 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1560
1561         * mips.igen: Add some additional comments about supported
1562         models, and about which instructions go where.
1563         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1564         order as is used in the rest of the file.
1565
1566 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1567
1568         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1569         indicating that ALU32_END or ALU64_END are there to check
1570         for overflow.
1571         (DADD): Likewise, but also remove previous comment about
1572         overflow checking.
1573
1574 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1575
1576         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1577         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1578         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1579         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1580         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1581         fields (i.e., add and move commas) so that they more closely
1582         match the MIPS ISA documentation opcode partitioning.
1583
1584 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1585
1586         * mips.igen (ADDI): Print immediate value.
1587         (BREAK): Print code.
1588         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1589         (SLL): Print "nop" specially, and don't run the code
1590         that does the shift for the "nop" case.
1591
1592 2001-11-17  Fred Fish  <fnf@redhat.com>
1593
1594         * sim-main.h (float_operation): Move enum declaration outside
1595         of _sim_cpu struct declaration.
1596
1597 2001-04-12  Jim Blandy  <jimb@redhat.com>
1598
1599         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1600         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1601         set of the FCSR.
1602         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1603         PENDING_FILL, and you can get the intended effect gracefully by
1604         calling PENDING_SCHED directly.
1605
1606 2001-02-23  Ben Elliston  <bje@redhat.com>
1607
1608         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1609         already defined elsewhere.
1610
1611 2001-02-19  Ben Elliston  <bje@redhat.com>
1612
1613         * sim-main.h (sim_monitor): Return an int.
1614         * interp.c (sim_monitor): Add return values.
1615         (signal_exception): Handle error conditions from sim_monitor.
1616
1617 2001-02-08  Ben Elliston  <bje@redhat.com>
1618
1619         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1620         (store_memory): Likewise, pass cia to sim_core_write*.
1621
1622 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1623
1624         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1625         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1626
1627 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1628
1629         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1630         * Makefile.in: Don't delete *.igen when cleaning directory.
1631
1632 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1633
1634         * m16.igen (break): Call SignalException not sim_engine_halt.
1635
1636 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1637
1638         From Jason Eckhardt:
1639         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1640
1641 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1642
1643         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1644
1645 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1646
1647         * mips.igen (do_dmultx): Fix typo.
1648
1649 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1650
1651         * configure: Regenerated to track ../common/aclocal.m4 changes.
1652
1653 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1654
1655         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1656
1657 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1658
1659         * sim-main.h (GPR_CLEAR): Define macro.
1660
1661 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1662
1663         * interp.c (decode_coproc): Output long using %lx and not %s.
1664
1665 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1666
1667         * interp.c (sim_open): Sort & extend dummy memory regions for
1668         --board=jmr3904 for eCos.
1669
1670 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1671
1672         * configure: Regenerated.
1673
1674 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1675
1676         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1677         calls, conditional on the simulator being in verbose mode.
1678
1679 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1680
1681         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1682         cache don't get ReservedInstruction traps.
1683
1684 1999-11-29  Mark Salter  <msalter@cygnus.com>
1685
1686         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1687         to clear status bits in sdisr register. This is how the hardware works.
1688
1689         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1690         being used by cygmon.
1691
1692 1999-11-11  Andrew Haley  <aph@cygnus.com>
1693
1694         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1695         instructions.
1696
1697 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1698
1699         * mips.igen (MULT): Correct previous mis-applied patch.
1700
1701 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1702
1703         * mips.igen (delayslot32): Handle sequence like
1704         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1705         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1706         (MULT): Actually pass the third register...
1707
1708 1999-09-03  Mark Salter  <msalter@cygnus.com>
1709
1710         * interp.c (sim_open): Added more memory aliases for additional
1711         hardware being touched by cygmon on jmr3904 board.
1712
1713 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1714
1715         * configure: Regenerated to track ../common/aclocal.m4 changes.
1716
1717 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1718
1719         * interp.c (sim_store_register): Handle case where client - GDB -
1720         specifies that a 4 byte register is 8 bytes in size.
1721         (sim_fetch_register): Ditto.
1722
1723 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1724
1725         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1726         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1727         (idt_monitor_base): Base address for IDT monitor traps.
1728         (pmon_monitor_base): Ditto for PMON.
1729         (lsipmon_monitor_base): Ditto for LSI PMON.
1730         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1731         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1732         (sim_firmware_command): New function.
1733         (mips_option_handler): Call it for OPTION_FIRMWARE.
1734         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1735         option was given, add no monitor by default.  Add BREAK hooks only if
1736         monitors are also there.
1737
1738 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1739
1740         * interp.c (sim_monitor): Flush output before reading input.
1741
1742 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1743
1744         * tconfig.in (SIM_HANDLES_LMA): Always define.
1745
1746 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1747
1748         From Mark Salter <msalter@cygnus.com>:
1749         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1750         (sim_open): Add setup for BSP board.
1751
1752 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1753
1754         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1755         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1756         them as unimplemented.
1757
1758 1999-05-08  Felix Lee  <flee@cygnus.com>
1759
1760         * configure: Regenerated to track ../common/aclocal.m4 changes.
1761
1762 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1763
1764         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1765
1766 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1767
1768         * configure.in: Any mips64vr5*-*-* target should have
1769         -DTARGET_ENABLE_FR=1.
1770         (default_endian): Any mips64vr*el-*-* target should default to
1771         LITTLE_ENDIAN.
1772         * configure: Re-generate.
1773
1774 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1775
1776         * mips.igen (ldl): Extend from _16_, not 32.
1777
1778 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1779
1780         * interp.c (sim_store_register): Force registers written to by GDB
1781         into an un-interpreted state.
1782
1783 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1784
1785         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1786         CPU, start periodic background I/O polls.
1787         (tx3904sio_poll): New function: periodic I/O poller.
1788
1789 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1790
1791         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1792
1793 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1794
1795         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1796         case statement.
1797
1798 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1799
1800         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1801         (load_word): Call SIM_CORE_SIGNAL hook on error.
1802         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1803         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1804         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1805         * sim-main.h (COP0_BADVADDR): Define.
1806         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1807         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1808         (_sim_cpu): Add exc_* fields to store register value snapshots.
1809         * mips.igen (*): Replace memory-related SignalException* calls
1810         with references to SIM_CORE_SIGNAL hook.
1811
1812         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1813         fix.
1814         * sim-main.c (*): Minor warning cleanups.
1815
1816 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1817
1818         * m16.igen (DADDIU5): Correct type-o.
1819
1820 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1821
1822         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1823         variables.
1824
1825 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1826
1827         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1828         to include path.
1829         (interp.o): Add dependency on itable.h
1830         (oengine.c, gencode): Delete remaining references.
1831         (BUILT_SRC_FROM_GEN): Clean up.
1832
1833 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1834
1835         * vr4run.c: New.
1836         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1837         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1838         tmp-run-hack) : New.
1839         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1840         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1841         Drop the "64" qualifier to get the HACK generator working.
1842         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1843         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1844         qualifier to get the hack generator working.
1845         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1846         (DSLL): Use do_dsll.
1847         (DSLLV): Use do_dsllv.
1848         (DSRA): Use do_dsra.
1849         (DSRL): Use do_dsrl.
1850         (DSRLV): Use do_dsrlv.
1851         (BC1): Move *vr4100 to get the HACK generator working.
1852         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1853         get the HACK generator working.
1854         (MACC) Rename to get the HACK generator working.
1855         (DMACC,MACCS,DMACCS): Add the 64.
1856
1857 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1858
1859         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1860         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1861
1862 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1863
1864     * mips/interp.c (DEBUG): Cleanups.
1865
1866 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1867
1868         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1869         (tx3904sio_tickle): fflush after a stdout character output.
1870
1871 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1872
1873         * interp.c (sim_close): Uninstall modules.
1874
1875 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1876
1877         * sim-main.h, interp.c (sim_monitor): Change to global
1878         function.
1879
1880 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1881
1882         * configure.in (vr4100): Only include vr4100 instructions in
1883         simulator.
1884         * configure: Re-generate.
1885         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1886
1887 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1888
1889         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1890         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1891         true alternative.
1892
1893         * configure.in (sim_default_gen, sim_use_gen): Replace with
1894         sim_gen.
1895         (--enable-sim-igen): Delete config option. Always using IGEN.
1896         * configure: Re-generate.
1897
1898         * Makefile.in (gencode): Kill, kill, kill.
1899         * gencode.c: Ditto.
1900
1901 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1902
1903         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1904         bit mips16 igen simulator.
1905         * configure: Re-generate.
1906
1907         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1908         as part of vr4100 ISA.
1909         * vr.igen: Mark all instructions as 64 bit only.
1910
1911 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1912
1913         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1914         Pacify GCC.
1915
1916 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1917
1918         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1919         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1920         * configure: Re-generate.
1921
1922         * m16.igen (BREAK): Define breakpoint instruction.
1923         (JALX32): Mark instruction as mips16 and not r3900.
1924         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1925
1926         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1927
1928 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1929
1930         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1931         insn as a debug breakpoint.
1932
1933         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1934         pending.slot_size.
1935         (PENDING_SCHED): Clean up trace statement.
1936         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1937         (PENDING_FILL): Delay write by only one cycle.
1938         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1939
1940         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1941         of pending writes.
1942         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1943         32 & 64.
1944         (pending_tick): Move incrementing of index to FOR statement.
1945         (pending_tick): Only update PENDING_OUT after a write has occured.
1946
1947         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1948         build simulator.
1949         * configure: Re-generate.
1950
1951         * interp.c (sim_engine_run OLD): Delete explicit call to
1952         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1953
1954 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1955
1956         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1957         interrupt level number to match changed SignalExceptionInterrupt
1958         macro.
1959
1960 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1961
1962         * interp.c: #include "itable.h" if WITH_IGEN.
1963         (get_insn_name): New function.
1964         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1965         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1966
1967 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1968
1969         * configure: Rebuilt to inhale new common/aclocal.m4.
1970
1971 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1972
1973         * dv-tx3904sio.c: Include sim-assert.h.
1974
1975 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1976
1977         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1978         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1979         Reorganize target-specific sim-hardware checks.
1980         * configure: rebuilt.
1981         * interp.c (sim_open): For tx39 target boards, set
1982         OPERATING_ENVIRONMENT, add tx3904sio devices.
1983         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1984         ROM executables.  Install dv-sockser into sim-modules list.
1985
1986         * dv-tx3904irc.c: Compiler warning clean-up.
1987         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1988         frequent hw-trace messages.
1989
1990 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1991
1992         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1993
1994 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1995
1996         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1997
1998         * vr.igen: New file.
1999         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2000         * mips.igen: Define vr4100 model. Include vr.igen.
2001 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2002
2003         * mips.igen (check_mf_hilo): Correct check.
2004
2005 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2006
2007         * sim-main.h (interrupt_event): Add prototype.
2008
2009         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2010         register_ptr, register_value.
2011         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2012
2013         * sim-main.h (tracefh): Make extern.
2014
2015 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2016
2017         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2018         Reduce unnecessarily high timer event frequency.
2019         * dv-tx3904cpu.c: Ditto for interrupt event.
2020
2021 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2022
2023         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2024         to allay warnings.
2025         (interrupt_event): Made non-static.
2026
2027         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2028         interchange of configuration values for external vs. internal
2029         clock dividers.
2030
2031 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2032
2033         * mips.igen (BREAK): Moved code to here for
2034         simulator-reserved break instructions.
2035         * gencode.c (build_instruction): Ditto.
2036         * interp.c (signal_exception): Code moved from here.  Non-
2037         reserved instructions now use exception vector, rather
2038         than halting sim.
2039         * sim-main.h: Moved magic constants to here.
2040
2041 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2042
2043         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2044         register upon non-zero interrupt event level, clear upon zero
2045         event value.
2046         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2047         by passing zero event value.
2048         (*_io_{read,write}_buffer): Endianness fixes.
2049         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2050         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2051
2052         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2053         serial I/O and timer module at base address 0xFFFF0000.
2054
2055 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2056
2057         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2058         and BigEndianCPU.
2059
2060 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2061
2062         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2063         parts.
2064         * configure: Update.
2065
2066 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2067
2068         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2069         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2070         * configure.in: Include tx3904tmr in hw_device list.
2071         * configure: Rebuilt.
2072         * interp.c (sim_open): Instantiate three timer instances.
2073         Fix address typo of tx3904irc instance.
2074
2075 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2076
2077         * interp.c (signal_exception): SystemCall exception now uses
2078         the exception vector.
2079
2080 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2081
2082         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2083         to allay warnings.
2084
2085 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2086
2087         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2088
2089 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2090
2091         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2092
2093         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2094         sim-main.h. Declare a struct hw_descriptor instead of struct
2095         hw_device_descriptor.
2096
2097 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2098
2099         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2100         right bits and then re-align left hand bytes to correct byte
2101         lanes.  Fix incorrect computation in do_store_left when loading
2102         bytes from second word.
2103
2104 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2105
2106         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2107         * interp.c (sim_open): Only create a device tree when HW is
2108         enabled.
2109
2110         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2111         * interp.c (signal_exception): Ditto.
2112
2113 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2114
2115         * gencode.c: Mark BEGEZALL as LIKELY.
2116
2117 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2118
2119         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2120         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2121
2122 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2123
2124         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2125         modules.  Recognize TX39 target with "mips*tx39" pattern.
2126         * configure: Rebuilt.
2127         * sim-main.h (*): Added many macros defining bits in
2128         TX39 control registers.
2129         (SignalInterrupt): Send actual PC instead of NULL.
2130         (SignalNMIReset): New exception type.
2131         * interp.c (board): New variable for future use to identify
2132         a particular board being simulated.
2133         (mips_option_handler,mips_options): Added "--board" option.
2134         (interrupt_event): Send actual PC.
2135         (sim_open): Make memory layout conditional on board setting.
2136         (signal_exception): Initial implementation of hardware interrupt
2137         handling.  Accept another break instruction variant for simulator
2138         exit.
2139         (decode_coproc): Implement RFE instruction for TX39.
2140         (mips.igen): Decode RFE instruction as such.
2141         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2142         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2143         bbegin to implement memory map.
2144         * dv-tx3904cpu.c: New file.
2145         * dv-tx3904irc.c: New file.
2146
2147 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2148
2149         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2150
2151 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2152
2153         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2154         with calls to check_div_hilo.
2155
2156 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2157
2158         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2159         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2160         Add special r3900 version of do_mult_hilo.
2161         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2162         with calls to check_mult_hilo.
2163         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2164         with calls to check_div_hilo.
2165
2166 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2167
2168         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2169         Document a replacement.
2170
2171 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2172
2173         * interp.c (sim_monitor): Make mon_printf work.
2174
2175 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2176
2177         * sim-main.h (INSN_NAME): New arg `cpu'.
2178
2179 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2180
2181         * configure: Regenerated to track ../common/aclocal.m4 changes.
2182
2183 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2184
2185         * configure: Regenerated to track ../common/aclocal.m4 changes.
2186         * config.in: Ditto.
2187
2188 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2189
2190         * acconfig.h: New file.
2191         * configure.in: Reverted change of Apr 24; use sinclude again.
2192
2193 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2194
2195         * configure: Regenerated to track ../common/aclocal.m4 changes.
2196         * config.in: Ditto.
2197
2198 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2199
2200         * configure.in: Don't call sinclude.
2201
2202 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2203
2204         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2205
2206 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2207
2208         * mips.igen (ERET): Implement.
2209
2210         * interp.c (decode_coproc): Return sign-extended EPC.
2211
2212         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2213
2214         * interp.c (signal_exception): Do not ignore Trap.
2215         (signal_exception): On TRAP, restart at exception address.
2216         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2217         (signal_exception): Update.
2218         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2219         so that TRAP instructions are caught.
2220
2221 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2222
2223         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2224         contains HI/LO access history.
2225         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2226         (HIACCESS, LOACCESS): Delete, replace with
2227         (HIHISTORY, LOHISTORY): New macros.
2228         (CHECKHILO): Delete all, moved to mips.igen
2229
2230         * gencode.c (build_instruction): Do not generate checks for
2231         correct HI/LO register usage.
2232
2233         * interp.c (old_engine_run): Delete checks for correct HI/LO
2234         register usage.
2235
2236         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2237         check_mf_cycles): New functions.
2238         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2239         do_divu, domultx, do_mult, do_multu): Use.
2240
2241         * tx.igen ("madd", "maddu"): Use.
2242
2243 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2244
2245         * mips.igen (DSRAV): Use function do_dsrav.
2246         (SRAV): Use new function do_srav.
2247
2248         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2249         (B): Sign extend 11 bit immediate.
2250         (EXT-B*): Shift 16 bit immediate left by 1.
2251         (ADDIU*): Don't sign extend immediate value.
2252
2253 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2254
2255         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2256
2257         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2258         functions.
2259
2260         * mips.igen (delayslot32, nullify_next_insn): New functions.
2261         (m16.igen): Always include.
2262         (do_*): Add more tracing.
2263
2264         * m16.igen (delayslot16): Add NIA argument, could be called by a
2265         32 bit MIPS16 instruction.
2266
2267         * interp.c (ifetch16): Move function from here.
2268         * sim-main.c (ifetch16): To here.
2269
2270         * sim-main.c (ifetch16, ifetch32): Update to match current
2271         implementations of LH, LW.
2272         (signal_exception): Don't print out incorrect hex value of illegal
2273         instruction.
2274
2275 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2276
2277         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2278         instruction.
2279
2280         * m16.igen: Implement MIPS16 instructions.
2281
2282         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2283         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2284         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2285         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2286         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2287         bodies of corresponding code from 32 bit insn to these.  Also used
2288         by MIPS16 versions of functions.
2289
2290         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2291         (IMEM16): Drop NR argument from macro.
2292
2293 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2294
2295         * Makefile.in (SIM_OBJS): Add sim-main.o.
2296
2297         * sim-main.h (address_translation, load_memory, store_memory,
2298         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2299         as INLINE_SIM_MAIN.
2300         (pr_addr, pr_uword64): Declare.
2301         (sim-main.c): Include when H_REVEALS_MODULE_P.
2302
2303         * interp.c (address_translation, load_memory, store_memory,
2304         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2305         from here.
2306         * sim-main.c: To here. Fix compilation problems.
2307
2308         * configure.in: Enable inlining.
2309         * configure: Re-config.
2310
2311 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2312
2313         * configure: Regenerated to track ../common/aclocal.m4 changes.
2314
2315 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * mips.igen: Include tx.igen.
2318         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2319         * tx.igen: New file, contains MADD and MADDU.
2320
2321         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2322         the hardwired constant `7'.
2323         (store_memory): Ditto.
2324         (LOADDRMASK): Move definition to sim-main.h.
2325
2326         mips.igen (MTC0): Enable for r3900.
2327         (ADDU): Add trace.
2328
2329         mips.igen (do_load_byte): Delete.
2330         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2331         do_store_right): New functions.
2332         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2333
2334         configure.in: Let the tx39 use igen again.
2335         configure: Update.
2336
2337 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2338
2339         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2340         not an address sized quantity.  Return zero for cache sizes.
2341
2342 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2343
2344         * mips.igen (r3900): r3900 does not support 64 bit integer
2345         operations.
2346
2347 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2348
2349         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2350         than igen one.
2351         * configure : Rebuild.
2352
2353 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2354
2355         * configure: Regenerated to track ../common/aclocal.m4 changes.
2356
2357 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2358
2359         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2360
2361 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2362
2363         * configure: Regenerated to track ../common/aclocal.m4 changes.
2364         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2365
2366 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2367
2368         * configure: Regenerated to track ../common/aclocal.m4 changes.
2369
2370 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2371
2372         * interp.c (Max, Min): Comment out functions. Not yet used.
2373
2374 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2375
2376         * configure: Regenerated to track ../common/aclocal.m4 changes.
2377
2378 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2379
2380         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2381         configurable settings for stand-alone simulator.
2382
2383         * configure.in: Added X11 search, just in case.
2384
2385         * configure: Regenerated.
2386
2387 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2388
2389         * interp.c (sim_write, sim_read, load_memory, store_memory):
2390         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2391
2392 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2393
2394         * sim-main.h (GETFCC): Return an unsigned value.
2395
2396 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2397
2398         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2399         (DADD): Result destination is RD not RT.
2400
2401 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * sim-main.h (HIACCESS, LOACCESS): Always define.
2404
2405         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2406
2407         * interp.c (sim_info): Delete.
2408
2409 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2410
2411         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2412         (mips_option_handler): New argument `cpu'.
2413         (sim_open): Update call to sim_add_option_table.
2414
2415 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2416
2417         * mips.igen (CxC1): Add tracing.
2418
2419 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2420
2421         * sim-main.h (Max, Min): Declare.
2422
2423         * interp.c (Max, Min): New functions.
2424
2425         * mips.igen (BC1): Add tracing.
2426
2427 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2428
2429         * interp.c Added memory map for stack in vr4100
2430
2431 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2432
2433         * interp.c (load_memory): Add missing "break"'s.
2434
2435 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2436
2437         * interp.c (sim_store_register, sim_fetch_register): Pass in
2438         length parameter.  Return -1.
2439
2440 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2441
2442         * interp.c: Added hardware init hook, fixed warnings.
2443
2444 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2445
2446         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2447
2448 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2449
2450         * interp.c (ifetch16): New function.
2451
2452         * sim-main.h (IMEM32): Rename IMEM.
2453         (IMEM16_IMMED): Define.
2454         (IMEM16): Define.
2455         (DELAY_SLOT): Update.
2456
2457         * m16run.c (sim_engine_run): New file.
2458
2459         * m16.igen: All instructions except LB.
2460         (LB): Call do_load_byte.
2461         * mips.igen (do_load_byte): New function.
2462         (LB): Call do_load_byte.
2463
2464         * mips.igen: Move spec for insn bit size and high bit from here.
2465         * Makefile.in (tmp-igen, tmp-m16): To here.
2466
2467         * m16.dc: New file, decode mips16 instructions.
2468
2469         * Makefile.in (SIM_NO_ALL): Define.
2470         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2471
2472 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2473
2474         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2475         point unit to 32 bit registers.
2476         * configure: Re-generate.
2477
2478 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2479
2480         * configure.in (sim_use_gen): Make IGEN the default simulator
2481         generator for generic 32 and 64 bit mips targets.
2482         * configure: Re-generate.
2483
2484 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2485
2486         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2487         bitsize.
2488
2489         * interp.c (sim_fetch_register, sim_store_register): Read/write
2490         FGR from correct location.
2491         (sim_open): Set size of FGR's according to
2492         WITH_TARGET_FLOATING_POINT_BITSIZE.
2493
2494         * sim-main.h (FGR): Store floating point registers in a separate
2495         array.
2496
2497 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2498
2499         * configure: Regenerated to track ../common/aclocal.m4 changes.
2500
2501 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2502
2503         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2504
2505         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2506
2507         * interp.c (pending_tick): New function.  Deliver pending writes.
2508
2509         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2510         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2511         it can handle mixed sized quantites and single bits.
2512
2513 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2514
2515         * interp.c (oengine.h): Do not include when building with IGEN.
2516         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2517         (sim_info): Ditto for PROCESSOR_64BIT.
2518         (sim_monitor): Replace ut_reg with unsigned_word.
2519         (*): Ditto for t_reg.
2520         (LOADDRMASK): Define.
2521         (sim_open): Remove defunct check that host FP is IEEE compliant,
2522         using software to emulate floating point.
2523         (value_fpr, ...): Always compile, was conditional on HASFPU.
2524
2525 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2526
2527         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2528         size.
2529
2530         * interp.c (SD, CPU): Define.
2531         (mips_option_handler): Set flags in each CPU.
2532         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2533         (sim_close): Do not clear STATE, deleted anyway.
2534         (sim_write, sim_read): Assume CPU zero's vm should be used for
2535         data transfers.
2536         (sim_create_inferior): Set the PC for all processors.
2537         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2538         argument.
2539         (mips16_entry): Pass correct nr of args to store_word, load_word.
2540         (ColdReset): Cold reset all cpu's.
2541         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2542         (sim_monitor, load_memory, store_memory, signal_exception): Use
2543         `CPU' instead of STATE_CPU.
2544
2545
2546         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2547         SD or CPU_.
2548
2549         * sim-main.h (signal_exception): Add sim_cpu arg.
2550         (SignalException*): Pass both SD and CPU to signal_exception.
2551         * interp.c (signal_exception): Update.
2552
2553         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2554         Ditto
2555         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2556         address_translation): Ditto
2557         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2558
2559 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2560
2561         * configure: Regenerated to track ../common/aclocal.m4 changes.
2562
2563 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2564
2565         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2566
2567         * mips.igen (model): Map processor names onto BFD name.
2568
2569         * sim-main.h (CPU_CIA): Delete.
2570         (SET_CIA, GET_CIA): Define
2571
2572 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2573
2574         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2575         regiser.
2576
2577         * configure.in (default_endian): Configure a big-endian simulator
2578         by default.
2579         * configure: Re-generate.
2580
2581 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2582
2583         * configure: Regenerated to track ../common/aclocal.m4 changes.
2584
2585 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2586
2587         * interp.c (sim_monitor): Handle Densan monitor outbyte
2588         and inbyte functions.
2589
2590 1997-12-29  Felix Lee  <flee@cygnus.com>
2591
2592         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2593
2594 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2595
2596         * Makefile.in (tmp-igen): Arrange for $zero to always be
2597         reset to zero after every instruction.
2598
2599 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2600
2601         * configure: Regenerated to track ../common/aclocal.m4 changes.
2602         * config.in: Ditto.
2603
2604 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2605
2606         * mips.igen (MSUB): Fix to work like MADD.
2607         * gencode.c (MSUB): Similarly.
2608
2609 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2610
2611         * configure: Regenerated to track ../common/aclocal.m4 changes.
2612
2613 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2614
2615         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2616
2617 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2618
2619         * sim-main.h (sim-fpu.h): Include.
2620
2621         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2622         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2623         using host independant sim_fpu module.
2624
2625 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2626
2627         * interp.c (signal_exception): Report internal errors with SIGABRT
2628         not SIGQUIT.
2629
2630         * sim-main.h (C0_CONFIG): New register.
2631         (signal.h): No longer include.
2632
2633         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2634
2635 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2636
2637         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2638
2639 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2640
2641         * mips.igen: Tag vr5000 instructions.
2642         (ANDI): Was missing mipsIV model, fix assembler syntax.
2643         (do_c_cond_fmt): New function.
2644         (C.cond.fmt): Handle mips I-III which do not support CC field
2645         separatly.
2646         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2647         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2648         in IV3.2 spec.
2649         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2650         vr5000 which saves LO in a GPR separatly.
2651
2652         * configure.in (enable-sim-igen): For vr5000, select vr5000
2653         specific instructions.
2654         * configure: Re-generate.
2655
2656 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2657
2658         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2659
2660         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2661         fmt_uninterpreted_64 bit cases to switch.  Convert to
2662         fmt_formatted,
2663
2664         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2665
2666         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2667         as specified in IV3.2 spec.
2668         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2669
2670 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2671
2672         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2673         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2674         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2675         PENDING_FILL versions of instructions.  Simplify.
2676         (X): New function.
2677         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2678         instructions.
2679         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2680         a signed value.
2681         (MTHI, MFHI): Disable code checking HI-LO.
2682
2683         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2684         global.
2685         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2686
2687 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2688
2689         * gencode.c (build_mips16_operands): Replace IPC with cia.
2690
2691         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2692         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2693         IPC to `cia'.
2694         (UndefinedResult): Replace function with macro/function
2695         combination.
2696         (sim_engine_run): Don't save PC in IPC.
2697
2698         * sim-main.h (IPC): Delete.
2699
2700
2701         * interp.c (signal_exception, store_word, load_word,
2702         address_translation, load_memory, store_memory, cache_op,
2703         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2704         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2705         current instruction address - cia - argument.
2706         (sim_read, sim_write): Call address_translation directly.
2707         (sim_engine_run): Rename variable vaddr to cia.
2708         (signal_exception): Pass cia to sim_monitor
2709
2710         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2711         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2712         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2713
2714         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2715         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2716         SIM_ASSERT.
2717
2718         * interp.c (signal_exception): Pass restart address to
2719         sim_engine_restart.
2720
2721         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2722         idecode.o): Add dependency.
2723
2724         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2725         Delete definitions
2726         (DELAY_SLOT): Update NIA not PC with branch address.
2727         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2728
2729         * mips.igen: Use CIA not PC in branch calculations.
2730         (illegal): Call SignalException.
2731         (BEQ, ADDIU): Fix assembler.
2732
2733 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2734
2735         * m16.igen (JALX): Was missing.
2736
2737         * configure.in (enable-sim-igen): New configuration option.
2738         * configure: Re-generate.
2739
2740         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2741
2742         * interp.c (load_memory, store_memory): Delete parameter RAW.
2743         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2744         bypassing {load,store}_memory.
2745
2746         * sim-main.h (ByteSwapMem): Delete definition.
2747
2748         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2749
2750         * interp.c (sim_do_command, sim_commands): Delete mips specific
2751         commands.  Handled by module sim-options.
2752
2753         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2754         (WITH_MODULO_MEMORY): Define.
2755
2756         * interp.c (sim_info): Delete code printing memory size.
2757
2758         * interp.c (mips_size): Nee sim_size, delete function.
2759         (power2): Delete.
2760         (monitor, monitor_base, monitor_size): Delete global variables.
2761         (sim_open, sim_close): Delete code creating monitor and other
2762         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2763         manage memory regions.
2764         (load_memory, store_memory): Use sim-core for memory model.
2765
2766         * interp.c (address_translation): Delete all memory map code
2767         except line forcing 32 bit addresses.
2768
2769 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2770
2771         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2772         trace options.
2773
2774         * interp.c (logfh, logfile): Delete globals.
2775         (sim_open, sim_close): Delete code opening & closing log file.
2776         (mips_option_handler): Delete -l and -n options.
2777         (OPTION mips_options): Ditto.
2778
2779         * interp.c (OPTION mips_options): Rename option trace to dinero.
2780         (mips_option_handler): Update.
2781
2782 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2783
2784         * interp.c (fetch_str): New function.
2785         (sim_monitor): Rewrite using sim_read & sim_write.
2786         (sim_open): Check magic number.
2787         (sim_open): Write monitor vectors into memory using sim_write.
2788         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2789         (sim_read, sim_write): Simplify - transfer data one byte at a
2790         time.
2791         (load_memory, store_memory): Clarify meaning of parameter RAW.
2792
2793         * sim-main.h (isHOST): Defete definition.
2794         (isTARGET): Mark as depreciated.
2795         (address_translation): Delete parameter HOST.
2796
2797         * interp.c (address_translation): Delete parameter HOST.
2798
2799 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2800
2801         * mips.igen:
2802
2803         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2804         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2805
2806 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2807
2808         * mips.igen: Add model filter field to records.
2809
2810 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2811
2812         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2813
2814         interp.c (sim_engine_run): Do not compile function sim_engine_run
2815         when WITH_IGEN == 1.
2816
2817         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2818         target architecture.
2819
2820         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2821         igen. Replace with configuration variables sim_igen_flags /
2822         sim_m16_flags.
2823
2824         * m16.igen: New file.  Copy mips16 insns here.
2825         * mips.igen: From here.
2826
2827 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2828
2829         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2830         to top.
2831         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2832
2833 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2834
2835         * gencode.c (build_instruction): Follow sim_write's lead in using
2836         BigEndianMem instead of !ByteSwapMem.
2837
2838 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2839
2840         * configure.in (sim_gen): Dependent on target, select type of
2841         generator.  Always select old style generator.
2842
2843         configure: Re-generate.
2844
2845         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2846         targets.
2847         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2848         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2849         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2850         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2851         SIM_@sim_gen@_*, set by autoconf.
2852
2853 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2854
2855         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2856
2857         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2858         CURRENT_FLOATING_POINT instead.
2859
2860         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2861         (address_translation): Raise exception InstructionFetch when
2862         translation fails and isINSTRUCTION.
2863
2864         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2865         sim_engine_run): Change type of of vaddr and paddr to
2866         address_word.
2867         (address_translation, prefetch, load_memory, store_memory,
2868         cache_op): Change type of vAddr and pAddr to address_word.
2869
2870         * gencode.c (build_instruction): Change type of vaddr and paddr to
2871         address_word.
2872
2873 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2874
2875         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2876         macro to obtain result of ALU op.
2877
2878 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2879
2880         * interp.c (sim_info): Call profile_print.
2881
2882 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2883
2884         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2885
2886         * sim-main.h (WITH_PROFILE): Do not define, defined in
2887         common/sim-config.h.  Use sim-profile module.
2888         (simPROFILE): Delete defintion.
2889
2890         * interp.c (PROFILE): Delete definition.
2891         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2892         (sim_close): Delete code writing profile histogram.
2893         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2894         Delete.
2895         (sim_engine_run): Delete code profiling the PC.
2896
2897 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2898
2899         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2900
2901         * interp.c (sim_monitor): Make register pointers of type
2902         unsigned_word*.
2903
2904         * sim-main.h: Make registers of type unsigned_word not
2905         signed_word.
2906
2907 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2908
2909         * interp.c (sync_operation): Rename from SyncOperation, make
2910         global, add SD argument.
2911         (prefetch): Rename from Prefetch, make global, add SD argument.
2912         (decode_coproc): Make global.
2913
2914         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2915
2916         * gencode.c (build_instruction): Generate DecodeCoproc not
2917         decode_coproc calls.
2918
2919         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2920         (SizeFGR): Move to sim-main.h
2921         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2922         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2923         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2924         sim-main.h.
2925         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2926         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2927         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2928         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2929         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2930         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2931
2932         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2933         exception.
2934         (sim-alu.h): Include.
2935         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2936         (sim_cia): Typedef to instruction_address.
2937
2938 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2939
2940         * Makefile.in (interp.o): Rename generated file engine.c to
2941         oengine.c.
2942
2943         * interp.c: Update.
2944
2945 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2946
2947         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2948
2949 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * gencode.c (build_instruction): For "FPSQRT", output correct
2952         number of arguments to Recip.
2953
2954 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2955
2956         * Makefile.in (interp.o): Depends on sim-main.h
2957
2958         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2959
2960         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2961         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2962         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2963         STATE, DSSTATE): Define
2964         (GPR, FGRIDX, ..): Define.
2965
2966         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2967         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2968         (GPR, FGRIDX, ...): Delete macros.
2969
2970         * interp.c: Update names to match defines from sim-main.h
2971
2972 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2973
2974         * interp.c (sim_monitor): Add SD argument.
2975         (sim_warning): Delete.  Replace calls with calls to
2976         sim_io_eprintf.
2977         (sim_error): Delete. Replace calls with sim_io_error.
2978         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2979         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2980         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2981         argument.
2982         (mips_size): Rename from sim_size. Add SD argument.
2983
2984         * interp.c (simulator): Delete global variable.
2985         (callback): Delete global variable.
2986         (mips_option_handler, sim_open, sim_write, sim_read,
2987         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2988         sim_size,sim_monitor): Use sim_io_* not callback->*.
2989         (sim_open): ZALLOC simulator struct.
2990         (PROFILE): Do not define.
2991
2992 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2993
2994         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2995         support.h with corresponding code.
2996
2997         * sim-main.h (word64, uword64), support.h: Move definition to
2998         sim-main.h.
2999         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3000
3001         * support.h: Delete
3002         * Makefile.in: Update dependencies
3003         * interp.c: Do not include.
3004
3005 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3006
3007         * interp.c (address_translation, load_memory, store_memory,
3008         cache_op): Rename to from AddressTranslation et.al., make global,
3009         add SD argument
3010
3011         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3012         CacheOp): Define.
3013
3014         * interp.c (SignalException): Rename to signal_exception, make
3015         global.
3016
3017         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3018
3019         * sim-main.h (SignalException, SignalExceptionInterrupt,
3020         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3021         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3022         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3023         Define.
3024
3025         * interp.c, support.h: Use.
3026
3027 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3028
3029         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3030         to value_fpr / store_fpr. Add SD argument.
3031         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3032         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3033
3034         * sim-main.h (ValueFPR, StoreFPR): Define.
3035
3036 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3037
3038         * interp.c (sim_engine_run): Check consistency between configure
3039         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3040         and HASFPU.
3041
3042         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3043         (mips_fpu): Configure WITH_FLOATING_POINT.
3044         (mips_endian): Configure WITH_TARGET_ENDIAN.
3045         * configure: Update.
3046
3047 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3048
3049         * configure: Regenerated to track ../common/aclocal.m4 changes.
3050
3051 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3052
3053         * configure: Regenerated.
3054
3055 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3056
3057         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3058
3059 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3060
3061         * gencode.c (print_igen_insn_models): Assume certain architectures
3062         include all mips* instructions.
3063         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3064         instruction.
3065
3066         * Makefile.in (tmp.igen): Add target. Generate igen input from
3067         gencode file.
3068
3069         * gencode.c (FEATURE_IGEN): Define.
3070         (main): Add --igen option.  Generate output in igen format.
3071         (process_instructions): Format output according to igen option.
3072         (print_igen_insn_format): New function.
3073         (print_igen_insn_models): New function.
3074         (process_instructions): Only issue warnings and ignore
3075         instructions when no FEATURE_IGEN.
3076
3077 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3078
3079         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3080         MIPS targets.
3081
3082 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3083
3084         * configure: Regenerated to track ../common/aclocal.m4 changes.
3085
3086 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3087
3088         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3089         SIM_RESERVED_BITS): Delete, moved to common.
3090         (SIM_EXTRA_CFLAGS): Update.
3091
3092 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3093
3094         * configure.in: Configure non-strict memory alignment.
3095         * configure: Regenerated to track ../common/aclocal.m4 changes.
3096
3097 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3098
3099         * configure: Regenerated to track ../common/aclocal.m4 changes.
3100
3101 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3102
3103         * gencode.c (SDBBP,DERET): Added (3900) insns.
3104         (RFE): Turn on for 3900.
3105         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3106         (dsstate): Made global.
3107         (SUBTARGET_R3900): Added.
3108         (CANCELDELAYSLOT): New.
3109         (SignalException): Ignore SystemCall rather than ignore and
3110         terminate.  Add DebugBreakPoint handling.
3111         (decode_coproc): New insns RFE, DERET; and new registers Debug
3112         and DEPC protected by SUBTARGET_R3900.
3113         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3114         bits explicitly.
3115         * Makefile.in,configure.in: Add mips subtarget option.
3116         * configure: Update.
3117
3118 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3119
3120         * gencode.c: Add r3900 (tx39).
3121
3122
3123 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3124
3125         * gencode.c (build_instruction): Don't need to subtract 4 for
3126         JALR, just 2.
3127
3128 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3129
3130         * interp.c: Correct some HASFPU problems.
3131
3132 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3133
3134         * configure: Regenerated to track ../common/aclocal.m4 changes.
3135
3136 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3137
3138         * interp.c (mips_options): Fix samples option short form, should
3139         be `x'.
3140
3141 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3142
3143         * interp.c (sim_info): Enable info code.  Was just returning.
3144
3145 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3146
3147         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3148         MFC0.
3149
3150 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3151
3152         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3153         constants.
3154         (build_instruction): Ditto for LL.
3155
3156 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3157
3158         * configure: Regenerated to track ../common/aclocal.m4 changes.
3159
3160 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3161
3162         * configure: Regenerated to track ../common/aclocal.m4 changes.
3163         * config.in: Ditto.
3164
3165 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3166
3167         * interp.c (sim_open): Add call to sim_analyze_program, update
3168         call to sim_config.
3169
3170 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3171
3172         * interp.c (sim_kill): Delete.
3173         (sim_create_inferior): Add ABFD argument. Set PC from same.
3174         (sim_load): Move code initializing trap handlers from here.
3175         (sim_open): To here.
3176         (sim_load): Delete, use sim-hload.c.
3177
3178         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3179
3180 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3181
3182         * configure: Regenerated to track ../common/aclocal.m4 changes.
3183         * config.in: Ditto.
3184
3185 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3186
3187         * interp.c (sim_open): Add ABFD argument.
3188         (sim_load): Move call to sim_config from here.
3189         (sim_open): To here.  Check return status.
3190
3191 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3192
3193         * gencode.c (build_instruction): Two arg MADD should
3194         not assign result to $0.
3195
3196 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3197
3198         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3199         * sim/mips/configure.in: Regenerate.
3200
3201 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3202
3203         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3204         signed8, unsigned8 et.al. types.
3205
3206         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3207         hosts when selecting subreg.
3208
3209 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3210
3211         * interp.c (sim_engine_run): Reset the ZERO register to zero
3212         regardless of FEATURE_WARN_ZERO.
3213         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3214
3215 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3216
3217         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3218         (SignalException): For BreakPoints ignore any mode bits and just
3219         save the PC.
3220         (SignalException): Always set the CAUSE register.
3221
3222 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3225         exception has been taken.
3226
3227         * interp.c: Implement the ERET and mt/f sr instructions.
3228
3229 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3230
3231         * interp.c (SignalException): Don't bother restarting an
3232         interrupt.
3233
3234 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3235
3236         * interp.c (SignalException): Really take an interrupt.
3237         (interrupt_event): Only deliver interrupts when enabled.
3238
3239 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3240
3241         * interp.c (sim_info): Only print info when verbose.
3242         (sim_info) Use sim_io_printf for output.
3243
3244 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3245
3246         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3247         mips architectures.
3248
3249 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3250
3251         * interp.c (sim_do_command): Check for common commands if a
3252         simulator specific command fails.
3253
3254 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3255
3256         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3257         and simBE when DEBUG is defined.
3258
3259 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3260
3261         * interp.c (interrupt_event): New function.  Pass exception event
3262         onto exception handler.
3263
3264         * configure.in: Check for stdlib.h.
3265         * configure: Regenerate.
3266
3267         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3268         variable declaration.
3269         (build_instruction): Initialize memval1.
3270         (build_instruction): Add UNUSED attribute to byte, bigend,
3271         reverse.
3272         (build_operands): Ditto.
3273
3274         * interp.c: Fix GCC warnings.
3275         (sim_get_quit_code): Delete.
3276
3277         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3278         * Makefile.in: Ditto.
3279         * configure: Re-generate.
3280
3281         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3282
3283 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3284
3285         * interp.c (mips_option_handler): New function parse argumes using
3286         sim-options.
3287         (myname): Replace with STATE_MY_NAME.
3288         (sim_open): Delete check for host endianness - performed by
3289         sim_config.
3290         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3291         (sim_open): Move much of the initialization from here.
3292         (sim_load): To here.  After the image has been loaded and
3293         endianness set.
3294         (sim_open): Move ColdReset from here.
3295         (sim_create_inferior): To here.
3296         (sim_open): Make FP check less dependant on host endianness.
3297
3298         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3299         run.
3300         * interp.c (sim_set_callbacks): Delete.
3301
3302         * interp.c (membank, membank_base, membank_size): Replace with
3303         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3304         (sim_open): Remove call to callback->init. gdb/run do this.
3305
3306         * interp.c: Update
3307
3308         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3309
3310         * interp.c (big_endian_p): Delete, replaced by
3311         current_target_byte_order.
3312
3313 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3314
3315         * interp.c (host_read_long, host_read_word, host_swap_word,
3316         host_swap_long): Delete. Using common sim-endian.
3317         (sim_fetch_register, sim_store_register): Use H2T.
3318         (pipeline_ticks): Delete.  Handled by sim-events.
3319         (sim_info): Update.
3320         (sim_engine_run): Update.
3321
3322 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3323
3324         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3325         reason from here.
3326         (SignalException): To here. Signal using sim_engine_halt.
3327         (sim_stop_reason): Delete, moved to common.
3328
3329 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3330
3331         * interp.c (sim_open): Add callback argument.
3332         (sim_set_callbacks): Delete SIM_DESC argument.
3333         (sim_size): Ditto.
3334
3335 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3336
3337         * Makefile.in (SIM_OBJS): Add common modules.
3338
3339         * interp.c (sim_set_callbacks): Also set SD callback.
3340         (set_endianness, xfer_*, swap_*): Delete.
3341         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3342         Change to functions using sim-endian macros.
3343         (control_c, sim_stop): Delete, use common version.
3344         (simulate): Convert into.
3345         (sim_engine_run): This function.
3346         (sim_resume): Delete.
3347
3348         * interp.c (simulation): New variable - the simulator object.
3349         (sim_kind): Delete global - merged into simulation.
3350         (sim_load): Cleanup.  Move PC assignment from here.
3351         (sim_create_inferior): To here.
3352
3353         * sim-main.h: New file.
3354         * interp.c (sim-main.h): Include.
3355
3356 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3357
3358         * configure: Regenerated to track ../common/aclocal.m4 changes.
3359
3360 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3361
3362         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3363
3364 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3365
3366         * gencode.c (build_instruction): DIV instructions: check
3367         for division by zero and integer overflow before using
3368         host's division operation.
3369
3370 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3371
3372         * Makefile.in (SIM_OBJS): Add sim-load.o.
3373         * interp.c: #include bfd.h.
3374         (target_byte_order): Delete.
3375         (sim_kind, myname, big_endian_p): New static locals.
3376         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3377         after argument parsing.  Recognize -E arg, set endianness accordingly.
3378         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3379         load file into simulator.  Set PC from bfd.
3380         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3381         (set_endianness): Use big_endian_p instead of target_byte_order.
3382
3383 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3384
3385         * interp.c (sim_size): Delete prototype - conflicts with
3386         definition in remote-sim.h.  Correct definition.
3387
3388 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3389
3390         * configure: Regenerated to track ../common/aclocal.m4 changes.
3391         * config.in: Ditto.
3392
3393 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3394
3395         * interp.c (sim_open): New arg `kind'.
3396
3397         * configure: Regenerated to track ../common/aclocal.m4 changes.
3398
3399 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3400
3401         * configure: Regenerated to track ../common/aclocal.m4 changes.
3402
3403 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3404
3405         * interp.c (sim_open): Set optind to 0 before calling getopt.
3406
3407 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3408
3409         * configure: Regenerated to track ../common/aclocal.m4 changes.
3410
3411 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3412
3413         * interp.c : Replace uses of pr_addr with pr_uword64
3414         where the bit length is always 64 independent of SIM_ADDR.
3415         (pr_uword64) : added.
3416
3417 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3418
3419         * configure: Re-generate.
3420
3421 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3422
3423         * configure: Regenerate to track ../common/aclocal.m4 changes.
3424
3425 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3426
3427         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3428         in argv form.
3429         (other sim_*): New SIM_DESC argument.
3430
3431 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3432
3433         * interp.c: Fix printing of addresses for non-64-bit targets.
3434         (pr_addr): Add function to print address based on size.
3435
3436 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3437
3438         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3439
3440 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3441
3442         * gencode.c (build_mips16_operands): Correct computation of base
3443         address for extended PC relative instruction.
3444
3445 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3446
3447         * interp.c (mips16_entry): Add support for floating point cases.
3448         (SignalException): Pass floating point cases to mips16_entry.
3449         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3450         registers.
3451         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3452         or fmt_word.
3453         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3454         and then set the state to fmt_uninterpreted.
3455         (COP_SW): Temporarily set the state to fmt_word while calling
3456         ValueFPR.
3457
3458 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3459
3460         * gencode.c (build_instruction): The high order may be set in the
3461         comparison flags at any ISA level, not just ISA 4.
3462
3463 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3464
3465         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3466         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3467         * configure.in: sinclude ../common/aclocal.m4.
3468         * configure: Regenerated.
3469
3470 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3471
3472         * configure: Rebuild after change to aclocal.m4.
3473
3474 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3475
3476         * configure configure.in Makefile.in:  Update to new configure
3477         scheme which is more compatible with WinGDB builds.
3478         * configure.in:  Improve comment on how to run autoconf.
3479         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3480         * Makefile.in:  Use autoconf substitution to install common
3481         makefile fragment.
3482
3483 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3484
3485         * gencode.c (build_instruction): Use BigEndianCPU instead of
3486         ByteSwapMem.
3487
3488 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3489
3490         * interp.c (sim_monitor): Make output to stdout visible in
3491         wingdb's I/O log window.
3492
3493 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3494
3495         * support.h: Undo previous change to SIGTRAP
3496         and SIGQUIT values.
3497
3498 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3499
3500         * interp.c (store_word, load_word): New static functions.
3501         (mips16_entry): New static function.
3502         (SignalException): Look for mips16 entry and exit instructions.
3503         (simulate): Use the correct index when setting fpr_state after
3504         doing a pending move.
3505
3506 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3507
3508         * interp.c: Fix byte-swapping code throughout to work on
3509         both little- and big-endian hosts.
3510
3511 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3512
3513         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3514         with gdb/config/i386/xm-windows.h.
3515
3516 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3517
3518         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3519         that messes up arithmetic shifts.
3520
3521 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3522
3523         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3524         SIGTRAP and SIGQUIT for _WIN32.
3525
3526 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3527
3528         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3529         force a 64 bit multiplication.
3530         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3531         destination register is 0, since that is the default mips16 nop
3532         instruction.
3533
3534 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3535
3536         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3537         (build_endian_shift): Don't check proc64.
3538         (build_instruction): Always set memval to uword64.  Cast op2 to
3539         uword64 when shifting it left in memory instructions.  Always use
3540         the same code for stores--don't special case proc64.
3541
3542         * gencode.c (build_mips16_operands): Fix base PC value for PC
3543         relative operands.
3544         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3545         jal instruction.
3546         * interp.c (simJALDELAYSLOT): Define.
3547         (JALDELAYSLOT): Define.
3548         (INDELAYSLOT, INJALDELAYSLOT): Define.
3549         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3550
3551 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3552
3553         * interp.c (sim_open): add flush_cache as a PMON routine
3554         (sim_monitor): handle flush_cache by ignoring it
3555
3556 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3557
3558         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3559         BigEndianMem.
3560         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3561         (BigEndianMem): Rename to ByteSwapMem and change sense.
3562         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3563         BigEndianMem references to !ByteSwapMem.
3564         (set_endianness): New function, with prototype.
3565         (sim_open): Call set_endianness.
3566         (sim_info): Use simBE instead of BigEndianMem.
3567         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3568         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3569         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3570         ifdefs, keeping the prototype declaration.
3571         (swap_word): Rewrite correctly.
3572         (ColdReset): Delete references to CONFIG.  Delete endianness related
3573         code; moved to set_endianness.
3574
3575 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3576
3577         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3578         * interp.c (CHECKHILO): Define away.
3579         (simSIGINT): New macro.
3580         (membank_size): Increase from 1MB to 2MB.
3581         (control_c): New function.
3582         (sim_resume): Rename parameter signal to signal_number.  Add local
3583         variable prev.  Call signal before and after simulate.
3584         (sim_stop_reason): Add simSIGINT support.
3585         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3586         functions always.
3587         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3588         if logfh is NULL.
3589         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3590         a call to sim_warning.
3591
3592 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3593
3594         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3595         16 bit instructions.
3596
3597 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3598
3599         Add support for mips16 (16 bit MIPS implementation):
3600         * gencode.c (inst_type): Add mips16 instruction encoding types.
3601         (GETDATASIZEINSN): Define.
3602         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3603         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3604         mtlo.
3605         (MIPS16_DECODE): New table, for mips16 instructions.
3606         (bitmap_val): New static function.
3607         (struct mips16_op): Define.
3608         (mips16_op_table): New table, for mips16 operands.
3609         (build_mips16_operands): New static function.
3610         (process_instructions): If PC is odd, decode a mips16
3611         instruction.  Break out instruction handling into new
3612         build_instruction function.
3613         (build_instruction): New static function, broken out of
3614         process_instructions.  Check modifiers rather than flags for SHIFT
3615         bit count and m[ft]{hi,lo} direction.
3616         (usage): Pass program name to fprintf.
3617         (main): Remove unused variable this_option_optind.  Change
3618         ``*loptarg++'' to ``loptarg++''.
3619         (my_strtoul): Parenthesize && within ||.
3620         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3621         (simulate): If PC is odd, fetch a 16 bit instruction, and
3622         increment PC by 2 rather than 4.
3623         * configure.in: Add case for mips16*-*-*.
3624         * configure: Rebuild.
3625
3626 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3627
3628         * interp.c: Allow -t to enable tracing in standalone simulator.
3629         Fix garbage output in trace file and error messages.
3630
3631 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3632
3633         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3634         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3635         * configure.in: Simplify using macros in ../common/aclocal.m4.
3636         * configure: Regenerated.
3637         * tconfig.in: New file.
3638
3639 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3640
3641         * interp.c: Fix bugs in 64-bit port.
3642         Use ansi function declarations for msvc compiler.
3643         Initialize and test file pointer in trace code.
3644         Prevent duplicate definition of LAST_EMED_REGNUM.
3645
3646 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3647
3648         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3649
3650 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3651
3652         * interp.c (SignalException): Check for explicit terminating
3653         breakpoint value.
3654         * gencode.c: Pass instruction value through SignalException()
3655         calls for Trap, Breakpoint and Syscall.
3656
3657 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3658
3659         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3660         only used on those hosts that provide it.
3661         * configure.in: Add sqrt() to list of functions to be checked for.
3662         * config.in: Re-generated.
3663         * configure: Re-generated.
3664
3665 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3666
3667         * gencode.c (process_instructions): Call build_endian_shift when
3668         expanding STORE RIGHT, to fix swr.
3669         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3670         clear the high bits.
3671         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3672         Fix float to int conversions to produce signed values.
3673
3674 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3675
3676         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3677         (process_instructions): Correct handling of nor instruction.
3678         Correct shift count for 32 bit shift instructions. Correct sign
3679         extension for arithmetic shifts to not shift the number of bits in
3680         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3681         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3682         Fix madd.
3683         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3684         It's OK to have a mult follow a mult.  What's not OK is to have a
3685         mult follow an mfhi.
3686         (Convert): Comment out incorrect rounding code.
3687
3688 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3689
3690         * interp.c (sim_monitor): Improved monitor printf
3691         simulation. Tidied up simulator warnings, and added "--log" option
3692         for directing warning message output.
3693         * gencode.c: Use sim_warning() rather than WARNING macro.
3694
3695 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3696
3697         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3698         getopt1.o, rather than on gencode.c.  Link objects together.
3699         Don't link against -liberty.
3700         (gencode.o, getopt.o, getopt1.o): New targets.
3701         * gencode.c: Include <ctype.h> and "ansidecl.h".
3702         (AND): Undefine after including "ansidecl.h".
3703         (ULONG_MAX): Define if not defined.
3704         (OP_*): Don't define macros; now defined in opcode/mips.h.
3705         (main): Call my_strtoul rather than strtoul.
3706         (my_strtoul): New static function.
3707
3708 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3709
3710         * gencode.c (process_instructions):  Generate word64 and uword64
3711         instead of `long long' and `unsigned long long' data types.
3712         * interp.c:  #include sysdep.h to get signals, and define default
3713         for SIGBUS.
3714         * (Convert):  Work around for Visual-C++ compiler bug with type
3715         conversion.
3716         * support.h:  Make things compile under Visual-C++ by using
3717         __int64 instead of `long long'.  Change many refs to long long
3718         into word64/uword64 typedefs.
3719
3720 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3721
3722         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3723         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3724         (docdir): Removed.
3725         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3726         (AC_PROG_INSTALL): Added.
3727         (AC_PROG_CC): Moved to before configure.host call.
3728         * configure: Rebuilt.
3729
3730 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3731
3732         * configure.in: Define @SIMCONF@ depending on mips target.
3733         * configure: Rebuild.
3734         * Makefile.in (run): Add @SIMCONF@ to control simulator
3735         construction.
3736         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3737         * interp.c: Remove some debugging, provide more detailed error
3738         messages, update memory accesses to use LOADDRMASK.
3739
3740 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3741
3742         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3743         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3744         stamp-h.
3745         * configure: Rebuild.
3746         * config.in: New file, generated by autoheader.
3747         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3748         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3749         HAVE_ANINT and HAVE_AINT, as appropriate.
3750         * Makefile.in (run): Use @LIBS@ rather than -lm.
3751         (interp.o): Depend upon config.h.
3752         (Makefile): Just rebuild Makefile.
3753         (clean): Remove stamp-h.
3754         (mostlyclean): Make the same as clean, not as distclean.
3755         (config.h, stamp-h): New targets.
3756
3757 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3758
3759         * interp.c (ColdReset): Fix boolean test. Make all simulator
3760         globals static.
3761
3762 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3763
3764         * interp.c (xfer_direct_word, xfer_direct_long,
3765         swap_direct_word, swap_direct_long, xfer_big_word,
3766         xfer_big_long, xfer_little_word, xfer_little_long,
3767         swap_word,swap_long): Added.
3768         * interp.c (ColdReset): Provide function indirection to
3769         host<->simulated_target transfer routines.
3770         * interp.c (sim_store_register, sim_fetch_register): Updated to
3771         make use of indirected transfer routines.
3772
3773 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3774
3775         * gencode.c (process_instructions): Ensure FP ABS instruction
3776         recognised.
3777         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3778         system call support.
3779
3780 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3781
3782         * interp.c (sim_do_command): Complain if callback structure not
3783         initialised.
3784
3785 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3786
3787         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3788         support for Sun hosts.
3789         * Makefile.in (gencode): Ensure the host compiler and libraries
3790         used for cross-hosted build.
3791
3792 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3793
3794         * interp.c, gencode.c: Some more (TODO) tidying.
3795
3796 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3797
3798         * gencode.c, interp.c: Replaced explicit long long references with
3799         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3800         * support.h (SET64LO, SET64HI): Macros added.
3801
3802 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3803
3804         * configure: Regenerate with autoconf 2.7.
3805
3806 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3807
3808         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3809         * support.h: Remove superfluous "1" from #if.
3810         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3811
3812 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3813
3814         * interp.c (StoreFPR): Control UndefinedResult() call on
3815         WARN_RESULT manifest.
3816
3817 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3818
3819         * gencode.c: Tidied instruction decoding, and added FP instruction
3820         support.
3821
3822         * interp.c: Added dineroIII, and BSD profiling support. Also
3823         run-time FP handling.
3824
3825 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3826
3827         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3828         gencode.c, interp.c, support.h: created.