sim/mips/ChangeLog

   1 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure: Regenerate.
   4
   5 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * cp1.c (store_fcr): Mark static.
   8
   9 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * config.in, configure: Regenerate.
  12
  13 2021-04-23  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * configure.ac (hw_enabled): Delete.
  16         (SIM_AC_OPTION_HARDWARE): Delete first two args.
  17         * configure: Regenerate.
  18
  19 2021-04-22  Tom Tromey  <tom@tromey.com>
  20
  21         * configure, config.in: Rebuild.
  22
  23 2021-04-22  Tom Tromey  <tom@tromey.com>
  24
  25         * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
  26         Remove.
  27         (SIM_EXTRA_DEPS): New variable.
  28
  29 2021-04-22  Tom Tromey  <tom@tromey.com>
  30
  31         * configure: Rebuild.
  32
  33 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * aclocal.m4: Regenerate.
  36
  37 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
  38
  39         * configure: Regenerate.
  40
  41 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * configure: Regenerate.
  44
  45 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
  48
  49 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
  50
  51         * Makefile.in: Set ASAN_OPTIONS when running igen.
  52
  53 2021-04-04  Steve Ellcey  <sellcey@mips.com>
  54             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  55
  56         * interp.c (sim_monitor): Add switch entries for unlink (13),
  57         lseek (14), and stat (15).
  58
  59 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * Makefile.in (../igen/igen): Delete rule.
  62         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  63
  64 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  65
  66         * aclocal.m4, configure: Regenerate.
  67
  68 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  69
  70         * configure: Regenerate.
  71
  72 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  73
  74         * Makefile.in (SIM_EXTRA_ALL): Delete.
  75         (all): New target.
  76
  77 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  78
  79         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  80         * aclocal.m4, configure: Regenerate.
  81
  82 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  85         * aclocal.m4, configure: Regenerate.
  86
  87 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  88
  89         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  90
  91 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  92
  93         * configure: Regenerate.
  94
  95 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  96
  97         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  98
  99 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 100
 101         * config.in, configure: Regenerate.
 102         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
 103         and strings.h include.
 104
 105 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure: Regenerate.
 108
 109 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
 112         * configure: Regenerate.
 113
 114 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 115
 116         * configure: Regenerate.
 117
 118 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 119
 120         * configure: Regenerate.
 121
 122 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 123
 124         *  sim-main.c: Include <stdlib.h>.
 125
 126 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 127
 128         * cp1.c: Include <stdlib.h>.
 129
 130 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 131
 132         * configure: Re-generate.
 133
 134 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 135
 136         * configure: Regenerate.
 137
 138 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 139
 140         PR sim/20808
 141         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 142         and SD to sd.
 143
 144 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 145
 146         PR sim/20809
 147         * mips.igen (check_u64): Enable for `r3900'.
 148
 149 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 150
 151         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 152         STATE_PROG_BFD (sd).
 153         * configure: Regenerate.
 154
 155 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 156             Maciej W. Rozycki  <macro@imgtec.com>
 157
 158         PR sim/19441
 159         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 160         `micromips64' and `micromipsdsp' only.
 161         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 162         (do_micromips_jalr, do_micromips_jal): Likewise.
 163         (compute_movep_src_reg): Likewise.
 164         (compute_andi16_imm): Likewise.
 165         (convert_fmt_micromips): Likewise.
 166         (convert_fmt_micromips_cvt_d): Likewise.
 167         (convert_fmt_micromips_cvt_s): Likewise.
 168         (FMT_MICROMIPS): Likewise.
 169         (FMT_MICROMIPS_CVT_D): Likewise.
 170         (FMT_MICROMIPS_CVT_S): Likewise.
 171
 172 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * interp.c: Include elf-bfd.h.
 175         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 176         ELFCLASS32.
 177
 178 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * config.in, configure: Regenerate.
 181
 182 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 183
 184         * configure: Regenerate.
 185
 186 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 187
 188         * configure: Regenerate.
 189
 190 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 191
 192         * configure: Regenerate.
 193
 194 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 195
 196         * configure: Regenerate.
 197
 198 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 201         * configure: Regenerate.
 202
 203 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 204
 205         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 206         * configure: Regenerate.
 207
 208 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 209
 210         * configure: Regenerate.
 211
 212 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 213
 214         * configure: Regenerate.
 215
 216 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * config.in, configure: Regenerate.
 219
 220 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * interp.c (sim_open): Mark argv const.
 223         (sim_create_inferior): Mark argv and env const.
 224
 225 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 226
 227         * configure: Regenerate.
 228
 229 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * interp.c (sim_open): Update sim_parse_args comment.
 232
 233 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 234
 235         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 236         * configure: Regenerate.
 237
 238 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 239
 240         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 241         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 242         * configure: Regenerate.
 243         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 244
 245 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 246
 247         * dv-tx3904cpu.c (CPU, SD): Delete.
 248
 249 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 250
 251         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 252         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 253         (sim_store_register): Rename to ...
 254         (mips_reg_store): ... this.  Delete local cpu var.
 255         Update sim_io_eprintf calls.
 256         (sim_fetch_register): Rename to ...
 257         (mips_reg_fetch): ... this.  Delete local cpu var.
 258         Update sim_io_eprintf calls.
 259
 260 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 261
 262         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 263
 264 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 265
 266         * config.in, configure: Regenerate.
 267
 268 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 269
 270         * interp.c (sim_write, sim_read): Delete.
 271         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 272         (load_word): Likewise.
 273         * micromips.igen (cache): Likewise.
 274         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 275         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 276         do_store_left, do_store_right, do_load_double, do_store_double):
 277         Likewise.
 278         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 279         (do_prefx): Likewise.
 280         * sim-main.c (address_translation, prefetch): Delete.
 281         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 282         paddr=vaddr.
 283         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 284         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 285         (LoadMemory, StoreMemory): Delete CCA arg.
 286
 287 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 288
 289         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 290         * configure: Regenerated.
 291
 292 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 293
 294         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 295         * tconfig.h: Delete.
 296
 297 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 298
 299         * tconfig.h (SIM_HANDLES_LMA): Delete.
 300
 301 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 302
 303         * sim-main.h (WITH_WATCHPOINTS): Delete.
 304
 305 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 306
 307         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 308
 309 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 310
 311         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 312
 313 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 314
 315         * micromips.igen (process_isa_mode): Fix left shift of negative
 316         value.
 317
 318 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 319
 320         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 321
 322 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 323
 324         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 325
 326 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 327
 328         * interp.c (sim_close): Rename to ...
 329         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 330         sim_io_shutdown.
 331         * sim-main.h (mips_sim_close): Declare.
 332         (SIM_CLOSE_HOOK): Define.
 333
 334 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 335             Ali Lown  <ali.lown@imgtec.com>
 336
 337         * Makefile.in (tmp-micromips): New rule.
 338         (tmp-mach-multi): Add support for micromips.
 339         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 340         that works for both mips64 and micromips64.
 341         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 342         micromips32.
 343         Add build support for micromips.
 344         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 345         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 346         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 347         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 348         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 349         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 350         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 351         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 352         Refactored instruction code to use these functions.
 353         * dsp2.igen: Refactored instruction code to use the new functions.
 354         * interp.c (decode_coproc): Refactored to work with any instruction
 355         encoding.
 356         (isa_mode): New variable
 357         (RSVD_INSTRUCTION): Changed to 0x00000039.
 358         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 359         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 360         * micromips.dc: New file.
 361         * micromips.igen: New file.
 362         * micromips16.dc: New file.
 363         * micromipsdsp.igen: New file.
 364         * micromipsrun.c: New file.
 365         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 366         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 367         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 368         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 369         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 370         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 371         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 372         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 373         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 374         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 375         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 376         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 377         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 378         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 379         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 380         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 381         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 382         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 383         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 384         instructions.
 385         Refactored instruction code to use these functions.
 386         (RSVD): Changed to use new reserved instruction.
 387         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 388         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 389         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 390         do_store_double):  Added micromips32 and micromips64 models.
 391         Added include for micromips.igen and micromipsdsp.igen
 392         Add micromips32 and micromips64 models.
 393         (DecodeCoproc): Updated to use new macro definition.
 394         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 395         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 396         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 397         Refactored instruction code to use these functions.
 398         * sim-main.h (CP0_operation): New enum.
 399         (DecodeCoproc): Updated macro.
 400         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 401         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 402         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 403         ISA_MODE_MICROMIPS): New defines.
 404         (sim_state): Add isa_mode field.
 405
 406 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 407
 408         * configure: Regenerate.
 409
 410 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 411
 412         * configure.ac: Change configure.in to configure.ac.
 413         * configure: Regenerate.
 414
 415 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 416
 417         * configure: Regenerate.
 418
 419 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 420
 421         * interp.c [TRACE]: Delete.
 422         (TRACE): Change to WITH_TRACE_ANY_P.
 423         [!WITH_TRACE_ANY_P] (open_trace): Define.
 424         (mips_option_handler, open_trace, sim_close, dotrace):
 425         Change defined(TRACE) to WITH_TRACE_ANY_P.
 426         (sim_open): Delete TRACE ifdef check.
 427         * sim-main.c (load_memory): Delete TRACE ifdef check.
 428         (store_memory): Likewise.
 429         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 430         [!WITH_TRACE_ANY_P] (dotrace): Define.
 431
 432 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 433
 434         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 435         comments.
 436
 437 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 438
 439         * sim-main.h (SIM_CPU): Delete.
 440
 441 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 442
 443         * sim-main.h (sim_cia): Delete.
 444
 445 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 446
 447         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 448         PU_PC_GET.
 449         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 450         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 451         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 452         CIA_SET to CPU_PC_SET.
 453         * sim-main.h (CIA_GET, CIA_SET): Delete.
 454
 455 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 456
 457         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 458         * sim-main.h (STATE_CPU): Delete.
 459
 460 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * configure: Regenerate.
 463
 464 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 465
 466         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 467         * interp.c (mips_pc_get, mips_pc_set): New functions.
 468         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 469         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 470         (sim_pc_get): Delete.
 471         * sim-main.h (SIM_CPU): Define.
 472         (struct sim_state): Change cpu to an array of pointers.
 473         (STATE_CPU): Drop &.
 474
 475 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 476
 477         * interp.c (mips_option_handler, open_trace, sim_close,
 478         sim_write, sim_read, sim_store_register, sim_fetch_register,
 479         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 480         prototypes.
 481         (sim_open): Convert old style prototype.  Change casts with
 482         sim_write to unsigned char *.
 483         (fetch_str): Change null to unsigned char, and change cast to
 484         unsigned char *.
 485         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 486         unsigned char *.
 487
 488 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 489
 490         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 491
 492 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 493
 494         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 495
 496 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 497
 498         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 499
 500 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 501
 502         * config.in, configure: Regenerate.
 503
 504 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 505
 506         * interp.c (sim_pc_get): New function.
 507
 508 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 509
 510         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 511         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 512
 513 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 514
 515         * configure: Regenerate.
 516
 517 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 518
 519         * configure: Regenerate.
 520
 521 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 522
 523         * configure: Regenerate.
 524         * configure.ac (mips_extra_objs): Delete.
 525         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 526         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 527
 528 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 529
 530         * configure: Regenerate.
 531         * configure.ac: Delete sim_hw checks for dv-sockser.
 532
 533 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 534
 535         * config.in, configure: Regenerate.
 536         * tconfig.in: Rename file ...
 537         * tconfig.h: ... here.
 538
 539 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 540
 541         * tconfig.in: Delete includes.
 542         [HAVE_DV_SOCKSER]: Delete.
 543
 544 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 545
 546         * Makefile.in (SIM_RUN_OBJS): Delete.
 547
 548 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 549
 550         * configure.ac (AC_CHECK_HEADERS): Delete.
 551         * aclocal.m4, configure: Regenerate.
 552
 553 2014-08-19  Alan Modra  <amodra@gmail.com>
 554
 555         * configure: Regenerate.
 556
 557 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 558
 559         * configure: Regenerate.
 560         * config.in: Regenerate.
 561
 562 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 563
 564         * configure: Regenerate.
 565
 566 2013-09-23  Alan Modra  <amodra@gmail.com>
 567
 568         * configure: Regenerate.
 569
 570 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 571
 572         * aclocal.m4, configure: Regenerate.
 573
 574 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 575
 576         * configure: Rebuild.
 577
 578 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 579
 580         * configure: Regenerate.
 581
 582 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 583
 584         * configure.ac: Address use of dv-sockser.o.
 585         * tconfig.in: Conditionalize use of dv_sockser_install.
 586         * configure: Regenerated.
 587         * config.in: Regenerated.
 588
 589 2012-10-04  Chao-ying Fu  <fu@mips.com>
 590             Steve Ellcey  <sellcey@mips.com>
 591
 592         * mips/mips3264r2.igen (rdhwr): New.
 593
 594 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 595
 596         * configure.ac: Always link against dv-sockser.o.
 597         * configure: Regenerate.
 598
 599 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 600
 601         * config.in, configure: Regenerate.
 602
 603 2012-05-18  Nick Clifton  <nickc@redhat.com>
 604
 605         PR 14072
 606         * interp.c: Include config.h before system header files.
 607
 608 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 609
 610         * aclocal.m4, config.in, configure: Regenerate.
 611
 612 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 613
 614         * aclocal.m4: New file.
 615         * configure: Regenerate.
 616
 617 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 618
 619         * configure: Regenerate after common/acinclude.m4 update.
 620
 621 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 622
 623         * configure.ac: Change include to common/acinclude.m4.
 624
 625 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 626
 627         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 628         call.  Replace common.m4 include with SIM_AC_COMMON.
 629         * configure: Regenerate.
 630
 631 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 632
 633         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 634         $(SIM_EXTRA_DEPS).
 635         (tmp-mach-multi): Exit early when igen fails.
 636
 637 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 638
 639         * interp.c (sim_do_command): Delete.
 640
 641 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 642
 643         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 644         (tx3904sio_fifo_reset): Likewise.
 645         * interp.c (sim_monitor): Likewise.
 646
 647 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 648
 649         * interp.c (sim_write): Add const to buffer arg.
 650
 651 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 652
 653         * interp.c: Don't include sysdep.h
 654
 655 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 656
 657         * configure: Regenerate.
 658
 659 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 660
 661         * config.in: Regenerate.
 662         * configure: Likewise.
 663
 664         * configure: Regenerate.
 665
 666 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 667
 668         * configure: Regenerate to track ../common/common.m4 changes.
 669         * config.in: Ditto.
 670
 671 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 672             Daniel Jacobowitz  <dan@codesourcery.com>
 673             Joseph Myers  <joseph@codesourcery.com>
 674
 675         * configure: Regenerate.
 676
 677 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 678
 679         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 680         that unconditionally allows fmt_ps.
 681         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 682         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 683         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 684         filter from 64,f to 32,f.
 685         (PREFX): Change filter from 64 to 32.
 686         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 687         that use do_load_double instead of do_load.  Make both LUXC1
 688         versions unpredictable if SizeFGR () != 64.
 689         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 690         instead of do_store.  Remove unused variable.  Make both SUXC1
 691         versions unpredictable if SizeFGR () != 64.
 692
 693 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 694
 695         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 696         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 697         shifts for that case.
 698
 699 2007-09-04  Nick Clifton  <nickc@redhat.com>
 700
 701         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 702         (display_mem_info): New static variable.
 703         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 704         (mips_options): Add info-memory and memory-info.
 705         (sim_open): After processing the command line and board
 706         specification, check display_mem_info.  If it is set then
 707         call the real handler for the --memory-info command line
 708         switch.
 709
 710 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 711
 712         * configure.ac: Change license of multi-run.c to GPL version 3.
 713         * configure: Regenerate.
 714
 715 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 716
 717         * configure.ac, configure: Revert last patch.
 718
 719 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 720
 721         * configure.ac (sim_mipsisa3264_configs): New variable.
 722         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 723         every configuration support all four targets, using the triplet to
 724         determine the default.
 725         * configure: Regenerate.
 726
 727 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 728
 729         * Makefile.in (m16run.o): New rule.
 730
 731 2007-05-15  Thiemo Seufer  <ths@mips.com>
 732
 733         * mips3264r2.igen (DSHD): Fix compile warning.
 734
 735 2007-05-14  Thiemo Seufer  <ths@mips.com>
 736
 737         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 738         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 739         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 740         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 741         for mips32r2.
 742
 743 2007-03-01  Thiemo Seufer  <ths@mips.com>
 744
 745         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 746         and mips64.
 747
 748 2007-02-20  Thiemo Seufer  <ths@mips.com>
 749
 750         * dsp.igen: Update copyright notice.
 751         * dsp2.igen: Fix copyright notice.
 752
 753 2007-02-20  Thiemo Seufer  <ths@mips.com>
 754             Chao-Ying Fu  <fu@mips.com>
 755
 756         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 757         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 758         Add dsp2 to sim_igen_machine.
 759         * configure: Regenerate.
 760         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 761         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 762         (mulq_rs.ph): Use do_ph_mulq.
 763         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 764         * mips.igen: Add dsp2 model and include dsp2.igen.
 765         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 766         for *mips32r2, *mips64r2, *dsp.
 767         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 768         for *mips32r2, *mips64r2, *dsp2.
 769         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 770
 771 2007-02-19  Thiemo Seufer  <ths@mips.com>
 772             Nigel Stephens  <nigel@mips.com>
 773
 774         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 775         jumps with hazard barrier.
 776
 777 2007-02-19  Thiemo Seufer  <ths@mips.com>
 778             Nigel Stephens  <nigel@mips.com>
 779
 780         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 781         after each call to sim_io_write.
 782
 783 2007-02-19  Thiemo Seufer  <ths@mips.com>
 784             Nigel Stephens  <nigel@mips.com>
 785
 786         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 787         supported by this simulator.
 788         (decode_coproc): Recognise additional CP0 Config registers
 789         correctly.
 790
 791 2007-02-19  Thiemo Seufer  <ths@mips.com>
 792             Nigel Stephens  <nigel@mips.com>
 793             David Ung  <davidu@mips.com>
 794
 795         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 796         uninterpreted formats. If fmt is one of the uninterpreted types
 797         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 798         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 799         (store_fpr): When writing an invalid odd register, set the
 800         matching even register to fmt_unknown, not the following register.
 801         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 802         the the memory window at offset 0 set by --memory-size command
 803         line option.
 804         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 805         point register.
 806         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 807         register.
 808         (sim_monitor): When returning the memory size to the MIPS
 809         application, use the value in STATE_MEM_SIZE, not an arbitrary
 810         hardcoded value.
 811         (cop_lw): Don' mess around with FPR_STATE, just pass
 812         fmt_uninterpreted_32 to StoreFPR.
 813         (cop_sw): Similarly.
 814         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 815         (cop_sd): Similarly.
 816         * mips.igen (not_word_value): Single version for mips32, mips64
 817         and mips16.
 818
 819 2007-02-19  Thiemo Seufer <ths@mips.com>
 820             Nigel Stephens  <nigel@mips.com>
 821
 822         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 823         MBytes.
 824
 825 2007-02-17  Thiemo Seufer  <ths@mips.com>
 826
 827         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 828         configuration.
 829         * configure: Regenerate.
 830
 831 2007-02-17  Thiemo Seufer  <ths@mips.com>
 832
 833         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 834         Add mdmx to sim_igen_machine.
 835         (mipsisa64*-*-*): Likewise. Remove dsp.
 836         (mipsisa32*-*-*): Remove dsp.
 837         * configure: Regenerate.
 838
 839 2007-02-13  Thiemo Seufer  <ths@mips.com>
 840
 841         * configure.ac: Add mips*-sde-elf* target.
 842         * configure: Regenerate.
 843
 844 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 845
 846         * acconfig.h: Remove.
 847         * config.in, configure: Regenerate.
 848
 849 2006-11-07  Thiemo Seufer  <ths@mips.com>
 850
 851         * dsp.igen (do_w_op): Fix compiler warning.
 852
 853 2006-08-29  Thiemo Seufer  <ths@mips.com>
 854             David Ung  <davidu@mips.com>
 855
 856         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 857         sim_igen_machine.
 858         * configure: Regenerate.
 859         * mips.igen (model): Add smartmips.
 860         (MADDU): Increment ACX if carry.
 861         (do_mult): Clear ACX.
 862         (ROR,RORV): Add smartmips.
 863         (include): Include smartmips.igen.
 864         * sim-main.h (ACX): Set to REGISTERS[89].
 865         * smartmips.igen: New file.
 866
 867 2006-08-29  Thiemo Seufer  <ths@mips.com>
 868             David Ung  <davidu@mips.com>
 869
 870         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 871         mips3264r2.igen. Add missing dependency rules.
 872         * m16e.igen: Support for mips16e save/restore instructions.
 873
 874 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 875
 876         * configure: Regenerated.
 877
 878 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 879
 880         * configure: Regenerated.
 881
 882 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 883
 884         * configure: Regenerated.
 885
 886 2006-05-15 Chao-ying Fu  <fu@mips.com>
 887
 888         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 889
 890 2006-04-18  Nick Clifton  <nickc@redhat.com>
 891
 892         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 893         statement.
 894
 895 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 896
 897         * configure: Regenerate.
 898
 899 2005-12-14  Chao-ying Fu  <fu@mips.com>
 900
 901         * Makefile.in (SIM_OBJS): Add dsp.o.
 902         (dsp.o): New dependency.
 903         (IGEN_INCLUDE): Add dsp.igen.
 904         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 905         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 906         * configure: Regenerate.
 907         * mips.igen: Add dsp model and include dsp.igen.
 908         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 909         because these instructions are extended in DSP ASE.
 910         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 911         adding 6 DSP accumulator registers and 1 DSP control register.
 912         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 913         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 914         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 915         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 916         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 917         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 918         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 919         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 920         DSPCR_CCOND_SMASK): New define.
 921         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 922         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 923
 924 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 925
 926         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 927
 928 2005-06-16  David Ung  <davidu@mips.com>
 929             Nigel Stephens  <nigel@mips.com>
 930
 931         * mips.igen: New mips16e model and include m16e.igen.
 932         (check_u64): Add mips16e tag.
 933         * m16e.igen: New file for MIPS16e instructions.
 934         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 935         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 936         models.
 937         * configure: Regenerate.
 938
 939 2005-05-26  David Ung  <davidu@mips.com>
 940
 941         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 942         tags to all instructions which are applicable to the new ISAs.
 943         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 944         vr.igen.
 945         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 946         instructions.
 947         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 948         to mips.igen.
 949         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 950         * configure: Regenerate.
 951
 952 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 953
 954         * configure: Regenerate.
 955
 956 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 957
 958         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 959         explicit call to AC_CONFIG_HEADER.
 960         * configure: Regenerate.
 961
 962 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 963
 964         * configure.ac: Update to use ../common/common.m4.
 965         * configure: Re-generate.
 966
 967 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 968
 969         * configure: Regenerated to track ../common/aclocal.m4 changes.
 970
 971 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 972
 973         * configure.ac: Rename configure.in, require autoconf 2.59.
 974         * configure: Re-generate.
 975
 976 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 977
 978         * configure: Regenerate for ../common/aclocal.m4 update.
 979
 980 2004-09-24  Monika Chaddha  <monika@acmet.com>
 981
 982         Committed by Andrew Cagney.
 983         * m16.igen (CMP, CMPI): Fix assembler.
 984
 985 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 986
 987         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 988         * configure: Regenerate.
 989
 990 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 991
 992         * configure.in (sim_m16_machine): Include mipsIII.
 993         * configure: Regenerate.
 994
 995 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 996
 997         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 998         from COP0_BADVADDR.
 999         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1000
1001 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
1002
1003         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1004
1005 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1006
1007         * mips.igen (check_fmt): Remove.
1008         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1009         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1010         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1011         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1012         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1013         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1014         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1015         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1016         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1017         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1018
1019 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1020
1021         * sb1.igen (check_sbx): New function.
1022         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1023
1024 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
1025             Richard Sandiford  <rsandifo@redhat.com>
1026
1027         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1028         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1029         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1030         separate implementations for mipsIV and mipsV.  Use new macros to
1031         determine whether the restrictions apply.
1032
1033 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1034
1035         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1036         (check_mult_hilo): Improve comments.
1037         (check_div_hilo): Likewise.  Also, fork off a new version
1038         to handle mips32/mips64 (since there are no hazards to check
1039         in MIPS32/MIPS64).
1040
1041 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1042
1043         * mips.igen (do_dmultx): Fix check for negative operands.
1044
1045 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1046
1047         * Makefile.in (SHELL): Make sure this is defined.
1048         (various): Use $(SHELL) whenever we invoke move-if-change.
1049
1050 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1051
1052         * cp1.c: Tweak attribution slightly.
1053         * cp1.h: Likewise.
1054         * mdmx.c: Likewise.
1055         * mdmx.igen: Likewise.
1056         * mips3d.igen: Likewise.
1057         * sb1.igen: Likewise.
1058
1059 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1060
1061         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1062         unsigned operands.
1063
1064 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1065
1066         * interp.c (sim_open): Rename _bfd to bfd.
1067         (sim_create_inferior): Ditto.
1068
1069 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1070
1071         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1072
1073 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1074
1075         * mips.igen (EI, DI): Remove.
1076
1077 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1078
1079         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1080
1081 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1082             Andrew Cagney  <ac131313@redhat.com>
1083             Gavin Romig-Koch  <gavin@redhat.com>
1084             Graydon Hoare  <graydon@redhat.com>
1085             Aldy Hernandez  <aldyh@redhat.com>
1086             Dave Brolley  <brolley@redhat.com>
1087             Chris Demetriou  <cgd@broadcom.com>
1088
1089         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1090         (sim_mach_default): New variable.
1091         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1092         Add a new simulator generator, MULTI.
1093         * configure: Regenerate.
1094         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1095         (multi-run.o): New dependency.
1096         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1097         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1098         (tmp-multi): Combine them.
1099         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1100         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1101         (distclean-extra): New rule.
1102         * sim-main.h: Include bfd.h.
1103         (MIPS_MACH): New macro.
1104         * mips.igen (vr4120, vr5400, vr5500): New models.
1105         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1106         * vr.igen: Replace with new version.
1107
1108 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1109
1110         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1111         * configure: Regenerate.
1112
1113 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1114
1115         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1116         * mips.igen: Remove all invocations of check_branch_bug and
1117         mark_branch_bug.
1118
1119 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1120
1121         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1122
1123 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1124
1125         * mips.igen (do_load_double, do_store_double): New functions.
1126         (LDC1, SDC1): Rename to...
1127         (LDC1b, SDC1b): respectively.
1128         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1129
1130 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1131
1132         * cp1.c (fp_recip2): Modify initialization expression so that
1133         GCC will recognize it as constant.
1134
1135 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1136
1137         * mdmx.c (SD_): Delete.
1138         (Unpredictable): Re-define, for now, to directly invoke
1139         unpredictable_action().
1140         (mdmx_acc_op): Fix error in .ob immediate handling.
1141
1142 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1143
1144         * interp.c (sim_firmware_command): Initialize `address'.
1145
1146 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1147
1148         * configure: Regenerated to track ../common/aclocal.m4 changes.
1149
1150 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1151             Ed Satterthwaite  <ehs@broadcom.com>
1152
1153         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1154         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1155         * mips.igen: Include mips3d.igen.
1156         (mips3d): New model name for MIPS-3D ASE instructions.
1157         (CVT.W.fmt): Don't use this instruction for word (source) format
1158         instructions.
1159         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1160         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1161         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1162         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1163         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1164         (RSquareRoot1, RSquareRoot2): New macros.
1165         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1166         (fp_rsqrt2): New functions.
1167         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1168         * configure: Regenerate.
1169
1170 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1171             Ed Satterthwaite  <ehs@broadcom.com>
1172
1173         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1174         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1175         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1176         (convert): Note that this function is not used for paired-single
1177         format conversions.
1178         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1179         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1180         (check_fmt_p): Enable paired-single support.
1181         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1182         (PUU.PS): New instructions.
1183         (CVT.S.fmt): Don't use this instruction for paired-single format
1184         destinations.
1185         * sim-main.h (FP_formats): New value 'fmt_ps.'
1186         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1187         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1188
1189 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1190
1191         * mips.igen: Fix formatting of function calls in
1192         many FP operations.
1193
1194 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1195
1196         * mips.igen (MOVN, MOVZ): Trace result.
1197         (TNEI): Print "tnei" as the opcode name in traces.
1198         (CEIL.W): Add disassembly string for traces.
1199         (RSQRT.fmt): Make location of disassembly string consistent
1200         with other instructions.
1201
1202 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1203
1204         * mips.igen (X): Delete unused function.
1205
1206 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1207
1208         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1209
1210 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1211             Ed Satterthwaite  <ehs@broadcom.com>
1212
1213         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1214         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1215         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1216         (fp_nmsub): New prototypes.
1217         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1218         (NegMultiplySub): New defines.
1219         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1220         (MADD.D, MADD.S): Replace with...
1221         (MADD.fmt): New instruction.
1222         (MSUB.D, MSUB.S): Replace with...
1223         (MSUB.fmt): New instruction.
1224         (NMADD.D, NMADD.S): Replace with...
1225         (NMADD.fmt): New instruction.
1226         (NMSUB.D, MSUB.S): Replace with...
1227         (NMSUB.fmt): New instruction.
1228
1229 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1230             Ed Satterthwaite  <ehs@broadcom.com>
1231
1232         * cp1.c: Fix more comment spelling and formatting.
1233         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1234         (denorm_mode): New function.
1235         (fpu_unary, fpu_binary): Round results after operation, collect
1236         status from rounding operations, and update the FCSR.
1237         (convert): Collect status from integer conversions and rounding
1238         operations, and update the FCSR.  Adjust NaN values that result
1239         from conversions.  Convert to use sim_io_eprintf rather than
1240         fprintf, and remove some debugging code.
1241         * cp1.h (fenr_FS): New define.
1242
1243 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1244
1245         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1246         rounding mode to sim FP rounding mode flag conversion code into...
1247         (rounding_mode): New function.
1248
1249 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1250
1251         * cp1.c: Clean up formatting of a few comments.
1252         (value_fpr): Reformat switch statement.
1253
1254 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1255             Ed Satterthwaite  <ehs@broadcom.com>
1256
1257         * cp1.h: New file.
1258         * sim-main.h: Include cp1.h.
1259         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1260         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1261         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1262         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1263         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1264         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1265         * cp1.c: Don't include sim-fpu.h; already included by
1266         sim-main.h.  Clean up formatting of some comments.
1267         (NaN, Equal, Less): Remove.
1268         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1269         (fp_cmp): New functions.
1270         * mips.igen (do_c_cond_fmt): Remove.
1271         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1272         Compare.  Add result tracing.
1273         (CxC1): Remove, replace with...
1274         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1275         (DMxC1): Remove, replace with...
1276         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1277         (MxC1): Remove, replace with...
1278         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1279
1280 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1281
1282         * sim-main.h (FGRIDX): Remove, replace all uses with...
1283         (FGR_BASE): New macro.
1284         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1285         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1286         (NR_FGR, FGR): Likewise.
1287         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1288         * mips.igen: Likewise.
1289
1290 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1291
1292         * cp1.c: Add an FSF Copyright notice to this file.
1293
1294 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1295             Ed Satterthwaite  <ehs@broadcom.com>
1296
1297         * cp1.c (Infinity): Remove.
1298         * sim-main.h (Infinity): Likewise.
1299
1300         * cp1.c (fp_unary, fp_binary): New functions.
1301         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1302         (fp_sqrt): New functions, implemented in terms of the above.
1303         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1304         (Recip, SquareRoot): Remove (replaced by functions above).
1305         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1306         (fp_recip, fp_sqrt): New prototypes.
1307         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1308         (Recip, SquareRoot): Replace prototypes with #defines which
1309         invoke the functions above.
1310
1311 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1312
1313         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1314         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1315         file, remove PARAMS from prototypes.
1316         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1317         simulator state arguments.
1318         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1319         pass simulator state arguments.
1320         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1321         (store_fpr, convert): Remove 'sd' argument.
1322         (value_fpr): Likewise.  Convert to use 'SD' instead.
1323
1324 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1325
1326         * cp1.c (Min, Max): Remove #if 0'd functions.
1327         * sim-main.h (Min, Max): Remove.
1328
1329 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1330
1331         * cp1.c: fix formatting of switch case and default labels.
1332         * interp.c: Likewise.
1333         * sim-main.c: Likewise.
1334
1335 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1336
1337         * cp1.c: Clean up comments which describe FP formats.
1338          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1339
1340 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1341             Ed Satterthwaite  <ehs@broadcom.com>
1342
1343         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1344         Broadcom SiByte SB-1 processor configurations.
1345         * configure: Regenerate.
1346         * sb1.igen: New file.
1347         * mips.igen: Include sb1.igen.
1348         (sb1): New model.
1349         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1350         * mdmx.igen: Add "sb1" model to all appropriate functions and
1351         instructions.
1352         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1353         (ob_func, ob_acc): Reference the above.
1354         (qh_acc): Adjust to keep the same size as ob_acc.
1355         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1356         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1357
1358 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1359
1360         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1361
1362 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1363             Ed Satterthwaite  <ehs@broadcom.com>
1364
1365         * mips.igen (mdmx): New (pseudo-)model.
1366         * mdmx.c, mdmx.igen: New files.
1367         * Makefile.in (SIM_OBJS): Add mdmx.o.
1368         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1369         New typedefs.
1370         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1371         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1372         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1373         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1374         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1375         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1376         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1377         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1378         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1379         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1380         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1381         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1382         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1383         (qh_fmtsel): New macros.
1384         (_sim_cpu): New member "acc".
1385         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1386         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1387
1388 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1389
1390         * interp.c: Use 'deprecated' rather than 'depreciated.'
1391         * sim-main.h: Likewise.
1392
1393 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1394
1395         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1396         which wouldn't compile anyway.
1397         * sim-main.h (unpredictable_action): New function prototype.
1398         (Unpredictable): Define to call igen function unpredictable().
1399         (NotWordValue): New macro to call igen function not_word_value().
1400         (UndefinedResult): Remove.
1401         * interp.c (undefined_result): Remove.
1402         (unpredictable_action): New function.
1403         * mips.igen (not_word_value, unpredictable): New functions.
1404         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1405         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1406         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1407         NotWordValue() to check for unpredictable inputs, then
1408         Unpredictable() to handle them.
1409
1410 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1411
1412         * mips.igen: Fix formatting of calls to Unpredictable().
1413
1414 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1415
1416         * interp.c (sim_open): Revert previous change.
1417
1418 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1419
1420         * interp.c (sim_open): Disable chunk of code that wrote code in
1421         vector table entries.
1422
1423 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1424
1425         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1426         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1427         unused definitions.
1428
1429 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1430
1431         * cp1.c: Fix many formatting issues.
1432
1433 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1434
1435         * cp1.c (fpu_format_name): New function to replace...
1436         (DOFMT): This.  Delete, and update all callers.
1437         (fpu_rounding_mode_name): New function to replace...
1438         (RMMODE): This.  Delete, and update all callers.
1439
1440 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1441
1442         * interp.c: Move FPU support routines from here to...
1443         * cp1.c: Here.  New file.
1444         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1445         (cp1.o): New target.
1446
1447 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1448
1449         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1450         * mips.igen (mips32, mips64): New models, add to all instructions
1451         and functions as appropriate.
1452         (loadstore_ea, check_u64): New variant for model mips64.
1453         (check_fmt_p): New variant for models mipsV and mips64, remove
1454         mipsV model marking fro other variant.
1455         (SLL) Rename to...
1456         (SLLa) this.
1457         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1458         for mips32 and mips64.
1459         (DCLO, DCLZ): New instructions for mips64.
1460
1461 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1462
1463         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1464         immediate or code as a hex value with the "%#lx" format.
1465         (ANDI): Likewise, and fix printed instruction name.
1466
1467 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1468
1469         * sim-main.h (UndefinedResult, Unpredictable): New macros
1470         which currently do nothing.
1471
1472 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1473
1474         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1475         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1476         (status_CU3): New definitions.
1477
1478         * sim-main.h (ExceptionCause): Add new values for MIPS32
1479         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1480         for DebugBreakPoint and NMIReset to note their status in
1481         MIPS32 and MIPS64.
1482         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1483         (SignalExceptionCacheErr): New exception macros.
1484
1485 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1486
1487         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1488         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1489         is always enabled.
1490         (SignalExceptionCoProcessorUnusable): Take as argument the
1491         unusable coprocessor number.
1492
1493 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1494
1495         * mips.igen: Fix formatting of all SignalException calls.
1496
1497 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1498
1499         * sim-main.h (SIGNEXTEND): Remove.
1500
1501 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1502
1503         * mips.igen: Remove gencode comment from top of file, fix
1504         spelling in another comment.
1505
1506 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1507
1508         * mips.igen (check_fmt, check_fmt_p): New functions to check
1509         whether specific floating point formats are usable.
1510         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1511         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1512         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1513         Use the new functions.
1514         (do_c_cond_fmt): Remove format checks...
1515         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1516
1517 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1518
1519         * mips.igen: Fix formatting of check_fpu calls.
1520
1521 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1522
1523         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1524
1525 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1526
1527         * mips.igen: Remove whitespace at end of lines.
1528
1529 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1530
1531         * mips.igen (loadstore_ea): New function to do effective
1532         address calculations.
1533         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1534         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1535         CACHE): Use loadstore_ea to do effective address computations.
1536
1537 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1538
1539         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1540         * mips.igen (LL, CxC1, MxC1): Likewise.
1541
1542 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1543
1544         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1545         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1546         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1547         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1548         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1549         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1550         Don't split opcode fields by hand, use the opcode field values
1551         provided by igen.
1552
1553 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1554
1555         * mips.igen (do_divu): Fix spacing.
1556
1557         * mips.igen (do_dsllv): Move to be right before DSLLV,
1558         to match the rest of the do_<shift> functions.
1559
1560 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1561
1562         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1563         DSRL32, do_dsrlv): Trace inputs and results.
1564
1565 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1566
1567         * mips.igen (CACHE): Provide instruction-printing string.
1568
1569         * interp.c (signal_exception): Comment tokens after #endif.
1570
1571 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1572
1573         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1574         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1575         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1576         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1577         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1578         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1579         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1580         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1581
1582 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1583
1584         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1585         instruction-printing string.
1586         (LWU): Use '64' as the filter flag.
1587
1588 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1589
1590         * mips.igen (SDXC1): Fix instruction-printing string.
1591
1592 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1593
1594         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1595         filter flags "32,f".
1596
1597 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1598
1599         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1600         as the filter flag.
1601
1602 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1603
1604         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1605         add a comma) so that it more closely match the MIPS ISA
1606         documentation opcode partitioning.
1607         (PREF): Put useful names on opcode fields, and include
1608         instruction-printing string.
1609
1610 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1611
1612         * mips.igen (check_u64): New function which in the future will
1613         check whether 64-bit instructions are usable and signal an
1614         exception if not.  Currently a no-op.
1615         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1616         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1617         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1618         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1619
1620         * mips.igen (check_fpu): New function which in the future will
1621         check whether FPU instructions are usable and signal an exception
1622         if not.  Currently a no-op.
1623         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1624         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1625         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1626         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1627         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1628         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1629         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1630         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1631
1632 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1633
1634         * mips.igen (do_load_left, do_load_right): Move to be immediately
1635         following do_load.
1636         (do_store_left, do_store_right): Move to be immediately following
1637         do_store.
1638
1639 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1640
1641         * mips.igen (mipsV): New model name.  Also, add it to
1642         all instructions and functions where it is appropriate.
1643
1644 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1645
1646         * mips.igen: For all functions and instructions, list model
1647         names that support that instruction one per line.
1648
1649 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1650
1651         * mips.igen: Add some additional comments about supported
1652         models, and about which instructions go where.
1653         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1654         order as is used in the rest of the file.
1655
1656 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1657
1658         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1659         indicating that ALU32_END or ALU64_END are there to check
1660         for overflow.
1661         (DADD): Likewise, but also remove previous comment about
1662         overflow checking.
1663
1664 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1665
1666         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1667         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1668         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1669         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1670         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1671         fields (i.e., add and move commas) so that they more closely
1672         match the MIPS ISA documentation opcode partitioning.
1673
1674 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1675
1676         * mips.igen (ADDI): Print immediate value.
1677         (BREAK): Print code.
1678         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1679         (SLL): Print "nop" specially, and don't run the code
1680         that does the shift for the "nop" case.
1681
1682 2001-11-17  Fred Fish  <fnf@redhat.com>
1683
1684         * sim-main.h (float_operation): Move enum declaration outside
1685         of _sim_cpu struct declaration.
1686
1687 2001-04-12  Jim Blandy  <jimb@redhat.com>
1688
1689         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1690         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1691         set of the FCSR.
1692         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1693         PENDING_FILL, and you can get the intended effect gracefully by
1694         calling PENDING_SCHED directly.
1695
1696 2001-02-23  Ben Elliston  <bje@redhat.com>
1697
1698         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1699         already defined elsewhere.
1700
1701 2001-02-19  Ben Elliston  <bje@redhat.com>
1702
1703         * sim-main.h (sim_monitor): Return an int.
1704         * interp.c (sim_monitor): Add return values.
1705         (signal_exception): Handle error conditions from sim_monitor.
1706
1707 2001-02-08  Ben Elliston  <bje@redhat.com>
1708
1709         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1710         (store_memory): Likewise, pass cia to sim_core_write*.
1711
1712 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1713
1714         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1715         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1716
1717 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1718
1719         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1720         * Makefile.in: Don't delete *.igen when cleaning directory.
1721
1722 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1723
1724         * m16.igen (break): Call SignalException not sim_engine_halt.
1725
1726 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1727
1728         From Jason Eckhardt:
1729         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1730
1731 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1732
1733         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1734
1735 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1736
1737         * mips.igen (do_dmultx): Fix typo.
1738
1739 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1740
1741         * configure: Regenerated to track ../common/aclocal.m4 changes.
1742
1743 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1744
1745         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1746
1747 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1748
1749         * sim-main.h (GPR_CLEAR): Define macro.
1750
1751 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1752
1753         * interp.c (decode_coproc): Output long using %lx and not %s.
1754
1755 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1756
1757         * interp.c (sim_open): Sort & extend dummy memory regions for
1758         --board=jmr3904 for eCos.
1759
1760 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1761
1762         * configure: Regenerated.
1763
1764 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1765
1766         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1767         calls, conditional on the simulator being in verbose mode.
1768
1769 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1770
1771         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1772         cache don't get ReservedInstruction traps.
1773
1774 1999-11-29  Mark Salter  <msalter@cygnus.com>
1775
1776         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1777         to clear status bits in sdisr register. This is how the hardware works.
1778
1779         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1780         being used by cygmon.
1781
1782 1999-11-11  Andrew Haley  <aph@cygnus.com>
1783
1784         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1785         instructions.
1786
1787 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1788
1789         * mips.igen (MULT): Correct previous mis-applied patch.
1790
1791 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1792
1793         * mips.igen (delayslot32): Handle sequence like
1794         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1795         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1796         (MULT): Actually pass the third register...
1797
1798 1999-09-03  Mark Salter  <msalter@cygnus.com>
1799
1800         * interp.c (sim_open): Added more memory aliases for additional
1801         hardware being touched by cygmon on jmr3904 board.
1802
1803 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1804
1805         * configure: Regenerated to track ../common/aclocal.m4 changes.
1806
1807 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1808
1809         * interp.c (sim_store_register): Handle case where client - GDB -
1810         specifies that a 4 byte register is 8 bytes in size.
1811         (sim_fetch_register): Ditto.
1812
1813 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1814
1815         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1816         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1817         (idt_monitor_base): Base address for IDT monitor traps.
1818         (pmon_monitor_base): Ditto for PMON.
1819         (lsipmon_monitor_base): Ditto for LSI PMON.
1820         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1821         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1822         (sim_firmware_command): New function.
1823         (mips_option_handler): Call it for OPTION_FIRMWARE.
1824         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1825         option was given, add no monitor by default.  Add BREAK hooks only if
1826         monitors are also there.
1827
1828 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1829
1830         * interp.c (sim_monitor): Flush output before reading input.
1831
1832 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1833
1834         * tconfig.in (SIM_HANDLES_LMA): Always define.
1835
1836 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1837
1838         From Mark Salter <msalter@cygnus.com>:
1839         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1840         (sim_open): Add setup for BSP board.
1841
1842 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1843
1844         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1845         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1846         them as unimplemented.
1847
1848 1999-05-08  Felix Lee  <flee@cygnus.com>
1849
1850         * configure: Regenerated to track ../common/aclocal.m4 changes.
1851
1852 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1853
1854         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1855
1856 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1857
1858         * configure.in: Any mips64vr5*-*-* target should have
1859         -DTARGET_ENABLE_FR=1.
1860         (default_endian): Any mips64vr*el-*-* target should default to
1861         LITTLE_ENDIAN.
1862         * configure: Re-generate.
1863
1864 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1865
1866         * mips.igen (ldl): Extend from _16_, not 32.
1867
1868 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1869
1870         * interp.c (sim_store_register): Force registers written to by GDB
1871         into an un-interpreted state.
1872
1873 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1874
1875         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1876         CPU, start periodic background I/O polls.
1877         (tx3904sio_poll): New function: periodic I/O poller.
1878
1879 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1880
1881         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1882
1883 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1884
1885         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1886         case statement.
1887
1888 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1889
1890         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1891         (load_word): Call SIM_CORE_SIGNAL hook on error.
1892         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1893         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1894         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1895         * sim-main.h (COP0_BADVADDR): Define.
1896         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1897         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1898         (_sim_cpu): Add exc_* fields to store register value snapshots.
1899         * mips.igen (*): Replace memory-related SignalException* calls
1900         with references to SIM_CORE_SIGNAL hook.
1901
1902         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1903         fix.
1904         * sim-main.c (*): Minor warning cleanups.
1905
1906 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1907
1908         * m16.igen (DADDIU5): Correct type-o.
1909
1910 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1911
1912         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1913         variables.
1914
1915 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1916
1917         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1918         to include path.
1919         (interp.o): Add dependency on itable.h
1920         (oengine.c, gencode): Delete remaining references.
1921         (BUILT_SRC_FROM_GEN): Clean up.
1922
1923 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1924
1925         * vr4run.c: New.
1926         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1927         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1928         tmp-run-hack) : New.
1929         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1930         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1931         Drop the "64" qualifier to get the HACK generator working.
1932         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1933         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1934         qualifier to get the hack generator working.
1935         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1936         (DSLL): Use do_dsll.
1937         (DSLLV): Use do_dsllv.
1938         (DSRA): Use do_dsra.
1939         (DSRL): Use do_dsrl.
1940         (DSRLV): Use do_dsrlv.
1941         (BC1): Move *vr4100 to get the HACK generator working.
1942         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1943         get the HACK generator working.
1944         (MACC) Rename to get the HACK generator working.
1945         (DMACC,MACCS,DMACCS): Add the 64.
1946
1947 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1948
1949         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1950         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1951
1952 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1953
1954     * mips/interp.c (DEBUG): Cleanups.
1955
1956 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1957
1958         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1959         (tx3904sio_tickle): fflush after a stdout character output.
1960
1961 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1962
1963         * interp.c (sim_close): Uninstall modules.
1964
1965 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1966
1967         * sim-main.h, interp.c (sim_monitor): Change to global
1968         function.
1969
1970 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1971
1972         * configure.in (vr4100): Only include vr4100 instructions in
1973         simulator.
1974         * configure: Re-generate.
1975         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1976
1977 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1978
1979         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1980         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1981         true alternative.
1982
1983         * configure.in (sim_default_gen, sim_use_gen): Replace with
1984         sim_gen.
1985         (--enable-sim-igen): Delete config option. Always using IGEN.
1986         * configure: Re-generate.
1987
1988         * Makefile.in (gencode): Kill, kill, kill.
1989         * gencode.c: Ditto.
1990
1991 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1992
1993         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1994         bit mips16 igen simulator.
1995         * configure: Re-generate.
1996
1997         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1998         as part of vr4100 ISA.
1999         * vr.igen: Mark all instructions as 64 bit only.
2000
2001 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2002
2003         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2004         Pacify GCC.
2005
2006 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2007
2008         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2009         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
2010         * configure: Re-generate.
2011
2012         * m16.igen (BREAK): Define breakpoint instruction.
2013         (JALX32): Mark instruction as mips16 and not r3900.
2014         * mips.igen (C.cond.fmt): Fix typo in instruction format.
2015
2016         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2017
2018 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2019
2020         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2021         insn as a debug breakpoint.
2022
2023         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2024         pending.slot_size.
2025         (PENDING_SCHED): Clean up trace statement.
2026         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2027         (PENDING_FILL): Delay write by only one cycle.
2028         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2029
2030         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2031         of pending writes.
2032         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2033         32 & 64.
2034         (pending_tick): Move incrementing of index to FOR statement.
2035         (pending_tick): Only update PENDING_OUT after a write has occured.
2036
2037         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2038         build simulator.
2039         * configure: Re-generate.
2040
2041         * interp.c (sim_engine_run OLD): Delete explicit call to
2042         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2043
2044 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2045
2046         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2047         interrupt level number to match changed SignalExceptionInterrupt
2048         macro.
2049
2050 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2051
2052         * interp.c: #include "itable.h" if WITH_IGEN.
2053         (get_insn_name): New function.
2054         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2055         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2056
2057 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2058
2059         * configure: Rebuilt to inhale new common/aclocal.m4.
2060
2061 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2062
2063         * dv-tx3904sio.c: Include sim-assert.h.
2064
2065 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2066
2067         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2068         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2069         Reorganize target-specific sim-hardware checks.
2070         * configure: rebuilt.
2071         * interp.c (sim_open): For tx39 target boards, set
2072         OPERATING_ENVIRONMENT, add tx3904sio devices.
2073         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2074         ROM executables.  Install dv-sockser into sim-modules list.
2075
2076         * dv-tx3904irc.c: Compiler warning clean-up.
2077         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2078         frequent hw-trace messages.
2079
2080 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2081
2082         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2083
2084 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2085
2086         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2087
2088         * vr.igen: New file.
2089         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2090         * mips.igen: Define vr4100 model. Include vr.igen.
2091 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2092
2093         * mips.igen (check_mf_hilo): Correct check.
2094
2095 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2096
2097         * sim-main.h (interrupt_event): Add prototype.
2098
2099         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2100         register_ptr, register_value.
2101         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2102
2103         * sim-main.h (tracefh): Make extern.
2104
2105 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2106
2107         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2108         Reduce unnecessarily high timer event frequency.
2109         * dv-tx3904cpu.c: Ditto for interrupt event.
2110
2111 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2112
2113         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2114         to allay warnings.
2115         (interrupt_event): Made non-static.
2116
2117         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2118         interchange of configuration values for external vs. internal
2119         clock dividers.
2120
2121 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2122
2123         * mips.igen (BREAK): Moved code to here for
2124         simulator-reserved break instructions.
2125         * gencode.c (build_instruction): Ditto.
2126         * interp.c (signal_exception): Code moved from here.  Non-
2127         reserved instructions now use exception vector, rather
2128         than halting sim.
2129         * sim-main.h: Moved magic constants to here.
2130
2131 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2132
2133         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2134         register upon non-zero interrupt event level, clear upon zero
2135         event value.
2136         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2137         by passing zero event value.
2138         (*_io_{read,write}_buffer): Endianness fixes.
2139         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2140         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2141
2142         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2143         serial I/O and timer module at base address 0xFFFF0000.
2144
2145 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2146
2147         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2148         and BigEndianCPU.
2149
2150 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2151
2152         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2153         parts.
2154         * configure: Update.
2155
2156 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2157
2158         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2159         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2160         * configure.in: Include tx3904tmr in hw_device list.
2161         * configure: Rebuilt.
2162         * interp.c (sim_open): Instantiate three timer instances.
2163         Fix address typo of tx3904irc instance.
2164
2165 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2166
2167         * interp.c (signal_exception): SystemCall exception now uses
2168         the exception vector.
2169
2170 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2171
2172         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2173         to allay warnings.
2174
2175 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2176
2177         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2178
2179 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2180
2181         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2182
2183         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2184         sim-main.h. Declare a struct hw_descriptor instead of struct
2185         hw_device_descriptor.
2186
2187 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2188
2189         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2190         right bits and then re-align left hand bytes to correct byte
2191         lanes.  Fix incorrect computation in do_store_left when loading
2192         bytes from second word.
2193
2194 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2195
2196         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2197         * interp.c (sim_open): Only create a device tree when HW is
2198         enabled.
2199
2200         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2201         * interp.c (signal_exception): Ditto.
2202
2203 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2204
2205         * gencode.c: Mark BEGEZALL as LIKELY.
2206
2207 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2208
2209         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2210         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2211
2212 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2213
2214         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2215         modules.  Recognize TX39 target with "mips*tx39" pattern.
2216         * configure: Rebuilt.
2217         * sim-main.h (*): Added many macros defining bits in
2218         TX39 control registers.
2219         (SignalInterrupt): Send actual PC instead of NULL.
2220         (SignalNMIReset): New exception type.
2221         * interp.c (board): New variable for future use to identify
2222         a particular board being simulated.
2223         (mips_option_handler,mips_options): Added "--board" option.
2224         (interrupt_event): Send actual PC.
2225         (sim_open): Make memory layout conditional on board setting.
2226         (signal_exception): Initial implementation of hardware interrupt
2227         handling.  Accept another break instruction variant for simulator
2228         exit.
2229         (decode_coproc): Implement RFE instruction for TX39.
2230         (mips.igen): Decode RFE instruction as such.
2231         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2232         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2233         bbegin to implement memory map.
2234         * dv-tx3904cpu.c: New file.
2235         * dv-tx3904irc.c: New file.
2236
2237 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2238
2239         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2240
2241 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2242
2243         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2244         with calls to check_div_hilo.
2245
2246 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2247
2248         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2249         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2250         Add special r3900 version of do_mult_hilo.
2251         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2252         with calls to check_mult_hilo.
2253         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2254         with calls to check_div_hilo.
2255
2256 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2257
2258         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2259         Document a replacement.
2260
2261 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2262
2263         * interp.c (sim_monitor): Make mon_printf work.
2264
2265 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2266
2267         * sim-main.h (INSN_NAME): New arg `cpu'.
2268
2269 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2270
2271         * configure: Regenerated to track ../common/aclocal.m4 changes.
2272
2273 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2274
2275         * configure: Regenerated to track ../common/aclocal.m4 changes.
2276         * config.in: Ditto.
2277
2278 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2279
2280         * acconfig.h: New file.
2281         * configure.in: Reverted change of Apr 24; use sinclude again.
2282
2283 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2284
2285         * configure: Regenerated to track ../common/aclocal.m4 changes.
2286         * config.in: Ditto.
2287
2288 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2289
2290         * configure.in: Don't call sinclude.
2291
2292 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2293
2294         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2295
2296 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2297
2298         * mips.igen (ERET): Implement.
2299
2300         * interp.c (decode_coproc): Return sign-extended EPC.
2301
2302         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2303
2304         * interp.c (signal_exception): Do not ignore Trap.
2305         (signal_exception): On TRAP, restart at exception address.
2306         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2307         (signal_exception): Update.
2308         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2309         so that TRAP instructions are caught.
2310
2311 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2312
2313         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2314         contains HI/LO access history.
2315         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2316         (HIACCESS, LOACCESS): Delete, replace with
2317         (HIHISTORY, LOHISTORY): New macros.
2318         (CHECKHILO): Delete all, moved to mips.igen
2319
2320         * gencode.c (build_instruction): Do not generate checks for
2321         correct HI/LO register usage.
2322
2323         * interp.c (old_engine_run): Delete checks for correct HI/LO
2324         register usage.
2325
2326         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2327         check_mf_cycles): New functions.
2328         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2329         do_divu, domultx, do_mult, do_multu): Use.
2330
2331         * tx.igen ("madd", "maddu"): Use.
2332
2333 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2334
2335         * mips.igen (DSRAV): Use function do_dsrav.
2336         (SRAV): Use new function do_srav.
2337
2338         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2339         (B): Sign extend 11 bit immediate.
2340         (EXT-B*): Shift 16 bit immediate left by 1.
2341         (ADDIU*): Don't sign extend immediate value.
2342
2343 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2344
2345         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2346
2347         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2348         functions.
2349
2350         * mips.igen (delayslot32, nullify_next_insn): New functions.
2351         (m16.igen): Always include.
2352         (do_*): Add more tracing.
2353
2354         * m16.igen (delayslot16): Add NIA argument, could be called by a
2355         32 bit MIPS16 instruction.
2356
2357         * interp.c (ifetch16): Move function from here.
2358         * sim-main.c (ifetch16): To here.
2359
2360         * sim-main.c (ifetch16, ifetch32): Update to match current
2361         implementations of LH, LW.
2362         (signal_exception): Don't print out incorrect hex value of illegal
2363         instruction.
2364
2365 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2366
2367         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2368         instruction.
2369
2370         * m16.igen: Implement MIPS16 instructions.
2371
2372         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2373         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2374         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2375         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2376         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2377         bodies of corresponding code from 32 bit insn to these.  Also used
2378         by MIPS16 versions of functions.
2379
2380         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2381         (IMEM16): Drop NR argument from macro.
2382
2383 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * Makefile.in (SIM_OBJS): Add sim-main.o.
2386
2387         * sim-main.h (address_translation, load_memory, store_memory,
2388         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2389         as INLINE_SIM_MAIN.
2390         (pr_addr, pr_uword64): Declare.
2391         (sim-main.c): Include when H_REVEALS_MODULE_P.
2392
2393         * interp.c (address_translation, load_memory, store_memory,
2394         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2395         from here.
2396         * sim-main.c: To here. Fix compilation problems.
2397
2398         * configure.in: Enable inlining.
2399         * configure: Re-config.
2400
2401 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * configure: Regenerated to track ../common/aclocal.m4 changes.
2404
2405 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * mips.igen: Include tx.igen.
2408         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2409         * tx.igen: New file, contains MADD and MADDU.
2410
2411         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2412         the hardwired constant `7'.
2413         (store_memory): Ditto.
2414         (LOADDRMASK): Move definition to sim-main.h.
2415
2416         mips.igen (MTC0): Enable for r3900.
2417         (ADDU): Add trace.
2418
2419         mips.igen (do_load_byte): Delete.
2420         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2421         do_store_right): New functions.
2422         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2423
2424         configure.in: Let the tx39 use igen again.
2425         configure: Update.
2426
2427 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2428
2429         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2430         not an address sized quantity.  Return zero for cache sizes.
2431
2432 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2433
2434         * mips.igen (r3900): r3900 does not support 64 bit integer
2435         operations.
2436
2437 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2438
2439         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2440         than igen one.
2441         * configure : Rebuild.
2442
2443 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2444
2445         * configure: Regenerated to track ../common/aclocal.m4 changes.
2446
2447 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2448
2449         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2450
2451 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2452
2453         * configure: Regenerated to track ../common/aclocal.m4 changes.
2454         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2455
2456 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2457
2458         * configure: Regenerated to track ../common/aclocal.m4 changes.
2459
2460 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2461
2462         * interp.c (Max, Min): Comment out functions. Not yet used.
2463
2464 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2465
2466         * configure: Regenerated to track ../common/aclocal.m4 changes.
2467
2468 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2469
2470         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2471         configurable settings for stand-alone simulator.
2472
2473         * configure.in: Added X11 search, just in case.
2474
2475         * configure: Regenerated.
2476
2477 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2478
2479         * interp.c (sim_write, sim_read, load_memory, store_memory):
2480         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2481
2482 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2483
2484         * sim-main.h (GETFCC): Return an unsigned value.
2485
2486 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2489         (DADD): Result destination is RD not RT.
2490
2491 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * sim-main.h (HIACCESS, LOACCESS): Always define.
2494
2495         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2496
2497         * interp.c (sim_info): Delete.
2498
2499 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2500
2501         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2502         (mips_option_handler): New argument `cpu'.
2503         (sim_open): Update call to sim_add_option_table.
2504
2505 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2506
2507         * mips.igen (CxC1): Add tracing.
2508
2509 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2510
2511         * sim-main.h (Max, Min): Declare.
2512
2513         * interp.c (Max, Min): New functions.
2514
2515         * mips.igen (BC1): Add tracing.
2516
2517 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2518
2519         * interp.c Added memory map for stack in vr4100
2520
2521 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2522
2523         * interp.c (load_memory): Add missing "break"'s.
2524
2525 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2526
2527         * interp.c (sim_store_register, sim_fetch_register): Pass in
2528         length parameter.  Return -1.
2529
2530 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2531
2532         * interp.c: Added hardware init hook, fixed warnings.
2533
2534 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2537
2538 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2539
2540         * interp.c (ifetch16): New function.
2541
2542         * sim-main.h (IMEM32): Rename IMEM.
2543         (IMEM16_IMMED): Define.
2544         (IMEM16): Define.
2545         (DELAY_SLOT): Update.
2546
2547         * m16run.c (sim_engine_run): New file.
2548
2549         * m16.igen: All instructions except LB.
2550         (LB): Call do_load_byte.
2551         * mips.igen (do_load_byte): New function.
2552         (LB): Call do_load_byte.
2553
2554         * mips.igen: Move spec for insn bit size and high bit from here.
2555         * Makefile.in (tmp-igen, tmp-m16): To here.
2556
2557         * m16.dc: New file, decode mips16 instructions.
2558
2559         * Makefile.in (SIM_NO_ALL): Define.
2560         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2561
2562 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2563
2564         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2565         point unit to 32 bit registers.
2566         * configure: Re-generate.
2567
2568 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2569
2570         * configure.in (sim_use_gen): Make IGEN the default simulator
2571         generator for generic 32 and 64 bit mips targets.
2572         * configure: Re-generate.
2573
2574 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2575
2576         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2577         bitsize.
2578
2579         * interp.c (sim_fetch_register, sim_store_register): Read/write
2580         FGR from correct location.
2581         (sim_open): Set size of FGR's according to
2582         WITH_TARGET_FLOATING_POINT_BITSIZE.
2583
2584         * sim-main.h (FGR): Store floating point registers in a separate
2585         array.
2586
2587 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2588
2589         * configure: Regenerated to track ../common/aclocal.m4 changes.
2590
2591 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2592
2593         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2594
2595         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2596
2597         * interp.c (pending_tick): New function.  Deliver pending writes.
2598
2599         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2600         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2601         it can handle mixed sized quantites and single bits.
2602
2603 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2604
2605         * interp.c (oengine.h): Do not include when building with IGEN.
2606         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2607         (sim_info): Ditto for PROCESSOR_64BIT.
2608         (sim_monitor): Replace ut_reg with unsigned_word.
2609         (*): Ditto for t_reg.
2610         (LOADDRMASK): Define.
2611         (sim_open): Remove defunct check that host FP is IEEE compliant,
2612         using software to emulate floating point.
2613         (value_fpr, ...): Always compile, was conditional on HASFPU.
2614
2615 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2616
2617         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2618         size.
2619
2620         * interp.c (SD, CPU): Define.
2621         (mips_option_handler): Set flags in each CPU.
2622         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2623         (sim_close): Do not clear STATE, deleted anyway.
2624         (sim_write, sim_read): Assume CPU zero's vm should be used for
2625         data transfers.
2626         (sim_create_inferior): Set the PC for all processors.
2627         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2628         argument.
2629         (mips16_entry): Pass correct nr of args to store_word, load_word.
2630         (ColdReset): Cold reset all cpu's.
2631         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2632         (sim_monitor, load_memory, store_memory, signal_exception): Use
2633         `CPU' instead of STATE_CPU.
2634
2635
2636         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2637         SD or CPU_.
2638
2639         * sim-main.h (signal_exception): Add sim_cpu arg.
2640         (SignalException*): Pass both SD and CPU to signal_exception.
2641         * interp.c (signal_exception): Update.
2642
2643         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2644         Ditto
2645         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2646         address_translation): Ditto
2647         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2648
2649 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2650
2651         * configure: Regenerated to track ../common/aclocal.m4 changes.
2652
2653 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2654
2655         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2656
2657         * mips.igen (model): Map processor names onto BFD name.
2658
2659         * sim-main.h (CPU_CIA): Delete.
2660         (SET_CIA, GET_CIA): Define
2661
2662 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2663
2664         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2665         regiser.
2666
2667         * configure.in (default_endian): Configure a big-endian simulator
2668         by default.
2669         * configure: Re-generate.
2670
2671 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2672
2673         * configure: Regenerated to track ../common/aclocal.m4 changes.
2674
2675 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2676
2677         * interp.c (sim_monitor): Handle Densan monitor outbyte
2678         and inbyte functions.
2679
2680 1997-12-29  Felix Lee  <flee@cygnus.com>
2681
2682         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2683
2684 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2685
2686         * Makefile.in (tmp-igen): Arrange for $zero to always be
2687         reset to zero after every instruction.
2688
2689 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * configure: Regenerated to track ../common/aclocal.m4 changes.
2692         * config.in: Ditto.
2693
2694 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2695
2696         * mips.igen (MSUB): Fix to work like MADD.
2697         * gencode.c (MSUB): Similarly.
2698
2699 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2700
2701         * configure: Regenerated to track ../common/aclocal.m4 changes.
2702
2703 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2704
2705         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2706
2707 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2708
2709         * sim-main.h (sim-fpu.h): Include.
2710
2711         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2712         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2713         using host independant sim_fpu module.
2714
2715 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2716
2717         * interp.c (signal_exception): Report internal errors with SIGABRT
2718         not SIGQUIT.
2719
2720         * sim-main.h (C0_CONFIG): New register.
2721         (signal.h): No longer include.
2722
2723         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2724
2725 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2726
2727         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2728
2729 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2730
2731         * mips.igen: Tag vr5000 instructions.
2732         (ANDI): Was missing mipsIV model, fix assembler syntax.
2733         (do_c_cond_fmt): New function.
2734         (C.cond.fmt): Handle mips I-III which do not support CC field
2735         separatly.
2736         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2737         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2738         in IV3.2 spec.
2739         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2740         vr5000 which saves LO in a GPR separatly.
2741
2742         * configure.in (enable-sim-igen): For vr5000, select vr5000
2743         specific instructions.
2744         * configure: Re-generate.
2745
2746 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2747
2748         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2749
2750         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2751         fmt_uninterpreted_64 bit cases to switch.  Convert to
2752         fmt_formatted,
2753
2754         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2755
2756         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2757         as specified in IV3.2 spec.
2758         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2759
2760 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2761
2762         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2763         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2764         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2765         PENDING_FILL versions of instructions.  Simplify.
2766         (X): New function.
2767         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2768         instructions.
2769         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2770         a signed value.
2771         (MTHI, MFHI): Disable code checking HI-LO.
2772
2773         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2774         global.
2775         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2776
2777 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2778
2779         * gencode.c (build_mips16_operands): Replace IPC with cia.
2780
2781         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2782         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2783         IPC to `cia'.
2784         (UndefinedResult): Replace function with macro/function
2785         combination.
2786         (sim_engine_run): Don't save PC in IPC.
2787
2788         * sim-main.h (IPC): Delete.
2789
2790
2791         * interp.c (signal_exception, store_word, load_word,
2792         address_translation, load_memory, store_memory, cache_op,
2793         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2794         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2795         current instruction address - cia - argument.
2796         (sim_read, sim_write): Call address_translation directly.
2797         (sim_engine_run): Rename variable vaddr to cia.
2798         (signal_exception): Pass cia to sim_monitor
2799
2800         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2801         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2802         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2803
2804         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2805         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2806         SIM_ASSERT.
2807
2808         * interp.c (signal_exception): Pass restart address to
2809         sim_engine_restart.
2810
2811         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2812         idecode.o): Add dependency.
2813
2814         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2815         Delete definitions
2816         (DELAY_SLOT): Update NIA not PC with branch address.
2817         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2818
2819         * mips.igen: Use CIA not PC in branch calculations.
2820         (illegal): Call SignalException.
2821         (BEQ, ADDIU): Fix assembler.
2822
2823 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2824
2825         * m16.igen (JALX): Was missing.
2826
2827         * configure.in (enable-sim-igen): New configuration option.
2828         * configure: Re-generate.
2829
2830         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2831
2832         * interp.c (load_memory, store_memory): Delete parameter RAW.
2833         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2834         bypassing {load,store}_memory.
2835
2836         * sim-main.h (ByteSwapMem): Delete definition.
2837
2838         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2839
2840         * interp.c (sim_do_command, sim_commands): Delete mips specific
2841         commands.  Handled by module sim-options.
2842
2843         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2844         (WITH_MODULO_MEMORY): Define.
2845
2846         * interp.c (sim_info): Delete code printing memory size.
2847
2848         * interp.c (mips_size): Nee sim_size, delete function.
2849         (power2): Delete.
2850         (monitor, monitor_base, monitor_size): Delete global variables.
2851         (sim_open, sim_close): Delete code creating monitor and other
2852         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2853         manage memory regions.
2854         (load_memory, store_memory): Use sim-core for memory model.
2855
2856         * interp.c (address_translation): Delete all memory map code
2857         except line forcing 32 bit addresses.
2858
2859 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2860
2861         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2862         trace options.
2863
2864         * interp.c (logfh, logfile): Delete globals.
2865         (sim_open, sim_close): Delete code opening & closing log file.
2866         (mips_option_handler): Delete -l and -n options.
2867         (OPTION mips_options): Ditto.
2868
2869         * interp.c (OPTION mips_options): Rename option trace to dinero.
2870         (mips_option_handler): Update.
2871
2872 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2873
2874         * interp.c (fetch_str): New function.
2875         (sim_monitor): Rewrite using sim_read & sim_write.
2876         (sim_open): Check magic number.
2877         (sim_open): Write monitor vectors into memory using sim_write.
2878         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2879         (sim_read, sim_write): Simplify - transfer data one byte at a
2880         time.
2881         (load_memory, store_memory): Clarify meaning of parameter RAW.
2882
2883         * sim-main.h (isHOST): Defete definition.
2884         (isTARGET): Mark as depreciated.
2885         (address_translation): Delete parameter HOST.
2886
2887         * interp.c (address_translation): Delete parameter HOST.
2888
2889 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2890
2891         * mips.igen:
2892
2893         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2894         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2895
2896 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2897
2898         * mips.igen: Add model filter field to records.
2899
2900 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2901
2902         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2903
2904         interp.c (sim_engine_run): Do not compile function sim_engine_run
2905         when WITH_IGEN == 1.
2906
2907         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2908         target architecture.
2909
2910         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2911         igen. Replace with configuration variables sim_igen_flags /
2912         sim_m16_flags.
2913
2914         * m16.igen: New file.  Copy mips16 insns here.
2915         * mips.igen: From here.
2916
2917 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2918
2919         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2920         to top.
2921         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2922
2923 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2924
2925         * gencode.c (build_instruction): Follow sim_write's lead in using
2926         BigEndianMem instead of !ByteSwapMem.
2927
2928 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2929
2930         * configure.in (sim_gen): Dependent on target, select type of
2931         generator.  Always select old style generator.
2932
2933         configure: Re-generate.
2934
2935         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2936         targets.
2937         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2938         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2939         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2940         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2941         SIM_@sim_gen@_*, set by autoconf.
2942
2943 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2944
2945         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2946
2947         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2948         CURRENT_FLOATING_POINT instead.
2949
2950         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2951         (address_translation): Raise exception InstructionFetch when
2952         translation fails and isINSTRUCTION.
2953
2954         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2955         sim_engine_run): Change type of of vaddr and paddr to
2956         address_word.
2957         (address_translation, prefetch, load_memory, store_memory,
2958         cache_op): Change type of vAddr and pAddr to address_word.
2959
2960         * gencode.c (build_instruction): Change type of vaddr and paddr to
2961         address_word.
2962
2963 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2964
2965         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2966         macro to obtain result of ALU op.
2967
2968 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2969
2970         * interp.c (sim_info): Call profile_print.
2971
2972 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2973
2974         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2975
2976         * sim-main.h (WITH_PROFILE): Do not define, defined in
2977         common/sim-config.h.  Use sim-profile module.
2978         (simPROFILE): Delete defintion.
2979
2980         * interp.c (PROFILE): Delete definition.
2981         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2982         (sim_close): Delete code writing profile histogram.
2983         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2984         Delete.
2985         (sim_engine_run): Delete code profiling the PC.
2986
2987 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2988
2989         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2990
2991         * interp.c (sim_monitor): Make register pointers of type
2992         unsigned_word*.
2993
2994         * sim-main.h: Make registers of type unsigned_word not
2995         signed_word.
2996
2997 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2998
2999         * interp.c (sync_operation): Rename from SyncOperation, make
3000         global, add SD argument.
3001         (prefetch): Rename from Prefetch, make global, add SD argument.
3002         (decode_coproc): Make global.
3003
3004         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3005
3006         * gencode.c (build_instruction): Generate DecodeCoproc not
3007         decode_coproc calls.
3008
3009         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3010         (SizeFGR): Move to sim-main.h
3011         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3012         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3013         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3014         sim-main.h.
3015         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3016         FP_RM_TOMINF, GETRM): Move to sim-main.h.
3017         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3018         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3019         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3020         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3021
3022         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3023         exception.
3024         (sim-alu.h): Include.
3025         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3026         (sim_cia): Typedef to instruction_address.
3027
3028 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3029
3030         * Makefile.in (interp.o): Rename generated file engine.c to
3031         oengine.c.
3032
3033         * interp.c: Update.
3034
3035 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3036
3037         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3038
3039 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3040
3041         * gencode.c (build_instruction): For "FPSQRT", output correct
3042         number of arguments to Recip.
3043
3044 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3045
3046         * Makefile.in (interp.o): Depends on sim-main.h
3047
3048         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3049
3050         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3051         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3052         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3053         STATE, DSSTATE): Define
3054         (GPR, FGRIDX, ..): Define.
3055
3056         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3057         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3058         (GPR, FGRIDX, ...): Delete macros.
3059
3060         * interp.c: Update names to match defines from sim-main.h
3061
3062 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3063
3064         * interp.c (sim_monitor): Add SD argument.
3065         (sim_warning): Delete.  Replace calls with calls to
3066         sim_io_eprintf.
3067         (sim_error): Delete. Replace calls with sim_io_error.
3068         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3069         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3070         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3071         argument.
3072         (mips_size): Rename from sim_size. Add SD argument.
3073
3074         * interp.c (simulator): Delete global variable.
3075         (callback): Delete global variable.
3076         (mips_option_handler, sim_open, sim_write, sim_read,
3077         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3078         sim_size,sim_monitor): Use sim_io_* not callback->*.
3079         (sim_open): ZALLOC simulator struct.
3080         (PROFILE): Do not define.
3081
3082 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3083
3084         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3085         support.h with corresponding code.
3086
3087         * sim-main.h (word64, uword64), support.h: Move definition to
3088         sim-main.h.
3089         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3090
3091         * support.h: Delete
3092         * Makefile.in: Update dependencies
3093         * interp.c: Do not include.
3094
3095 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3096
3097         * interp.c (address_translation, load_memory, store_memory,
3098         cache_op): Rename to from AddressTranslation et.al., make global,
3099         add SD argument
3100
3101         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3102         CacheOp): Define.
3103
3104         * interp.c (SignalException): Rename to signal_exception, make
3105         global.
3106
3107         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3108
3109         * sim-main.h (SignalException, SignalExceptionInterrupt,
3110         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3111         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3112         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3113         Define.
3114
3115         * interp.c, support.h: Use.
3116
3117 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3118
3119         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3120         to value_fpr / store_fpr. Add SD argument.
3121         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3122         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3123
3124         * sim-main.h (ValueFPR, StoreFPR): Define.
3125
3126 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3127
3128         * interp.c (sim_engine_run): Check consistency between configure
3129         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3130         and HASFPU.
3131
3132         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3133         (mips_fpu): Configure WITH_FLOATING_POINT.
3134         (mips_endian): Configure WITH_TARGET_ENDIAN.
3135         * configure: Update.
3136
3137 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3138
3139         * configure: Regenerated to track ../common/aclocal.m4 changes.
3140
3141 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3142
3143         * configure: Regenerated.
3144
3145 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3146
3147         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3148
3149 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3150
3151         * gencode.c (print_igen_insn_models): Assume certain architectures
3152         include all mips* instructions.
3153         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3154         instruction.
3155
3156         * Makefile.in (tmp.igen): Add target. Generate igen input from
3157         gencode file.
3158
3159         * gencode.c (FEATURE_IGEN): Define.
3160         (main): Add --igen option.  Generate output in igen format.
3161         (process_instructions): Format output according to igen option.
3162         (print_igen_insn_format): New function.
3163         (print_igen_insn_models): New function.
3164         (process_instructions): Only issue warnings and ignore
3165         instructions when no FEATURE_IGEN.
3166
3167 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3168
3169         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3170         MIPS targets.
3171
3172 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3173
3174         * configure: Regenerated to track ../common/aclocal.m4 changes.
3175
3176 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3177
3178         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3179         SIM_RESERVED_BITS): Delete, moved to common.
3180         (SIM_EXTRA_CFLAGS): Update.
3181
3182 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3183
3184         * configure.in: Configure non-strict memory alignment.
3185         * configure: Regenerated to track ../common/aclocal.m4 changes.
3186
3187 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3188
3189         * configure: Regenerated to track ../common/aclocal.m4 changes.
3190
3191 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3192
3193         * gencode.c (SDBBP,DERET): Added (3900) insns.
3194         (RFE): Turn on for 3900.
3195         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3196         (dsstate): Made global.
3197         (SUBTARGET_R3900): Added.
3198         (CANCELDELAYSLOT): New.
3199         (SignalException): Ignore SystemCall rather than ignore and
3200         terminate.  Add DebugBreakPoint handling.
3201         (decode_coproc): New insns RFE, DERET; and new registers Debug
3202         and DEPC protected by SUBTARGET_R3900.
3203         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3204         bits explicitly.
3205         * Makefile.in,configure.in: Add mips subtarget option.
3206         * configure: Update.
3207
3208 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3209
3210         * gencode.c: Add r3900 (tx39).
3211
3212
3213 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3214
3215         * gencode.c (build_instruction): Don't need to subtract 4 for
3216         JALR, just 2.
3217
3218 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3219
3220         * interp.c: Correct some HASFPU problems.
3221
3222 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * configure: Regenerated to track ../common/aclocal.m4 changes.
3225
3226 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3227
3228         * interp.c (mips_options): Fix samples option short form, should
3229         be `x'.
3230
3231 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3232
3233         * interp.c (sim_info): Enable info code.  Was just returning.
3234
3235 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3236
3237         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3238         MFC0.
3239
3240 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3241
3242         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3243         constants.
3244         (build_instruction): Ditto for LL.
3245
3246 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3247
3248         * configure: Regenerated to track ../common/aclocal.m4 changes.
3249
3250 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3251
3252         * configure: Regenerated to track ../common/aclocal.m4 changes.
3253         * config.in: Ditto.
3254
3255 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3256
3257         * interp.c (sim_open): Add call to sim_analyze_program, update
3258         call to sim_config.
3259
3260 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3261
3262         * interp.c (sim_kill): Delete.
3263         (sim_create_inferior): Add ABFD argument. Set PC from same.
3264         (sim_load): Move code initializing trap handlers from here.
3265         (sim_open): To here.
3266         (sim_load): Delete, use sim-hload.c.
3267
3268         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3269
3270 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3271
3272         * configure: Regenerated to track ../common/aclocal.m4 changes.
3273         * config.in: Ditto.
3274
3275 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3276
3277         * interp.c (sim_open): Add ABFD argument.
3278         (sim_load): Move call to sim_config from here.
3279         (sim_open): To here.  Check return status.
3280
3281 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3282
3283         * gencode.c (build_instruction): Two arg MADD should
3284         not assign result to $0.
3285
3286 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3287
3288         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3289         * sim/mips/configure.in: Regenerate.
3290
3291 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3292
3293         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3294         signed8, unsigned8 et.al. types.
3295
3296         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3297         hosts when selecting subreg.
3298
3299 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3300
3301         * interp.c (sim_engine_run): Reset the ZERO register to zero
3302         regardless of FEATURE_WARN_ZERO.
3303         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3304
3305 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3306
3307         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3308         (SignalException): For BreakPoints ignore any mode bits and just
3309         save the PC.
3310         (SignalException): Always set the CAUSE register.
3311
3312 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3313
3314         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3315         exception has been taken.
3316
3317         * interp.c: Implement the ERET and mt/f sr instructions.
3318
3319 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3320
3321         * interp.c (SignalException): Don't bother restarting an
3322         interrupt.
3323
3324 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3325
3326         * interp.c (SignalException): Really take an interrupt.
3327         (interrupt_event): Only deliver interrupts when enabled.
3328
3329 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3330
3331         * interp.c (sim_info): Only print info when verbose.
3332         (sim_info) Use sim_io_printf for output.
3333
3334 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3335
3336         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3337         mips architectures.
3338
3339 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3340
3341         * interp.c (sim_do_command): Check for common commands if a
3342         simulator specific command fails.
3343
3344 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3345
3346         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3347         and simBE when DEBUG is defined.
3348
3349 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3350
3351         * interp.c (interrupt_event): New function.  Pass exception event
3352         onto exception handler.
3353
3354         * configure.in: Check for stdlib.h.
3355         * configure: Regenerate.
3356
3357         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3358         variable declaration.
3359         (build_instruction): Initialize memval1.
3360         (build_instruction): Add UNUSED attribute to byte, bigend,
3361         reverse.
3362         (build_operands): Ditto.
3363
3364         * interp.c: Fix GCC warnings.
3365         (sim_get_quit_code): Delete.
3366
3367         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3368         * Makefile.in: Ditto.
3369         * configure: Re-generate.
3370
3371         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3372
3373 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3374
3375         * interp.c (mips_option_handler): New function parse argumes using
3376         sim-options.
3377         (myname): Replace with STATE_MY_NAME.
3378         (sim_open): Delete check for host endianness - performed by
3379         sim_config.
3380         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3381         (sim_open): Move much of the initialization from here.
3382         (sim_load): To here.  After the image has been loaded and
3383         endianness set.
3384         (sim_open): Move ColdReset from here.
3385         (sim_create_inferior): To here.
3386         (sim_open): Make FP check less dependant on host endianness.
3387
3388         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3389         run.
3390         * interp.c (sim_set_callbacks): Delete.
3391
3392         * interp.c (membank, membank_base, membank_size): Replace with
3393         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3394         (sim_open): Remove call to callback->init. gdb/run do this.
3395
3396         * interp.c: Update
3397
3398         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3399
3400         * interp.c (big_endian_p): Delete, replaced by
3401         current_target_byte_order.
3402
3403 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3404
3405         * interp.c (host_read_long, host_read_word, host_swap_word,
3406         host_swap_long): Delete. Using common sim-endian.
3407         (sim_fetch_register, sim_store_register): Use H2T.
3408         (pipeline_ticks): Delete.  Handled by sim-events.
3409         (sim_info): Update.
3410         (sim_engine_run): Update.
3411
3412 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3413
3414         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3415         reason from here.
3416         (SignalException): To here. Signal using sim_engine_halt.
3417         (sim_stop_reason): Delete, moved to common.
3418
3419 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3420
3421         * interp.c (sim_open): Add callback argument.
3422         (sim_set_callbacks): Delete SIM_DESC argument.
3423         (sim_size): Ditto.
3424
3425 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3426
3427         * Makefile.in (SIM_OBJS): Add common modules.
3428
3429         * interp.c (sim_set_callbacks): Also set SD callback.
3430         (set_endianness, xfer_*, swap_*): Delete.
3431         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3432         Change to functions using sim-endian macros.
3433         (control_c, sim_stop): Delete, use common version.
3434         (simulate): Convert into.
3435         (sim_engine_run): This function.
3436         (sim_resume): Delete.
3437
3438         * interp.c (simulation): New variable - the simulator object.
3439         (sim_kind): Delete global - merged into simulation.
3440         (sim_load): Cleanup.  Move PC assignment from here.
3441         (sim_create_inferior): To here.
3442
3443         * sim-main.h: New file.
3444         * interp.c (sim-main.h): Include.
3445
3446 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3447
3448         * configure: Regenerated to track ../common/aclocal.m4 changes.
3449
3450 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3451
3452         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3453
3454 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3455
3456         * gencode.c (build_instruction): DIV instructions: check
3457         for division by zero and integer overflow before using
3458         host's division operation.
3459
3460 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3461
3462         * Makefile.in (SIM_OBJS): Add sim-load.o.
3463         * interp.c: #include bfd.h.
3464         (target_byte_order): Delete.
3465         (sim_kind, myname, big_endian_p): New static locals.
3466         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3467         after argument parsing.  Recognize -E arg, set endianness accordingly.
3468         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3469         load file into simulator.  Set PC from bfd.
3470         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3471         (set_endianness): Use big_endian_p instead of target_byte_order.
3472
3473 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3474
3475         * interp.c (sim_size): Delete prototype - conflicts with
3476         definition in remote-sim.h.  Correct definition.
3477
3478 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3479
3480         * configure: Regenerated to track ../common/aclocal.m4 changes.
3481         * config.in: Ditto.
3482
3483 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3484
3485         * interp.c (sim_open): New arg `kind'.
3486
3487         * configure: Regenerated to track ../common/aclocal.m4 changes.
3488
3489 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3490
3491         * configure: Regenerated to track ../common/aclocal.m4 changes.
3492
3493 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3494
3495         * interp.c (sim_open): Set optind to 0 before calling getopt.
3496
3497 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3498
3499         * configure: Regenerated to track ../common/aclocal.m4 changes.
3500
3501 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3502
3503         * interp.c : Replace uses of pr_addr with pr_uword64
3504         where the bit length is always 64 independent of SIM_ADDR.
3505         (pr_uword64) : added.
3506
3507 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3508
3509         * configure: Re-generate.
3510
3511 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3512
3513         * configure: Regenerate to track ../common/aclocal.m4 changes.
3514
3515 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3516
3517         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3518         in argv form.
3519         (other sim_*): New SIM_DESC argument.
3520
3521 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3522
3523         * interp.c: Fix printing of addresses for non-64-bit targets.
3524         (pr_addr): Add function to print address based on size.
3525
3526 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3527
3528         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3529
3530 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3531
3532         * gencode.c (build_mips16_operands): Correct computation of base
3533         address for extended PC relative instruction.
3534
3535 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3536
3537         * interp.c (mips16_entry): Add support for floating point cases.
3538         (SignalException): Pass floating point cases to mips16_entry.
3539         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3540         registers.
3541         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3542         or fmt_word.
3543         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3544         and then set the state to fmt_uninterpreted.
3545         (COP_SW): Temporarily set the state to fmt_word while calling
3546         ValueFPR.
3547
3548 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3549
3550         * gencode.c (build_instruction): The high order may be set in the
3551         comparison flags at any ISA level, not just ISA 4.
3552
3553 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3554
3555         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3556         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3557         * configure.in: sinclude ../common/aclocal.m4.
3558         * configure: Regenerated.
3559
3560 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3561
3562         * configure: Rebuild after change to aclocal.m4.
3563
3564 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3565
3566         * configure configure.in Makefile.in:  Update to new configure
3567         scheme which is more compatible with WinGDB builds.
3568         * configure.in:  Improve comment on how to run autoconf.
3569         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3570         * Makefile.in:  Use autoconf substitution to install common
3571         makefile fragment.
3572
3573 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3574
3575         * gencode.c (build_instruction): Use BigEndianCPU instead of
3576         ByteSwapMem.
3577
3578 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3579
3580         * interp.c (sim_monitor): Make output to stdout visible in
3581         wingdb's I/O log window.
3582
3583 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3584
3585         * support.h: Undo previous change to SIGTRAP
3586         and SIGQUIT values.
3587
3588 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3589
3590         * interp.c (store_word, load_word): New static functions.
3591         (mips16_entry): New static function.
3592         (SignalException): Look for mips16 entry and exit instructions.
3593         (simulate): Use the correct index when setting fpr_state after
3594         doing a pending move.
3595
3596 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3597
3598         * interp.c: Fix byte-swapping code throughout to work on
3599         both little- and big-endian hosts.
3600
3601 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3602
3603         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3604         with gdb/config/i386/xm-windows.h.
3605
3606 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3607
3608         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3609         that messes up arithmetic shifts.
3610
3611 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3612
3613         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3614         SIGTRAP and SIGQUIT for _WIN32.
3615
3616 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3617
3618         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3619         force a 64 bit multiplication.
3620         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3621         destination register is 0, since that is the default mips16 nop
3622         instruction.
3623
3624 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3625
3626         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3627         (build_endian_shift): Don't check proc64.
3628         (build_instruction): Always set memval to uword64.  Cast op2 to
3629         uword64 when shifting it left in memory instructions.  Always use
3630         the same code for stores--don't special case proc64.
3631
3632         * gencode.c (build_mips16_operands): Fix base PC value for PC
3633         relative operands.
3634         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3635         jal instruction.
3636         * interp.c (simJALDELAYSLOT): Define.
3637         (JALDELAYSLOT): Define.
3638         (INDELAYSLOT, INJALDELAYSLOT): Define.
3639         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3640
3641 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3642
3643         * interp.c (sim_open): add flush_cache as a PMON routine
3644         (sim_monitor): handle flush_cache by ignoring it
3645
3646 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3647
3648         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3649         BigEndianMem.
3650         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3651         (BigEndianMem): Rename to ByteSwapMem and change sense.
3652         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3653         BigEndianMem references to !ByteSwapMem.
3654         (set_endianness): New function, with prototype.
3655         (sim_open): Call set_endianness.
3656         (sim_info): Use simBE instead of BigEndianMem.
3657         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3658         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3659         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3660         ifdefs, keeping the prototype declaration.
3661         (swap_word): Rewrite correctly.
3662         (ColdReset): Delete references to CONFIG.  Delete endianness related
3663         code; moved to set_endianness.
3664
3665 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3666
3667         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3668         * interp.c (CHECKHILO): Define away.
3669         (simSIGINT): New macro.
3670         (membank_size): Increase from 1MB to 2MB.
3671         (control_c): New function.
3672         (sim_resume): Rename parameter signal to signal_number.  Add local
3673         variable prev.  Call signal before and after simulate.
3674         (sim_stop_reason): Add simSIGINT support.
3675         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3676         functions always.
3677         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3678         if logfh is NULL.
3679         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3680         a call to sim_warning.
3681
3682 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3683
3684         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3685         16 bit instructions.
3686
3687 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3688
3689         Add support for mips16 (16 bit MIPS implementation):
3690         * gencode.c (inst_type): Add mips16 instruction encoding types.
3691         (GETDATASIZEINSN): Define.
3692         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3693         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3694         mtlo.
3695         (MIPS16_DECODE): New table, for mips16 instructions.
3696         (bitmap_val): New static function.
3697         (struct mips16_op): Define.
3698         (mips16_op_table): New table, for mips16 operands.
3699         (build_mips16_operands): New static function.
3700         (process_instructions): If PC is odd, decode a mips16
3701         instruction.  Break out instruction handling into new
3702         build_instruction function.
3703         (build_instruction): New static function, broken out of
3704         process_instructions.  Check modifiers rather than flags for SHIFT
3705         bit count and m[ft]{hi,lo} direction.
3706         (usage): Pass program name to fprintf.
3707         (main): Remove unused variable this_option_optind.  Change
3708         ``*loptarg++'' to ``loptarg++''.
3709         (my_strtoul): Parenthesize && within ||.
3710         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3711         (simulate): If PC is odd, fetch a 16 bit instruction, and
3712         increment PC by 2 rather than 4.
3713         * configure.in: Add case for mips16*-*-*.
3714         * configure: Rebuild.
3715
3716 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3717
3718         * interp.c: Allow -t to enable tracing in standalone simulator.
3719         Fix garbage output in trace file and error messages.
3720
3721 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3722
3723         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3724         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3725         * configure.in: Simplify using macros in ../common/aclocal.m4.
3726         * configure: Regenerated.
3727         * tconfig.in: New file.
3728
3729 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3730
3731         * interp.c: Fix bugs in 64-bit port.
3732         Use ansi function declarations for msvc compiler.
3733         Initialize and test file pointer in trace code.
3734         Prevent duplicate definition of LAST_EMED_REGNUM.
3735
3736 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3737
3738         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3739
3740 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3741
3742         * interp.c (SignalException): Check for explicit terminating
3743         breakpoint value.
3744         * gencode.c: Pass instruction value through SignalException()
3745         calls for Trap, Breakpoint and Syscall.
3746
3747 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3748
3749         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3750         only used on those hosts that provide it.
3751         * configure.in: Add sqrt() to list of functions to be checked for.
3752         * config.in: Re-generated.
3753         * configure: Re-generated.
3754
3755 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3756
3757         * gencode.c (process_instructions): Call build_endian_shift when
3758         expanding STORE RIGHT, to fix swr.
3759         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3760         clear the high bits.
3761         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3762         Fix float to int conversions to produce signed values.
3763
3764 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3765
3766         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3767         (process_instructions): Correct handling of nor instruction.
3768         Correct shift count for 32 bit shift instructions. Correct sign
3769         extension for arithmetic shifts to not shift the number of bits in
3770         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3771         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3772         Fix madd.
3773         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3774         It's OK to have a mult follow a mult.  What's not OK is to have a
3775         mult follow an mfhi.
3776         (Convert): Comment out incorrect rounding code.
3777
3778 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3779
3780         * interp.c (sim_monitor): Improved monitor printf
3781         simulation. Tidied up simulator warnings, and added "--log" option
3782         for directing warning message output.
3783         * gencode.c: Use sim_warning() rather than WARNING macro.
3784
3785 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3786
3787         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3788         getopt1.o, rather than on gencode.c.  Link objects together.
3789         Don't link against -liberty.
3790         (gencode.o, getopt.o, getopt1.o): New targets.
3791         * gencode.c: Include <ctype.h> and "ansidecl.h".
3792         (AND): Undefine after including "ansidecl.h".
3793         (ULONG_MAX): Define if not defined.
3794         (OP_*): Don't define macros; now defined in opcode/mips.h.
3795         (main): Call my_strtoul rather than strtoul.
3796         (my_strtoul): New static function.
3797
3798 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3799
3800         * gencode.c (process_instructions):  Generate word64 and uword64
3801         instead of `long long' and `unsigned long long' data types.
3802         * interp.c:  #include sysdep.h to get signals, and define default
3803         for SIGBUS.
3804         * (Convert):  Work around for Visual-C++ compiler bug with type
3805         conversion.
3806         * support.h:  Make things compile under Visual-C++ by using
3807         __int64 instead of `long long'.  Change many refs to long long
3808         into word64/uword64 typedefs.
3809
3810 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3811
3812         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3813         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3814         (docdir): Removed.
3815         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3816         (AC_PROG_INSTALL): Added.
3817         (AC_PROG_CC): Moved to before configure.host call.
3818         * configure: Rebuilt.
3819
3820 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3821
3822         * configure.in: Define @SIMCONF@ depending on mips target.
3823         * configure: Rebuild.
3824         * Makefile.in (run): Add @SIMCONF@ to control simulator
3825         construction.
3826         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3827         * interp.c: Remove some debugging, provide more detailed error
3828         messages, update memory accesses to use LOADDRMASK.
3829
3830 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3831
3832         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3833         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3834         stamp-h.
3835         * configure: Rebuild.
3836         * config.in: New file, generated by autoheader.
3837         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3838         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3839         HAVE_ANINT and HAVE_AINT, as appropriate.
3840         * Makefile.in (run): Use @LIBS@ rather than -lm.
3841         (interp.o): Depend upon config.h.
3842         (Makefile): Just rebuild Makefile.
3843         (clean): Remove stamp-h.
3844         (mostlyclean): Make the same as clean, not as distclean.
3845         (config.h, stamp-h): New targets.
3846
3847 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3848
3849         * interp.c (ColdReset): Fix boolean test. Make all simulator
3850         globals static.
3851
3852 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3853
3854         * interp.c (xfer_direct_word, xfer_direct_long,
3855         swap_direct_word, swap_direct_long, xfer_big_word,
3856         xfer_big_long, xfer_little_word, xfer_little_long,
3857         swap_word,swap_long): Added.
3858         * interp.c (ColdReset): Provide function indirection to
3859         host<->simulated_target transfer routines.
3860         * interp.c (sim_store_register, sim_fetch_register): Updated to
3861         make use of indirected transfer routines.
3862
3863 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3864
3865         * gencode.c (process_instructions): Ensure FP ABS instruction
3866         recognised.
3867         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3868         system call support.
3869
3870 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3871
3872         * interp.c (sim_do_command): Complain if callback structure not
3873         initialised.
3874
3875 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3876
3877         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3878         support for Sun hosts.
3879         * Makefile.in (gencode): Ensure the host compiler and libraries
3880         used for cross-hosted build.
3881
3882 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3883
3884         * interp.c, gencode.c: Some more (TODO) tidying.
3885
3886 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3887
3888         * gencode.c, interp.c: Replaced explicit long long references with
3889         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3890         * support.h (SET64LO, SET64HI): Macros added.
3891
3892 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3893
3894         * configure: Regenerate with autoconf 2.7.
3895
3896 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3897
3898         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3899         * support.h: Remove superfluous "1" from #if.
3900         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3901
3902 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3903
3904         * interp.c (StoreFPR): Control UndefinedResult() call on
3905         WARN_RESULT manifest.
3906
3907 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3908
3909         * gencode.c: Tidied instruction decoding, and added FP instruction
3910         support.
3911
3912         * interp.c: Added dineroIII, and BSD profiling support. Also
3913         run-time FP handling.
3914
3915 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3916
3917         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3918         gencode.c, interp.c, support.h: created.