sim/mips/ChangeLog

   1 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * aclocal.m4, configure: Regenerate.
   4
   5 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * configure: Regenerate.
   8
   9 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * Makefile.in (SIM_EXTRA_ALL): Delete.
  12         (all): New target.
  13
  14 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  17         * aclocal.m4, configure: Regenerate.
  18
  19 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  20
  21         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  22         * aclocal.m4, configure: Regenerate.
  23
  24 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  27
  28 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * configure: Regenerate.
  31
  32 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  33
  34         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  35
  36 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * config.in, configure: Regenerate.
  39         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  40         and strings.h include.
  41
  42 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * configure: Regenerate.
  45
  46 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  49         * configure: Regenerate.
  50
  51 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * configure: Regenerate.
  54
  55 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  56
  57         * configure: Regenerate.
  58
  59 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  60
  61         *  sim-main.c: Include <stdlib.h>.
  62
  63 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  64
  65         * cp1.c: Include <stdlib.h>.
  66
  67 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  68
  69         * configure: Re-generate.
  70
  71 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  72
  73         * configure: Regenerate.
  74
  75 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  76
  77         PR sim/20808
  78         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  79         and SD to sd.
  80
  81 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  82
  83         PR sim/20809
  84         * mips.igen (check_u64): Enable for `r3900'.
  85
  86 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  89         STATE_PROG_BFD (sd).
  90         * configure: Regenerate.
  91
  92 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  93             Maciej W. Rozycki  <macro@imgtec.com>
  94
  95         PR sim/19441
  96         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  97         `micromips64' and `micromipsdsp' only.
  98         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  99         (do_micromips_jalr, do_micromips_jal): Likewise.
 100         (compute_movep_src_reg): Likewise.
 101         (compute_andi16_imm): Likewise.
 102         (convert_fmt_micromips): Likewise.
 103         (convert_fmt_micromips_cvt_d): Likewise.
 104         (convert_fmt_micromips_cvt_s): Likewise.
 105         (FMT_MICROMIPS): Likewise.
 106         (FMT_MICROMIPS_CVT_D): Likewise.
 107         (FMT_MICROMIPS_CVT_S): Likewise.
 108
 109 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * interp.c: Include elf-bfd.h.
 112         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 113         ELFCLASS32.
 114
 115 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * config.in, configure: Regenerate.
 118
 119 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 120
 121         * configure: Regenerate.
 122
 123 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * configure: Regenerate.
 126
 127 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * configure: Regenerate.
 130
 131 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * configure: Regenerate.
 134
 135 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 138         * configure: Regenerate.
 139
 140 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 141
 142         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 143         * configure: Regenerate.
 144
 145 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * configure: Regenerate.
 148
 149 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 150
 151         * configure: Regenerate.
 152
 153 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 154
 155         * config.in, configure: Regenerate.
 156
 157 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 158
 159         * interp.c (sim_open): Mark argv const.
 160         (sim_create_inferior): Mark argv and env const.
 161
 162 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure: Regenerate.
 165
 166 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * interp.c (sim_open): Update sim_parse_args comment.
 169
 170 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 173         * configure: Regenerate.
 174
 175 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 176
 177         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 178         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 179         * configure: Regenerate.
 180         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 181
 182 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 183
 184         * dv-tx3904cpu.c (CPU, SD): Delete.
 185
 186 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 187
 188         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 189         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 190         (sim_store_register): Rename to ...
 191         (mips_reg_store): ... this.  Delete local cpu var.
 192         Update sim_io_eprintf calls.
 193         (sim_fetch_register): Rename to ...
 194         (mips_reg_fetch): ... this.  Delete local cpu var.
 195         Update sim_io_eprintf calls.
 196
 197 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 200
 201 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * config.in, configure: Regenerate.
 204
 205 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * interp.c (sim_write, sim_read): Delete.
 208         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 209         (load_word): Likewise.
 210         * micromips.igen (cache): Likewise.
 211         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 212         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 213         do_store_left, do_store_right, do_load_double, do_store_double):
 214         Likewise.
 215         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 216         (do_prefx): Likewise.
 217         * sim-main.c (address_translation, prefetch): Delete.
 218         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 219         paddr=vaddr.
 220         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 221         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 222         (LoadMemory, StoreMemory): Delete CCA arg.
 223
 224 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 227         * configure: Regenerated.
 228
 229 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 230
 231         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 232         * tconfig.h: Delete.
 233
 234 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * tconfig.h (SIM_HANDLES_LMA): Delete.
 237
 238 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 239
 240         * sim-main.h (WITH_WATCHPOINTS): Delete.
 241
 242 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 243
 244         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 245
 246 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 247
 248         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 249
 250 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 251
 252         * micromips.igen (process_isa_mode): Fix left shift of negative
 253         value.
 254
 255 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 256
 257         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 258
 259 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 260
 261         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 262
 263 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 264
 265         * interp.c (sim_close): Rename to ...
 266         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 267         sim_io_shutdown.
 268         * sim-main.h (mips_sim_close): Declare.
 269         (SIM_CLOSE_HOOK): Define.
 270
 271 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 272             Ali Lown  <ali.lown@imgtec.com>
 273
 274         * Makefile.in (tmp-micromips): New rule.
 275         (tmp-mach-multi): Add support for micromips.
 276         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 277         that works for both mips64 and micromips64.
 278         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 279         micromips32.
 280         Add build support for micromips.
 281         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 282         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 283         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 284         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 285         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 286         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 287         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 288         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 289         Refactored instruction code to use these functions.
 290         * dsp2.igen: Refactored instruction code to use the new functions.
 291         * interp.c (decode_coproc): Refactored to work with any instruction
 292         encoding.
 293         (isa_mode): New variable
 294         (RSVD_INSTRUCTION): Changed to 0x00000039.
 295         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 296         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 297         * micromips.dc: New file.
 298         * micromips.igen: New file.
 299         * micromips16.dc: New file.
 300         * micromipsdsp.igen: New file.
 301         * micromipsrun.c: New file.
 302         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 303         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 304         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 305         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 306         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 307         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 308         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 309         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 310         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 311         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 312         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 313         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 314         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 315         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 316         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 317         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 318         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 319         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 320         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 321         instructions.
 322         Refactored instruction code to use these functions.
 323         (RSVD): Changed to use new reserved instruction.
 324         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 325         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 326         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 327         do_store_double):  Added micromips32 and micromips64 models.
 328         Added include for micromips.igen and micromipsdsp.igen
 329         Add micromips32 and micromips64 models.
 330         (DecodeCoproc): Updated to use new macro definition.
 331         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 332         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 333         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 334         Refactored instruction code to use these functions.
 335         * sim-main.h (CP0_operation): New enum.
 336         (DecodeCoproc): Updated macro.
 337         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 338         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 339         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 340         ISA_MODE_MICROMIPS): New defines.
 341         (sim_state): Add isa_mode field.
 342
 343 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 344
 345         * configure: Regenerate.
 346
 347 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 348
 349         * configure.ac: Change configure.in to configure.ac.
 350         * configure: Regenerate.
 351
 352 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 353
 354         * configure: Regenerate.
 355
 356 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 357
 358         * interp.c [TRACE]: Delete.
 359         (TRACE): Change to WITH_TRACE_ANY_P.
 360         [!WITH_TRACE_ANY_P] (open_trace): Define.
 361         (mips_option_handler, open_trace, sim_close, dotrace):
 362         Change defined(TRACE) to WITH_TRACE_ANY_P.
 363         (sim_open): Delete TRACE ifdef check.
 364         * sim-main.c (load_memory): Delete TRACE ifdef check.
 365         (store_memory): Likewise.
 366         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 367         [!WITH_TRACE_ANY_P] (dotrace): Define.
 368
 369 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 370
 371         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 372         comments.
 373
 374 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * sim-main.h (SIM_CPU): Delete.
 377
 378 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 379
 380         * sim-main.h (sim_cia): Delete.
 381
 382 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 383
 384         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 385         PU_PC_GET.
 386         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 387         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 388         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 389         CIA_SET to CPU_PC_SET.
 390         * sim-main.h (CIA_GET, CIA_SET): Delete.
 391
 392 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 393
 394         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 395         * sim-main.h (STATE_CPU): Delete.
 396
 397 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * configure: Regenerate.
 400
 401 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 402
 403         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 404         * interp.c (mips_pc_get, mips_pc_set): New functions.
 405         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 406         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 407         (sim_pc_get): Delete.
 408         * sim-main.h (SIM_CPU): Define.
 409         (struct sim_state): Change cpu to an array of pointers.
 410         (STATE_CPU): Drop &.
 411
 412 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 413
 414         * interp.c (mips_option_handler, open_trace, sim_close,
 415         sim_write, sim_read, sim_store_register, sim_fetch_register,
 416         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 417         prototypes.
 418         (sim_open): Convert old style prototype.  Change casts with
 419         sim_write to unsigned char *.
 420         (fetch_str): Change null to unsigned char, and change cast to
 421         unsigned char *.
 422         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 423         unsigned char *.
 424
 425 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 426
 427         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 428
 429 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 430
 431         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 432
 433 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 434
 435         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 436
 437 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 438
 439         * config.in, configure: Regenerate.
 440
 441 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 442
 443         * interp.c (sim_pc_get): New function.
 444
 445 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 446
 447         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 448         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 449
 450 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 451
 452         * configure: Regenerate.
 453
 454 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 455
 456         * configure: Regenerate.
 457
 458 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 459
 460         * configure: Regenerate.
 461         * configure.ac (mips_extra_objs): Delete.
 462         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 463         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 464
 465 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 466
 467         * configure: Regenerate.
 468         * configure.ac: Delete sim_hw checks for dv-sockser.
 469
 470 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 471
 472         * config.in, configure: Regenerate.
 473         * tconfig.in: Rename file ...
 474         * tconfig.h: ... here.
 475
 476 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 477
 478         * tconfig.in: Delete includes.
 479         [HAVE_DV_SOCKSER]: Delete.
 480
 481 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 482
 483         * Makefile.in (SIM_RUN_OBJS): Delete.
 484
 485 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 486
 487         * configure.ac (AC_CHECK_HEADERS): Delete.
 488         * aclocal.m4, configure: Regenerate.
 489
 490 2014-08-19  Alan Modra  <amodra@gmail.com>
 491
 492         * configure: Regenerate.
 493
 494 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 495
 496         * configure: Regenerate.
 497         * config.in: Regenerate.
 498
 499 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 500
 501         * configure: Regenerate.
 502
 503 2013-09-23  Alan Modra  <amodra@gmail.com>
 504
 505         * configure: Regenerate.
 506
 507 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 508
 509         * aclocal.m4, configure: Regenerate.
 510
 511 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 512
 513         * configure: Rebuild.
 514
 515 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 516
 517         * configure: Regenerate.
 518
 519 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 520
 521         * configure.ac: Address use of dv-sockser.o.
 522         * tconfig.in: Conditionalize use of dv_sockser_install.
 523         * configure: Regenerated.
 524         * config.in: Regenerated.
 525
 526 2012-10-04  Chao-ying Fu  <fu@mips.com>
 527             Steve Ellcey  <sellcey@mips.com>
 528
 529         * mips/mips3264r2.igen (rdhwr): New.
 530
 531 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 532
 533         * configure.ac: Always link against dv-sockser.o.
 534         * configure: Regenerate.
 535
 536 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 537
 538         * config.in, configure: Regenerate.
 539
 540 2012-05-18  Nick Clifton  <nickc@redhat.com>
 541
 542         PR 14072
 543         * interp.c: Include config.h before system header files.
 544
 545 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 546
 547         * aclocal.m4, config.in, configure: Regenerate.
 548
 549 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 550
 551         * aclocal.m4: New file.
 552         * configure: Regenerate.
 553
 554 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 555
 556         * configure: Regenerate after common/acinclude.m4 update.
 557
 558 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 559
 560         * configure.ac: Change include to common/acinclude.m4.
 561
 562 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 563
 564         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 565         call.  Replace common.m4 include with SIM_AC_COMMON.
 566         * configure: Regenerate.
 567
 568 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 569
 570         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 571         $(SIM_EXTRA_DEPS).
 572         (tmp-mach-multi): Exit early when igen fails.
 573
 574 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 575
 576         * interp.c (sim_do_command): Delete.
 577
 578 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 579
 580         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 581         (tx3904sio_fifo_reset): Likewise.
 582         * interp.c (sim_monitor): Likewise.
 583
 584 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 585
 586         * interp.c (sim_write): Add const to buffer arg.
 587
 588 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 589
 590         * interp.c: Don't include sysdep.h
 591
 592 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 593
 594         * configure: Regenerate.
 595
 596 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 597
 598         * config.in: Regenerate.
 599         * configure: Likewise.
 600
 601         * configure: Regenerate.
 602
 603 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 604
 605         * configure: Regenerate to track ../common/common.m4 changes.
 606         * config.in: Ditto.
 607
 608 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 609             Daniel Jacobowitz  <dan@codesourcery.com>
 610             Joseph Myers  <joseph@codesourcery.com>
 611
 612         * configure: Regenerate.
 613
 614 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 615
 616         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 617         that unconditionally allows fmt_ps.
 618         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 619         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 620         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 621         filter from 64,f to 32,f.
 622         (PREFX): Change filter from 64 to 32.
 623         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 624         that use do_load_double instead of do_load.  Make both LUXC1
 625         versions unpredictable if SizeFGR () != 64.
 626         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 627         instead of do_store.  Remove unused variable.  Make both SUXC1
 628         versions unpredictable if SizeFGR () != 64.
 629
 630 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 631
 632         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 633         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 634         shifts for that case.
 635
 636 2007-09-04  Nick Clifton  <nickc@redhat.com>
 637
 638         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 639         (display_mem_info): New static variable.
 640         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 641         (mips_options): Add info-memory and memory-info.
 642         (sim_open): After processing the command line and board
 643         specification, check display_mem_info.  If it is set then
 644         call the real handler for the --memory-info command line
 645         switch.
 646
 647 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 648
 649         * configure.ac: Change license of multi-run.c to GPL version 3.
 650         * configure: Regenerate.
 651
 652 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 653
 654         * configure.ac, configure: Revert last patch.
 655
 656 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 657
 658         * configure.ac (sim_mipsisa3264_configs): New variable.
 659         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 660         every configuration support all four targets, using the triplet to
 661         determine the default.
 662         * configure: Regenerate.
 663
 664 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 665
 666         * Makefile.in (m16run.o): New rule.
 667
 668 2007-05-15  Thiemo Seufer  <ths@mips.com>
 669
 670         * mips3264r2.igen (DSHD): Fix compile warning.
 671
 672 2007-05-14  Thiemo Seufer  <ths@mips.com>
 673
 674         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 675         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 676         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 677         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 678         for mips32r2.
 679
 680 2007-03-01  Thiemo Seufer  <ths@mips.com>
 681
 682         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 683         and mips64.
 684
 685 2007-02-20  Thiemo Seufer  <ths@mips.com>
 686
 687         * dsp.igen: Update copyright notice.
 688         * dsp2.igen: Fix copyright notice.
 689
 690 2007-02-20  Thiemo Seufer  <ths@mips.com>
 691             Chao-Ying Fu  <fu@mips.com>
 692
 693         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 694         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 695         Add dsp2 to sim_igen_machine.
 696         * configure: Regenerate.
 697         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 698         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 699         (mulq_rs.ph): Use do_ph_mulq.
 700         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 701         * mips.igen: Add dsp2 model and include dsp2.igen.
 702         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 703         for *mips32r2, *mips64r2, *dsp.
 704         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 705         for *mips32r2, *mips64r2, *dsp2.
 706         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 707
 708 2007-02-19  Thiemo Seufer  <ths@mips.com>
 709             Nigel Stephens  <nigel@mips.com>
 710
 711         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 712         jumps with hazard barrier.
 713
 714 2007-02-19  Thiemo Seufer  <ths@mips.com>
 715             Nigel Stephens  <nigel@mips.com>
 716
 717         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 718         after each call to sim_io_write.
 719
 720 2007-02-19  Thiemo Seufer  <ths@mips.com>
 721             Nigel Stephens  <nigel@mips.com>
 722
 723         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 724         supported by this simulator.
 725         (decode_coproc): Recognise additional CP0 Config registers
 726         correctly.
 727
 728 2007-02-19  Thiemo Seufer  <ths@mips.com>
 729             Nigel Stephens  <nigel@mips.com>
 730             David Ung  <davidu@mips.com>
 731
 732         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 733         uninterpreted formats. If fmt is one of the uninterpreted types
 734         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 735         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 736         (store_fpr): When writing an invalid odd register, set the
 737         matching even register to fmt_unknown, not the following register.
 738         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 739         the the memory window at offset 0 set by --memory-size command
 740         line option.
 741         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 742         point register.
 743         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 744         register.
 745         (sim_monitor): When returning the memory size to the MIPS
 746         application, use the value in STATE_MEM_SIZE, not an arbitrary
 747         hardcoded value.
 748         (cop_lw): Don' mess around with FPR_STATE, just pass
 749         fmt_uninterpreted_32 to StoreFPR.
 750         (cop_sw): Similarly.
 751         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 752         (cop_sd): Similarly.
 753         * mips.igen (not_word_value): Single version for mips32, mips64
 754         and mips16.
 755
 756 2007-02-19  Thiemo Seufer <ths@mips.com>
 757             Nigel Stephens  <nigel@mips.com>
 758
 759         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 760         MBytes.
 761
 762 2007-02-17  Thiemo Seufer  <ths@mips.com>
 763
 764         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 765         configuration.
 766         * configure: Regenerate.
 767
 768 2007-02-17  Thiemo Seufer  <ths@mips.com>
 769
 770         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 771         Add mdmx to sim_igen_machine.
 772         (mipsisa64*-*-*): Likewise. Remove dsp.
 773         (mipsisa32*-*-*): Remove dsp.
 774         * configure: Regenerate.
 775
 776 2007-02-13  Thiemo Seufer  <ths@mips.com>
 777
 778         * configure.ac: Add mips*-sde-elf* target.
 779         * configure: Regenerate.
 780
 781 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 782
 783         * acconfig.h: Remove.
 784         * config.in, configure: Regenerate.
 785
 786 2006-11-07  Thiemo Seufer  <ths@mips.com>
 787
 788         * dsp.igen (do_w_op): Fix compiler warning.
 789
 790 2006-08-29  Thiemo Seufer  <ths@mips.com>
 791             David Ung  <davidu@mips.com>
 792
 793         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 794         sim_igen_machine.
 795         * configure: Regenerate.
 796         * mips.igen (model): Add smartmips.
 797         (MADDU): Increment ACX if carry.
 798         (do_mult): Clear ACX.
 799         (ROR,RORV): Add smartmips.
 800         (include): Include smartmips.igen.
 801         * sim-main.h (ACX): Set to REGISTERS[89].
 802         * smartmips.igen: New file.
 803
 804 2006-08-29  Thiemo Seufer  <ths@mips.com>
 805             David Ung  <davidu@mips.com>
 806
 807         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 808         mips3264r2.igen. Add missing dependency rules.
 809         * m16e.igen: Support for mips16e save/restore instructions.
 810
 811 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 812
 813         * configure: Regenerated.
 814
 815 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 816
 817         * configure: Regenerated.
 818
 819 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 820
 821         * configure: Regenerated.
 822
 823 2006-05-15 Chao-ying Fu  <fu@mips.com>
 824
 825         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 826
 827 2006-04-18  Nick Clifton  <nickc@redhat.com>
 828
 829         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 830         statement.
 831
 832 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 833
 834         * configure: Regenerate.
 835
 836 2005-12-14  Chao-ying Fu  <fu@mips.com>
 837
 838         * Makefile.in (SIM_OBJS): Add dsp.o.
 839         (dsp.o): New dependency.
 840         (IGEN_INCLUDE): Add dsp.igen.
 841         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 842         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 843         * configure: Regenerate.
 844         * mips.igen: Add dsp model and include dsp.igen.
 845         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 846         because these instructions are extended in DSP ASE.
 847         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 848         adding 6 DSP accumulator registers and 1 DSP control register.
 849         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 850         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 851         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 852         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 853         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 854         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 855         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 856         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 857         DSPCR_CCOND_SMASK): New define.
 858         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 859         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 860
 861 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 862
 863         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 864
 865 2005-06-16  David Ung  <davidu@mips.com>
 866             Nigel Stephens  <nigel@mips.com>
 867
 868         * mips.igen: New mips16e model and include m16e.igen.
 869         (check_u64): Add mips16e tag.
 870         * m16e.igen: New file for MIPS16e instructions.
 871         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 872         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 873         models.
 874         * configure: Regenerate.
 875
 876 2005-05-26  David Ung  <davidu@mips.com>
 877
 878         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 879         tags to all instructions which are applicable to the new ISAs.
 880         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 881         vr.igen.
 882         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 883         instructions.
 884         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 885         to mips.igen.
 886         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 887         * configure: Regenerate.
 888
 889 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 890
 891         * configure: Regenerate.
 892
 893 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 894
 895         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 896         explicit call to AC_CONFIG_HEADER.
 897         * configure: Regenerate.
 898
 899 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 900
 901         * configure.ac: Update to use ../common/common.m4.
 902         * configure: Re-generate.
 903
 904 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 905
 906         * configure: Regenerated to track ../common/aclocal.m4 changes.
 907
 908 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 909
 910         * configure.ac: Rename configure.in, require autoconf 2.59.
 911         * configure: Re-generate.
 912
 913 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 914
 915         * configure: Regenerate for ../common/aclocal.m4 update.
 916
 917 2004-09-24  Monika Chaddha  <monika@acmet.com>
 918
 919         Committed by Andrew Cagney.
 920         * m16.igen (CMP, CMPI): Fix assembler.
 921
 922 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 923
 924         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 925         * configure: Regenerate.
 926
 927 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 928
 929         * configure.in (sim_m16_machine): Include mipsIII.
 930         * configure: Regenerate.
 931
 932 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 933
 934         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 935         from COP0_BADVADDR.
 936         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 937
 938 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 939
 940         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 941
 942 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 943
 944         * mips.igen (check_fmt): Remove.
 945         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 946         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 947         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 948         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 949         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 950         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 951         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 952         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 953         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 954         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 955
 956 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 957
 958         * sb1.igen (check_sbx): New function.
 959         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 960
 961 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 962             Richard Sandiford  <rsandifo@redhat.com>
 963
 964         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 965         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 966         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 967         separate implementations for mipsIV and mipsV.  Use new macros to
 968         determine whether the restrictions apply.
 969
 970 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 971
 972         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 973         (check_mult_hilo): Improve comments.
 974         (check_div_hilo): Likewise.  Also, fork off a new version
 975         to handle mips32/mips64 (since there are no hazards to check
 976         in MIPS32/MIPS64).
 977
 978 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 979
 980         * mips.igen (do_dmultx): Fix check for negative operands.
 981
 982 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 983
 984         * Makefile.in (SHELL): Make sure this is defined.
 985         (various): Use $(SHELL) whenever we invoke move-if-change.
 986
 987 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 988
 989         * cp1.c: Tweak attribution slightly.
 990         * cp1.h: Likewise.
 991         * mdmx.c: Likewise.
 992         * mdmx.igen: Likewise.
 993         * mips3d.igen: Likewise.
 994         * sb1.igen: Likewise.
 995
 996 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 997
 998         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 999         unsigned operands.
1000
1001 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1002
1003         * interp.c (sim_open): Rename _bfd to bfd.
1004         (sim_create_inferior): Ditto.
1005
1006 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1007
1008         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1009
1010 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1011
1012         * mips.igen (EI, DI): Remove.
1013
1014 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1015
1016         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1017
1018 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1019             Andrew Cagney  <ac131313@redhat.com>
1020             Gavin Romig-Koch  <gavin@redhat.com>
1021             Graydon Hoare  <graydon@redhat.com>
1022             Aldy Hernandez  <aldyh@redhat.com>
1023             Dave Brolley  <brolley@redhat.com>
1024             Chris Demetriou  <cgd@broadcom.com>
1025
1026         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1027         (sim_mach_default): New variable.
1028         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1029         Add a new simulator generator, MULTI.
1030         * configure: Regenerate.
1031         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1032         (multi-run.o): New dependency.
1033         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1034         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1035         (tmp-multi): Combine them.
1036         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1037         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1038         (distclean-extra): New rule.
1039         * sim-main.h: Include bfd.h.
1040         (MIPS_MACH): New macro.
1041         * mips.igen (vr4120, vr5400, vr5500): New models.
1042         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1043         * vr.igen: Replace with new version.
1044
1045 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1046
1047         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1048         * configure: Regenerate.
1049
1050 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1051
1052         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1053         * mips.igen: Remove all invocations of check_branch_bug and
1054         mark_branch_bug.
1055
1056 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1057
1058         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1059
1060 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1061
1062         * mips.igen (do_load_double, do_store_double): New functions.
1063         (LDC1, SDC1): Rename to...
1064         (LDC1b, SDC1b): respectively.
1065         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1066
1067 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1068
1069         * cp1.c (fp_recip2): Modify initialization expression so that
1070         GCC will recognize it as constant.
1071
1072 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1073
1074         * mdmx.c (SD_): Delete.
1075         (Unpredictable): Re-define, for now, to directly invoke
1076         unpredictable_action().
1077         (mdmx_acc_op): Fix error in .ob immediate handling.
1078
1079 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1080
1081         * interp.c (sim_firmware_command): Initialize `address'.
1082
1083 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1084
1085         * configure: Regenerated to track ../common/aclocal.m4 changes.
1086
1087 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1088             Ed Satterthwaite  <ehs@broadcom.com>
1089
1090         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1091         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1092         * mips.igen: Include mips3d.igen.
1093         (mips3d): New model name for MIPS-3D ASE instructions.
1094         (CVT.W.fmt): Don't use this instruction for word (source) format
1095         instructions.
1096         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1097         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1098         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1099         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1100         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1101         (RSquareRoot1, RSquareRoot2): New macros.
1102         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1103         (fp_rsqrt2): New functions.
1104         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1105         * configure: Regenerate.
1106
1107 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1108             Ed Satterthwaite  <ehs@broadcom.com>
1109
1110         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1111         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1112         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1113         (convert): Note that this function is not used for paired-single
1114         format conversions.
1115         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1116         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1117         (check_fmt_p): Enable paired-single support.
1118         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1119         (PUU.PS): New instructions.
1120         (CVT.S.fmt): Don't use this instruction for paired-single format
1121         destinations.
1122         * sim-main.h (FP_formats): New value 'fmt_ps.'
1123         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1124         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1125
1126 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1127
1128         * mips.igen: Fix formatting of function calls in
1129         many FP operations.
1130
1131 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1132
1133         * mips.igen (MOVN, MOVZ): Trace result.
1134         (TNEI): Print "tnei" as the opcode name in traces.
1135         (CEIL.W): Add disassembly string for traces.
1136         (RSQRT.fmt): Make location of disassembly string consistent
1137         with other instructions.
1138
1139 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1140
1141         * mips.igen (X): Delete unused function.
1142
1143 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1144
1145         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1146
1147 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1148             Ed Satterthwaite  <ehs@broadcom.com>
1149
1150         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1151         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1152         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1153         (fp_nmsub): New prototypes.
1154         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1155         (NegMultiplySub): New defines.
1156         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1157         (MADD.D, MADD.S): Replace with...
1158         (MADD.fmt): New instruction.
1159         (MSUB.D, MSUB.S): Replace with...
1160         (MSUB.fmt): New instruction.
1161         (NMADD.D, NMADD.S): Replace with...
1162         (NMADD.fmt): New instruction.
1163         (NMSUB.D, MSUB.S): Replace with...
1164         (NMSUB.fmt): New instruction.
1165
1166 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1167             Ed Satterthwaite  <ehs@broadcom.com>
1168
1169         * cp1.c: Fix more comment spelling and formatting.
1170         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1171         (denorm_mode): New function.
1172         (fpu_unary, fpu_binary): Round results after operation, collect
1173         status from rounding operations, and update the FCSR.
1174         (convert): Collect status from integer conversions and rounding
1175         operations, and update the FCSR.  Adjust NaN values that result
1176         from conversions.  Convert to use sim_io_eprintf rather than
1177         fprintf, and remove some debugging code.
1178         * cp1.h (fenr_FS): New define.
1179
1180 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1181
1182         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1183         rounding mode to sim FP rounding mode flag conversion code into...
1184         (rounding_mode): New function.
1185
1186 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1187
1188         * cp1.c: Clean up formatting of a few comments.
1189         (value_fpr): Reformat switch statement.
1190
1191 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1192             Ed Satterthwaite  <ehs@broadcom.com>
1193
1194         * cp1.h: New file.
1195         * sim-main.h: Include cp1.h.
1196         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1197         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1198         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1199         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1200         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1201         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1202         * cp1.c: Don't include sim-fpu.h; already included by
1203         sim-main.h.  Clean up formatting of some comments.
1204         (NaN, Equal, Less): Remove.
1205         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1206         (fp_cmp): New functions.
1207         * mips.igen (do_c_cond_fmt): Remove.
1208         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1209         Compare.  Add result tracing.
1210         (CxC1): Remove, replace with...
1211         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1212         (DMxC1): Remove, replace with...
1213         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1214         (MxC1): Remove, replace with...
1215         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1216
1217 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1218
1219         * sim-main.h (FGRIDX): Remove, replace all uses with...
1220         (FGR_BASE): New macro.
1221         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1222         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1223         (NR_FGR, FGR): Likewise.
1224         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1225         * mips.igen: Likewise.
1226
1227 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1228
1229         * cp1.c: Add an FSF Copyright notice to this file.
1230
1231 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1232             Ed Satterthwaite  <ehs@broadcom.com>
1233
1234         * cp1.c (Infinity): Remove.
1235         * sim-main.h (Infinity): Likewise.
1236
1237         * cp1.c (fp_unary, fp_binary): New functions.
1238         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1239         (fp_sqrt): New functions, implemented in terms of the above.
1240         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1241         (Recip, SquareRoot): Remove (replaced by functions above).
1242         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1243         (fp_recip, fp_sqrt): New prototypes.
1244         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1245         (Recip, SquareRoot): Replace prototypes with #defines which
1246         invoke the functions above.
1247
1248 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1249
1250         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1251         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1252         file, remove PARAMS from prototypes.
1253         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1254         simulator state arguments.
1255         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1256         pass simulator state arguments.
1257         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1258         (store_fpr, convert): Remove 'sd' argument.
1259         (value_fpr): Likewise.  Convert to use 'SD' instead.
1260
1261 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1262
1263         * cp1.c (Min, Max): Remove #if 0'd functions.
1264         * sim-main.h (Min, Max): Remove.
1265
1266 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1267
1268         * cp1.c: fix formatting of switch case and default labels.
1269         * interp.c: Likewise.
1270         * sim-main.c: Likewise.
1271
1272 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1273
1274         * cp1.c: Clean up comments which describe FP formats.
1275          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1276
1277 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1278             Ed Satterthwaite  <ehs@broadcom.com>
1279
1280         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1281         Broadcom SiByte SB-1 processor configurations.
1282         * configure: Regenerate.
1283         * sb1.igen: New file.
1284         * mips.igen: Include sb1.igen.
1285         (sb1): New model.
1286         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1287         * mdmx.igen: Add "sb1" model to all appropriate functions and
1288         instructions.
1289         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1290         (ob_func, ob_acc): Reference the above.
1291         (qh_acc): Adjust to keep the same size as ob_acc.
1292         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1293         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1294
1295 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1296
1297         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1298
1299 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1300             Ed Satterthwaite  <ehs@broadcom.com>
1301
1302         * mips.igen (mdmx): New (pseudo-)model.
1303         * mdmx.c, mdmx.igen: New files.
1304         * Makefile.in (SIM_OBJS): Add mdmx.o.
1305         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1306         New typedefs.
1307         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1308         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1309         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1310         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1311         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1312         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1313         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1314         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1315         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1316         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1317         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1318         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1319         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1320         (qh_fmtsel): New macros.
1321         (_sim_cpu): New member "acc".
1322         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1323         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1324
1325 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1326
1327         * interp.c: Use 'deprecated' rather than 'depreciated.'
1328         * sim-main.h: Likewise.
1329
1330 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1331
1332         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1333         which wouldn't compile anyway.
1334         * sim-main.h (unpredictable_action): New function prototype.
1335         (Unpredictable): Define to call igen function unpredictable().
1336         (NotWordValue): New macro to call igen function not_word_value().
1337         (UndefinedResult): Remove.
1338         * interp.c (undefined_result): Remove.
1339         (unpredictable_action): New function.
1340         * mips.igen (not_word_value, unpredictable): New functions.
1341         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1342         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1343         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1344         NotWordValue() to check for unpredictable inputs, then
1345         Unpredictable() to handle them.
1346
1347 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1348
1349         * mips.igen: Fix formatting of calls to Unpredictable().
1350
1351 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1352
1353         * interp.c (sim_open): Revert previous change.
1354
1355 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1356
1357         * interp.c (sim_open): Disable chunk of code that wrote code in
1358         vector table entries.
1359
1360 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1361
1362         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1363         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1364         unused definitions.
1365
1366 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1367
1368         * cp1.c: Fix many formatting issues.
1369
1370 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1371
1372         * cp1.c (fpu_format_name): New function to replace...
1373         (DOFMT): This.  Delete, and update all callers.
1374         (fpu_rounding_mode_name): New function to replace...
1375         (RMMODE): This.  Delete, and update all callers.
1376
1377 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1378
1379         * interp.c: Move FPU support routines from here to...
1380         * cp1.c: Here.  New file.
1381         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1382         (cp1.o): New target.
1383
1384 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1385
1386         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1387         * mips.igen (mips32, mips64): New models, add to all instructions
1388         and functions as appropriate.
1389         (loadstore_ea, check_u64): New variant for model mips64.
1390         (check_fmt_p): New variant for models mipsV and mips64, remove
1391         mipsV model marking fro other variant.
1392         (SLL) Rename to...
1393         (SLLa) this.
1394         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1395         for mips32 and mips64.
1396         (DCLO, DCLZ): New instructions for mips64.
1397
1398 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1399
1400         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1401         immediate or code as a hex value with the "%#lx" format.
1402         (ANDI): Likewise, and fix printed instruction name.
1403
1404 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1405
1406         * sim-main.h (UndefinedResult, Unpredictable): New macros
1407         which currently do nothing.
1408
1409 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1410
1411         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1412         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1413         (status_CU3): New definitions.
1414
1415         * sim-main.h (ExceptionCause): Add new values for MIPS32
1416         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1417         for DebugBreakPoint and NMIReset to note their status in
1418         MIPS32 and MIPS64.
1419         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1420         (SignalExceptionCacheErr): New exception macros.
1421
1422 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1423
1424         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1425         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1426         is always enabled.
1427         (SignalExceptionCoProcessorUnusable): Take as argument the
1428         unusable coprocessor number.
1429
1430 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1431
1432         * mips.igen: Fix formatting of all SignalException calls.
1433
1434 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1435
1436         * sim-main.h (SIGNEXTEND): Remove.
1437
1438 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1439
1440         * mips.igen: Remove gencode comment from top of file, fix
1441         spelling in another comment.
1442
1443 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1444
1445         * mips.igen (check_fmt, check_fmt_p): New functions to check
1446         whether specific floating point formats are usable.
1447         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1448         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1449         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1450         Use the new functions.
1451         (do_c_cond_fmt): Remove format checks...
1452         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1453
1454 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1455
1456         * mips.igen: Fix formatting of check_fpu calls.
1457
1458 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1459
1460         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1461
1462 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1463
1464         * mips.igen: Remove whitespace at end of lines.
1465
1466 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1467
1468         * mips.igen (loadstore_ea): New function to do effective
1469         address calculations.
1470         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1471         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1472         CACHE): Use loadstore_ea to do effective address computations.
1473
1474 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1475
1476         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1477         * mips.igen (LL, CxC1, MxC1): Likewise.
1478
1479 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1480
1481         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1482         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1483         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1484         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1485         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1486         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1487         Don't split opcode fields by hand, use the opcode field values
1488         provided by igen.
1489
1490 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1491
1492         * mips.igen (do_divu): Fix spacing.
1493
1494         * mips.igen (do_dsllv): Move to be right before DSLLV,
1495         to match the rest of the do_<shift> functions.
1496
1497 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1498
1499         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1500         DSRL32, do_dsrlv): Trace inputs and results.
1501
1502 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1503
1504         * mips.igen (CACHE): Provide instruction-printing string.
1505
1506         * interp.c (signal_exception): Comment tokens after #endif.
1507
1508 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1509
1510         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1511         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1512         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1513         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1514         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1515         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1516         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1517         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1518
1519 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1520
1521         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1522         instruction-printing string.
1523         (LWU): Use '64' as the filter flag.
1524
1525 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1526
1527         * mips.igen (SDXC1): Fix instruction-printing string.
1528
1529 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1530
1531         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1532         filter flags "32,f".
1533
1534 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1535
1536         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1537         as the filter flag.
1538
1539 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1540
1541         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1542         add a comma) so that it more closely match the MIPS ISA
1543         documentation opcode partitioning.
1544         (PREF): Put useful names on opcode fields, and include
1545         instruction-printing string.
1546
1547 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1548
1549         * mips.igen (check_u64): New function which in the future will
1550         check whether 64-bit instructions are usable and signal an
1551         exception if not.  Currently a no-op.
1552         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1553         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1554         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1555         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1556
1557         * mips.igen (check_fpu): New function which in the future will
1558         check whether FPU instructions are usable and signal an exception
1559         if not.  Currently a no-op.
1560         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1561         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1562         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1563         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1564         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1565         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1566         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1567         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1568
1569 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1570
1571         * mips.igen (do_load_left, do_load_right): Move to be immediately
1572         following do_load.
1573         (do_store_left, do_store_right): Move to be immediately following
1574         do_store.
1575
1576 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1577
1578         * mips.igen (mipsV): New model name.  Also, add it to
1579         all instructions and functions where it is appropriate.
1580
1581 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1582
1583         * mips.igen: For all functions and instructions, list model
1584         names that support that instruction one per line.
1585
1586 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1587
1588         * mips.igen: Add some additional comments about supported
1589         models, and about which instructions go where.
1590         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1591         order as is used in the rest of the file.
1592
1593 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1594
1595         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1596         indicating that ALU32_END or ALU64_END are there to check
1597         for overflow.
1598         (DADD): Likewise, but also remove previous comment about
1599         overflow checking.
1600
1601 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1602
1603         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1604         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1605         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1606         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1607         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1608         fields (i.e., add and move commas) so that they more closely
1609         match the MIPS ISA documentation opcode partitioning.
1610
1611 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1612
1613         * mips.igen (ADDI): Print immediate value.
1614         (BREAK): Print code.
1615         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1616         (SLL): Print "nop" specially, and don't run the code
1617         that does the shift for the "nop" case.
1618
1619 2001-11-17  Fred Fish  <fnf@redhat.com>
1620
1621         * sim-main.h (float_operation): Move enum declaration outside
1622         of _sim_cpu struct declaration.
1623
1624 2001-04-12  Jim Blandy  <jimb@redhat.com>
1625
1626         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1627         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1628         set of the FCSR.
1629         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1630         PENDING_FILL, and you can get the intended effect gracefully by
1631         calling PENDING_SCHED directly.
1632
1633 2001-02-23  Ben Elliston  <bje@redhat.com>
1634
1635         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1636         already defined elsewhere.
1637
1638 2001-02-19  Ben Elliston  <bje@redhat.com>
1639
1640         * sim-main.h (sim_monitor): Return an int.
1641         * interp.c (sim_monitor): Add return values.
1642         (signal_exception): Handle error conditions from sim_monitor.
1643
1644 2001-02-08  Ben Elliston  <bje@redhat.com>
1645
1646         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1647         (store_memory): Likewise, pass cia to sim_core_write*.
1648
1649 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1650
1651         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1652         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1653
1654 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1655
1656         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1657         * Makefile.in: Don't delete *.igen when cleaning directory.
1658
1659 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1660
1661         * m16.igen (break): Call SignalException not sim_engine_halt.
1662
1663 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1664
1665         From Jason Eckhardt:
1666         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1667
1668 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1669
1670         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1671
1672 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1673
1674         * mips.igen (do_dmultx): Fix typo.
1675
1676 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1677
1678         * configure: Regenerated to track ../common/aclocal.m4 changes.
1679
1680 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1681
1682         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1683
1684 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1685
1686         * sim-main.h (GPR_CLEAR): Define macro.
1687
1688 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1689
1690         * interp.c (decode_coproc): Output long using %lx and not %s.
1691
1692 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1693
1694         * interp.c (sim_open): Sort & extend dummy memory regions for
1695         --board=jmr3904 for eCos.
1696
1697 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1698
1699         * configure: Regenerated.
1700
1701 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1702
1703         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1704         calls, conditional on the simulator being in verbose mode.
1705
1706 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1707
1708         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1709         cache don't get ReservedInstruction traps.
1710
1711 1999-11-29  Mark Salter  <msalter@cygnus.com>
1712
1713         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1714         to clear status bits in sdisr register. This is how the hardware works.
1715
1716         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1717         being used by cygmon.
1718
1719 1999-11-11  Andrew Haley  <aph@cygnus.com>
1720
1721         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1722         instructions.
1723
1724 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1725
1726         * mips.igen (MULT): Correct previous mis-applied patch.
1727
1728 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1729
1730         * mips.igen (delayslot32): Handle sequence like
1731         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1732         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1733         (MULT): Actually pass the third register...
1734
1735 1999-09-03  Mark Salter  <msalter@cygnus.com>
1736
1737         * interp.c (sim_open): Added more memory aliases for additional
1738         hardware being touched by cygmon on jmr3904 board.
1739
1740 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1741
1742         * configure: Regenerated to track ../common/aclocal.m4 changes.
1743
1744 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1745
1746         * interp.c (sim_store_register): Handle case where client - GDB -
1747         specifies that a 4 byte register is 8 bytes in size.
1748         (sim_fetch_register): Ditto.
1749
1750 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1751
1752         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1753         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1754         (idt_monitor_base): Base address for IDT monitor traps.
1755         (pmon_monitor_base): Ditto for PMON.
1756         (lsipmon_monitor_base): Ditto for LSI PMON.
1757         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1758         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1759         (sim_firmware_command): New function.
1760         (mips_option_handler): Call it for OPTION_FIRMWARE.
1761         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1762         option was given, add no monitor by default.  Add BREAK hooks only if
1763         monitors are also there.
1764
1765 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1766
1767         * interp.c (sim_monitor): Flush output before reading input.
1768
1769 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1770
1771         * tconfig.in (SIM_HANDLES_LMA): Always define.
1772
1773 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1774
1775         From Mark Salter <msalter@cygnus.com>:
1776         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1777         (sim_open): Add setup for BSP board.
1778
1779 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1780
1781         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1782         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1783         them as unimplemented.
1784
1785 1999-05-08  Felix Lee  <flee@cygnus.com>
1786
1787         * configure: Regenerated to track ../common/aclocal.m4 changes.
1788
1789 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1790
1791         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1792
1793 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1794
1795         * configure.in: Any mips64vr5*-*-* target should have
1796         -DTARGET_ENABLE_FR=1.
1797         (default_endian): Any mips64vr*el-*-* target should default to
1798         LITTLE_ENDIAN.
1799         * configure: Re-generate.
1800
1801 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1802
1803         * mips.igen (ldl): Extend from _16_, not 32.
1804
1805 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1806
1807         * interp.c (sim_store_register): Force registers written to by GDB
1808         into an un-interpreted state.
1809
1810 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1811
1812         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1813         CPU, start periodic background I/O polls.
1814         (tx3904sio_poll): New function: periodic I/O poller.
1815
1816 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1817
1818         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1819
1820 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1821
1822         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1823         case statement.
1824
1825 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1826
1827         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1828         (load_word): Call SIM_CORE_SIGNAL hook on error.
1829         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1830         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1831         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1832         * sim-main.h (COP0_BADVADDR): Define.
1833         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1834         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1835         (_sim_cpu): Add exc_* fields to store register value snapshots.
1836         * mips.igen (*): Replace memory-related SignalException* calls
1837         with references to SIM_CORE_SIGNAL hook.
1838
1839         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1840         fix.
1841         * sim-main.c (*): Minor warning cleanups.
1842
1843 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1844
1845         * m16.igen (DADDIU5): Correct type-o.
1846
1847 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1848
1849         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1850         variables.
1851
1852 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1853
1854         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1855         to include path.
1856         (interp.o): Add dependency on itable.h
1857         (oengine.c, gencode): Delete remaining references.
1858         (BUILT_SRC_FROM_GEN): Clean up.
1859
1860 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1861
1862         * vr4run.c: New.
1863         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1864         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1865         tmp-run-hack) : New.
1866         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1867         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1868         Drop the "64" qualifier to get the HACK generator working.
1869         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1870         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1871         qualifier to get the hack generator working.
1872         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1873         (DSLL): Use do_dsll.
1874         (DSLLV): Use do_dsllv.
1875         (DSRA): Use do_dsra.
1876         (DSRL): Use do_dsrl.
1877         (DSRLV): Use do_dsrlv.
1878         (BC1): Move *vr4100 to get the HACK generator working.
1879         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1880         get the HACK generator working.
1881         (MACC) Rename to get the HACK generator working.
1882         (DMACC,MACCS,DMACCS): Add the 64.
1883
1884 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1885
1886         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1887         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1888
1889 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1890
1891     * mips/interp.c (DEBUG): Cleanups.
1892
1893 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1894
1895         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1896         (tx3904sio_tickle): fflush after a stdout character output.
1897
1898 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1899
1900         * interp.c (sim_close): Uninstall modules.
1901
1902 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1903
1904         * sim-main.h, interp.c (sim_monitor): Change to global
1905         function.
1906
1907 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1908
1909         * configure.in (vr4100): Only include vr4100 instructions in
1910         simulator.
1911         * configure: Re-generate.
1912         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1913
1914 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1915
1916         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1917         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1918         true alternative.
1919
1920         * configure.in (sim_default_gen, sim_use_gen): Replace with
1921         sim_gen.
1922         (--enable-sim-igen): Delete config option. Always using IGEN.
1923         * configure: Re-generate.
1924
1925         * Makefile.in (gencode): Kill, kill, kill.
1926         * gencode.c: Ditto.
1927
1928 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1929
1930         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1931         bit mips16 igen simulator.
1932         * configure: Re-generate.
1933
1934         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1935         as part of vr4100 ISA.
1936         * vr.igen: Mark all instructions as 64 bit only.
1937
1938 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1939
1940         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1941         Pacify GCC.
1942
1943 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1944
1945         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1946         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1947         * configure: Re-generate.
1948
1949         * m16.igen (BREAK): Define breakpoint instruction.
1950         (JALX32): Mark instruction as mips16 and not r3900.
1951         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1952
1953         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1954
1955 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1956
1957         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1958         insn as a debug breakpoint.
1959
1960         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1961         pending.slot_size.
1962         (PENDING_SCHED): Clean up trace statement.
1963         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1964         (PENDING_FILL): Delay write by only one cycle.
1965         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1966
1967         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1968         of pending writes.
1969         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1970         32 & 64.
1971         (pending_tick): Move incrementing of index to FOR statement.
1972         (pending_tick): Only update PENDING_OUT after a write has occured.
1973
1974         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1975         build simulator.
1976         * configure: Re-generate.
1977
1978         * interp.c (sim_engine_run OLD): Delete explicit call to
1979         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1980
1981 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1982
1983         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1984         interrupt level number to match changed SignalExceptionInterrupt
1985         macro.
1986
1987 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1988
1989         * interp.c: #include "itable.h" if WITH_IGEN.
1990         (get_insn_name): New function.
1991         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1992         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1993
1994 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1995
1996         * configure: Rebuilt to inhale new common/aclocal.m4.
1997
1998 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1999
2000         * dv-tx3904sio.c: Include sim-assert.h.
2001
2002 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2003
2004         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2005         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2006         Reorganize target-specific sim-hardware checks.
2007         * configure: rebuilt.
2008         * interp.c (sim_open): For tx39 target boards, set
2009         OPERATING_ENVIRONMENT, add tx3904sio devices.
2010         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2011         ROM executables.  Install dv-sockser into sim-modules list.
2012
2013         * dv-tx3904irc.c: Compiler warning clean-up.
2014         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2015         frequent hw-trace messages.
2016
2017 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2018
2019         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2020
2021 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2022
2023         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2024
2025         * vr.igen: New file.
2026         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2027         * mips.igen: Define vr4100 model. Include vr.igen.
2028 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2029
2030         * mips.igen (check_mf_hilo): Correct check.
2031
2032 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2033
2034         * sim-main.h (interrupt_event): Add prototype.
2035
2036         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2037         register_ptr, register_value.
2038         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2039
2040         * sim-main.h (tracefh): Make extern.
2041
2042 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2043
2044         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2045         Reduce unnecessarily high timer event frequency.
2046         * dv-tx3904cpu.c: Ditto for interrupt event.
2047
2048 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2049
2050         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2051         to allay warnings.
2052         (interrupt_event): Made non-static.
2053
2054         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2055         interchange of configuration values for external vs. internal
2056         clock dividers.
2057
2058 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2059
2060         * mips.igen (BREAK): Moved code to here for
2061         simulator-reserved break instructions.
2062         * gencode.c (build_instruction): Ditto.
2063         * interp.c (signal_exception): Code moved from here.  Non-
2064         reserved instructions now use exception vector, rather
2065         than halting sim.
2066         * sim-main.h: Moved magic constants to here.
2067
2068 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2069
2070         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2071         register upon non-zero interrupt event level, clear upon zero
2072         event value.
2073         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2074         by passing zero event value.
2075         (*_io_{read,write}_buffer): Endianness fixes.
2076         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2077         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2078
2079         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2080         serial I/O and timer module at base address 0xFFFF0000.
2081
2082 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2083
2084         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2085         and BigEndianCPU.
2086
2087 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2088
2089         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2090         parts.
2091         * configure: Update.
2092
2093 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2094
2095         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2096         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2097         * configure.in: Include tx3904tmr in hw_device list.
2098         * configure: Rebuilt.
2099         * interp.c (sim_open): Instantiate three timer instances.
2100         Fix address typo of tx3904irc instance.
2101
2102 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2103
2104         * interp.c (signal_exception): SystemCall exception now uses
2105         the exception vector.
2106
2107 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2108
2109         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2110         to allay warnings.
2111
2112 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2113
2114         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2115
2116 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2117
2118         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2119
2120         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2121         sim-main.h. Declare a struct hw_descriptor instead of struct
2122         hw_device_descriptor.
2123
2124 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2125
2126         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2127         right bits and then re-align left hand bytes to correct byte
2128         lanes.  Fix incorrect computation in do_store_left when loading
2129         bytes from second word.
2130
2131 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2132
2133         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2134         * interp.c (sim_open): Only create a device tree when HW is
2135         enabled.
2136
2137         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2138         * interp.c (signal_exception): Ditto.
2139
2140 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2141
2142         * gencode.c: Mark BEGEZALL as LIKELY.
2143
2144 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2147         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2148
2149 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2150
2151         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2152         modules.  Recognize TX39 target with "mips*tx39" pattern.
2153         * configure: Rebuilt.
2154         * sim-main.h (*): Added many macros defining bits in
2155         TX39 control registers.
2156         (SignalInterrupt): Send actual PC instead of NULL.
2157         (SignalNMIReset): New exception type.
2158         * interp.c (board): New variable for future use to identify
2159         a particular board being simulated.
2160         (mips_option_handler,mips_options): Added "--board" option.
2161         (interrupt_event): Send actual PC.
2162         (sim_open): Make memory layout conditional on board setting.
2163         (signal_exception): Initial implementation of hardware interrupt
2164         handling.  Accept another break instruction variant for simulator
2165         exit.
2166         (decode_coproc): Implement RFE instruction for TX39.
2167         (mips.igen): Decode RFE instruction as such.
2168         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2169         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2170         bbegin to implement memory map.
2171         * dv-tx3904cpu.c: New file.
2172         * dv-tx3904irc.c: New file.
2173
2174 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2175
2176         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2177
2178 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2179
2180         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2181         with calls to check_div_hilo.
2182
2183 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2184
2185         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2186         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2187         Add special r3900 version of do_mult_hilo.
2188         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2189         with calls to check_mult_hilo.
2190         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2191         with calls to check_div_hilo.
2192
2193 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2194
2195         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2196         Document a replacement.
2197
2198 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2199
2200         * interp.c (sim_monitor): Make mon_printf work.
2201
2202 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2203
2204         * sim-main.h (INSN_NAME): New arg `cpu'.
2205
2206 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2207
2208         * configure: Regenerated to track ../common/aclocal.m4 changes.
2209
2210 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2211
2212         * configure: Regenerated to track ../common/aclocal.m4 changes.
2213         * config.in: Ditto.
2214
2215 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2216
2217         * acconfig.h: New file.
2218         * configure.in: Reverted change of Apr 24; use sinclude again.
2219
2220 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2221
2222         * configure: Regenerated to track ../common/aclocal.m4 changes.
2223         * config.in: Ditto.
2224
2225 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2226
2227         * configure.in: Don't call sinclude.
2228
2229 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2230
2231         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2232
2233 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2234
2235         * mips.igen (ERET): Implement.
2236
2237         * interp.c (decode_coproc): Return sign-extended EPC.
2238
2239         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2240
2241         * interp.c (signal_exception): Do not ignore Trap.
2242         (signal_exception): On TRAP, restart at exception address.
2243         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2244         (signal_exception): Update.
2245         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2246         so that TRAP instructions are caught.
2247
2248 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2249
2250         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2251         contains HI/LO access history.
2252         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2253         (HIACCESS, LOACCESS): Delete, replace with
2254         (HIHISTORY, LOHISTORY): New macros.
2255         (CHECKHILO): Delete all, moved to mips.igen
2256
2257         * gencode.c (build_instruction): Do not generate checks for
2258         correct HI/LO register usage.
2259
2260         * interp.c (old_engine_run): Delete checks for correct HI/LO
2261         register usage.
2262
2263         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2264         check_mf_cycles): New functions.
2265         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2266         do_divu, domultx, do_mult, do_multu): Use.
2267
2268         * tx.igen ("madd", "maddu"): Use.
2269
2270 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2271
2272         * mips.igen (DSRAV): Use function do_dsrav.
2273         (SRAV): Use new function do_srav.
2274
2275         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2276         (B): Sign extend 11 bit immediate.
2277         (EXT-B*): Shift 16 bit immediate left by 1.
2278         (ADDIU*): Don't sign extend immediate value.
2279
2280 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2281
2282         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2283
2284         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2285         functions.
2286
2287         * mips.igen (delayslot32, nullify_next_insn): New functions.
2288         (m16.igen): Always include.
2289         (do_*): Add more tracing.
2290
2291         * m16.igen (delayslot16): Add NIA argument, could be called by a
2292         32 bit MIPS16 instruction.
2293
2294         * interp.c (ifetch16): Move function from here.
2295         * sim-main.c (ifetch16): To here.
2296
2297         * sim-main.c (ifetch16, ifetch32): Update to match current
2298         implementations of LH, LW.
2299         (signal_exception): Don't print out incorrect hex value of illegal
2300         instruction.
2301
2302 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2303
2304         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2305         instruction.
2306
2307         * m16.igen: Implement MIPS16 instructions.
2308
2309         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2310         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2311         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2312         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2313         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2314         bodies of corresponding code from 32 bit insn to these.  Also used
2315         by MIPS16 versions of functions.
2316
2317         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2318         (IMEM16): Drop NR argument from macro.
2319
2320 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2321
2322         * Makefile.in (SIM_OBJS): Add sim-main.o.
2323
2324         * sim-main.h (address_translation, load_memory, store_memory,
2325         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2326         as INLINE_SIM_MAIN.
2327         (pr_addr, pr_uword64): Declare.
2328         (sim-main.c): Include when H_REVEALS_MODULE_P.
2329
2330         * interp.c (address_translation, load_memory, store_memory,
2331         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2332         from here.
2333         * sim-main.c: To here. Fix compilation problems.
2334
2335         * configure.in: Enable inlining.
2336         * configure: Re-config.
2337
2338 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2339
2340         * configure: Regenerated to track ../common/aclocal.m4 changes.
2341
2342 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2343
2344         * mips.igen: Include tx.igen.
2345         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2346         * tx.igen: New file, contains MADD and MADDU.
2347
2348         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2349         the hardwired constant `7'.
2350         (store_memory): Ditto.
2351         (LOADDRMASK): Move definition to sim-main.h.
2352
2353         mips.igen (MTC0): Enable for r3900.
2354         (ADDU): Add trace.
2355
2356         mips.igen (do_load_byte): Delete.
2357         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2358         do_store_right): New functions.
2359         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2360
2361         configure.in: Let the tx39 use igen again.
2362         configure: Update.
2363
2364 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2365
2366         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2367         not an address sized quantity.  Return zero for cache sizes.
2368
2369 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2370
2371         * mips.igen (r3900): r3900 does not support 64 bit integer
2372         operations.
2373
2374 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2375
2376         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2377         than igen one.
2378         * configure : Rebuild.
2379
2380 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2381
2382         * configure: Regenerated to track ../common/aclocal.m4 changes.
2383
2384 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2385
2386         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2387
2388 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2389
2390         * configure: Regenerated to track ../common/aclocal.m4 changes.
2391         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2392
2393 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2394
2395         * configure: Regenerated to track ../common/aclocal.m4 changes.
2396
2397 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2398
2399         * interp.c (Max, Min): Comment out functions. Not yet used.
2400
2401 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * configure: Regenerated to track ../common/aclocal.m4 changes.
2404
2405 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2406
2407         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2408         configurable settings for stand-alone simulator.
2409
2410         * configure.in: Added X11 search, just in case.
2411
2412         * configure: Regenerated.
2413
2414 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2415
2416         * interp.c (sim_write, sim_read, load_memory, store_memory):
2417         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2418
2419 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2420
2421         * sim-main.h (GETFCC): Return an unsigned value.
2422
2423 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2424
2425         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2426         (DADD): Result destination is RD not RT.
2427
2428 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2429
2430         * sim-main.h (HIACCESS, LOACCESS): Always define.
2431
2432         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2433
2434         * interp.c (sim_info): Delete.
2435
2436 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2437
2438         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2439         (mips_option_handler): New argument `cpu'.
2440         (sim_open): Update call to sim_add_option_table.
2441
2442 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * mips.igen (CxC1): Add tracing.
2445
2446 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2447
2448         * sim-main.h (Max, Min): Declare.
2449
2450         * interp.c (Max, Min): New functions.
2451
2452         * mips.igen (BC1): Add tracing.
2453
2454 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2455
2456         * interp.c Added memory map for stack in vr4100
2457
2458 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2459
2460         * interp.c (load_memory): Add missing "break"'s.
2461
2462 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2463
2464         * interp.c (sim_store_register, sim_fetch_register): Pass in
2465         length parameter.  Return -1.
2466
2467 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2468
2469         * interp.c: Added hardware init hook, fixed warnings.
2470
2471 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2472
2473         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2474
2475 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2476
2477         * interp.c (ifetch16): New function.
2478
2479         * sim-main.h (IMEM32): Rename IMEM.
2480         (IMEM16_IMMED): Define.
2481         (IMEM16): Define.
2482         (DELAY_SLOT): Update.
2483
2484         * m16run.c (sim_engine_run): New file.
2485
2486         * m16.igen: All instructions except LB.
2487         (LB): Call do_load_byte.
2488         * mips.igen (do_load_byte): New function.
2489         (LB): Call do_load_byte.
2490
2491         * mips.igen: Move spec for insn bit size and high bit from here.
2492         * Makefile.in (tmp-igen, tmp-m16): To here.
2493
2494         * m16.dc: New file, decode mips16 instructions.
2495
2496         * Makefile.in (SIM_NO_ALL): Define.
2497         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2498
2499 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2500
2501         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2502         point unit to 32 bit registers.
2503         * configure: Re-generate.
2504
2505 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2506
2507         * configure.in (sim_use_gen): Make IGEN the default simulator
2508         generator for generic 32 and 64 bit mips targets.
2509         * configure: Re-generate.
2510
2511 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2512
2513         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2514         bitsize.
2515
2516         * interp.c (sim_fetch_register, sim_store_register): Read/write
2517         FGR from correct location.
2518         (sim_open): Set size of FGR's according to
2519         WITH_TARGET_FLOATING_POINT_BITSIZE.
2520
2521         * sim-main.h (FGR): Store floating point registers in a separate
2522         array.
2523
2524 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2525
2526         * configure: Regenerated to track ../common/aclocal.m4 changes.
2527
2528 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2529
2530         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2531
2532         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2533
2534         * interp.c (pending_tick): New function.  Deliver pending writes.
2535
2536         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2537         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2538         it can handle mixed sized quantites and single bits.
2539
2540 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2541
2542         * interp.c (oengine.h): Do not include when building with IGEN.
2543         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2544         (sim_info): Ditto for PROCESSOR_64BIT.
2545         (sim_monitor): Replace ut_reg with unsigned_word.
2546         (*): Ditto for t_reg.
2547         (LOADDRMASK): Define.
2548         (sim_open): Remove defunct check that host FP is IEEE compliant,
2549         using software to emulate floating point.
2550         (value_fpr, ...): Always compile, was conditional on HASFPU.
2551
2552 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2553
2554         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2555         size.
2556
2557         * interp.c (SD, CPU): Define.
2558         (mips_option_handler): Set flags in each CPU.
2559         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2560         (sim_close): Do not clear STATE, deleted anyway.
2561         (sim_write, sim_read): Assume CPU zero's vm should be used for
2562         data transfers.
2563         (sim_create_inferior): Set the PC for all processors.
2564         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2565         argument.
2566         (mips16_entry): Pass correct nr of args to store_word, load_word.
2567         (ColdReset): Cold reset all cpu's.
2568         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2569         (sim_monitor, load_memory, store_memory, signal_exception): Use
2570         `CPU' instead of STATE_CPU.
2571
2572
2573         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2574         SD or CPU_.
2575
2576         * sim-main.h (signal_exception): Add sim_cpu arg.
2577         (SignalException*): Pass both SD and CPU to signal_exception.
2578         * interp.c (signal_exception): Update.
2579
2580         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2581         Ditto
2582         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2583         address_translation): Ditto
2584         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2585
2586 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2587
2588         * configure: Regenerated to track ../common/aclocal.m4 changes.
2589
2590 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2591
2592         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2593
2594         * mips.igen (model): Map processor names onto BFD name.
2595
2596         * sim-main.h (CPU_CIA): Delete.
2597         (SET_CIA, GET_CIA): Define
2598
2599 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2600
2601         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2602         regiser.
2603
2604         * configure.in (default_endian): Configure a big-endian simulator
2605         by default.
2606         * configure: Re-generate.
2607
2608 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2609
2610         * configure: Regenerated to track ../common/aclocal.m4 changes.
2611
2612 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2613
2614         * interp.c (sim_monitor): Handle Densan monitor outbyte
2615         and inbyte functions.
2616
2617 1997-12-29  Felix Lee  <flee@cygnus.com>
2618
2619         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2620
2621 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2622
2623         * Makefile.in (tmp-igen): Arrange for $zero to always be
2624         reset to zero after every instruction.
2625
2626 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * configure: Regenerated to track ../common/aclocal.m4 changes.
2629         * config.in: Ditto.
2630
2631 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2632
2633         * mips.igen (MSUB): Fix to work like MADD.
2634         * gencode.c (MSUB): Similarly.
2635
2636 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2637
2638         * configure: Regenerated to track ../common/aclocal.m4 changes.
2639
2640 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2641
2642         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2643
2644 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * sim-main.h (sim-fpu.h): Include.
2647
2648         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2649         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2650         using host independant sim_fpu module.
2651
2652 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2653
2654         * interp.c (signal_exception): Report internal errors with SIGABRT
2655         not SIGQUIT.
2656
2657         * sim-main.h (C0_CONFIG): New register.
2658         (signal.h): No longer include.
2659
2660         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2661
2662 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2663
2664         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2665
2666 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2667
2668         * mips.igen: Tag vr5000 instructions.
2669         (ANDI): Was missing mipsIV model, fix assembler syntax.
2670         (do_c_cond_fmt): New function.
2671         (C.cond.fmt): Handle mips I-III which do not support CC field
2672         separatly.
2673         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2674         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2675         in IV3.2 spec.
2676         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2677         vr5000 which saves LO in a GPR separatly.
2678
2679         * configure.in (enable-sim-igen): For vr5000, select vr5000
2680         specific instructions.
2681         * configure: Re-generate.
2682
2683 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2684
2685         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2686
2687         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2688         fmt_uninterpreted_64 bit cases to switch.  Convert to
2689         fmt_formatted,
2690
2691         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2692
2693         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2694         as specified in IV3.2 spec.
2695         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2696
2697 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2698
2699         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2700         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2701         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2702         PENDING_FILL versions of instructions.  Simplify.
2703         (X): New function.
2704         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2705         instructions.
2706         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2707         a signed value.
2708         (MTHI, MFHI): Disable code checking HI-LO.
2709
2710         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2711         global.
2712         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2713
2714 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2715
2716         * gencode.c (build_mips16_operands): Replace IPC with cia.
2717
2718         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2719         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2720         IPC to `cia'.
2721         (UndefinedResult): Replace function with macro/function
2722         combination.
2723         (sim_engine_run): Don't save PC in IPC.
2724
2725         * sim-main.h (IPC): Delete.
2726
2727
2728         * interp.c (signal_exception, store_word, load_word,
2729         address_translation, load_memory, store_memory, cache_op,
2730         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2731         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2732         current instruction address - cia - argument.
2733         (sim_read, sim_write): Call address_translation directly.
2734         (sim_engine_run): Rename variable vaddr to cia.
2735         (signal_exception): Pass cia to sim_monitor
2736
2737         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2738         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2739         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2740
2741         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2742         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2743         SIM_ASSERT.
2744
2745         * interp.c (signal_exception): Pass restart address to
2746         sim_engine_restart.
2747
2748         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2749         idecode.o): Add dependency.
2750
2751         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2752         Delete definitions
2753         (DELAY_SLOT): Update NIA not PC with branch address.
2754         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2755
2756         * mips.igen: Use CIA not PC in branch calculations.
2757         (illegal): Call SignalException.
2758         (BEQ, ADDIU): Fix assembler.
2759
2760 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2761
2762         * m16.igen (JALX): Was missing.
2763
2764         * configure.in (enable-sim-igen): New configuration option.
2765         * configure: Re-generate.
2766
2767         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2768
2769         * interp.c (load_memory, store_memory): Delete parameter RAW.
2770         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2771         bypassing {load,store}_memory.
2772
2773         * sim-main.h (ByteSwapMem): Delete definition.
2774
2775         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2776
2777         * interp.c (sim_do_command, sim_commands): Delete mips specific
2778         commands.  Handled by module sim-options.
2779
2780         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2781         (WITH_MODULO_MEMORY): Define.
2782
2783         * interp.c (sim_info): Delete code printing memory size.
2784
2785         * interp.c (mips_size): Nee sim_size, delete function.
2786         (power2): Delete.
2787         (monitor, monitor_base, monitor_size): Delete global variables.
2788         (sim_open, sim_close): Delete code creating monitor and other
2789         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2790         manage memory regions.
2791         (load_memory, store_memory): Use sim-core for memory model.
2792
2793         * interp.c (address_translation): Delete all memory map code
2794         except line forcing 32 bit addresses.
2795
2796 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2797
2798         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2799         trace options.
2800
2801         * interp.c (logfh, logfile): Delete globals.
2802         (sim_open, sim_close): Delete code opening & closing log file.
2803         (mips_option_handler): Delete -l and -n options.
2804         (OPTION mips_options): Ditto.
2805
2806         * interp.c (OPTION mips_options): Rename option trace to dinero.
2807         (mips_option_handler): Update.
2808
2809 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2810
2811         * interp.c (fetch_str): New function.
2812         (sim_monitor): Rewrite using sim_read & sim_write.
2813         (sim_open): Check magic number.
2814         (sim_open): Write monitor vectors into memory using sim_write.
2815         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2816         (sim_read, sim_write): Simplify - transfer data one byte at a
2817         time.
2818         (load_memory, store_memory): Clarify meaning of parameter RAW.
2819
2820         * sim-main.h (isHOST): Defete definition.
2821         (isTARGET): Mark as depreciated.
2822         (address_translation): Delete parameter HOST.
2823
2824         * interp.c (address_translation): Delete parameter HOST.
2825
2826 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2827
2828         * mips.igen:
2829
2830         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2831         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2832
2833 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2834
2835         * mips.igen: Add model filter field to records.
2836
2837 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2838
2839         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2840
2841         interp.c (sim_engine_run): Do not compile function sim_engine_run
2842         when WITH_IGEN == 1.
2843
2844         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2845         target architecture.
2846
2847         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2848         igen. Replace with configuration variables sim_igen_flags /
2849         sim_m16_flags.
2850
2851         * m16.igen: New file.  Copy mips16 insns here.
2852         * mips.igen: From here.
2853
2854 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2855
2856         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2857         to top.
2858         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2859
2860 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2861
2862         * gencode.c (build_instruction): Follow sim_write's lead in using
2863         BigEndianMem instead of !ByteSwapMem.
2864
2865 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2866
2867         * configure.in (sim_gen): Dependent on target, select type of
2868         generator.  Always select old style generator.
2869
2870         configure: Re-generate.
2871
2872         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2873         targets.
2874         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2875         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2876         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2877         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2878         SIM_@sim_gen@_*, set by autoconf.
2879
2880 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2881
2882         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2883
2884         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2885         CURRENT_FLOATING_POINT instead.
2886
2887         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2888         (address_translation): Raise exception InstructionFetch when
2889         translation fails and isINSTRUCTION.
2890
2891         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2892         sim_engine_run): Change type of of vaddr and paddr to
2893         address_word.
2894         (address_translation, prefetch, load_memory, store_memory,
2895         cache_op): Change type of vAddr and pAddr to address_word.
2896
2897         * gencode.c (build_instruction): Change type of vaddr and paddr to
2898         address_word.
2899
2900 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2901
2902         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2903         macro to obtain result of ALU op.
2904
2905 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2906
2907         * interp.c (sim_info): Call profile_print.
2908
2909 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2910
2911         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2912
2913         * sim-main.h (WITH_PROFILE): Do not define, defined in
2914         common/sim-config.h.  Use sim-profile module.
2915         (simPROFILE): Delete defintion.
2916
2917         * interp.c (PROFILE): Delete definition.
2918         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2919         (sim_close): Delete code writing profile histogram.
2920         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2921         Delete.
2922         (sim_engine_run): Delete code profiling the PC.
2923
2924 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2925
2926         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2927
2928         * interp.c (sim_monitor): Make register pointers of type
2929         unsigned_word*.
2930
2931         * sim-main.h: Make registers of type unsigned_word not
2932         signed_word.
2933
2934 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2935
2936         * interp.c (sync_operation): Rename from SyncOperation, make
2937         global, add SD argument.
2938         (prefetch): Rename from Prefetch, make global, add SD argument.
2939         (decode_coproc): Make global.
2940
2941         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2942
2943         * gencode.c (build_instruction): Generate DecodeCoproc not
2944         decode_coproc calls.
2945
2946         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2947         (SizeFGR): Move to sim-main.h
2948         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2949         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2950         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2951         sim-main.h.
2952         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2953         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2954         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2955         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2956         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2957         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2958
2959         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2960         exception.
2961         (sim-alu.h): Include.
2962         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2963         (sim_cia): Typedef to instruction_address.
2964
2965 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2966
2967         * Makefile.in (interp.o): Rename generated file engine.c to
2968         oengine.c.
2969
2970         * interp.c: Update.
2971
2972 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2973
2974         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2975
2976 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2977
2978         * gencode.c (build_instruction): For "FPSQRT", output correct
2979         number of arguments to Recip.
2980
2981 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2982
2983         * Makefile.in (interp.o): Depends on sim-main.h
2984
2985         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2986
2987         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2988         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2989         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2990         STATE, DSSTATE): Define
2991         (GPR, FGRIDX, ..): Define.
2992
2993         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2994         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2995         (GPR, FGRIDX, ...): Delete macros.
2996
2997         * interp.c: Update names to match defines from sim-main.h
2998
2999 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3000
3001         * interp.c (sim_monitor): Add SD argument.
3002         (sim_warning): Delete.  Replace calls with calls to
3003         sim_io_eprintf.
3004         (sim_error): Delete. Replace calls with sim_io_error.
3005         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3006         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3007         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3008         argument.
3009         (mips_size): Rename from sim_size. Add SD argument.
3010
3011         * interp.c (simulator): Delete global variable.
3012         (callback): Delete global variable.
3013         (mips_option_handler, sim_open, sim_write, sim_read,
3014         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3015         sim_size,sim_monitor): Use sim_io_* not callback->*.
3016         (sim_open): ZALLOC simulator struct.
3017         (PROFILE): Do not define.
3018
3019 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3020
3021         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3022         support.h with corresponding code.
3023
3024         * sim-main.h (word64, uword64), support.h: Move definition to
3025         sim-main.h.
3026         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3027
3028         * support.h: Delete
3029         * Makefile.in: Update dependencies
3030         * interp.c: Do not include.
3031
3032 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3033
3034         * interp.c (address_translation, load_memory, store_memory,
3035         cache_op): Rename to from AddressTranslation et.al., make global,
3036         add SD argument
3037
3038         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3039         CacheOp): Define.
3040
3041         * interp.c (SignalException): Rename to signal_exception, make
3042         global.
3043
3044         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3045
3046         * sim-main.h (SignalException, SignalExceptionInterrupt,
3047         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3048         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3049         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3050         Define.
3051
3052         * interp.c, support.h: Use.
3053
3054 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3055
3056         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3057         to value_fpr / store_fpr. Add SD argument.
3058         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3059         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3060
3061         * sim-main.h (ValueFPR, StoreFPR): Define.
3062
3063 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3064
3065         * interp.c (sim_engine_run): Check consistency between configure
3066         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3067         and HASFPU.
3068
3069         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3070         (mips_fpu): Configure WITH_FLOATING_POINT.
3071         (mips_endian): Configure WITH_TARGET_ENDIAN.
3072         * configure: Update.
3073
3074 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3075
3076         * configure: Regenerated to track ../common/aclocal.m4 changes.
3077
3078 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3079
3080         * configure: Regenerated.
3081
3082 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3083
3084         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3085
3086 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3087
3088         * gencode.c (print_igen_insn_models): Assume certain architectures
3089         include all mips* instructions.
3090         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3091         instruction.
3092
3093         * Makefile.in (tmp.igen): Add target. Generate igen input from
3094         gencode file.
3095
3096         * gencode.c (FEATURE_IGEN): Define.
3097         (main): Add --igen option.  Generate output in igen format.
3098         (process_instructions): Format output according to igen option.
3099         (print_igen_insn_format): New function.
3100         (print_igen_insn_models): New function.
3101         (process_instructions): Only issue warnings and ignore
3102         instructions when no FEATURE_IGEN.
3103
3104 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3105
3106         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3107         MIPS targets.
3108
3109 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3110
3111         * configure: Regenerated to track ../common/aclocal.m4 changes.
3112
3113 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3114
3115         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3116         SIM_RESERVED_BITS): Delete, moved to common.
3117         (SIM_EXTRA_CFLAGS): Update.
3118
3119 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3120
3121         * configure.in: Configure non-strict memory alignment.
3122         * configure: Regenerated to track ../common/aclocal.m4 changes.
3123
3124 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3125
3126         * configure: Regenerated to track ../common/aclocal.m4 changes.
3127
3128 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3129
3130         * gencode.c (SDBBP,DERET): Added (3900) insns.
3131         (RFE): Turn on for 3900.
3132         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3133         (dsstate): Made global.
3134         (SUBTARGET_R3900): Added.
3135         (CANCELDELAYSLOT): New.
3136         (SignalException): Ignore SystemCall rather than ignore and
3137         terminate.  Add DebugBreakPoint handling.
3138         (decode_coproc): New insns RFE, DERET; and new registers Debug
3139         and DEPC protected by SUBTARGET_R3900.
3140         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3141         bits explicitly.
3142         * Makefile.in,configure.in: Add mips subtarget option.
3143         * configure: Update.
3144
3145 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3146
3147         * gencode.c: Add r3900 (tx39).
3148
3149
3150 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3151
3152         * gencode.c (build_instruction): Don't need to subtract 4 for
3153         JALR, just 2.
3154
3155 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3156
3157         * interp.c: Correct some HASFPU problems.
3158
3159 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3160
3161         * configure: Regenerated to track ../common/aclocal.m4 changes.
3162
3163 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3164
3165         * interp.c (mips_options): Fix samples option short form, should
3166         be `x'.
3167
3168 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3169
3170         * interp.c (sim_info): Enable info code.  Was just returning.
3171
3172 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3173
3174         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3175         MFC0.
3176
3177 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3178
3179         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3180         constants.
3181         (build_instruction): Ditto for LL.
3182
3183 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3184
3185         * configure: Regenerated to track ../common/aclocal.m4 changes.
3186
3187 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3188
3189         * configure: Regenerated to track ../common/aclocal.m4 changes.
3190         * config.in: Ditto.
3191
3192 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3193
3194         * interp.c (sim_open): Add call to sim_analyze_program, update
3195         call to sim_config.
3196
3197 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3198
3199         * interp.c (sim_kill): Delete.
3200         (sim_create_inferior): Add ABFD argument. Set PC from same.
3201         (sim_load): Move code initializing trap handlers from here.
3202         (sim_open): To here.
3203         (sim_load): Delete, use sim-hload.c.
3204
3205         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3206
3207 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3208
3209         * configure: Regenerated to track ../common/aclocal.m4 changes.
3210         * config.in: Ditto.
3211
3212 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3213
3214         * interp.c (sim_open): Add ABFD argument.
3215         (sim_load): Move call to sim_config from here.
3216         (sim_open): To here.  Check return status.
3217
3218 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3219
3220         * gencode.c (build_instruction): Two arg MADD should
3221         not assign result to $0.
3222
3223 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3224
3225         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3226         * sim/mips/configure.in: Regenerate.
3227
3228 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3229
3230         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3231         signed8, unsigned8 et.al. types.
3232
3233         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3234         hosts when selecting subreg.
3235
3236 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3237
3238         * interp.c (sim_engine_run): Reset the ZERO register to zero
3239         regardless of FEATURE_WARN_ZERO.
3240         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3241
3242 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3243
3244         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3245         (SignalException): For BreakPoints ignore any mode bits and just
3246         save the PC.
3247         (SignalException): Always set the CAUSE register.
3248
3249 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3250
3251         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3252         exception has been taken.
3253
3254         * interp.c: Implement the ERET and mt/f sr instructions.
3255
3256 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3257
3258         * interp.c (SignalException): Don't bother restarting an
3259         interrupt.
3260
3261 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3262
3263         * interp.c (SignalException): Really take an interrupt.
3264         (interrupt_event): Only deliver interrupts when enabled.
3265
3266 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3267
3268         * interp.c (sim_info): Only print info when verbose.
3269         (sim_info) Use sim_io_printf for output.
3270
3271 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3272
3273         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3274         mips architectures.
3275
3276 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3277
3278         * interp.c (sim_do_command): Check for common commands if a
3279         simulator specific command fails.
3280
3281 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3282
3283         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3284         and simBE when DEBUG is defined.
3285
3286 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3287
3288         * interp.c (interrupt_event): New function.  Pass exception event
3289         onto exception handler.
3290
3291         * configure.in: Check for stdlib.h.
3292         * configure: Regenerate.
3293
3294         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3295         variable declaration.
3296         (build_instruction): Initialize memval1.
3297         (build_instruction): Add UNUSED attribute to byte, bigend,
3298         reverse.
3299         (build_operands): Ditto.
3300
3301         * interp.c: Fix GCC warnings.
3302         (sim_get_quit_code): Delete.
3303
3304         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3305         * Makefile.in: Ditto.
3306         * configure: Re-generate.
3307
3308         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3309
3310 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3311
3312         * interp.c (mips_option_handler): New function parse argumes using
3313         sim-options.
3314         (myname): Replace with STATE_MY_NAME.
3315         (sim_open): Delete check for host endianness - performed by
3316         sim_config.
3317         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3318         (sim_open): Move much of the initialization from here.
3319         (sim_load): To here.  After the image has been loaded and
3320         endianness set.
3321         (sim_open): Move ColdReset from here.
3322         (sim_create_inferior): To here.
3323         (sim_open): Make FP check less dependant on host endianness.
3324
3325         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3326         run.
3327         * interp.c (sim_set_callbacks): Delete.
3328
3329         * interp.c (membank, membank_base, membank_size): Replace with
3330         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3331         (sim_open): Remove call to callback->init. gdb/run do this.
3332
3333         * interp.c: Update
3334
3335         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3336
3337         * interp.c (big_endian_p): Delete, replaced by
3338         current_target_byte_order.
3339
3340 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3341
3342         * interp.c (host_read_long, host_read_word, host_swap_word,
3343         host_swap_long): Delete. Using common sim-endian.
3344         (sim_fetch_register, sim_store_register): Use H2T.
3345         (pipeline_ticks): Delete.  Handled by sim-events.
3346         (sim_info): Update.
3347         (sim_engine_run): Update.
3348
3349 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3350
3351         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3352         reason from here.
3353         (SignalException): To here. Signal using sim_engine_halt.
3354         (sim_stop_reason): Delete, moved to common.
3355
3356 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3357
3358         * interp.c (sim_open): Add callback argument.
3359         (sim_set_callbacks): Delete SIM_DESC argument.
3360         (sim_size): Ditto.
3361
3362 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3363
3364         * Makefile.in (SIM_OBJS): Add common modules.
3365
3366         * interp.c (sim_set_callbacks): Also set SD callback.
3367         (set_endianness, xfer_*, swap_*): Delete.
3368         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3369         Change to functions using sim-endian macros.
3370         (control_c, sim_stop): Delete, use common version.
3371         (simulate): Convert into.
3372         (sim_engine_run): This function.
3373         (sim_resume): Delete.
3374
3375         * interp.c (simulation): New variable - the simulator object.
3376         (sim_kind): Delete global - merged into simulation.
3377         (sim_load): Cleanup.  Move PC assignment from here.
3378         (sim_create_inferior): To here.
3379
3380         * sim-main.h: New file.
3381         * interp.c (sim-main.h): Include.
3382
3383 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3384
3385         * configure: Regenerated to track ../common/aclocal.m4 changes.
3386
3387 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3388
3389         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3390
3391 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3392
3393         * gencode.c (build_instruction): DIV instructions: check
3394         for division by zero and integer overflow before using
3395         host's division operation.
3396
3397 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3398
3399         * Makefile.in (SIM_OBJS): Add sim-load.o.
3400         * interp.c: #include bfd.h.
3401         (target_byte_order): Delete.
3402         (sim_kind, myname, big_endian_p): New static locals.
3403         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3404         after argument parsing.  Recognize -E arg, set endianness accordingly.
3405         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3406         load file into simulator.  Set PC from bfd.
3407         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3408         (set_endianness): Use big_endian_p instead of target_byte_order.
3409
3410 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3411
3412         * interp.c (sim_size): Delete prototype - conflicts with
3413         definition in remote-sim.h.  Correct definition.
3414
3415 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3416
3417         * configure: Regenerated to track ../common/aclocal.m4 changes.
3418         * config.in: Ditto.
3419
3420 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3421
3422         * interp.c (sim_open): New arg `kind'.
3423
3424         * configure: Regenerated to track ../common/aclocal.m4 changes.
3425
3426 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3427
3428         * configure: Regenerated to track ../common/aclocal.m4 changes.
3429
3430 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3431
3432         * interp.c (sim_open): Set optind to 0 before calling getopt.
3433
3434 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3435
3436         * configure: Regenerated to track ../common/aclocal.m4 changes.
3437
3438 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3439
3440         * interp.c : Replace uses of pr_addr with pr_uword64
3441         where the bit length is always 64 independent of SIM_ADDR.
3442         (pr_uword64) : added.
3443
3444 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3445
3446         * configure: Re-generate.
3447
3448 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3449
3450         * configure: Regenerate to track ../common/aclocal.m4 changes.
3451
3452 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3453
3454         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3455         in argv form.
3456         (other sim_*): New SIM_DESC argument.
3457
3458 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3459
3460         * interp.c: Fix printing of addresses for non-64-bit targets.
3461         (pr_addr): Add function to print address based on size.
3462
3463 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3464
3465         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3466
3467 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3468
3469         * gencode.c (build_mips16_operands): Correct computation of base
3470         address for extended PC relative instruction.
3471
3472 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3473
3474         * interp.c (mips16_entry): Add support for floating point cases.
3475         (SignalException): Pass floating point cases to mips16_entry.
3476         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3477         registers.
3478         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3479         or fmt_word.
3480         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3481         and then set the state to fmt_uninterpreted.
3482         (COP_SW): Temporarily set the state to fmt_word while calling
3483         ValueFPR.
3484
3485 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3486
3487         * gencode.c (build_instruction): The high order may be set in the
3488         comparison flags at any ISA level, not just ISA 4.
3489
3490 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3491
3492         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3493         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3494         * configure.in: sinclude ../common/aclocal.m4.
3495         * configure: Regenerated.
3496
3497 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3498
3499         * configure: Rebuild after change to aclocal.m4.
3500
3501 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3502
3503         * configure configure.in Makefile.in:  Update to new configure
3504         scheme which is more compatible with WinGDB builds.
3505         * configure.in:  Improve comment on how to run autoconf.
3506         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3507         * Makefile.in:  Use autoconf substitution to install common
3508         makefile fragment.
3509
3510 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3511
3512         * gencode.c (build_instruction): Use BigEndianCPU instead of
3513         ByteSwapMem.
3514
3515 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3516
3517         * interp.c (sim_monitor): Make output to stdout visible in
3518         wingdb's I/O log window.
3519
3520 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3521
3522         * support.h: Undo previous change to SIGTRAP
3523         and SIGQUIT values.
3524
3525 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3526
3527         * interp.c (store_word, load_word): New static functions.
3528         (mips16_entry): New static function.
3529         (SignalException): Look for mips16 entry and exit instructions.
3530         (simulate): Use the correct index when setting fpr_state after
3531         doing a pending move.
3532
3533 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3534
3535         * interp.c: Fix byte-swapping code throughout to work on
3536         both little- and big-endian hosts.
3537
3538 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3539
3540         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3541         with gdb/config/i386/xm-windows.h.
3542
3543 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3544
3545         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3546         that messes up arithmetic shifts.
3547
3548 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3549
3550         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3551         SIGTRAP and SIGQUIT for _WIN32.
3552
3553 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3554
3555         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3556         force a 64 bit multiplication.
3557         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3558         destination register is 0, since that is the default mips16 nop
3559         instruction.
3560
3561 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3562
3563         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3564         (build_endian_shift): Don't check proc64.
3565         (build_instruction): Always set memval to uword64.  Cast op2 to
3566         uword64 when shifting it left in memory instructions.  Always use
3567         the same code for stores--don't special case proc64.
3568
3569         * gencode.c (build_mips16_operands): Fix base PC value for PC
3570         relative operands.
3571         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3572         jal instruction.
3573         * interp.c (simJALDELAYSLOT): Define.
3574         (JALDELAYSLOT): Define.
3575         (INDELAYSLOT, INJALDELAYSLOT): Define.
3576         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3577
3578 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3579
3580         * interp.c (sim_open): add flush_cache as a PMON routine
3581         (sim_monitor): handle flush_cache by ignoring it
3582
3583 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3584
3585         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3586         BigEndianMem.
3587         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3588         (BigEndianMem): Rename to ByteSwapMem and change sense.
3589         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3590         BigEndianMem references to !ByteSwapMem.
3591         (set_endianness): New function, with prototype.
3592         (sim_open): Call set_endianness.
3593         (sim_info): Use simBE instead of BigEndianMem.
3594         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3595         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3596         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3597         ifdefs, keeping the prototype declaration.
3598         (swap_word): Rewrite correctly.
3599         (ColdReset): Delete references to CONFIG.  Delete endianness related
3600         code; moved to set_endianness.
3601
3602 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3603
3604         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3605         * interp.c (CHECKHILO): Define away.
3606         (simSIGINT): New macro.
3607         (membank_size): Increase from 1MB to 2MB.
3608         (control_c): New function.
3609         (sim_resume): Rename parameter signal to signal_number.  Add local
3610         variable prev.  Call signal before and after simulate.
3611         (sim_stop_reason): Add simSIGINT support.
3612         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3613         functions always.
3614         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3615         if logfh is NULL.
3616         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3617         a call to sim_warning.
3618
3619 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3620
3621         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3622         16 bit instructions.
3623
3624 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3625
3626         Add support for mips16 (16 bit MIPS implementation):
3627         * gencode.c (inst_type): Add mips16 instruction encoding types.
3628         (GETDATASIZEINSN): Define.
3629         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3630         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3631         mtlo.
3632         (MIPS16_DECODE): New table, for mips16 instructions.
3633         (bitmap_val): New static function.
3634         (struct mips16_op): Define.
3635         (mips16_op_table): New table, for mips16 operands.
3636         (build_mips16_operands): New static function.
3637         (process_instructions): If PC is odd, decode a mips16
3638         instruction.  Break out instruction handling into new
3639         build_instruction function.
3640         (build_instruction): New static function, broken out of
3641         process_instructions.  Check modifiers rather than flags for SHIFT
3642         bit count and m[ft]{hi,lo} direction.
3643         (usage): Pass program name to fprintf.
3644         (main): Remove unused variable this_option_optind.  Change
3645         ``*loptarg++'' to ``loptarg++''.
3646         (my_strtoul): Parenthesize && within ||.
3647         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3648         (simulate): If PC is odd, fetch a 16 bit instruction, and
3649         increment PC by 2 rather than 4.
3650         * configure.in: Add case for mips16*-*-*.
3651         * configure: Rebuild.
3652
3653 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3654
3655         * interp.c: Allow -t to enable tracing in standalone simulator.
3656         Fix garbage output in trace file and error messages.
3657
3658 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3659
3660         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3661         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3662         * configure.in: Simplify using macros in ../common/aclocal.m4.
3663         * configure: Regenerated.
3664         * tconfig.in: New file.
3665
3666 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3667
3668         * interp.c: Fix bugs in 64-bit port.
3669         Use ansi function declarations for msvc compiler.
3670         Initialize and test file pointer in trace code.
3671         Prevent duplicate definition of LAST_EMED_REGNUM.
3672
3673 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3674
3675         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3676
3677 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3678
3679         * interp.c (SignalException): Check for explicit terminating
3680         breakpoint value.
3681         * gencode.c: Pass instruction value through SignalException()
3682         calls for Trap, Breakpoint and Syscall.
3683
3684 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3685
3686         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3687         only used on those hosts that provide it.
3688         * configure.in: Add sqrt() to list of functions to be checked for.
3689         * config.in: Re-generated.
3690         * configure: Re-generated.
3691
3692 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3693
3694         * gencode.c (process_instructions): Call build_endian_shift when
3695         expanding STORE RIGHT, to fix swr.
3696         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3697         clear the high bits.
3698         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3699         Fix float to int conversions to produce signed values.
3700
3701 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3702
3703         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3704         (process_instructions): Correct handling of nor instruction.
3705         Correct shift count for 32 bit shift instructions. Correct sign
3706         extension for arithmetic shifts to not shift the number of bits in
3707         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3708         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3709         Fix madd.
3710         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3711         It's OK to have a mult follow a mult.  What's not OK is to have a
3712         mult follow an mfhi.
3713         (Convert): Comment out incorrect rounding code.
3714
3715 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3716
3717         * interp.c (sim_monitor): Improved monitor printf
3718         simulation. Tidied up simulator warnings, and added "--log" option
3719         for directing warning message output.
3720         * gencode.c: Use sim_warning() rather than WARNING macro.
3721
3722 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3723
3724         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3725         getopt1.o, rather than on gencode.c.  Link objects together.
3726         Don't link against -liberty.
3727         (gencode.o, getopt.o, getopt1.o): New targets.
3728         * gencode.c: Include <ctype.h> and "ansidecl.h".
3729         (AND): Undefine after including "ansidecl.h".
3730         (ULONG_MAX): Define if not defined.
3731         (OP_*): Don't define macros; now defined in opcode/mips.h.
3732         (main): Call my_strtoul rather than strtoul.
3733         (my_strtoul): New static function.
3734
3735 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3736
3737         * gencode.c (process_instructions):  Generate word64 and uword64
3738         instead of `long long' and `unsigned long long' data types.
3739         * interp.c:  #include sysdep.h to get signals, and define default
3740         for SIGBUS.
3741         * (Convert):  Work around for Visual-C++ compiler bug with type
3742         conversion.
3743         * support.h:  Make things compile under Visual-C++ by using
3744         __int64 instead of `long long'.  Change many refs to long long
3745         into word64/uword64 typedefs.
3746
3747 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3748
3749         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3750         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3751         (docdir): Removed.
3752         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3753         (AC_PROG_INSTALL): Added.
3754         (AC_PROG_CC): Moved to before configure.host call.
3755         * configure: Rebuilt.
3756
3757 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3758
3759         * configure.in: Define @SIMCONF@ depending on mips target.
3760         * configure: Rebuild.
3761         * Makefile.in (run): Add @SIMCONF@ to control simulator
3762         construction.
3763         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3764         * interp.c: Remove some debugging, provide more detailed error
3765         messages, update memory accesses to use LOADDRMASK.
3766
3767 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3768
3769         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3770         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3771         stamp-h.
3772         * configure: Rebuild.
3773         * config.in: New file, generated by autoheader.
3774         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3775         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3776         HAVE_ANINT and HAVE_AINT, as appropriate.
3777         * Makefile.in (run): Use @LIBS@ rather than -lm.
3778         (interp.o): Depend upon config.h.
3779         (Makefile): Just rebuild Makefile.
3780         (clean): Remove stamp-h.
3781         (mostlyclean): Make the same as clean, not as distclean.
3782         (config.h, stamp-h): New targets.
3783
3784 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3785
3786         * interp.c (ColdReset): Fix boolean test. Make all simulator
3787         globals static.
3788
3789 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3790
3791         * interp.c (xfer_direct_word, xfer_direct_long,
3792         swap_direct_word, swap_direct_long, xfer_big_word,
3793         xfer_big_long, xfer_little_word, xfer_little_long,
3794         swap_word,swap_long): Added.
3795         * interp.c (ColdReset): Provide function indirection to
3796         host<->simulated_target transfer routines.
3797         * interp.c (sim_store_register, sim_fetch_register): Updated to
3798         make use of indirected transfer routines.
3799
3800 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3801
3802         * gencode.c (process_instructions): Ensure FP ABS instruction
3803         recognised.
3804         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3805         system call support.
3806
3807 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3808
3809         * interp.c (sim_do_command): Complain if callback structure not
3810         initialised.
3811
3812 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3813
3814         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3815         support for Sun hosts.
3816         * Makefile.in (gencode): Ensure the host compiler and libraries
3817         used for cross-hosted build.
3818
3819 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3820
3821         * interp.c, gencode.c: Some more (TODO) tidying.
3822
3823 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3824
3825         * gencode.c, interp.c: Replaced explicit long long references with
3826         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3827         * support.h (SET64LO, SET64HI): Macros added.
3828
3829 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3830
3831         * configure: Regenerate with autoconf 2.7.
3832
3833 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3834
3835         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3836         * support.h: Remove superfluous "1" from #if.
3837         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3838
3839 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3840
3841         * interp.c (StoreFPR): Control UndefinedResult() call on
3842         WARN_RESULT manifest.
3843
3844 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3845
3846         * gencode.c: Tidied instruction decoding, and added FP instruction
3847         support.
3848
3849         * interp.c: Added dineroIII, and BSD profiling support. Also
3850         run-time FP handling.
3851
3852 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3853
3854         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3855         gencode.c, interp.c, support.h: created.