sim/mips/ChangeLog

   1 start-sanitize-r5900
   2 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   3
   4         * r5900.igen: Add tracing to all p* instructions.
   5
   6 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   7
   8         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
   9         to get gdb talking to re-aranged sim_cpu register structure.
  10
  11 end-sanitize-r5900
  12 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  13
  14         * sim-main.h (Max, Min): Declare.
  15
  16         * interp.c (Max, Min): New functions.
  17
  18         * mips.igen (BC1): Add tracing.
  19
  20 start-sanitize-vr5400
  21 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  22
  23         * mdmx.igen: Tag all functions as requiring either with mdmx or
  24         vr5400 processor.
  25
  26 end-sanitize-vr5400
  27 start-sanitize-r5900
  28 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  29
  30         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
  31         to 32.
  32         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
  33
  34         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
  35
  36         * r5900.igen: Rewrite.
  37
  38         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
  39         struct.
  40         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
  41         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
  42
  43 end-sanitize-r5900
  44 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
  45
  46         * interp.c Added memory map for stack in vr4100
  47
  48 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
  49
  50         * interp.c (load_memory): Add missing "break"'s.
  51
  52 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  53
  54         * interp.c (sim_store_register, sim_fetch_register): Pass in
  55         length parameter.  Return -1.
  56
  57 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
  58
  59         * interp.c: Added hardware init hook, fixed warnings.
  60
  61 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  62
  63         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
  64
  65 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  66
  67         * interp.c (ifetch16): New function.
  68
  69         * sim-main.h (IMEM32): Rename IMEM.
  70         (IMEM16_IMMED): Define.
  71         (IMEM16): Define.
  72         (DELAY_SLOT): Update.
  73
  74         * m16run.c (sim_engine_run): New file.
  75
  76         * m16.igen: All instructions except LB.
  77         (LB): Call do_load_byte.
  78         * mips.igen (do_load_byte): New function.
  79         (LB): Call do_load_byte.
  80
  81         * mips.igen: Move spec for insn bit size and high bit from here.
  82         * Makefile.in (tmp-igen, tmp-m16): To here.
  83
  84         * m16.dc: New file, decode mips16 instructions.
  85
  86         * Makefile.in (SIM_NO_ALL): Define.
  87         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
  88
  89 start-sanitize-tx19
  90         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
  91         set.
  92
  93 end-sanitize-tx19
  94 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  95
  96         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
  97         point unit to 32 bit registers.
  98         * configure: Re-generate.
  99
 100 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 101
 102         * configure.in (sim_use_gen): Make IGEN the default simulator
 103         generator for generic 32 and 64 bit mips targets.
 104         * configure: Re-generate.
 105
 106 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 107
 108         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 109         bitsize.
 110
 111         * interp.c (sim_fetch_register, sim_store_register): Read/write
 112         FGR from correct location.
 113         (sim_open): Set size of FGR's according to
 114         WITH_TARGET_FLOATING_POINT_BITSIZE.
 115
 116         * sim-main.h (FGR): Store floating point registers in a separate
 117         array.
 118
 119 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 120
 121         * configure: Regenerated to track ../common/aclocal.m4 changes.
 122
 123 start-sanitize-vr5400
 124         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 125
 126 end-sanitize-vr5400
 127 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 128
 129         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 130
 131         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 132
 133         * interp.c (pending_tick): New function.  Deliver pending writes.
 134
 135         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 136         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 137         it can handle mixed sized quantites and single bits.
 138
 139 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 140
 141         * interp.c (oengine.h): Do not include when building with IGEN.
 142         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 143         (sim_info): Ditto for PROCESSOR_64BIT.
 144         (sim_monitor): Replace ut_reg with unsigned_word.
 145         (*): Ditto for t_reg.
 146         (LOADDRMASK): Define.
 147         (sim_open): Remove defunct check that host FP is IEEE compliant,
 148         using software to emulate floating point.
 149         (value_fpr, ...): Always compile, was conditional on HASFPU.
 150
 151 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 152
 153         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 154         size.
 155
 156         * interp.c (SD, CPU): Define.
 157         (mips_option_handler): Set flags in each CPU.
 158         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 159         (sim_close): Do not clear STATE, deleted anyway.
 160         (sim_write, sim_read): Assume CPU zero's vm should be used for
 161         data transfers.
 162         (sim_create_inferior): Set the PC for all processors.
 163         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 164         argument.
 165         (mips16_entry): Pass correct nr of args to store_word, load_word.
 166         (ColdReset): Cold reset all cpu's.
 167         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 168         (sim_monitor, load_memory, store_memory, signal_exception): Use
 169         `CPU' instead of STATE_CPU.
 170
 171
 172         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 173         SD or CPU_.
 174
 175         * sim-main.h (signal_exception): Add sim_cpu arg.
 176         (SignalException*): Pass both SD and CPU to signal_exception.
 177         * interp.c (signal_exception): Update.
 178
 179         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 180         Ditto
 181         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 182         address_translation): Ditto
 183         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 184
 185 start-sanitize-vr5400
 186         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 187         `sd'.
 188         (ByteAlign): Use StoreFPR, pass args in correct order.
 189
 190 end-sanitize-vr5400
 191 start-sanitize-r5900
 192 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 193
 194         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 195
 196 end-sanitize-r5900
 197 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 198
 199         * configure: Regenerated to track ../common/aclocal.m4 changes.
 200
 201 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 202
 203 start-sanitize-r5900
 204         * configure.in (sim_igen_filter): For r5900, use igen.
 205         * configure: Re-generate.
 206
 207 end-sanitize-r5900
 208         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 209
 210         * mips.igen (model): Map processor names onto BFD name.
 211
 212         * sim-main.h (CPU_CIA): Delete.
 213         (SET_CIA, GET_CIA): Define
 214
 215 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 216
 217         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 218         regiser.
 219
 220         * configure.in (default_endian): Configure a big-endian simulator
 221         by default.
 222         * configure: Re-generate.
 223
 224 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 225
 226         * configure: Regenerated to track ../common/aclocal.m4 changes.
 227
 228 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 229
 230         * interp.c (sim_monitor): Handle Densan monitor outbyte
 231         and inbyte functions.
 232
 233 1997-12-29  Felix Lee  <flee@cygnus.com>
 234
 235         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 236
 237 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 238
 239         * Makefile.in (tmp-igen): Arrange for $zero to always be
 240         reset to zero after every instruction.
 241
 242 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * configure: Regenerated to track ../common/aclocal.m4 changes.
 245         * config.in: Ditto.
 246
 247 start-sanitize-vr5400
 248 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 249
 250         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 251         bit values.
 252
 253 end-sanitize-vr5400
 254 start-sanitize-vr5400
 255 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 256
 257         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 258         vr5400 with the vr5000 as the default.
 259
 260 end-sanitize-vr5400
 261 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 262
 263         * mips.igen (MSUB): Fix to work like MADD.
 264         * gencode.c (MSUB): Similarly.
 265
 266 start-sanitize-vr5400
 267 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 268
 269         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 270         vr5400.
 271
 272 end-sanitize-vr5400
 273 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 274
 275         * configure: Regenerated to track ../common/aclocal.m4 changes.
 276
 277 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 278
 279         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 280
 281 start-sanitize-vr5400
 282         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 283         (value_cc, store_cc): Implement.
 284
 285         * sim-main.h: Add 8*3*8 bit accumulator.
 286
 287         * vr5400.igen: Move mdmx instructins from here
 288         * mdmx.igen: To here - new file. Add/fix missing instructions.
 289         * mips.igen: Include mdmx.igen.
 290         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 291
 292 end-sanitize-vr5400
 293 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 294
 295         * sim-main.h (sim-fpu.h): Include.
 296
 297         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 298         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 299         using host independant sim_fpu module.
 300
 301 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 302
 303         * interp.c (signal_exception): Report internal errors with SIGABRT
 304         not SIGQUIT.
 305
 306         * sim-main.h (C0_CONFIG): New register.
 307         (signal.h): No longer include.
 308
 309         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 310
 311 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 312
 313         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 314
 315 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 316
 317         * mips.igen: Tag vr5000 instructions.
 318         (ANDI): Was missing mipsIV model, fix assembler syntax.
 319         (do_c_cond_fmt): New function.
 320         (C.cond.fmt): Handle mips I-III which do not support CC field
 321         separatly.
 322         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 323         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 324         in IV3.2 spec.
 325         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 326         vr5000 which saves LO in a GPR separatly.
 327
 328         * configure.in (enable-sim-igen): For vr5000, select vr5000
 329         specific instructions.
 330         * configure: Re-generate.
 331
 332 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 333
 334         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 335
 336         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 337         fmt_uninterpreted_64 bit cases to switch.  Convert to
 338         fmt_formatted,
 339
 340         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 341
 342         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 343         as specified in IV3.2 spec.
 344         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 345
 346 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 347
 348         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 349         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 350         (start-sanitize-r5900):
 351         (LWXC1, SWXC1): Delete from r5900 instruction set.
 352         (end-sanitize-r5900):
 353         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 354         PENDING_FILL versions of instructions.  Simplify.
 355         (X): New function.
 356         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 357         instructions.
 358         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 359         a signed value.
 360         (MTHI, MFHI): Disable code checking HI-LO.
 361
 362         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 363         global.
 364         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 365
 366 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 367
 368         * gencode.c (build_mips16_operands): Replace IPC with cia.
 369
 370         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 371         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 372         IPC to `cia'.
 373         (UndefinedResult): Replace function with macro/function
 374         combination.
 375         (sim_engine_run): Don't save PC in IPC.
 376
 377         * sim-main.h (IPC): Delete.
 378
 379         start-sanitize-vr5400
 380         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 381         (do_select): Rename function select.
 382         end-sanitize-vr5400
 383
 384         * interp.c (signal_exception, store_word, load_word,
 385         address_translation, load_memory, store_memory, cache_op,
 386         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 387         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 388         current instruction address - cia - argument.
 389         (sim_read, sim_write): Call address_translation directly.
 390         (sim_engine_run): Rename variable vaddr to cia.
 391         (signal_exception): Pass cia to sim_monitor
 392
 393         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 394         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 395         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 396
 397         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 398         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 399         SIM_ASSERT.
 400
 401         * interp.c (signal_exception): Pass restart address to
 402         sim_engine_restart.
 403
 404         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 405         idecode.o): Add dependency.
 406
 407         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 408         Delete definitions
 409         (DELAY_SLOT): Update NIA not PC with branch address.
 410         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 411
 412         * mips.igen: Use CIA not PC in branch calculations.
 413         (illegal): Call SignalException.
 414         (BEQ, ADDIU): Fix assembler.
 415
 416 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 417
 418         * m16.igen (JALX): Was missing.
 419
 420         * configure.in (enable-sim-igen): New configuration option.
 421         * configure: Re-generate.
 422
 423         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 424
 425         * interp.c (load_memory, store_memory): Delete parameter RAW.
 426         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 427         bypassing {load,store}_memory.
 428
 429         * sim-main.h (ByteSwapMem): Delete definition.
 430
 431         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 432
 433         * interp.c (sim_do_command, sim_commands): Delete mips specific
 434         commands.  Handled by module sim-options.
 435
 436         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 437         (WITH_MODULO_MEMORY): Define.
 438
 439         * interp.c (sim_info): Delete code printing memory size.
 440
 441         * interp.c (mips_size): Nee sim_size, delete function.
 442         (power2): Delete.
 443         (monitor, monitor_base, monitor_size): Delete global variables.
 444         (sim_open, sim_close): Delete code creating monitor and other
 445         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 446         manage memory regions.
 447         (load_memory, store_memory): Use sim-core for memory model.
 448
 449         * interp.c (address_translation): Delete all memory map code
 450         except line forcing 32 bit addresses.
 451
 452 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 453
 454         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 455         trace options.
 456
 457         * interp.c (logfh, logfile): Delete globals.
 458         (sim_open, sim_close): Delete code opening & closing log file.
 459         (mips_option_handler): Delete -l and -n options.
 460         (OPTION mips_options): Ditto.
 461
 462         * interp.c (OPTION mips_options): Rename option trace to dinero.
 463         (mips_option_handler): Update.
 464
 465 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 466
 467         * interp.c (fetch_str): New function.
 468         (sim_monitor): Rewrite using sim_read & sim_write.
 469         (sim_open): Check magic number.
 470         (sim_open): Write monitor vectors into memory using sim_write.
 471         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 472         (sim_read, sim_write): Simplify - transfer data one byte at a
 473         time.
 474         (load_memory, store_memory): Clarify meaning of parameter RAW.
 475
 476         * sim-main.h (isHOST): Defete definition.
 477         (isTARGET): Mark as depreciated.
 478         (address_translation): Delete parameter HOST.
 479
 480         * interp.c (address_translation): Delete parameter HOST.
 481
 482 start-sanitize-tx49
 483 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 484
 485         * gencode.c: Add tx49 configury and insns.
 486         * configure.in: Add tx49 configury.
 487         * configure: Update.
 488
 489 end-sanitize-tx49
 490 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 491
 492         * mips.igen:
 493
 494         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 495         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 496
 497 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 498
 499         * mips.igen: Add model filter field to records.
 500
 501 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 502
 503         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 504
 505         interp.c (sim_engine_run): Do not compile function sim_engine_run
 506         when WITH_IGEN == 1.
 507
 508         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 509         target architecture.
 510
 511         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 512         igen. Replace with configuration variables sim_igen_flags /
 513         sim_m16_flags.
 514
 515         start-sanitize-r5900
 516         * r5900.igen: New file. Copy r5900 insns here.
 517         end-sanitize-r5900
 518         start-sanitize-vr5400
 519         * vr5400.igen: New file.
 520         end-sanitize-vr5400
 521         * m16.igen: New file.  Copy mips16 insns here.
 522         * mips.igen: From here.
 523
 524 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 525
 526         start-sanitize-vr5400
 527         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 528
 529         * configure.in: Add mips64vr5400 target.
 530         * configure: Re-generate.
 531
 532         end-sanitize-vr5400
 533         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 534         to top.
 535         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 536
 537 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 538
 539         * gencode.c (build_instruction): Follow sim_write's lead in using
 540         BigEndianMem instead of !ByteSwapMem.
 541
 542 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 543
 544         * configure.in (sim_gen): Dependent on target, select type of
 545         generator.  Always select old style generator.
 546
 547         configure: Re-generate.
 548
 549         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 550         targets.
 551         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 552         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 553         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 554         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 555         SIM_@sim_gen@_*, set by autoconf.
 556
 557 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 558
 559         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 560
 561         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 562         CURRENT_FLOATING_POINT instead.
 563
 564         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 565         (address_translation): Raise exception InstructionFetch when
 566         translation fails and isINSTRUCTION.
 567
 568         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 569         sim_engine_run): Change type of of vaddr and paddr to
 570         address_word.
 571         (address_translation, prefetch, load_memory, store_memory,
 572         cache_op): Change type of vAddr and pAddr to address_word.
 573
 574         * gencode.c (build_instruction): Change type of vaddr and paddr to
 575         address_word.
 576
 577 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 578
 579         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 580         macro to obtain result of ALU op.
 581
 582 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 583
 584         * interp.c (sim_info): Call profile_print.
 585
 586 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 587
 588         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 589
 590         * sim-main.h (WITH_PROFILE): Do not define, defined in
 591         common/sim-config.h.  Use sim-profile module.
 592         (simPROFILE): Delete defintion.
 593
 594         * interp.c (PROFILE): Delete definition.
 595         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 596         (sim_close): Delete code writing profile histogram.
 597         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 598         Delete.
 599         (sim_engine_run): Delete code profiling the PC.
 600
 601 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 602
 603         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 604
 605         * interp.c (sim_monitor): Make register pointers of type
 606         unsigned_word*.
 607
 608         * sim-main.h: Make registers of type unsigned_word not
 609         signed_word.
 610
 611 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 612
 613 start-sanitize-r5900
 614         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 615         ...): Move to sim-main.h
 616
 617 end-sanitize-r5900
 618         * interp.c (sync_operation): Rename from SyncOperation, make
 619         global, add SD argument.
 620         (prefetch): Rename from Prefetch, make global, add SD argument.
 621         (decode_coproc): Make global.
 622
 623         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 624
 625         * gencode.c (build_instruction): Generate DecodeCoproc not
 626         decode_coproc calls.
 627
 628         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 629         (SizeFGR): Move to sim-main.h
 630         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 631         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 632         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 633         sim-main.h.
 634         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 635         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 636         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 637         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 638         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 639         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 640
 641         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 642         exception.
 643         (sim-alu.h): Include.
 644         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 645         (sim_cia): Typedef to instruction_address.
 646
 647 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 648
 649         * Makefile.in (interp.o): Rename generated file engine.c to
 650         oengine.c.
 651
 652         * interp.c: Update.
 653
 654 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 655
 656         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 657
 658 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 659
 660         * gencode.c (build_instruction): For "FPSQRT", output correct
 661         number of arguments to Recip.
 662
 663 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 664
 665         * Makefile.in (interp.o): Depends on sim-main.h
 666
 667         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 668
 669         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 670         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 671         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 672         STATE, DSSTATE): Define
 673         (GPR, FGRIDX, ..): Define.
 674
 675         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 676         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 677         (GPR, FGRIDX, ...): Delete macros.
 678
 679         * interp.c: Update names to match defines from sim-main.h
 680
 681 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 682
 683         * interp.c (sim_monitor): Add SD argument.
 684         (sim_warning): Delete.  Replace calls with calls to
 685         sim_io_eprintf.
 686         (sim_error): Delete. Replace calls with sim_io_error.
 687         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 688         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 689         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 690         argument.
 691         (mips_size): Rename from sim_size. Add SD argument.
 692
 693         * interp.c (simulator): Delete global variable.
 694         (callback): Delete global variable.
 695         (mips_option_handler, sim_open, sim_write, sim_read,
 696         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 697         sim_size,sim_monitor): Use sim_io_* not callback->*.
 698         (sim_open): ZALLOC simulator struct.
 699         (PROFILE): Do not define.
 700
 701 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 702
 703         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 704         support.h with corresponding code.
 705
 706         * sim-main.h (word64, uword64), support.h: Move definition to
 707         sim-main.h.
 708         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 709
 710         * support.h: Delete
 711         * Makefile.in: Update dependencies
 712         * interp.c: Do not include.
 713
 714 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 715
 716         * interp.c (address_translation, load_memory, store_memory,
 717         cache_op): Rename to from AddressTranslation et.al., make global,
 718         add SD argument
 719
 720         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 721         CacheOp): Define.
 722
 723         * interp.c (SignalException): Rename to signal_exception, make
 724         global.
 725
 726         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 727
 728         * sim-main.h (SignalException, SignalExceptionInterrupt,
 729         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 730         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 731         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 732         Define.
 733
 734         * interp.c, support.h: Use.
 735
 736 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 737
 738         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 739         to value_fpr / store_fpr. Add SD argument.
 740         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 741         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 742
 743         * sim-main.h (ValueFPR, StoreFPR): Define.
 744
 745 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 746
 747         * interp.c (sim_engine_run): Check consistency between configure
 748         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 749         and HASFPU.
 750
 751         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 752         (mips_fpu): Configure WITH_FLOATING_POINT.
 753         (mips_endian): Configure WITH_TARGET_ENDIAN.
 754         * configure: Update.
 755
 756 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 757
 758         * configure: Regenerated to track ../common/aclocal.m4 changes.
 759
 760 start-sanitize-r5900
 761 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 762
 763         * interp.c (MAX_REG): Allow up-to 128 registers.
 764         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 765         (REGISTER_SA): Ditto.
 766         (sim_open): Initialize register_widths for r5900 specific
 767         registers.
 768         (sim_fetch_register, sim_store_register): Check for request of
 769         r5900 specific SA register.  Check for request for hi 64 bits of
 770         r5900 specific registers.
 771
 772 end-sanitize-r5900
 773 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 774
 775         * configure: Regenerated.
 776
 777 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 778
 779         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 780
 781 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 782
 783         * gencode.c (print_igen_insn_models): Assume certain architectures
 784         include all mips* instructions.
 785         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 786         instruction.
 787
 788         * Makefile.in (tmp.igen): Add target. Generate igen input from
 789         gencode file.
 790
 791         * gencode.c (FEATURE_IGEN): Define.
 792         (main): Add --igen option.  Generate output in igen format.
 793         (process_instructions): Format output according to igen option.
 794         (print_igen_insn_format): New function.
 795         (print_igen_insn_models): New function.
 796         (process_instructions): Only issue warnings and ignore
 797         instructions when no FEATURE_IGEN.
 798
 799 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 800
 801         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 802         MIPS targets.
 803
 804 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 805
 806         * configure: Regenerated to track ../common/aclocal.m4 changes.
 807
 808 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 809
 810         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 811         SIM_RESERVED_BITS): Delete, moved to common.
 812         (SIM_EXTRA_CFLAGS): Update.
 813
 814 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 815
 816         * configure.in: Configure non-strict memory alignment.
 817         * configure: Regenerated to track ../common/aclocal.m4 changes.
 818
 819 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 820
 821         * configure: Regenerated to track ../common/aclocal.m4 changes.
 822
 823 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 824
 825         * gencode.c (SDBBP,DERET): Added (3900) insns.
 826         (RFE): Turn on for 3900.
 827         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 828         (dsstate): Made global.
 829         (SUBTARGET_R3900): Added.
 830         (CANCELDELAYSLOT): New.
 831         (SignalException): Ignore SystemCall rather than ignore and
 832         terminate.  Add DebugBreakPoint handling.
 833         (decode_coproc): New insns RFE, DERET; and new registers Debug
 834         and DEPC protected by SUBTARGET_R3900.
 835         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 836         bits explicitly.
 837         * Makefile.in,configure.in: Add mips subtarget option.
 838         * configure: Update.
 839
 840 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 841
 842         * gencode.c: Add r3900 (tx39).
 843
 844 start-sanitize-tx19
 845         * gencode.c: Fix some configuration problems by improving
 846         the relationship between tx19 and tx39.
 847 end-sanitize-tx19
 848
 849 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 850
 851         * gencode.c (build_instruction): Don't need to subtract 4 for
 852         JALR, just 2.
 853
 854 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 855
 856         * interp.c: Correct some HASFPU problems.
 857
 858 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 859
 860         * configure: Regenerated to track ../common/aclocal.m4 changes.
 861
 862 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 863
 864         * interp.c (mips_options): Fix samples option short form, should
 865         be `x'.
 866
 867 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 868
 869         * interp.c (sim_info): Enable info code.  Was just returning.
 870
 871 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 872
 873         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 874         MFC0.
 875
 876 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 877
 878         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 879         constants.
 880         (build_instruction): Ditto for LL.
 881
 882 start-sanitize-tx19
 883 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 884
 885         * mips/configure.in, mips/gencode: Add tx19/r1900.
 886
 887 end-sanitize-tx19
 888 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 889
 890         * configure: Regenerated to track ../common/aclocal.m4 changes.
 891
 892 start-sanitize-r5900
 893 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 894
 895         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 896         for overflow due to ABS of MININT, set result to MAXINT.
 897         (build_instruction): For "psrlvw", signextend bit 31.
 898
 899 end-sanitize-r5900
 900 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 901
 902         * configure: Regenerated to track ../common/aclocal.m4 changes.
 903         * config.in: Ditto.
 904
 905 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 906
 907         * interp.c (sim_open): Add call to sim_analyze_program, update
 908         call to sim_config.
 909
 910 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 911
 912         * interp.c (sim_kill): Delete.
 913         (sim_create_inferior): Add ABFD argument. Set PC from same.
 914         (sim_load): Move code initializing trap handlers from here.
 915         (sim_open): To here.
 916         (sim_load): Delete, use sim-hload.c.
 917
 918         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 919
 920 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 921
 922         * configure: Regenerated to track ../common/aclocal.m4 changes.
 923         * config.in: Ditto.
 924
 925 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 926
 927         * interp.c (sim_open): Add ABFD argument.
 928         (sim_load): Move call to sim_config from here.
 929         (sim_open): To here.  Check return status.
 930
 931 start-sanitize-r5900
 932         * gencode.c (build_instruction): Do not define x8000000000000000,
 933         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 934
 935 end-sanitize-r5900
 936 start-sanitize-r5900
 937 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 938
 939         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 940         "pdivuw" check for overflow due to signed divide by -1.
 941
 942 end-sanitize-r5900
 943 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 944
 945         * gencode.c (build_instruction): Two arg MADD should
 946         not assign result to $0.
 947
 948 start-sanitize-r5900
 949 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 950
 951         * gencode.c (build_instruction): For "ppac5" use unsigned
 952         arrithmetic so that the sign bit doesn't smear when right shifted.
 953         (build_instruction): For "pdiv" perform sign extension when
 954         storing results in HI and LO.
 955         (build_instructions): For "pdiv" and "pdivbw" check for
 956         divide-by-zero.
 957         (build_instruction): For "pmfhl.slw" update hi part of dest
 958         register as well as low part.
 959         (build_instruction): For "pmfhl" portably handle long long values.
 960         (build_instruction): For "pmfhl.sh" correctly negative values.
 961         Store half words 2 and three in the correct place.
 962         (build_instruction): For "psllvw", sign extend value after shift.
 963
 964 end-sanitize-r5900
 965 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
 966
 967         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
 968         * sim/mips/configure.in: Regenerate.
 969
 970 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 971
 972         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 973         signed8, unsigned8 et.al. types.
 974
 975 start-sanitize-r5900
 976         * gencode.c (build_instruction): For PMULTU* do not sign extend
 977         registers.  Make generated code easier to debug.
 978
 979 end-sanitize-r5900
 980         * interp.c (SUB_REG_FETCH): Handle both little and big endian
 981         hosts when selecting subreg.
 982
 983 start-sanitize-r5900
 984 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
 985
 986         * gencode.c (type_for_data_len): For 32bit operations concerned
 987         with overflow, perform op using 64bits.
 988         (build_instruction): For PADD, always compute operation using type
 989         returned by type_for_data_len.
 990         (build_instruction): For PSUBU, when overflow, saturate to zero as
 991         actually underflow.
 992
 993 end-sanitize-r5900
 994 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
 995
 996 start-sanitize-r5900
 997         * gencode.c (build_instruction): Handle "pext5" according to
 998         version 1.95 of the r5900 ISA.
 999
1000         * gencode.c (build_instruction): Handle "ppac5" according to
1001         version 1.95 of the r5900 ISA.
1002
1003 end-sanitize-r5900
1004         * interp.c (sim_engine_run): Reset the ZERO register to zero
1005         regardless of FEATURE_WARN_ZERO.
1006         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1007
1008 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1009
1010         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1011         (SignalException): For BreakPoints ignore any mode bits and just
1012         save the PC.
1013         (SignalException): Always set the CAUSE register.
1014
1015 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1016
1017         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1018         exception has been taken.
1019
1020         * interp.c: Implement the ERET and mt/f sr instructions.
1021
1022 start-sanitize-r5900
1023 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1024
1025         * gencode.c (build_instruction): For paddu, extract unsigned
1026         sub-fields.
1027
1028         * gencode.c (build_instruction): Saturate padds instead of padd
1029         instructions.
1030
1031 end-sanitize-r5900
1032 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1033
1034         * interp.c (SignalException): Don't bother restarting an
1035         interrupt.
1036
1037 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1038
1039         * interp.c (SignalException): Really take an interrupt.
1040         (interrupt_event): Only deliver interrupts when enabled.
1041
1042 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1043
1044         * interp.c (sim_info): Only print info when verbose.
1045         (sim_info) Use sim_io_printf for output.
1046
1047 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1048
1049         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1050         mips architectures.
1051
1052 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         * interp.c (sim_do_command): Check for common commands if a
1055         simulator specific command fails.
1056
1057 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1058
1059         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1060         and simBE when DEBUG is defined.
1061
1062 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1063
1064         * interp.c (interrupt_event): New function.  Pass exception event
1065         onto exception handler.
1066
1067         * configure.in: Check for stdlib.h.
1068         * configure: Regenerate.
1069
1070         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1071         variable declaration.
1072         (build_instruction): Initialize memval1.
1073         (build_instruction): Add UNUSED attribute to byte, bigend,
1074         reverse.
1075         (build_operands): Ditto.
1076
1077         * interp.c: Fix GCC warnings.
1078         (sim_get_quit_code): Delete.
1079
1080         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1081         * Makefile.in: Ditto.
1082         * configure: Re-generate.
1083
1084         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1085
1086 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1087
1088         * interp.c (mips_option_handler): New function parse argumes using
1089         sim-options.
1090         (myname): Replace with STATE_MY_NAME.
1091         (sim_open): Delete check for host endianness - performed by
1092         sim_config.
1093         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1094         (sim_open): Move much of the initialization from here.
1095         (sim_load): To here.  After the image has been loaded and
1096         endianness set.
1097         (sim_open): Move ColdReset from here.
1098         (sim_create_inferior): To here.
1099         (sim_open): Make FP check less dependant on host endianness.
1100
1101         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1102         run.
1103         * interp.c (sim_set_callbacks): Delete.
1104
1105         * interp.c (membank, membank_base, membank_size): Replace with
1106         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1107         (sim_open): Remove call to callback->init. gdb/run do this.
1108
1109         * interp.c: Update
1110
1111         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1112
1113         * interp.c (big_endian_p): Delete, replaced by
1114         current_target_byte_order.
1115
1116 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1117
1118         * interp.c (host_read_long, host_read_word, host_swap_word,
1119         host_swap_long): Delete. Using common sim-endian.
1120         (sim_fetch_register, sim_store_register): Use H2T.
1121         (pipeline_ticks): Delete.  Handled by sim-events.
1122         (sim_info): Update.
1123         (sim_engine_run): Update.
1124
1125 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1126
1127         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1128         reason from here.
1129         (SignalException): To here. Signal using sim_engine_halt.
1130         (sim_stop_reason): Delete, moved to common.
1131
1132 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1133
1134         * interp.c (sim_open): Add callback argument.
1135         (sim_set_callbacks): Delete SIM_DESC argument.
1136         (sim_size): Ditto.
1137
1138 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1139
1140         * Makefile.in (SIM_OBJS): Add common modules.
1141
1142         * interp.c (sim_set_callbacks): Also set SD callback.
1143         (set_endianness, xfer_*, swap_*): Delete.
1144         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1145         Change to functions using sim-endian macros.
1146         (control_c, sim_stop): Delete, use common version.
1147         (simulate): Convert into.
1148         (sim_engine_run): This function.
1149         (sim_resume): Delete.
1150
1151         * interp.c (simulation): New variable - the simulator object.
1152         (sim_kind): Delete global - merged into simulation.
1153         (sim_load): Cleanup.  Move PC assignment from here.
1154         (sim_create_inferior): To here.
1155
1156         * sim-main.h: New file.
1157         * interp.c (sim-main.h): Include.
1158
1159 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1160
1161         * configure: Regenerated to track ../common/aclocal.m4 changes.
1162
1163 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1164
1165         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1166
1167 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1168
1169         * gencode.c (build_instruction): DIV instructions: check
1170         for division by zero and integer overflow before using
1171         host's division operation.
1172
1173 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1174
1175         * Makefile.in (SIM_OBJS): Add sim-load.o.
1176         * interp.c: #include bfd.h.
1177         (target_byte_order): Delete.
1178         (sim_kind, myname, big_endian_p): New static locals.
1179         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1180         after argument parsing.  Recognize -E arg, set endianness accordingly.
1181         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1182         load file into simulator.  Set PC from bfd.
1183         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1184         (set_endianness): Use big_endian_p instead of target_byte_order.
1185
1186 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1187
1188         * interp.c (sim_size): Delete prototype - conflicts with
1189         definition in remote-sim.h.  Correct definition.
1190
1191 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1192
1193         * configure: Regenerated to track ../common/aclocal.m4 changes.
1194         * config.in: Ditto.
1195
1196 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1197
1198         * interp.c (sim_open): New arg `kind'.
1199
1200         * configure: Regenerated to track ../common/aclocal.m4 changes.
1201
1202 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1203
1204         * configure: Regenerated to track ../common/aclocal.m4 changes.
1205
1206 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1207
1208         * interp.c (sim_open): Set optind to 0 before calling getopt.
1209
1210 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1211
1212         * configure: Regenerated to track ../common/aclocal.m4 changes.
1213
1214 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1215
1216         * interp.c : Replace uses of pr_addr with pr_uword64
1217         where the bit length is always 64 independent of SIM_ADDR.
1218         (pr_uword64) : added.
1219
1220 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1221
1222         * configure: Re-generate.
1223
1224 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1225
1226         * configure: Regenerate to track ../common/aclocal.m4 changes.
1227
1228 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1229
1230         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1231         in argv form.
1232         (other sim_*): New SIM_DESC argument.
1233
1234 start-sanitize-r5900
1235 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1236
1237         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1238         Change values to avoid overloading DOUBLEWORD which is tested
1239         for all insns.
1240         * gencode.c: reinstate "offending code".
1241
1242 end-sanitize-r5900
1243 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1244
1245         * interp.c: Fix printing of addresses for non-64-bit targets.
1246         (pr_addr): Add function to print address based on size.
1247 start-sanitize-r5900
1248         * gencode.c: #ifdef out offending code until a permanent fix
1249         can be added.  Code is causing build errors for non-5900 mips targets.
1250 end-sanitize-r5900
1251
1252 start-sanitize-r5900
1253 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1254
1255         * gencode.c (process_instructions): Correct test for ISA dependent
1256         architecture bits in isa field of MIPS_DECODE.
1257
1258 end-sanitize-r5900
1259 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1260
1261         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1262
1263 start-sanitize-r5900
1264 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1265
1266         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1267         PMADDUW.
1268
1269 end-sanitize-r5900
1270 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1271
1272         * gencode.c (build_mips16_operands): Correct computation of base
1273         address for extended PC relative instruction.
1274
1275 start-sanitize-r5900
1276 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1277
1278         * Makefile.in, configure, configure.in, gencode.c,
1279         interp.c, support.h: add r5900.
1280
1281 end-sanitize-r5900
1282 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1283
1284         * interp.c (mips16_entry): Add support for floating point cases.
1285         (SignalException): Pass floating point cases to mips16_entry.
1286         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1287         registers.
1288         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1289         or fmt_word.
1290         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1291         and then set the state to fmt_uninterpreted.
1292         (COP_SW): Temporarily set the state to fmt_word while calling
1293         ValueFPR.
1294
1295 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1296
1297         * gencode.c (build_instruction): The high order may be set in the
1298         comparison flags at any ISA level, not just ISA 4.
1299
1300 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1301
1302         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1303         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1304         * configure.in: sinclude ../common/aclocal.m4.
1305         * configure: Regenerated.
1306
1307 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1308
1309         * configure: Rebuild after change to aclocal.m4.
1310
1311 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1312
1313         * configure configure.in Makefile.in:  Update to new configure
1314         scheme which is more compatible with WinGDB builds.
1315         * configure.in:  Improve comment on how to run autoconf.
1316         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1317         * Makefile.in:  Use autoconf substitution to install common
1318         makefile fragment.
1319
1320 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1321
1322         * gencode.c (build_instruction): Use BigEndianCPU instead of
1323         ByteSwapMem.
1324
1325 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1326
1327         * interp.c (sim_monitor): Make output to stdout visible in
1328         wingdb's I/O log window.
1329
1330 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1331
1332         * support.h: Undo previous change to SIGTRAP
1333         and SIGQUIT values.
1334
1335 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1336
1337         * interp.c (store_word, load_word): New static functions.
1338         (mips16_entry): New static function.
1339         (SignalException): Look for mips16 entry and exit instructions.
1340         (simulate): Use the correct index when setting fpr_state after
1341         doing a pending move.
1342
1343 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1344
1345         * interp.c: Fix byte-swapping code throughout to work on
1346         both little- and big-endian hosts.
1347
1348 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1349
1350         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1351         with gdb/config/i386/xm-windows.h.
1352
1353 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1354
1355         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1356         that messes up arithmetic shifts.
1357
1358 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1359
1360         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1361         SIGTRAP and SIGQUIT for _WIN32.
1362
1363 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1364
1365         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1366         force a 64 bit multiplication.
1367         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1368         destination register is 0, since that is the default mips16 nop
1369         instruction.
1370
1371 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1372
1373         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1374         (build_endian_shift): Don't check proc64.
1375         (build_instruction): Always set memval to uword64.  Cast op2 to
1376         uword64 when shifting it left in memory instructions.  Always use
1377         the same code for stores--don't special case proc64.
1378
1379         * gencode.c (build_mips16_operands): Fix base PC value for PC
1380         relative operands.
1381         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1382         jal instruction.
1383         * interp.c (simJALDELAYSLOT): Define.
1384         (JALDELAYSLOT): Define.
1385         (INDELAYSLOT, INJALDELAYSLOT): Define.
1386         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1387
1388 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1389
1390         * interp.c (sim_open): add flush_cache as a PMON routine
1391         (sim_monitor): handle flush_cache by ignoring it
1392
1393 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1394
1395         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1396         BigEndianMem.
1397         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1398         (BigEndianMem): Rename to ByteSwapMem and change sense.
1399         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1400         BigEndianMem references to !ByteSwapMem.
1401         (set_endianness): New function, with prototype.
1402         (sim_open): Call set_endianness.
1403         (sim_info): Use simBE instead of BigEndianMem.
1404         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1405         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1406         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1407         ifdefs, keeping the prototype declaration.
1408         (swap_word): Rewrite correctly.
1409         (ColdReset): Delete references to CONFIG.  Delete endianness related
1410         code; moved to set_endianness.
1411
1412 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1413
1414         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1415         * interp.c (CHECKHILO): Define away.
1416         (simSIGINT): New macro.
1417         (membank_size): Increase from 1MB to 2MB.
1418         (control_c): New function.
1419         (sim_resume): Rename parameter signal to signal_number.  Add local
1420         variable prev.  Call signal before and after simulate.
1421         (sim_stop_reason): Add simSIGINT support.
1422         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1423         functions always.
1424         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1425         if logfh is NULL.
1426         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1427         a call to sim_warning.
1428
1429 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1430
1431         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1432         16 bit instructions.
1433
1434 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1435
1436         Add support for mips16 (16 bit MIPS implementation):
1437         * gencode.c (inst_type): Add mips16 instruction encoding types.
1438         (GETDATASIZEINSN): Define.
1439         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1440         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1441         mtlo.
1442         (MIPS16_DECODE): New table, for mips16 instructions.
1443         (bitmap_val): New static function.
1444         (struct mips16_op): Define.
1445         (mips16_op_table): New table, for mips16 operands.
1446         (build_mips16_operands): New static function.
1447         (process_instructions): If PC is odd, decode a mips16
1448         instruction.  Break out instruction handling into new
1449         build_instruction function.
1450         (build_instruction): New static function, broken out of
1451         process_instructions.  Check modifiers rather than flags for SHIFT
1452         bit count and m[ft]{hi,lo} direction.
1453         (usage): Pass program name to fprintf.
1454         (main): Remove unused variable this_option_optind.  Change
1455         ``*loptarg++'' to ``loptarg++''.
1456         (my_strtoul): Parenthesize && within ||.
1457         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1458         (simulate): If PC is odd, fetch a 16 bit instruction, and
1459         increment PC by 2 rather than 4.
1460         * configure.in: Add case for mips16*-*-*.
1461         * configure: Rebuild.
1462
1463 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1464
1465         * interp.c: Allow -t to enable tracing in standalone simulator.
1466         Fix garbage output in trace file and error messages.
1467
1468 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1469
1470         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1471         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1472         * configure.in: Simplify using macros in ../common/aclocal.m4.
1473         * configure: Regenerated.
1474         * tconfig.in: New file.
1475
1476 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1477
1478         * interp.c: Fix bugs in 64-bit port.
1479         Use ansi function declarations for msvc compiler.
1480         Initialize and test file pointer in trace code.
1481         Prevent duplicate definition of LAST_EMED_REGNUM.
1482
1483 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1484
1485         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1486
1487 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1488
1489         * interp.c (SignalException): Check for explicit terminating
1490         breakpoint value.
1491         * gencode.c: Pass instruction value through SignalException()
1492         calls for Trap, Breakpoint and Syscall.
1493
1494 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1495
1496         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1497         only used on those hosts that provide it.
1498         * configure.in: Add sqrt() to list of functions to be checked for.
1499         * config.in: Re-generated.
1500         * configure: Re-generated.
1501
1502 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1503
1504         * gencode.c (process_instructions): Call build_endian_shift when
1505         expanding STORE RIGHT, to fix swr.
1506         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1507         clear the high bits.
1508         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1509         Fix float to int conversions to produce signed values.
1510
1511 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1512
1513         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1514         (process_instructions): Correct handling of nor instruction.
1515         Correct shift count for 32 bit shift instructions. Correct sign
1516         extension for arithmetic shifts to not shift the number of bits in
1517         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1518         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1519         Fix madd.
1520         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1521         It's OK to have a mult follow a mult.  What's not OK is to have a
1522         mult follow an mfhi.
1523         (Convert): Comment out incorrect rounding code.
1524
1525 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1526
1527         * interp.c (sim_monitor): Improved monitor printf
1528         simulation. Tidied up simulator warnings, and added "--log" option
1529         for directing warning message output.
1530         * gencode.c: Use sim_warning() rather than WARNING macro.
1531
1532 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1533
1534         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1535         getopt1.o, rather than on gencode.c.  Link objects together.
1536         Don't link against -liberty.
1537         (gencode.o, getopt.o, getopt1.o): New targets.
1538         * gencode.c: Include <ctype.h> and "ansidecl.h".
1539         (AND): Undefine after including "ansidecl.h".
1540         (ULONG_MAX): Define if not defined.
1541         (OP_*): Don't define macros; now defined in opcode/mips.h.
1542         (main): Call my_strtoul rather than strtoul.
1543         (my_strtoul): New static function.
1544
1545 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1546
1547         * gencode.c (process_instructions):  Generate word64 and uword64
1548         instead of `long long' and `unsigned long long' data types.
1549         * interp.c:  #include sysdep.h to get signals, and define default
1550         for SIGBUS.
1551         * (Convert):  Work around for Visual-C++ compiler bug with type
1552         conversion.
1553         * support.h:  Make things compile under Visual-C++ by using
1554         __int64 instead of `long long'.  Change many refs to long long
1555         into word64/uword64 typedefs.
1556
1557 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1558
1559         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1560         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1561         (docdir): Removed.
1562         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1563         (AC_PROG_INSTALL): Added.
1564         (AC_PROG_CC): Moved to before configure.host call.
1565         * configure: Rebuilt.
1566
1567 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1568
1569         * configure.in: Define @SIMCONF@ depending on mips target.
1570         * configure: Rebuild.
1571         * Makefile.in (run): Add @SIMCONF@ to control simulator
1572         construction.
1573         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1574         * interp.c: Remove some debugging, provide more detailed error
1575         messages, update memory accesses to use LOADDRMASK.
1576
1577 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1578
1579         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1580         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1581         stamp-h.
1582         * configure: Rebuild.
1583         * config.in: New file, generated by autoheader.
1584         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1585         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1586         HAVE_ANINT and HAVE_AINT, as appropriate.
1587         * Makefile.in (run): Use @LIBS@ rather than -lm.
1588         (interp.o): Depend upon config.h.
1589         (Makefile): Just rebuild Makefile.
1590         (clean): Remove stamp-h.
1591         (mostlyclean): Make the same as clean, not as distclean.
1592         (config.h, stamp-h): New targets.
1593
1594 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1595
1596         * interp.c (ColdReset): Fix boolean test. Make all simulator
1597         globals static.
1598
1599 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1600
1601         * interp.c (xfer_direct_word, xfer_direct_long,
1602         swap_direct_word, swap_direct_long, xfer_big_word,
1603         xfer_big_long, xfer_little_word, xfer_little_long,
1604         swap_word,swap_long): Added.
1605         * interp.c (ColdReset): Provide function indirection to
1606         host<->simulated_target transfer routines.
1607         * interp.c (sim_store_register, sim_fetch_register): Updated to
1608         make use of indirected transfer routines.
1609
1610 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1611
1612         * gencode.c (process_instructions): Ensure FP ABS instruction
1613         recognised.
1614         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1615         system call support.
1616
1617 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1618
1619         * interp.c (sim_do_command): Complain if callback structure not
1620         initialised.
1621
1622 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1623
1624         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1625         support for Sun hosts.
1626         * Makefile.in (gencode): Ensure the host compiler and libraries
1627         used for cross-hosted build.
1628
1629 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1630
1631         * interp.c, gencode.c: Some more (TODO) tidying.
1632
1633 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1634
1635         * gencode.c, interp.c: Replaced explicit long long references with
1636         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1637         * support.h (SET64LO, SET64HI): Macros added.
1638
1639 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1640
1641         * configure: Regenerate with autoconf 2.7.
1642
1643 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1644
1645         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1646         * support.h: Remove superfluous "1" from #if.
1647         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1648
1649 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1650
1651         * interp.c (StoreFPR): Control UndefinedResult() call on
1652         WARN_RESULT manifest.
1653
1654 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1655
1656         * gencode.c: Tidied instruction decoding, and added FP instruction
1657         support.
1658
1659         * interp.c: Added dineroIII, and BSD profiling support. Also
1660         run-time FP handling.
1661
1662 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1663
1664         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1665         gencode.c, interp.c, support.h: created.