sim/mips/ChangeLog

   1 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
   4
   5 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
   6
   7         * Makefile.in: Set ASAN_OPTIONS when running igen.
   8
   9 2021-04-04  Steve Ellcey  <sellcey@mips.com>
  10             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  11
  12         * interp.c (sim_monitor): Add switch entries for unlink (13),
  13         lseek (14), and stat (15).
  14
  15 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * Makefile.in (../igen/igen): Delete rule.
  18         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  19
  20 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * aclocal.m4, configure: Regenerate.
  23
  24 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * configure: Regenerate.
  27
  28 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * Makefile.in (SIM_EXTRA_ALL): Delete.
  31         (all): New target.
  32
  33 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  34
  35         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  36         * aclocal.m4, configure: Regenerate.
  37
  38 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  41         * aclocal.m4, configure: Regenerate.
  42
  43 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  46
  47 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * configure: Regenerate.
  50
  51 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  52
  53         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  54
  55 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  56
  57         * config.in, configure: Regenerate.
  58         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  59         and strings.h include.
  60
  61 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * configure: Regenerate.
  64
  65 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  68         * configure: Regenerate.
  69
  70 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * configure: Regenerate.
  73
  74 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * configure: Regenerate.
  77
  78 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  79
  80         *  sim-main.c: Include <stdlib.h>.
  81
  82 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  83
  84         * cp1.c: Include <stdlib.h>.
  85
  86 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  87
  88         * configure: Re-generate.
  89
  90 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  91
  92         * configure: Regenerate.
  93
  94 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  95
  96         PR sim/20808
  97         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  98         and SD to sd.
  99
 100 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 101
 102         PR sim/20809
 103         * mips.igen (check_u64): Enable for `r3900'.
 104
 105 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 108         STATE_PROG_BFD (sd).
 109         * configure: Regenerate.
 110
 111 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 112             Maciej W. Rozycki  <macro@imgtec.com>
 113
 114         PR sim/19441
 115         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 116         `micromips64' and `micromipsdsp' only.
 117         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 118         (do_micromips_jalr, do_micromips_jal): Likewise.
 119         (compute_movep_src_reg): Likewise.
 120         (compute_andi16_imm): Likewise.
 121         (convert_fmt_micromips): Likewise.
 122         (convert_fmt_micromips_cvt_d): Likewise.
 123         (convert_fmt_micromips_cvt_s): Likewise.
 124         (FMT_MICROMIPS): Likewise.
 125         (FMT_MICROMIPS_CVT_D): Likewise.
 126         (FMT_MICROMIPS_CVT_S): Likewise.
 127
 128 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 129
 130         * interp.c: Include elf-bfd.h.
 131         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 132         ELFCLASS32.
 133
 134 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 135
 136         * config.in, configure: Regenerate.
 137
 138 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 139
 140         * configure: Regenerate.
 141
 142 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * configure: Regenerate.
 145
 146 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * configure: Regenerate.
 149
 150 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * configure: Regenerate.
 153
 154 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 157         * configure: Regenerate.
 158
 159 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 162         * configure: Regenerate.
 163
 164 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * configure: Regenerate.
 167
 168 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * configure: Regenerate.
 171
 172 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * config.in, configure: Regenerate.
 175
 176 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * interp.c (sim_open): Mark argv const.
 179         (sim_create_inferior): Mark argv and env const.
 180
 181 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 182
 183         * configure: Regenerate.
 184
 185 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * interp.c (sim_open): Update sim_parse_args comment.
 188
 189 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 192         * configure: Regenerate.
 193
 194 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 195
 196         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 197         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 198         * configure: Regenerate.
 199         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 200
 201 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * dv-tx3904cpu.c (CPU, SD): Delete.
 204
 205 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 208         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 209         (sim_store_register): Rename to ...
 210         (mips_reg_store): ... this.  Delete local cpu var.
 211         Update sim_io_eprintf calls.
 212         (sim_fetch_register): Rename to ...
 213         (mips_reg_fetch): ... this.  Delete local cpu var.
 214         Update sim_io_eprintf calls.
 215
 216 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 219
 220 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * config.in, configure: Regenerate.
 223
 224 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * interp.c (sim_write, sim_read): Delete.
 227         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 228         (load_word): Likewise.
 229         * micromips.igen (cache): Likewise.
 230         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 231         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 232         do_store_left, do_store_right, do_load_double, do_store_double):
 233         Likewise.
 234         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 235         (do_prefx): Likewise.
 236         * sim-main.c (address_translation, prefetch): Delete.
 237         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 238         paddr=vaddr.
 239         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 240         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 241         (LoadMemory, StoreMemory): Delete CCA arg.
 242
 243 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 244
 245         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 246         * configure: Regenerated.
 247
 248 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 251         * tconfig.h: Delete.
 252
 253 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 254
 255         * tconfig.h (SIM_HANDLES_LMA): Delete.
 256
 257 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * sim-main.h (WITH_WATCHPOINTS): Delete.
 260
 261 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 262
 263         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 264
 265 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 266
 267         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 268
 269 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 270
 271         * micromips.igen (process_isa_mode): Fix left shift of negative
 272         value.
 273
 274 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 277
 278 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 279
 280         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 281
 282 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * interp.c (sim_close): Rename to ...
 285         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 286         sim_io_shutdown.
 287         * sim-main.h (mips_sim_close): Declare.
 288         (SIM_CLOSE_HOOK): Define.
 289
 290 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 291             Ali Lown  <ali.lown@imgtec.com>
 292
 293         * Makefile.in (tmp-micromips): New rule.
 294         (tmp-mach-multi): Add support for micromips.
 295         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 296         that works for both mips64 and micromips64.
 297         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 298         micromips32.
 299         Add build support for micromips.
 300         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 301         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 302         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 303         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 304         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 305         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 306         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 307         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 308         Refactored instruction code to use these functions.
 309         * dsp2.igen: Refactored instruction code to use the new functions.
 310         * interp.c (decode_coproc): Refactored to work with any instruction
 311         encoding.
 312         (isa_mode): New variable
 313         (RSVD_INSTRUCTION): Changed to 0x00000039.
 314         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 315         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 316         * micromips.dc: New file.
 317         * micromips.igen: New file.
 318         * micromips16.dc: New file.
 319         * micromipsdsp.igen: New file.
 320         * micromipsrun.c: New file.
 321         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 322         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 323         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 324         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 325         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 326         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 327         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 328         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 329         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 330         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 331         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 332         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 333         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 334         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 335         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 336         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 337         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 338         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 339         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 340         instructions.
 341         Refactored instruction code to use these functions.
 342         (RSVD): Changed to use new reserved instruction.
 343         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 344         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 345         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 346         do_store_double):  Added micromips32 and micromips64 models.
 347         Added include for micromips.igen and micromipsdsp.igen
 348         Add micromips32 and micromips64 models.
 349         (DecodeCoproc): Updated to use new macro definition.
 350         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 351         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 352         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 353         Refactored instruction code to use these functions.
 354         * sim-main.h (CP0_operation): New enum.
 355         (DecodeCoproc): Updated macro.
 356         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 357         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 358         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 359         ISA_MODE_MICROMIPS): New defines.
 360         (sim_state): Add isa_mode field.
 361
 362 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 363
 364         * configure: Regenerate.
 365
 366 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 367
 368         * configure.ac: Change configure.in to configure.ac.
 369         * configure: Regenerate.
 370
 371 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 372
 373         * configure: Regenerate.
 374
 375 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 376
 377         * interp.c [TRACE]: Delete.
 378         (TRACE): Change to WITH_TRACE_ANY_P.
 379         [!WITH_TRACE_ANY_P] (open_trace): Define.
 380         (mips_option_handler, open_trace, sim_close, dotrace):
 381         Change defined(TRACE) to WITH_TRACE_ANY_P.
 382         (sim_open): Delete TRACE ifdef check.
 383         * sim-main.c (load_memory): Delete TRACE ifdef check.
 384         (store_memory): Likewise.
 385         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 386         [!WITH_TRACE_ANY_P] (dotrace): Define.
 387
 388 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 389
 390         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 391         comments.
 392
 393 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 394
 395         * sim-main.h (SIM_CPU): Delete.
 396
 397 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * sim-main.h (sim_cia): Delete.
 400
 401 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 402
 403         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 404         PU_PC_GET.
 405         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 406         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 407         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 408         CIA_SET to CPU_PC_SET.
 409         * sim-main.h (CIA_GET, CIA_SET): Delete.
 410
 411 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 412
 413         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 414         * sim-main.h (STATE_CPU): Delete.
 415
 416 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 417
 418         * configure: Regenerate.
 419
 420 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 421
 422         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 423         * interp.c (mips_pc_get, mips_pc_set): New functions.
 424         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 425         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 426         (sim_pc_get): Delete.
 427         * sim-main.h (SIM_CPU): Define.
 428         (struct sim_state): Change cpu to an array of pointers.
 429         (STATE_CPU): Drop &.
 430
 431 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 432
 433         * interp.c (mips_option_handler, open_trace, sim_close,
 434         sim_write, sim_read, sim_store_register, sim_fetch_register,
 435         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 436         prototypes.
 437         (sim_open): Convert old style prototype.  Change casts with
 438         sim_write to unsigned char *.
 439         (fetch_str): Change null to unsigned char, and change cast to
 440         unsigned char *.
 441         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 442         unsigned char *.
 443
 444 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 445
 446         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 447
 448 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 449
 450         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 451
 452 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 453
 454         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 455
 456 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 457
 458         * config.in, configure: Regenerate.
 459
 460 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * interp.c (sim_pc_get): New function.
 463
 464 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 465
 466         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 467         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 468
 469 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 470
 471         * configure: Regenerate.
 472
 473 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 474
 475         * configure: Regenerate.
 476
 477 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 478
 479         * configure: Regenerate.
 480         * configure.ac (mips_extra_objs): Delete.
 481         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 482         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 483
 484 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 485
 486         * configure: Regenerate.
 487         * configure.ac: Delete sim_hw checks for dv-sockser.
 488
 489 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 490
 491         * config.in, configure: Regenerate.
 492         * tconfig.in: Rename file ...
 493         * tconfig.h: ... here.
 494
 495 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 496
 497         * tconfig.in: Delete includes.
 498         [HAVE_DV_SOCKSER]: Delete.
 499
 500 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 501
 502         * Makefile.in (SIM_RUN_OBJS): Delete.
 503
 504 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 505
 506         * configure.ac (AC_CHECK_HEADERS): Delete.
 507         * aclocal.m4, configure: Regenerate.
 508
 509 2014-08-19  Alan Modra  <amodra@gmail.com>
 510
 511         * configure: Regenerate.
 512
 513 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 514
 515         * configure: Regenerate.
 516         * config.in: Regenerate.
 517
 518 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 519
 520         * configure: Regenerate.
 521
 522 2013-09-23  Alan Modra  <amodra@gmail.com>
 523
 524         * configure: Regenerate.
 525
 526 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 527
 528         * aclocal.m4, configure: Regenerate.
 529
 530 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 531
 532         * configure: Rebuild.
 533
 534 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 535
 536         * configure: Regenerate.
 537
 538 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 539
 540         * configure.ac: Address use of dv-sockser.o.
 541         * tconfig.in: Conditionalize use of dv_sockser_install.
 542         * configure: Regenerated.
 543         * config.in: Regenerated.
 544
 545 2012-10-04  Chao-ying Fu  <fu@mips.com>
 546             Steve Ellcey  <sellcey@mips.com>
 547
 548         * mips/mips3264r2.igen (rdhwr): New.
 549
 550 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 551
 552         * configure.ac: Always link against dv-sockser.o.
 553         * configure: Regenerate.
 554
 555 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 556
 557         * config.in, configure: Regenerate.
 558
 559 2012-05-18  Nick Clifton  <nickc@redhat.com>
 560
 561         PR 14072
 562         * interp.c: Include config.h before system header files.
 563
 564 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 565
 566         * aclocal.m4, config.in, configure: Regenerate.
 567
 568 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 569
 570         * aclocal.m4: New file.
 571         * configure: Regenerate.
 572
 573 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 574
 575         * configure: Regenerate after common/acinclude.m4 update.
 576
 577 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 578
 579         * configure.ac: Change include to common/acinclude.m4.
 580
 581 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 582
 583         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 584         call.  Replace common.m4 include with SIM_AC_COMMON.
 585         * configure: Regenerate.
 586
 587 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 588
 589         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 590         $(SIM_EXTRA_DEPS).
 591         (tmp-mach-multi): Exit early when igen fails.
 592
 593 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 594
 595         * interp.c (sim_do_command): Delete.
 596
 597 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 598
 599         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 600         (tx3904sio_fifo_reset): Likewise.
 601         * interp.c (sim_monitor): Likewise.
 602
 603 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 604
 605         * interp.c (sim_write): Add const to buffer arg.
 606
 607 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 608
 609         * interp.c: Don't include sysdep.h
 610
 611 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 612
 613         * configure: Regenerate.
 614
 615 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 616
 617         * config.in: Regenerate.
 618         * configure: Likewise.
 619
 620         * configure: Regenerate.
 621
 622 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 623
 624         * configure: Regenerate to track ../common/common.m4 changes.
 625         * config.in: Ditto.
 626
 627 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 628             Daniel Jacobowitz  <dan@codesourcery.com>
 629             Joseph Myers  <joseph@codesourcery.com>
 630
 631         * configure: Regenerate.
 632
 633 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 634
 635         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 636         that unconditionally allows fmt_ps.
 637         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 638         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 639         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 640         filter from 64,f to 32,f.
 641         (PREFX): Change filter from 64 to 32.
 642         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 643         that use do_load_double instead of do_load.  Make both LUXC1
 644         versions unpredictable if SizeFGR () != 64.
 645         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 646         instead of do_store.  Remove unused variable.  Make both SUXC1
 647         versions unpredictable if SizeFGR () != 64.
 648
 649 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 650
 651         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 652         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 653         shifts for that case.
 654
 655 2007-09-04  Nick Clifton  <nickc@redhat.com>
 656
 657         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 658         (display_mem_info): New static variable.
 659         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 660         (mips_options): Add info-memory and memory-info.
 661         (sim_open): After processing the command line and board
 662         specification, check display_mem_info.  If it is set then
 663         call the real handler for the --memory-info command line
 664         switch.
 665
 666 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 667
 668         * configure.ac: Change license of multi-run.c to GPL version 3.
 669         * configure: Regenerate.
 670
 671 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 672
 673         * configure.ac, configure: Revert last patch.
 674
 675 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 676
 677         * configure.ac (sim_mipsisa3264_configs): New variable.
 678         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 679         every configuration support all four targets, using the triplet to
 680         determine the default.
 681         * configure: Regenerate.
 682
 683 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 684
 685         * Makefile.in (m16run.o): New rule.
 686
 687 2007-05-15  Thiemo Seufer  <ths@mips.com>
 688
 689         * mips3264r2.igen (DSHD): Fix compile warning.
 690
 691 2007-05-14  Thiemo Seufer  <ths@mips.com>
 692
 693         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 694         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 695         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 696         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 697         for mips32r2.
 698
 699 2007-03-01  Thiemo Seufer  <ths@mips.com>
 700
 701         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 702         and mips64.
 703
 704 2007-02-20  Thiemo Seufer  <ths@mips.com>
 705
 706         * dsp.igen: Update copyright notice.
 707         * dsp2.igen: Fix copyright notice.
 708
 709 2007-02-20  Thiemo Seufer  <ths@mips.com>
 710             Chao-Ying Fu  <fu@mips.com>
 711
 712         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 713         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 714         Add dsp2 to sim_igen_machine.
 715         * configure: Regenerate.
 716         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 717         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 718         (mulq_rs.ph): Use do_ph_mulq.
 719         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 720         * mips.igen: Add dsp2 model and include dsp2.igen.
 721         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 722         for *mips32r2, *mips64r2, *dsp.
 723         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 724         for *mips32r2, *mips64r2, *dsp2.
 725         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 726
 727 2007-02-19  Thiemo Seufer  <ths@mips.com>
 728             Nigel Stephens  <nigel@mips.com>
 729
 730         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 731         jumps with hazard barrier.
 732
 733 2007-02-19  Thiemo Seufer  <ths@mips.com>
 734             Nigel Stephens  <nigel@mips.com>
 735
 736         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 737         after each call to sim_io_write.
 738
 739 2007-02-19  Thiemo Seufer  <ths@mips.com>
 740             Nigel Stephens  <nigel@mips.com>
 741
 742         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 743         supported by this simulator.
 744         (decode_coproc): Recognise additional CP0 Config registers
 745         correctly.
 746
 747 2007-02-19  Thiemo Seufer  <ths@mips.com>
 748             Nigel Stephens  <nigel@mips.com>
 749             David Ung  <davidu@mips.com>
 750
 751         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 752         uninterpreted formats. If fmt is one of the uninterpreted types
 753         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 754         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 755         (store_fpr): When writing an invalid odd register, set the
 756         matching even register to fmt_unknown, not the following register.
 757         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 758         the the memory window at offset 0 set by --memory-size command
 759         line option.
 760         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 761         point register.
 762         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 763         register.
 764         (sim_monitor): When returning the memory size to the MIPS
 765         application, use the value in STATE_MEM_SIZE, not an arbitrary
 766         hardcoded value.
 767         (cop_lw): Don' mess around with FPR_STATE, just pass
 768         fmt_uninterpreted_32 to StoreFPR.
 769         (cop_sw): Similarly.
 770         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 771         (cop_sd): Similarly.
 772         * mips.igen (not_word_value): Single version for mips32, mips64
 773         and mips16.
 774
 775 2007-02-19  Thiemo Seufer <ths@mips.com>
 776             Nigel Stephens  <nigel@mips.com>
 777
 778         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 779         MBytes.
 780
 781 2007-02-17  Thiemo Seufer  <ths@mips.com>
 782
 783         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 784         configuration.
 785         * configure: Regenerate.
 786
 787 2007-02-17  Thiemo Seufer  <ths@mips.com>
 788
 789         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 790         Add mdmx to sim_igen_machine.
 791         (mipsisa64*-*-*): Likewise. Remove dsp.
 792         (mipsisa32*-*-*): Remove dsp.
 793         * configure: Regenerate.
 794
 795 2007-02-13  Thiemo Seufer  <ths@mips.com>
 796
 797         * configure.ac: Add mips*-sde-elf* target.
 798         * configure: Regenerate.
 799
 800 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 801
 802         * acconfig.h: Remove.
 803         * config.in, configure: Regenerate.
 804
 805 2006-11-07  Thiemo Seufer  <ths@mips.com>
 806
 807         * dsp.igen (do_w_op): Fix compiler warning.
 808
 809 2006-08-29  Thiemo Seufer  <ths@mips.com>
 810             David Ung  <davidu@mips.com>
 811
 812         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 813         sim_igen_machine.
 814         * configure: Regenerate.
 815         * mips.igen (model): Add smartmips.
 816         (MADDU): Increment ACX if carry.
 817         (do_mult): Clear ACX.
 818         (ROR,RORV): Add smartmips.
 819         (include): Include smartmips.igen.
 820         * sim-main.h (ACX): Set to REGISTERS[89].
 821         * smartmips.igen: New file.
 822
 823 2006-08-29  Thiemo Seufer  <ths@mips.com>
 824             David Ung  <davidu@mips.com>
 825
 826         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 827         mips3264r2.igen. Add missing dependency rules.
 828         * m16e.igen: Support for mips16e save/restore instructions.
 829
 830 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 831
 832         * configure: Regenerated.
 833
 834 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 835
 836         * configure: Regenerated.
 837
 838 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 839
 840         * configure: Regenerated.
 841
 842 2006-05-15 Chao-ying Fu  <fu@mips.com>
 843
 844         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 845
 846 2006-04-18  Nick Clifton  <nickc@redhat.com>
 847
 848         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 849         statement.
 850
 851 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 852
 853         * configure: Regenerate.
 854
 855 2005-12-14  Chao-ying Fu  <fu@mips.com>
 856
 857         * Makefile.in (SIM_OBJS): Add dsp.o.
 858         (dsp.o): New dependency.
 859         (IGEN_INCLUDE): Add dsp.igen.
 860         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 861         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 862         * configure: Regenerate.
 863         * mips.igen: Add dsp model and include dsp.igen.
 864         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 865         because these instructions are extended in DSP ASE.
 866         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 867         adding 6 DSP accumulator registers and 1 DSP control register.
 868         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 869         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 870         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 871         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 872         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 873         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 874         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 875         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 876         DSPCR_CCOND_SMASK): New define.
 877         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 878         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 879
 880 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 881
 882         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 883
 884 2005-06-16  David Ung  <davidu@mips.com>
 885             Nigel Stephens  <nigel@mips.com>
 886
 887         * mips.igen: New mips16e model and include m16e.igen.
 888         (check_u64): Add mips16e tag.
 889         * m16e.igen: New file for MIPS16e instructions.
 890         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 891         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 892         models.
 893         * configure: Regenerate.
 894
 895 2005-05-26  David Ung  <davidu@mips.com>
 896
 897         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 898         tags to all instructions which are applicable to the new ISAs.
 899         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 900         vr.igen.
 901         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 902         instructions.
 903         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 904         to mips.igen.
 905         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 906         * configure: Regenerate.
 907
 908 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 909
 910         * configure: Regenerate.
 911
 912 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 913
 914         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 915         explicit call to AC_CONFIG_HEADER.
 916         * configure: Regenerate.
 917
 918 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 919
 920         * configure.ac: Update to use ../common/common.m4.
 921         * configure: Re-generate.
 922
 923 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 924
 925         * configure: Regenerated to track ../common/aclocal.m4 changes.
 926
 927 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 928
 929         * configure.ac: Rename configure.in, require autoconf 2.59.
 930         * configure: Re-generate.
 931
 932 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 933
 934         * configure: Regenerate for ../common/aclocal.m4 update.
 935
 936 2004-09-24  Monika Chaddha  <monika@acmet.com>
 937
 938         Committed by Andrew Cagney.
 939         * m16.igen (CMP, CMPI): Fix assembler.
 940
 941 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 942
 943         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 944         * configure: Regenerate.
 945
 946 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 947
 948         * configure.in (sim_m16_machine): Include mipsIII.
 949         * configure: Regenerate.
 950
 951 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 952
 953         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 954         from COP0_BADVADDR.
 955         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 956
 957 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 958
 959         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 960
 961 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 962
 963         * mips.igen (check_fmt): Remove.
 964         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 965         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 966         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 967         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 968         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 969         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 970         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 971         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 972         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 973         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 974
 975 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 976
 977         * sb1.igen (check_sbx): New function.
 978         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 979
 980 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 981             Richard Sandiford  <rsandifo@redhat.com>
 982
 983         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 984         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 985         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 986         separate implementations for mipsIV and mipsV.  Use new macros to
 987         determine whether the restrictions apply.
 988
 989 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 990
 991         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 992         (check_mult_hilo): Improve comments.
 993         (check_div_hilo): Likewise.  Also, fork off a new version
 994         to handle mips32/mips64 (since there are no hazards to check
 995         in MIPS32/MIPS64).
 996
 997 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 998
 999         * mips.igen (do_dmultx): Fix check for negative operands.
1000
1001 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1002
1003         * Makefile.in (SHELL): Make sure this is defined.
1004         (various): Use $(SHELL) whenever we invoke move-if-change.
1005
1006 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1007
1008         * cp1.c: Tweak attribution slightly.
1009         * cp1.h: Likewise.
1010         * mdmx.c: Likewise.
1011         * mdmx.igen: Likewise.
1012         * mips3d.igen: Likewise.
1013         * sb1.igen: Likewise.
1014
1015 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1016
1017         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1018         unsigned operands.
1019
1020 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1021
1022         * interp.c (sim_open): Rename _bfd to bfd.
1023         (sim_create_inferior): Ditto.
1024
1025 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1026
1027         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1028
1029 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1030
1031         * mips.igen (EI, DI): Remove.
1032
1033 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1034
1035         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1036
1037 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1038             Andrew Cagney  <ac131313@redhat.com>
1039             Gavin Romig-Koch  <gavin@redhat.com>
1040             Graydon Hoare  <graydon@redhat.com>
1041             Aldy Hernandez  <aldyh@redhat.com>
1042             Dave Brolley  <brolley@redhat.com>
1043             Chris Demetriou  <cgd@broadcom.com>
1044
1045         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1046         (sim_mach_default): New variable.
1047         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1048         Add a new simulator generator, MULTI.
1049         * configure: Regenerate.
1050         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1051         (multi-run.o): New dependency.
1052         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1053         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1054         (tmp-multi): Combine them.
1055         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1056         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1057         (distclean-extra): New rule.
1058         * sim-main.h: Include bfd.h.
1059         (MIPS_MACH): New macro.
1060         * mips.igen (vr4120, vr5400, vr5500): New models.
1061         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1062         * vr.igen: Replace with new version.
1063
1064 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1065
1066         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1067         * configure: Regenerate.
1068
1069 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1070
1071         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1072         * mips.igen: Remove all invocations of check_branch_bug and
1073         mark_branch_bug.
1074
1075 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1076
1077         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1078
1079 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1080
1081         * mips.igen (do_load_double, do_store_double): New functions.
1082         (LDC1, SDC1): Rename to...
1083         (LDC1b, SDC1b): respectively.
1084         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1085
1086 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1087
1088         * cp1.c (fp_recip2): Modify initialization expression so that
1089         GCC will recognize it as constant.
1090
1091 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1092
1093         * mdmx.c (SD_): Delete.
1094         (Unpredictable): Re-define, for now, to directly invoke
1095         unpredictable_action().
1096         (mdmx_acc_op): Fix error in .ob immediate handling.
1097
1098 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1099
1100         * interp.c (sim_firmware_command): Initialize `address'.
1101
1102 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1103
1104         * configure: Regenerated to track ../common/aclocal.m4 changes.
1105
1106 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1107             Ed Satterthwaite  <ehs@broadcom.com>
1108
1109         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1110         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1111         * mips.igen: Include mips3d.igen.
1112         (mips3d): New model name for MIPS-3D ASE instructions.
1113         (CVT.W.fmt): Don't use this instruction for word (source) format
1114         instructions.
1115         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1116         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1117         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1118         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1119         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1120         (RSquareRoot1, RSquareRoot2): New macros.
1121         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1122         (fp_rsqrt2): New functions.
1123         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1124         * configure: Regenerate.
1125
1126 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1127             Ed Satterthwaite  <ehs@broadcom.com>
1128
1129         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1130         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1131         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1132         (convert): Note that this function is not used for paired-single
1133         format conversions.
1134         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1135         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1136         (check_fmt_p): Enable paired-single support.
1137         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1138         (PUU.PS): New instructions.
1139         (CVT.S.fmt): Don't use this instruction for paired-single format
1140         destinations.
1141         * sim-main.h (FP_formats): New value 'fmt_ps.'
1142         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1143         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1144
1145 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1146
1147         * mips.igen: Fix formatting of function calls in
1148         many FP operations.
1149
1150 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1151
1152         * mips.igen (MOVN, MOVZ): Trace result.
1153         (TNEI): Print "tnei" as the opcode name in traces.
1154         (CEIL.W): Add disassembly string for traces.
1155         (RSQRT.fmt): Make location of disassembly string consistent
1156         with other instructions.
1157
1158 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1159
1160         * mips.igen (X): Delete unused function.
1161
1162 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1163
1164         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1165
1166 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1167             Ed Satterthwaite  <ehs@broadcom.com>
1168
1169         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1170         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1171         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1172         (fp_nmsub): New prototypes.
1173         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1174         (NegMultiplySub): New defines.
1175         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1176         (MADD.D, MADD.S): Replace with...
1177         (MADD.fmt): New instruction.
1178         (MSUB.D, MSUB.S): Replace with...
1179         (MSUB.fmt): New instruction.
1180         (NMADD.D, NMADD.S): Replace with...
1181         (NMADD.fmt): New instruction.
1182         (NMSUB.D, MSUB.S): Replace with...
1183         (NMSUB.fmt): New instruction.
1184
1185 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1186             Ed Satterthwaite  <ehs@broadcom.com>
1187
1188         * cp1.c: Fix more comment spelling and formatting.
1189         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1190         (denorm_mode): New function.
1191         (fpu_unary, fpu_binary): Round results after operation, collect
1192         status from rounding operations, and update the FCSR.
1193         (convert): Collect status from integer conversions and rounding
1194         operations, and update the FCSR.  Adjust NaN values that result
1195         from conversions.  Convert to use sim_io_eprintf rather than
1196         fprintf, and remove some debugging code.
1197         * cp1.h (fenr_FS): New define.
1198
1199 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1200
1201         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1202         rounding mode to sim FP rounding mode flag conversion code into...
1203         (rounding_mode): New function.
1204
1205 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1206
1207         * cp1.c: Clean up formatting of a few comments.
1208         (value_fpr): Reformat switch statement.
1209
1210 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1211             Ed Satterthwaite  <ehs@broadcom.com>
1212
1213         * cp1.h: New file.
1214         * sim-main.h: Include cp1.h.
1215         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1216         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1217         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1218         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1219         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1220         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1221         * cp1.c: Don't include sim-fpu.h; already included by
1222         sim-main.h.  Clean up formatting of some comments.
1223         (NaN, Equal, Less): Remove.
1224         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1225         (fp_cmp): New functions.
1226         * mips.igen (do_c_cond_fmt): Remove.
1227         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1228         Compare.  Add result tracing.
1229         (CxC1): Remove, replace with...
1230         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1231         (DMxC1): Remove, replace with...
1232         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1233         (MxC1): Remove, replace with...
1234         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1235
1236 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1237
1238         * sim-main.h (FGRIDX): Remove, replace all uses with...
1239         (FGR_BASE): New macro.
1240         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1241         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1242         (NR_FGR, FGR): Likewise.
1243         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1244         * mips.igen: Likewise.
1245
1246 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1247
1248         * cp1.c: Add an FSF Copyright notice to this file.
1249
1250 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1251             Ed Satterthwaite  <ehs@broadcom.com>
1252
1253         * cp1.c (Infinity): Remove.
1254         * sim-main.h (Infinity): Likewise.
1255
1256         * cp1.c (fp_unary, fp_binary): New functions.
1257         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1258         (fp_sqrt): New functions, implemented in terms of the above.
1259         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1260         (Recip, SquareRoot): Remove (replaced by functions above).
1261         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1262         (fp_recip, fp_sqrt): New prototypes.
1263         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1264         (Recip, SquareRoot): Replace prototypes with #defines which
1265         invoke the functions above.
1266
1267 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1268
1269         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1270         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1271         file, remove PARAMS from prototypes.
1272         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1273         simulator state arguments.
1274         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1275         pass simulator state arguments.
1276         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1277         (store_fpr, convert): Remove 'sd' argument.
1278         (value_fpr): Likewise.  Convert to use 'SD' instead.
1279
1280 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1281
1282         * cp1.c (Min, Max): Remove #if 0'd functions.
1283         * sim-main.h (Min, Max): Remove.
1284
1285 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1286
1287         * cp1.c: fix formatting of switch case and default labels.
1288         * interp.c: Likewise.
1289         * sim-main.c: Likewise.
1290
1291 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1292
1293         * cp1.c: Clean up comments which describe FP formats.
1294          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1295
1296 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1297             Ed Satterthwaite  <ehs@broadcom.com>
1298
1299         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1300         Broadcom SiByte SB-1 processor configurations.
1301         * configure: Regenerate.
1302         * sb1.igen: New file.
1303         * mips.igen: Include sb1.igen.
1304         (sb1): New model.
1305         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1306         * mdmx.igen: Add "sb1" model to all appropriate functions and
1307         instructions.
1308         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1309         (ob_func, ob_acc): Reference the above.
1310         (qh_acc): Adjust to keep the same size as ob_acc.
1311         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1312         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1313
1314 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1315
1316         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1317
1318 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1319             Ed Satterthwaite  <ehs@broadcom.com>
1320
1321         * mips.igen (mdmx): New (pseudo-)model.
1322         * mdmx.c, mdmx.igen: New files.
1323         * Makefile.in (SIM_OBJS): Add mdmx.o.
1324         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1325         New typedefs.
1326         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1327         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1328         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1329         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1330         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1331         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1332         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1333         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1334         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1335         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1336         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1337         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1338         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1339         (qh_fmtsel): New macros.
1340         (_sim_cpu): New member "acc".
1341         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1342         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1343
1344 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1345
1346         * interp.c: Use 'deprecated' rather than 'depreciated.'
1347         * sim-main.h: Likewise.
1348
1349 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1350
1351         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1352         which wouldn't compile anyway.
1353         * sim-main.h (unpredictable_action): New function prototype.
1354         (Unpredictable): Define to call igen function unpredictable().
1355         (NotWordValue): New macro to call igen function not_word_value().
1356         (UndefinedResult): Remove.
1357         * interp.c (undefined_result): Remove.
1358         (unpredictable_action): New function.
1359         * mips.igen (not_word_value, unpredictable): New functions.
1360         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1361         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1362         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1363         NotWordValue() to check for unpredictable inputs, then
1364         Unpredictable() to handle them.
1365
1366 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1367
1368         * mips.igen: Fix formatting of calls to Unpredictable().
1369
1370 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1371
1372         * interp.c (sim_open): Revert previous change.
1373
1374 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1375
1376         * interp.c (sim_open): Disable chunk of code that wrote code in
1377         vector table entries.
1378
1379 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1380
1381         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1382         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1383         unused definitions.
1384
1385 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1386
1387         * cp1.c: Fix many formatting issues.
1388
1389 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1390
1391         * cp1.c (fpu_format_name): New function to replace...
1392         (DOFMT): This.  Delete, and update all callers.
1393         (fpu_rounding_mode_name): New function to replace...
1394         (RMMODE): This.  Delete, and update all callers.
1395
1396 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1397
1398         * interp.c: Move FPU support routines from here to...
1399         * cp1.c: Here.  New file.
1400         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1401         (cp1.o): New target.
1402
1403 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1404
1405         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1406         * mips.igen (mips32, mips64): New models, add to all instructions
1407         and functions as appropriate.
1408         (loadstore_ea, check_u64): New variant for model mips64.
1409         (check_fmt_p): New variant for models mipsV and mips64, remove
1410         mipsV model marking fro other variant.
1411         (SLL) Rename to...
1412         (SLLa) this.
1413         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1414         for mips32 and mips64.
1415         (DCLO, DCLZ): New instructions for mips64.
1416
1417 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1418
1419         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1420         immediate or code as a hex value with the "%#lx" format.
1421         (ANDI): Likewise, and fix printed instruction name.
1422
1423 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1424
1425         * sim-main.h (UndefinedResult, Unpredictable): New macros
1426         which currently do nothing.
1427
1428 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1429
1430         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1431         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1432         (status_CU3): New definitions.
1433
1434         * sim-main.h (ExceptionCause): Add new values for MIPS32
1435         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1436         for DebugBreakPoint and NMIReset to note their status in
1437         MIPS32 and MIPS64.
1438         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1439         (SignalExceptionCacheErr): New exception macros.
1440
1441 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1442
1443         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1444         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1445         is always enabled.
1446         (SignalExceptionCoProcessorUnusable): Take as argument the
1447         unusable coprocessor number.
1448
1449 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1450
1451         * mips.igen: Fix formatting of all SignalException calls.
1452
1453 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1454
1455         * sim-main.h (SIGNEXTEND): Remove.
1456
1457 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1458
1459         * mips.igen: Remove gencode comment from top of file, fix
1460         spelling in another comment.
1461
1462 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1463
1464         * mips.igen (check_fmt, check_fmt_p): New functions to check
1465         whether specific floating point formats are usable.
1466         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1467         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1468         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1469         Use the new functions.
1470         (do_c_cond_fmt): Remove format checks...
1471         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1472
1473 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1474
1475         * mips.igen: Fix formatting of check_fpu calls.
1476
1477 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1478
1479         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1480
1481 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1482
1483         * mips.igen: Remove whitespace at end of lines.
1484
1485 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1486
1487         * mips.igen (loadstore_ea): New function to do effective
1488         address calculations.
1489         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1490         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1491         CACHE): Use loadstore_ea to do effective address computations.
1492
1493 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1494
1495         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1496         * mips.igen (LL, CxC1, MxC1): Likewise.
1497
1498 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1499
1500         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1501         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1502         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1503         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1504         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1505         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1506         Don't split opcode fields by hand, use the opcode field values
1507         provided by igen.
1508
1509 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1510
1511         * mips.igen (do_divu): Fix spacing.
1512
1513         * mips.igen (do_dsllv): Move to be right before DSLLV,
1514         to match the rest of the do_<shift> functions.
1515
1516 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1517
1518         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1519         DSRL32, do_dsrlv): Trace inputs and results.
1520
1521 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1522
1523         * mips.igen (CACHE): Provide instruction-printing string.
1524
1525         * interp.c (signal_exception): Comment tokens after #endif.
1526
1527 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1528
1529         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1530         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1531         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1532         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1533         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1534         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1535         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1536         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1537
1538 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1539
1540         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1541         instruction-printing string.
1542         (LWU): Use '64' as the filter flag.
1543
1544 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1545
1546         * mips.igen (SDXC1): Fix instruction-printing string.
1547
1548 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1549
1550         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1551         filter flags "32,f".
1552
1553 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1554
1555         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1556         as the filter flag.
1557
1558 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1559
1560         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1561         add a comma) so that it more closely match the MIPS ISA
1562         documentation opcode partitioning.
1563         (PREF): Put useful names on opcode fields, and include
1564         instruction-printing string.
1565
1566 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1567
1568         * mips.igen (check_u64): New function which in the future will
1569         check whether 64-bit instructions are usable and signal an
1570         exception if not.  Currently a no-op.
1571         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1572         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1573         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1574         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1575
1576         * mips.igen (check_fpu): New function which in the future will
1577         check whether FPU instructions are usable and signal an exception
1578         if not.  Currently a no-op.
1579         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1580         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1581         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1582         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1583         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1584         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1585         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1586         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1587
1588 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1589
1590         * mips.igen (do_load_left, do_load_right): Move to be immediately
1591         following do_load.
1592         (do_store_left, do_store_right): Move to be immediately following
1593         do_store.
1594
1595 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1596
1597         * mips.igen (mipsV): New model name.  Also, add it to
1598         all instructions and functions where it is appropriate.
1599
1600 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1601
1602         * mips.igen: For all functions and instructions, list model
1603         names that support that instruction one per line.
1604
1605 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1606
1607         * mips.igen: Add some additional comments about supported
1608         models, and about which instructions go where.
1609         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1610         order as is used in the rest of the file.
1611
1612 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1613
1614         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1615         indicating that ALU32_END or ALU64_END are there to check
1616         for overflow.
1617         (DADD): Likewise, but also remove previous comment about
1618         overflow checking.
1619
1620 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1621
1622         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1623         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1624         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1625         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1626         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1627         fields (i.e., add and move commas) so that they more closely
1628         match the MIPS ISA documentation opcode partitioning.
1629
1630 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1631
1632         * mips.igen (ADDI): Print immediate value.
1633         (BREAK): Print code.
1634         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1635         (SLL): Print "nop" specially, and don't run the code
1636         that does the shift for the "nop" case.
1637
1638 2001-11-17  Fred Fish  <fnf@redhat.com>
1639
1640         * sim-main.h (float_operation): Move enum declaration outside
1641         of _sim_cpu struct declaration.
1642
1643 2001-04-12  Jim Blandy  <jimb@redhat.com>
1644
1645         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1646         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1647         set of the FCSR.
1648         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1649         PENDING_FILL, and you can get the intended effect gracefully by
1650         calling PENDING_SCHED directly.
1651
1652 2001-02-23  Ben Elliston  <bje@redhat.com>
1653
1654         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1655         already defined elsewhere.
1656
1657 2001-02-19  Ben Elliston  <bje@redhat.com>
1658
1659         * sim-main.h (sim_monitor): Return an int.
1660         * interp.c (sim_monitor): Add return values.
1661         (signal_exception): Handle error conditions from sim_monitor.
1662
1663 2001-02-08  Ben Elliston  <bje@redhat.com>
1664
1665         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1666         (store_memory): Likewise, pass cia to sim_core_write*.
1667
1668 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1669
1670         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1671         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1672
1673 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1674
1675         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1676         * Makefile.in: Don't delete *.igen when cleaning directory.
1677
1678 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1679
1680         * m16.igen (break): Call SignalException not sim_engine_halt.
1681
1682 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1683
1684         From Jason Eckhardt:
1685         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1686
1687 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1688
1689         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1690
1691 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1692
1693         * mips.igen (do_dmultx): Fix typo.
1694
1695 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * configure: Regenerated to track ../common/aclocal.m4 changes.
1698
1699 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1700
1701         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1702
1703 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1704
1705         * sim-main.h (GPR_CLEAR): Define macro.
1706
1707 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1708
1709         * interp.c (decode_coproc): Output long using %lx and not %s.
1710
1711 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1712
1713         * interp.c (sim_open): Sort & extend dummy memory regions for
1714         --board=jmr3904 for eCos.
1715
1716 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1717
1718         * configure: Regenerated.
1719
1720 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1721
1722         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1723         calls, conditional on the simulator being in verbose mode.
1724
1725 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1726
1727         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1728         cache don't get ReservedInstruction traps.
1729
1730 1999-11-29  Mark Salter  <msalter@cygnus.com>
1731
1732         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1733         to clear status bits in sdisr register. This is how the hardware works.
1734
1735         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1736         being used by cygmon.
1737
1738 1999-11-11  Andrew Haley  <aph@cygnus.com>
1739
1740         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1741         instructions.
1742
1743 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1744
1745         * mips.igen (MULT): Correct previous mis-applied patch.
1746
1747 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1748
1749         * mips.igen (delayslot32): Handle sequence like
1750         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1751         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1752         (MULT): Actually pass the third register...
1753
1754 1999-09-03  Mark Salter  <msalter@cygnus.com>
1755
1756         * interp.c (sim_open): Added more memory aliases for additional
1757         hardware being touched by cygmon on jmr3904 board.
1758
1759 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1760
1761         * configure: Regenerated to track ../common/aclocal.m4 changes.
1762
1763 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1764
1765         * interp.c (sim_store_register): Handle case where client - GDB -
1766         specifies that a 4 byte register is 8 bytes in size.
1767         (sim_fetch_register): Ditto.
1768
1769 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1770
1771         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1772         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1773         (idt_monitor_base): Base address for IDT monitor traps.
1774         (pmon_monitor_base): Ditto for PMON.
1775         (lsipmon_monitor_base): Ditto for LSI PMON.
1776         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1777         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1778         (sim_firmware_command): New function.
1779         (mips_option_handler): Call it for OPTION_FIRMWARE.
1780         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1781         option was given, add no monitor by default.  Add BREAK hooks only if
1782         monitors are also there.
1783
1784 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1785
1786         * interp.c (sim_monitor): Flush output before reading input.
1787
1788 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1789
1790         * tconfig.in (SIM_HANDLES_LMA): Always define.
1791
1792 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1793
1794         From Mark Salter <msalter@cygnus.com>:
1795         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1796         (sim_open): Add setup for BSP board.
1797
1798 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1799
1800         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1801         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1802         them as unimplemented.
1803
1804 1999-05-08  Felix Lee  <flee@cygnus.com>
1805
1806         * configure: Regenerated to track ../common/aclocal.m4 changes.
1807
1808 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1809
1810         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1811
1812 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1813
1814         * configure.in: Any mips64vr5*-*-* target should have
1815         -DTARGET_ENABLE_FR=1.
1816         (default_endian): Any mips64vr*el-*-* target should default to
1817         LITTLE_ENDIAN.
1818         * configure: Re-generate.
1819
1820 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1821
1822         * mips.igen (ldl): Extend from _16_, not 32.
1823
1824 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1825
1826         * interp.c (sim_store_register): Force registers written to by GDB
1827         into an un-interpreted state.
1828
1829 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1830
1831         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1832         CPU, start periodic background I/O polls.
1833         (tx3904sio_poll): New function: periodic I/O poller.
1834
1835 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1836
1837         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1838
1839 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1840
1841         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1842         case statement.
1843
1844 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1845
1846         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1847         (load_word): Call SIM_CORE_SIGNAL hook on error.
1848         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1849         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1850         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1851         * sim-main.h (COP0_BADVADDR): Define.
1852         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1853         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1854         (_sim_cpu): Add exc_* fields to store register value snapshots.
1855         * mips.igen (*): Replace memory-related SignalException* calls
1856         with references to SIM_CORE_SIGNAL hook.
1857
1858         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1859         fix.
1860         * sim-main.c (*): Minor warning cleanups.
1861
1862 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1863
1864         * m16.igen (DADDIU5): Correct type-o.
1865
1866 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1867
1868         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1869         variables.
1870
1871 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1872
1873         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1874         to include path.
1875         (interp.o): Add dependency on itable.h
1876         (oengine.c, gencode): Delete remaining references.
1877         (BUILT_SRC_FROM_GEN): Clean up.
1878
1879 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1880
1881         * vr4run.c: New.
1882         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1883         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1884         tmp-run-hack) : New.
1885         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1886         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1887         Drop the "64" qualifier to get the HACK generator working.
1888         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1889         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1890         qualifier to get the hack generator working.
1891         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1892         (DSLL): Use do_dsll.
1893         (DSLLV): Use do_dsllv.
1894         (DSRA): Use do_dsra.
1895         (DSRL): Use do_dsrl.
1896         (DSRLV): Use do_dsrlv.
1897         (BC1): Move *vr4100 to get the HACK generator working.
1898         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1899         get the HACK generator working.
1900         (MACC) Rename to get the HACK generator working.
1901         (DMACC,MACCS,DMACCS): Add the 64.
1902
1903 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1904
1905         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1906         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1907
1908 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1909
1910     * mips/interp.c (DEBUG): Cleanups.
1911
1912 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1913
1914         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1915         (tx3904sio_tickle): fflush after a stdout character output.
1916
1917 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1918
1919         * interp.c (sim_close): Uninstall modules.
1920
1921 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1922
1923         * sim-main.h, interp.c (sim_monitor): Change to global
1924         function.
1925
1926 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1927
1928         * configure.in (vr4100): Only include vr4100 instructions in
1929         simulator.
1930         * configure: Re-generate.
1931         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1932
1933 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1934
1935         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1936         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1937         true alternative.
1938
1939         * configure.in (sim_default_gen, sim_use_gen): Replace with
1940         sim_gen.
1941         (--enable-sim-igen): Delete config option. Always using IGEN.
1942         * configure: Re-generate.
1943
1944         * Makefile.in (gencode): Kill, kill, kill.
1945         * gencode.c: Ditto.
1946
1947 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1950         bit mips16 igen simulator.
1951         * configure: Re-generate.
1952
1953         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1954         as part of vr4100 ISA.
1955         * vr.igen: Mark all instructions as 64 bit only.
1956
1957 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1958
1959         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1960         Pacify GCC.
1961
1962 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1963
1964         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1965         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1966         * configure: Re-generate.
1967
1968         * m16.igen (BREAK): Define breakpoint instruction.
1969         (JALX32): Mark instruction as mips16 and not r3900.
1970         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1971
1972         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1973
1974 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1975
1976         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1977         insn as a debug breakpoint.
1978
1979         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1980         pending.slot_size.
1981         (PENDING_SCHED): Clean up trace statement.
1982         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1983         (PENDING_FILL): Delay write by only one cycle.
1984         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1985
1986         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1987         of pending writes.
1988         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1989         32 & 64.
1990         (pending_tick): Move incrementing of index to FOR statement.
1991         (pending_tick): Only update PENDING_OUT after a write has occured.
1992
1993         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1994         build simulator.
1995         * configure: Re-generate.
1996
1997         * interp.c (sim_engine_run OLD): Delete explicit call to
1998         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1999
2000 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2001
2002         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2003         interrupt level number to match changed SignalExceptionInterrupt
2004         macro.
2005
2006 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2007
2008         * interp.c: #include "itable.h" if WITH_IGEN.
2009         (get_insn_name): New function.
2010         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2011         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2012
2013 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2014
2015         * configure: Rebuilt to inhale new common/aclocal.m4.
2016
2017 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2018
2019         * dv-tx3904sio.c: Include sim-assert.h.
2020
2021 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2022
2023         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2024         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2025         Reorganize target-specific sim-hardware checks.
2026         * configure: rebuilt.
2027         * interp.c (sim_open): For tx39 target boards, set
2028         OPERATING_ENVIRONMENT, add tx3904sio devices.
2029         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2030         ROM executables.  Install dv-sockser into sim-modules list.
2031
2032         * dv-tx3904irc.c: Compiler warning clean-up.
2033         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2034         frequent hw-trace messages.
2035
2036 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2037
2038         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2039
2040 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2041
2042         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2043
2044         * vr.igen: New file.
2045         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2046         * mips.igen: Define vr4100 model. Include vr.igen.
2047 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2048
2049         * mips.igen (check_mf_hilo): Correct check.
2050
2051 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2052
2053         * sim-main.h (interrupt_event): Add prototype.
2054
2055         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2056         register_ptr, register_value.
2057         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2058
2059         * sim-main.h (tracefh): Make extern.
2060
2061 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2062
2063         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2064         Reduce unnecessarily high timer event frequency.
2065         * dv-tx3904cpu.c: Ditto for interrupt event.
2066
2067 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2068
2069         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2070         to allay warnings.
2071         (interrupt_event): Made non-static.
2072
2073         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2074         interchange of configuration values for external vs. internal
2075         clock dividers.
2076
2077 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2078
2079         * mips.igen (BREAK): Moved code to here for
2080         simulator-reserved break instructions.
2081         * gencode.c (build_instruction): Ditto.
2082         * interp.c (signal_exception): Code moved from here.  Non-
2083         reserved instructions now use exception vector, rather
2084         than halting sim.
2085         * sim-main.h: Moved magic constants to here.
2086
2087 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2088
2089         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2090         register upon non-zero interrupt event level, clear upon zero
2091         event value.
2092         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2093         by passing zero event value.
2094         (*_io_{read,write}_buffer): Endianness fixes.
2095         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2096         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2097
2098         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2099         serial I/O and timer module at base address 0xFFFF0000.
2100
2101 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2102
2103         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2104         and BigEndianCPU.
2105
2106 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2107
2108         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2109         parts.
2110         * configure: Update.
2111
2112 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2113
2114         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2115         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2116         * configure.in: Include tx3904tmr in hw_device list.
2117         * configure: Rebuilt.
2118         * interp.c (sim_open): Instantiate three timer instances.
2119         Fix address typo of tx3904irc instance.
2120
2121 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2122
2123         * interp.c (signal_exception): SystemCall exception now uses
2124         the exception vector.
2125
2126 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2127
2128         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2129         to allay warnings.
2130
2131 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2132
2133         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2134
2135 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2136
2137         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2138
2139         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2140         sim-main.h. Declare a struct hw_descriptor instead of struct
2141         hw_device_descriptor.
2142
2143 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2144
2145         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2146         right bits and then re-align left hand bytes to correct byte
2147         lanes.  Fix incorrect computation in do_store_left when loading
2148         bytes from second word.
2149
2150 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2151
2152         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2153         * interp.c (sim_open): Only create a device tree when HW is
2154         enabled.
2155
2156         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2157         * interp.c (signal_exception): Ditto.
2158
2159 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2160
2161         * gencode.c: Mark BEGEZALL as LIKELY.
2162
2163 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2164
2165         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2166         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2167
2168 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2169
2170         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2171         modules.  Recognize TX39 target with "mips*tx39" pattern.
2172         * configure: Rebuilt.
2173         * sim-main.h (*): Added many macros defining bits in
2174         TX39 control registers.
2175         (SignalInterrupt): Send actual PC instead of NULL.
2176         (SignalNMIReset): New exception type.
2177         * interp.c (board): New variable for future use to identify
2178         a particular board being simulated.
2179         (mips_option_handler,mips_options): Added "--board" option.
2180         (interrupt_event): Send actual PC.
2181         (sim_open): Make memory layout conditional on board setting.
2182         (signal_exception): Initial implementation of hardware interrupt
2183         handling.  Accept another break instruction variant for simulator
2184         exit.
2185         (decode_coproc): Implement RFE instruction for TX39.
2186         (mips.igen): Decode RFE instruction as such.
2187         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2188         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2189         bbegin to implement memory map.
2190         * dv-tx3904cpu.c: New file.
2191         * dv-tx3904irc.c: New file.
2192
2193 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2194
2195         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2196
2197 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2198
2199         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2200         with calls to check_div_hilo.
2201
2202 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2203
2204         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2205         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2206         Add special r3900 version of do_mult_hilo.
2207         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2208         with calls to check_mult_hilo.
2209         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2210         with calls to check_div_hilo.
2211
2212 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2213
2214         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2215         Document a replacement.
2216
2217 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2218
2219         * interp.c (sim_monitor): Make mon_printf work.
2220
2221 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2222
2223         * sim-main.h (INSN_NAME): New arg `cpu'.
2224
2225 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2226
2227         * configure: Regenerated to track ../common/aclocal.m4 changes.
2228
2229 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2230
2231         * configure: Regenerated to track ../common/aclocal.m4 changes.
2232         * config.in: Ditto.
2233
2234 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2235
2236         * acconfig.h: New file.
2237         * configure.in: Reverted change of Apr 24; use sinclude again.
2238
2239 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2240
2241         * configure: Regenerated to track ../common/aclocal.m4 changes.
2242         * config.in: Ditto.
2243
2244 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2245
2246         * configure.in: Don't call sinclude.
2247
2248 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2249
2250         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2251
2252 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2253
2254         * mips.igen (ERET): Implement.
2255
2256         * interp.c (decode_coproc): Return sign-extended EPC.
2257
2258         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2259
2260         * interp.c (signal_exception): Do not ignore Trap.
2261         (signal_exception): On TRAP, restart at exception address.
2262         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2263         (signal_exception): Update.
2264         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2265         so that TRAP instructions are caught.
2266
2267 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2268
2269         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2270         contains HI/LO access history.
2271         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2272         (HIACCESS, LOACCESS): Delete, replace with
2273         (HIHISTORY, LOHISTORY): New macros.
2274         (CHECKHILO): Delete all, moved to mips.igen
2275
2276         * gencode.c (build_instruction): Do not generate checks for
2277         correct HI/LO register usage.
2278
2279         * interp.c (old_engine_run): Delete checks for correct HI/LO
2280         register usage.
2281
2282         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2283         check_mf_cycles): New functions.
2284         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2285         do_divu, domultx, do_mult, do_multu): Use.
2286
2287         * tx.igen ("madd", "maddu"): Use.
2288
2289 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2290
2291         * mips.igen (DSRAV): Use function do_dsrav.
2292         (SRAV): Use new function do_srav.
2293
2294         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2295         (B): Sign extend 11 bit immediate.
2296         (EXT-B*): Shift 16 bit immediate left by 1.
2297         (ADDIU*): Don't sign extend immediate value.
2298
2299 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2300
2301         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2302
2303         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2304         functions.
2305
2306         * mips.igen (delayslot32, nullify_next_insn): New functions.
2307         (m16.igen): Always include.
2308         (do_*): Add more tracing.
2309
2310         * m16.igen (delayslot16): Add NIA argument, could be called by a
2311         32 bit MIPS16 instruction.
2312
2313         * interp.c (ifetch16): Move function from here.
2314         * sim-main.c (ifetch16): To here.
2315
2316         * sim-main.c (ifetch16, ifetch32): Update to match current
2317         implementations of LH, LW.
2318         (signal_exception): Don't print out incorrect hex value of illegal
2319         instruction.
2320
2321 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2322
2323         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2324         instruction.
2325
2326         * m16.igen: Implement MIPS16 instructions.
2327
2328         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2329         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2330         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2331         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2332         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2333         bodies of corresponding code from 32 bit insn to these.  Also used
2334         by MIPS16 versions of functions.
2335
2336         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2337         (IMEM16): Drop NR argument from macro.
2338
2339 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2340
2341         * Makefile.in (SIM_OBJS): Add sim-main.o.
2342
2343         * sim-main.h (address_translation, load_memory, store_memory,
2344         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2345         as INLINE_SIM_MAIN.
2346         (pr_addr, pr_uword64): Declare.
2347         (sim-main.c): Include when H_REVEALS_MODULE_P.
2348
2349         * interp.c (address_translation, load_memory, store_memory,
2350         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2351         from here.
2352         * sim-main.c: To here. Fix compilation problems.
2353
2354         * configure.in: Enable inlining.
2355         * configure: Re-config.
2356
2357 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2358
2359         * configure: Regenerated to track ../common/aclocal.m4 changes.
2360
2361 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2362
2363         * mips.igen: Include tx.igen.
2364         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2365         * tx.igen: New file, contains MADD and MADDU.
2366
2367         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2368         the hardwired constant `7'.
2369         (store_memory): Ditto.
2370         (LOADDRMASK): Move definition to sim-main.h.
2371
2372         mips.igen (MTC0): Enable for r3900.
2373         (ADDU): Add trace.
2374
2375         mips.igen (do_load_byte): Delete.
2376         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2377         do_store_right): New functions.
2378         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2379
2380         configure.in: Let the tx39 use igen again.
2381         configure: Update.
2382
2383 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2386         not an address sized quantity.  Return zero for cache sizes.
2387
2388 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2389
2390         * mips.igen (r3900): r3900 does not support 64 bit integer
2391         operations.
2392
2393 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2394
2395         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2396         than igen one.
2397         * configure : Rebuild.
2398
2399 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2400
2401         * configure: Regenerated to track ../common/aclocal.m4 changes.
2402
2403 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2404
2405         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2406
2407 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2408
2409         * configure: Regenerated to track ../common/aclocal.m4 changes.
2410         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2411
2412 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2413
2414         * configure: Regenerated to track ../common/aclocal.m4 changes.
2415
2416 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2417
2418         * interp.c (Max, Min): Comment out functions. Not yet used.
2419
2420 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2421
2422         * configure: Regenerated to track ../common/aclocal.m4 changes.
2423
2424 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2425
2426         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2427         configurable settings for stand-alone simulator.
2428
2429         * configure.in: Added X11 search, just in case.
2430
2431         * configure: Regenerated.
2432
2433 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2434
2435         * interp.c (sim_write, sim_read, load_memory, store_memory):
2436         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2437
2438 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * sim-main.h (GETFCC): Return an unsigned value.
2441
2442 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2445         (DADD): Result destination is RD not RT.
2446
2447 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2448
2449         * sim-main.h (HIACCESS, LOACCESS): Always define.
2450
2451         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2452
2453         * interp.c (sim_info): Delete.
2454
2455 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2456
2457         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2458         (mips_option_handler): New argument `cpu'.
2459         (sim_open): Update call to sim_add_option_table.
2460
2461 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2462
2463         * mips.igen (CxC1): Add tracing.
2464
2465 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2466
2467         * sim-main.h (Max, Min): Declare.
2468
2469         * interp.c (Max, Min): New functions.
2470
2471         * mips.igen (BC1): Add tracing.
2472
2473 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2474
2475         * interp.c Added memory map for stack in vr4100
2476
2477 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2478
2479         * interp.c (load_memory): Add missing "break"'s.
2480
2481 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * interp.c (sim_store_register, sim_fetch_register): Pass in
2484         length parameter.  Return -1.
2485
2486 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2487
2488         * interp.c: Added hardware init hook, fixed warnings.
2489
2490 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2491
2492         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2493
2494 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2495
2496         * interp.c (ifetch16): New function.
2497
2498         * sim-main.h (IMEM32): Rename IMEM.
2499         (IMEM16_IMMED): Define.
2500         (IMEM16): Define.
2501         (DELAY_SLOT): Update.
2502
2503         * m16run.c (sim_engine_run): New file.
2504
2505         * m16.igen: All instructions except LB.
2506         (LB): Call do_load_byte.
2507         * mips.igen (do_load_byte): New function.
2508         (LB): Call do_load_byte.
2509
2510         * mips.igen: Move spec for insn bit size and high bit from here.
2511         * Makefile.in (tmp-igen, tmp-m16): To here.
2512
2513         * m16.dc: New file, decode mips16 instructions.
2514
2515         * Makefile.in (SIM_NO_ALL): Define.
2516         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2517
2518 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2519
2520         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2521         point unit to 32 bit registers.
2522         * configure: Re-generate.
2523
2524 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2525
2526         * configure.in (sim_use_gen): Make IGEN the default simulator
2527         generator for generic 32 and 64 bit mips targets.
2528         * configure: Re-generate.
2529
2530 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2531
2532         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2533         bitsize.
2534
2535         * interp.c (sim_fetch_register, sim_store_register): Read/write
2536         FGR from correct location.
2537         (sim_open): Set size of FGR's according to
2538         WITH_TARGET_FLOATING_POINT_BITSIZE.
2539
2540         * sim-main.h (FGR): Store floating point registers in a separate
2541         array.
2542
2543 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2544
2545         * configure: Regenerated to track ../common/aclocal.m4 changes.
2546
2547 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2548
2549         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2550
2551         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2552
2553         * interp.c (pending_tick): New function.  Deliver pending writes.
2554
2555         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2556         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2557         it can handle mixed sized quantites and single bits.
2558
2559 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2560
2561         * interp.c (oengine.h): Do not include when building with IGEN.
2562         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2563         (sim_info): Ditto for PROCESSOR_64BIT.
2564         (sim_monitor): Replace ut_reg with unsigned_word.
2565         (*): Ditto for t_reg.
2566         (LOADDRMASK): Define.
2567         (sim_open): Remove defunct check that host FP is IEEE compliant,
2568         using software to emulate floating point.
2569         (value_fpr, ...): Always compile, was conditional on HASFPU.
2570
2571 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2572
2573         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2574         size.
2575
2576         * interp.c (SD, CPU): Define.
2577         (mips_option_handler): Set flags in each CPU.
2578         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2579         (sim_close): Do not clear STATE, deleted anyway.
2580         (sim_write, sim_read): Assume CPU zero's vm should be used for
2581         data transfers.
2582         (sim_create_inferior): Set the PC for all processors.
2583         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2584         argument.
2585         (mips16_entry): Pass correct nr of args to store_word, load_word.
2586         (ColdReset): Cold reset all cpu's.
2587         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2588         (sim_monitor, load_memory, store_memory, signal_exception): Use
2589         `CPU' instead of STATE_CPU.
2590
2591
2592         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2593         SD or CPU_.
2594
2595         * sim-main.h (signal_exception): Add sim_cpu arg.
2596         (SignalException*): Pass both SD and CPU to signal_exception.
2597         * interp.c (signal_exception): Update.
2598
2599         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2600         Ditto
2601         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2602         address_translation): Ditto
2603         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2604
2605 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2606
2607         * configure: Regenerated to track ../common/aclocal.m4 changes.
2608
2609 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2610
2611         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2612
2613         * mips.igen (model): Map processor names onto BFD name.
2614
2615         * sim-main.h (CPU_CIA): Delete.
2616         (SET_CIA, GET_CIA): Define
2617
2618 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2619
2620         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2621         regiser.
2622
2623         * configure.in (default_endian): Configure a big-endian simulator
2624         by default.
2625         * configure: Re-generate.
2626
2627 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2628
2629         * configure: Regenerated to track ../common/aclocal.m4 changes.
2630
2631 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2632
2633         * interp.c (sim_monitor): Handle Densan monitor outbyte
2634         and inbyte functions.
2635
2636 1997-12-29  Felix Lee  <flee@cygnus.com>
2637
2638         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2639
2640 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2641
2642         * Makefile.in (tmp-igen): Arrange for $zero to always be
2643         reset to zero after every instruction.
2644
2645 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2646
2647         * configure: Regenerated to track ../common/aclocal.m4 changes.
2648         * config.in: Ditto.
2649
2650 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2651
2652         * mips.igen (MSUB): Fix to work like MADD.
2653         * gencode.c (MSUB): Similarly.
2654
2655 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2656
2657         * configure: Regenerated to track ../common/aclocal.m4 changes.
2658
2659 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2660
2661         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2662
2663 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2664
2665         * sim-main.h (sim-fpu.h): Include.
2666
2667         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2668         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2669         using host independant sim_fpu module.
2670
2671 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2672
2673         * interp.c (signal_exception): Report internal errors with SIGABRT
2674         not SIGQUIT.
2675
2676         * sim-main.h (C0_CONFIG): New register.
2677         (signal.h): No longer include.
2678
2679         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2680
2681 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2682
2683         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2684
2685 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2686
2687         * mips.igen: Tag vr5000 instructions.
2688         (ANDI): Was missing mipsIV model, fix assembler syntax.
2689         (do_c_cond_fmt): New function.
2690         (C.cond.fmt): Handle mips I-III which do not support CC field
2691         separatly.
2692         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2693         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2694         in IV3.2 spec.
2695         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2696         vr5000 which saves LO in a GPR separatly.
2697
2698         * configure.in (enable-sim-igen): For vr5000, select vr5000
2699         specific instructions.
2700         * configure: Re-generate.
2701
2702 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2703
2704         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2705
2706         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2707         fmt_uninterpreted_64 bit cases to switch.  Convert to
2708         fmt_formatted,
2709
2710         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2711
2712         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2713         as specified in IV3.2 spec.
2714         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2715
2716 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2717
2718         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2719         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2720         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2721         PENDING_FILL versions of instructions.  Simplify.
2722         (X): New function.
2723         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2724         instructions.
2725         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2726         a signed value.
2727         (MTHI, MFHI): Disable code checking HI-LO.
2728
2729         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2730         global.
2731         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2732
2733 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2734
2735         * gencode.c (build_mips16_operands): Replace IPC with cia.
2736
2737         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2738         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2739         IPC to `cia'.
2740         (UndefinedResult): Replace function with macro/function
2741         combination.
2742         (sim_engine_run): Don't save PC in IPC.
2743
2744         * sim-main.h (IPC): Delete.
2745
2746
2747         * interp.c (signal_exception, store_word, load_word,
2748         address_translation, load_memory, store_memory, cache_op,
2749         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2750         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2751         current instruction address - cia - argument.
2752         (sim_read, sim_write): Call address_translation directly.
2753         (sim_engine_run): Rename variable vaddr to cia.
2754         (signal_exception): Pass cia to sim_monitor
2755
2756         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2757         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2758         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2759
2760         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2761         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2762         SIM_ASSERT.
2763
2764         * interp.c (signal_exception): Pass restart address to
2765         sim_engine_restart.
2766
2767         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2768         idecode.o): Add dependency.
2769
2770         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2771         Delete definitions
2772         (DELAY_SLOT): Update NIA not PC with branch address.
2773         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2774
2775         * mips.igen: Use CIA not PC in branch calculations.
2776         (illegal): Call SignalException.
2777         (BEQ, ADDIU): Fix assembler.
2778
2779 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2780
2781         * m16.igen (JALX): Was missing.
2782
2783         * configure.in (enable-sim-igen): New configuration option.
2784         * configure: Re-generate.
2785
2786         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2787
2788         * interp.c (load_memory, store_memory): Delete parameter RAW.
2789         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2790         bypassing {load,store}_memory.
2791
2792         * sim-main.h (ByteSwapMem): Delete definition.
2793
2794         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2795
2796         * interp.c (sim_do_command, sim_commands): Delete mips specific
2797         commands.  Handled by module sim-options.
2798
2799         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2800         (WITH_MODULO_MEMORY): Define.
2801
2802         * interp.c (sim_info): Delete code printing memory size.
2803
2804         * interp.c (mips_size): Nee sim_size, delete function.
2805         (power2): Delete.
2806         (monitor, monitor_base, monitor_size): Delete global variables.
2807         (sim_open, sim_close): Delete code creating monitor and other
2808         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2809         manage memory regions.
2810         (load_memory, store_memory): Use sim-core for memory model.
2811
2812         * interp.c (address_translation): Delete all memory map code
2813         except line forcing 32 bit addresses.
2814
2815 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2816
2817         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2818         trace options.
2819
2820         * interp.c (logfh, logfile): Delete globals.
2821         (sim_open, sim_close): Delete code opening & closing log file.
2822         (mips_option_handler): Delete -l and -n options.
2823         (OPTION mips_options): Ditto.
2824
2825         * interp.c (OPTION mips_options): Rename option trace to dinero.
2826         (mips_option_handler): Update.
2827
2828 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2829
2830         * interp.c (fetch_str): New function.
2831         (sim_monitor): Rewrite using sim_read & sim_write.
2832         (sim_open): Check magic number.
2833         (sim_open): Write monitor vectors into memory using sim_write.
2834         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2835         (sim_read, sim_write): Simplify - transfer data one byte at a
2836         time.
2837         (load_memory, store_memory): Clarify meaning of parameter RAW.
2838
2839         * sim-main.h (isHOST): Defete definition.
2840         (isTARGET): Mark as depreciated.
2841         (address_translation): Delete parameter HOST.
2842
2843         * interp.c (address_translation): Delete parameter HOST.
2844
2845 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2846
2847         * mips.igen:
2848
2849         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2850         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2851
2852 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2853
2854         * mips.igen: Add model filter field to records.
2855
2856 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2857
2858         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2859
2860         interp.c (sim_engine_run): Do not compile function sim_engine_run
2861         when WITH_IGEN == 1.
2862
2863         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2864         target architecture.
2865
2866         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2867         igen. Replace with configuration variables sim_igen_flags /
2868         sim_m16_flags.
2869
2870         * m16.igen: New file.  Copy mips16 insns here.
2871         * mips.igen: From here.
2872
2873 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2874
2875         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2876         to top.
2877         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2878
2879 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2880
2881         * gencode.c (build_instruction): Follow sim_write's lead in using
2882         BigEndianMem instead of !ByteSwapMem.
2883
2884 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2885
2886         * configure.in (sim_gen): Dependent on target, select type of
2887         generator.  Always select old style generator.
2888
2889         configure: Re-generate.
2890
2891         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2892         targets.
2893         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2894         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2895         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2896         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2897         SIM_@sim_gen@_*, set by autoconf.
2898
2899 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2900
2901         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2902
2903         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2904         CURRENT_FLOATING_POINT instead.
2905
2906         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2907         (address_translation): Raise exception InstructionFetch when
2908         translation fails and isINSTRUCTION.
2909
2910         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2911         sim_engine_run): Change type of of vaddr and paddr to
2912         address_word.
2913         (address_translation, prefetch, load_memory, store_memory,
2914         cache_op): Change type of vAddr and pAddr to address_word.
2915
2916         * gencode.c (build_instruction): Change type of vaddr and paddr to
2917         address_word.
2918
2919 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2920
2921         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2922         macro to obtain result of ALU op.
2923
2924 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2925
2926         * interp.c (sim_info): Call profile_print.
2927
2928 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2929
2930         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2931
2932         * sim-main.h (WITH_PROFILE): Do not define, defined in
2933         common/sim-config.h.  Use sim-profile module.
2934         (simPROFILE): Delete defintion.
2935
2936         * interp.c (PROFILE): Delete definition.
2937         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2938         (sim_close): Delete code writing profile histogram.
2939         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2940         Delete.
2941         (sim_engine_run): Delete code profiling the PC.
2942
2943 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2944
2945         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2946
2947         * interp.c (sim_monitor): Make register pointers of type
2948         unsigned_word*.
2949
2950         * sim-main.h: Make registers of type unsigned_word not
2951         signed_word.
2952
2953 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2954
2955         * interp.c (sync_operation): Rename from SyncOperation, make
2956         global, add SD argument.
2957         (prefetch): Rename from Prefetch, make global, add SD argument.
2958         (decode_coproc): Make global.
2959
2960         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2961
2962         * gencode.c (build_instruction): Generate DecodeCoproc not
2963         decode_coproc calls.
2964
2965         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2966         (SizeFGR): Move to sim-main.h
2967         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2968         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2969         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2970         sim-main.h.
2971         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2972         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2973         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2974         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2975         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2976         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2977
2978         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2979         exception.
2980         (sim-alu.h): Include.
2981         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2982         (sim_cia): Typedef to instruction_address.
2983
2984 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2985
2986         * Makefile.in (interp.o): Rename generated file engine.c to
2987         oengine.c.
2988
2989         * interp.c: Update.
2990
2991 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2992
2993         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2994
2995 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2996
2997         * gencode.c (build_instruction): For "FPSQRT", output correct
2998         number of arguments to Recip.
2999
3000 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3001
3002         * Makefile.in (interp.o): Depends on sim-main.h
3003
3004         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3005
3006         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3007         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3008         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3009         STATE, DSSTATE): Define
3010         (GPR, FGRIDX, ..): Define.
3011
3012         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3013         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3014         (GPR, FGRIDX, ...): Delete macros.
3015
3016         * interp.c: Update names to match defines from sim-main.h
3017
3018 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3019
3020         * interp.c (sim_monitor): Add SD argument.
3021         (sim_warning): Delete.  Replace calls with calls to
3022         sim_io_eprintf.
3023         (sim_error): Delete. Replace calls with sim_io_error.
3024         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3025         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3026         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3027         argument.
3028         (mips_size): Rename from sim_size. Add SD argument.
3029
3030         * interp.c (simulator): Delete global variable.
3031         (callback): Delete global variable.
3032         (mips_option_handler, sim_open, sim_write, sim_read,
3033         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3034         sim_size,sim_monitor): Use sim_io_* not callback->*.
3035         (sim_open): ZALLOC simulator struct.
3036         (PROFILE): Do not define.
3037
3038 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3039
3040         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3041         support.h with corresponding code.
3042
3043         * sim-main.h (word64, uword64), support.h: Move definition to
3044         sim-main.h.
3045         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3046
3047         * support.h: Delete
3048         * Makefile.in: Update dependencies
3049         * interp.c: Do not include.
3050
3051 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3052
3053         * interp.c (address_translation, load_memory, store_memory,
3054         cache_op): Rename to from AddressTranslation et.al., make global,
3055         add SD argument
3056
3057         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3058         CacheOp): Define.
3059
3060         * interp.c (SignalException): Rename to signal_exception, make
3061         global.
3062
3063         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3064
3065         * sim-main.h (SignalException, SignalExceptionInterrupt,
3066         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3067         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3068         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3069         Define.
3070
3071         * interp.c, support.h: Use.
3072
3073 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3074
3075         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3076         to value_fpr / store_fpr. Add SD argument.
3077         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3078         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3079
3080         * sim-main.h (ValueFPR, StoreFPR): Define.
3081
3082 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3083
3084         * interp.c (sim_engine_run): Check consistency between configure
3085         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3086         and HASFPU.
3087
3088         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3089         (mips_fpu): Configure WITH_FLOATING_POINT.
3090         (mips_endian): Configure WITH_TARGET_ENDIAN.
3091         * configure: Update.
3092
3093 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3094
3095         * configure: Regenerated to track ../common/aclocal.m4 changes.
3096
3097 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3098
3099         * configure: Regenerated.
3100
3101 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3102
3103         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3104
3105 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3106
3107         * gencode.c (print_igen_insn_models): Assume certain architectures
3108         include all mips* instructions.
3109         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3110         instruction.
3111
3112         * Makefile.in (tmp.igen): Add target. Generate igen input from
3113         gencode file.
3114
3115         * gencode.c (FEATURE_IGEN): Define.
3116         (main): Add --igen option.  Generate output in igen format.
3117         (process_instructions): Format output according to igen option.
3118         (print_igen_insn_format): New function.
3119         (print_igen_insn_models): New function.
3120         (process_instructions): Only issue warnings and ignore
3121         instructions when no FEATURE_IGEN.
3122
3123 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3124
3125         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3126         MIPS targets.
3127
3128 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3129
3130         * configure: Regenerated to track ../common/aclocal.m4 changes.
3131
3132 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3133
3134         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3135         SIM_RESERVED_BITS): Delete, moved to common.
3136         (SIM_EXTRA_CFLAGS): Update.
3137
3138 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3139
3140         * configure.in: Configure non-strict memory alignment.
3141         * configure: Regenerated to track ../common/aclocal.m4 changes.
3142
3143 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3144
3145         * configure: Regenerated to track ../common/aclocal.m4 changes.
3146
3147 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3148
3149         * gencode.c (SDBBP,DERET): Added (3900) insns.
3150         (RFE): Turn on for 3900.
3151         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3152         (dsstate): Made global.
3153         (SUBTARGET_R3900): Added.
3154         (CANCELDELAYSLOT): New.
3155         (SignalException): Ignore SystemCall rather than ignore and
3156         terminate.  Add DebugBreakPoint handling.
3157         (decode_coproc): New insns RFE, DERET; and new registers Debug
3158         and DEPC protected by SUBTARGET_R3900.
3159         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3160         bits explicitly.
3161         * Makefile.in,configure.in: Add mips subtarget option.
3162         * configure: Update.
3163
3164 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3165
3166         * gencode.c: Add r3900 (tx39).
3167
3168
3169 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3170
3171         * gencode.c (build_instruction): Don't need to subtract 4 for
3172         JALR, just 2.
3173
3174 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3175
3176         * interp.c: Correct some HASFPU problems.
3177
3178 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3179
3180         * configure: Regenerated to track ../common/aclocal.m4 changes.
3181
3182 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3183
3184         * interp.c (mips_options): Fix samples option short form, should
3185         be `x'.
3186
3187 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3188
3189         * interp.c (sim_info): Enable info code.  Was just returning.
3190
3191 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3192
3193         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3194         MFC0.
3195
3196 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3197
3198         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3199         constants.
3200         (build_instruction): Ditto for LL.
3201
3202 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3203
3204         * configure: Regenerated to track ../common/aclocal.m4 changes.
3205
3206 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3207
3208         * configure: Regenerated to track ../common/aclocal.m4 changes.
3209         * config.in: Ditto.
3210
3211 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3212
3213         * interp.c (sim_open): Add call to sim_analyze_program, update
3214         call to sim_config.
3215
3216 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3217
3218         * interp.c (sim_kill): Delete.
3219         (sim_create_inferior): Add ABFD argument. Set PC from same.
3220         (sim_load): Move code initializing trap handlers from here.
3221         (sim_open): To here.
3222         (sim_load): Delete, use sim-hload.c.
3223
3224         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3225
3226 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3227
3228         * configure: Regenerated to track ../common/aclocal.m4 changes.
3229         * config.in: Ditto.
3230
3231 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3232
3233         * interp.c (sim_open): Add ABFD argument.
3234         (sim_load): Move call to sim_config from here.
3235         (sim_open): To here.  Check return status.
3236
3237 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3238
3239         * gencode.c (build_instruction): Two arg MADD should
3240         not assign result to $0.
3241
3242 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3243
3244         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3245         * sim/mips/configure.in: Regenerate.
3246
3247 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3248
3249         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3250         signed8, unsigned8 et.al. types.
3251
3252         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3253         hosts when selecting subreg.
3254
3255 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3256
3257         * interp.c (sim_engine_run): Reset the ZERO register to zero
3258         regardless of FEATURE_WARN_ZERO.
3259         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3260
3261 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3262
3263         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3264         (SignalException): For BreakPoints ignore any mode bits and just
3265         save the PC.
3266         (SignalException): Always set the CAUSE register.
3267
3268 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3269
3270         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3271         exception has been taken.
3272
3273         * interp.c: Implement the ERET and mt/f sr instructions.
3274
3275 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3276
3277         * interp.c (SignalException): Don't bother restarting an
3278         interrupt.
3279
3280 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3281
3282         * interp.c (SignalException): Really take an interrupt.
3283         (interrupt_event): Only deliver interrupts when enabled.
3284
3285 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3286
3287         * interp.c (sim_info): Only print info when verbose.
3288         (sim_info) Use sim_io_printf for output.
3289
3290 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3291
3292         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3293         mips architectures.
3294
3295 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3296
3297         * interp.c (sim_do_command): Check for common commands if a
3298         simulator specific command fails.
3299
3300 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3301
3302         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3303         and simBE when DEBUG is defined.
3304
3305 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3306
3307         * interp.c (interrupt_event): New function.  Pass exception event
3308         onto exception handler.
3309
3310         * configure.in: Check for stdlib.h.
3311         * configure: Regenerate.
3312
3313         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3314         variable declaration.
3315         (build_instruction): Initialize memval1.
3316         (build_instruction): Add UNUSED attribute to byte, bigend,
3317         reverse.
3318         (build_operands): Ditto.
3319
3320         * interp.c: Fix GCC warnings.
3321         (sim_get_quit_code): Delete.
3322
3323         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3324         * Makefile.in: Ditto.
3325         * configure: Re-generate.
3326
3327         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3328
3329 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3330
3331         * interp.c (mips_option_handler): New function parse argumes using
3332         sim-options.
3333         (myname): Replace with STATE_MY_NAME.
3334         (sim_open): Delete check for host endianness - performed by
3335         sim_config.
3336         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3337         (sim_open): Move much of the initialization from here.
3338         (sim_load): To here.  After the image has been loaded and
3339         endianness set.
3340         (sim_open): Move ColdReset from here.
3341         (sim_create_inferior): To here.
3342         (sim_open): Make FP check less dependant on host endianness.
3343
3344         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3345         run.
3346         * interp.c (sim_set_callbacks): Delete.
3347
3348         * interp.c (membank, membank_base, membank_size): Replace with
3349         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3350         (sim_open): Remove call to callback->init. gdb/run do this.
3351
3352         * interp.c: Update
3353
3354         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3355
3356         * interp.c (big_endian_p): Delete, replaced by
3357         current_target_byte_order.
3358
3359 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3360
3361         * interp.c (host_read_long, host_read_word, host_swap_word,
3362         host_swap_long): Delete. Using common sim-endian.
3363         (sim_fetch_register, sim_store_register): Use H2T.
3364         (pipeline_ticks): Delete.  Handled by sim-events.
3365         (sim_info): Update.
3366         (sim_engine_run): Update.
3367
3368 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3369
3370         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3371         reason from here.
3372         (SignalException): To here. Signal using sim_engine_halt.
3373         (sim_stop_reason): Delete, moved to common.
3374
3375 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3376
3377         * interp.c (sim_open): Add callback argument.
3378         (sim_set_callbacks): Delete SIM_DESC argument.
3379         (sim_size): Ditto.
3380
3381 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3382
3383         * Makefile.in (SIM_OBJS): Add common modules.
3384
3385         * interp.c (sim_set_callbacks): Also set SD callback.
3386         (set_endianness, xfer_*, swap_*): Delete.
3387         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3388         Change to functions using sim-endian macros.
3389         (control_c, sim_stop): Delete, use common version.
3390         (simulate): Convert into.
3391         (sim_engine_run): This function.
3392         (sim_resume): Delete.
3393
3394         * interp.c (simulation): New variable - the simulator object.
3395         (sim_kind): Delete global - merged into simulation.
3396         (sim_load): Cleanup.  Move PC assignment from here.
3397         (sim_create_inferior): To here.
3398
3399         * sim-main.h: New file.
3400         * interp.c (sim-main.h): Include.
3401
3402 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3403
3404         * configure: Regenerated to track ../common/aclocal.m4 changes.
3405
3406 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3407
3408         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3409
3410 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3411
3412         * gencode.c (build_instruction): DIV instructions: check
3413         for division by zero and integer overflow before using
3414         host's division operation.
3415
3416 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3417
3418         * Makefile.in (SIM_OBJS): Add sim-load.o.
3419         * interp.c: #include bfd.h.
3420         (target_byte_order): Delete.
3421         (sim_kind, myname, big_endian_p): New static locals.
3422         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3423         after argument parsing.  Recognize -E arg, set endianness accordingly.
3424         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3425         load file into simulator.  Set PC from bfd.
3426         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3427         (set_endianness): Use big_endian_p instead of target_byte_order.
3428
3429 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3430
3431         * interp.c (sim_size): Delete prototype - conflicts with
3432         definition in remote-sim.h.  Correct definition.
3433
3434 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3435
3436         * configure: Regenerated to track ../common/aclocal.m4 changes.
3437         * config.in: Ditto.
3438
3439 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3440
3441         * interp.c (sim_open): New arg `kind'.
3442
3443         * configure: Regenerated to track ../common/aclocal.m4 changes.
3444
3445 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3446
3447         * configure: Regenerated to track ../common/aclocal.m4 changes.
3448
3449 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3450
3451         * interp.c (sim_open): Set optind to 0 before calling getopt.
3452
3453 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3454
3455         * configure: Regenerated to track ../common/aclocal.m4 changes.
3456
3457 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3458
3459         * interp.c : Replace uses of pr_addr with pr_uword64
3460         where the bit length is always 64 independent of SIM_ADDR.
3461         (pr_uword64) : added.
3462
3463 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3464
3465         * configure: Re-generate.
3466
3467 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3468
3469         * configure: Regenerate to track ../common/aclocal.m4 changes.
3470
3471 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3472
3473         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3474         in argv form.
3475         (other sim_*): New SIM_DESC argument.
3476
3477 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3478
3479         * interp.c: Fix printing of addresses for non-64-bit targets.
3480         (pr_addr): Add function to print address based on size.
3481
3482 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3483
3484         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3485
3486 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3487
3488         * gencode.c (build_mips16_operands): Correct computation of base
3489         address for extended PC relative instruction.
3490
3491 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3492
3493         * interp.c (mips16_entry): Add support for floating point cases.
3494         (SignalException): Pass floating point cases to mips16_entry.
3495         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3496         registers.
3497         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3498         or fmt_word.
3499         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3500         and then set the state to fmt_uninterpreted.
3501         (COP_SW): Temporarily set the state to fmt_word while calling
3502         ValueFPR.
3503
3504 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3505
3506         * gencode.c (build_instruction): The high order may be set in the
3507         comparison flags at any ISA level, not just ISA 4.
3508
3509 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3510
3511         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3512         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3513         * configure.in: sinclude ../common/aclocal.m4.
3514         * configure: Regenerated.
3515
3516 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3517
3518         * configure: Rebuild after change to aclocal.m4.
3519
3520 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3521
3522         * configure configure.in Makefile.in:  Update to new configure
3523         scheme which is more compatible with WinGDB builds.
3524         * configure.in:  Improve comment on how to run autoconf.
3525         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3526         * Makefile.in:  Use autoconf substitution to install common
3527         makefile fragment.
3528
3529 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3530
3531         * gencode.c (build_instruction): Use BigEndianCPU instead of
3532         ByteSwapMem.
3533
3534 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3535
3536         * interp.c (sim_monitor): Make output to stdout visible in
3537         wingdb's I/O log window.
3538
3539 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3540
3541         * support.h: Undo previous change to SIGTRAP
3542         and SIGQUIT values.
3543
3544 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3545
3546         * interp.c (store_word, load_word): New static functions.
3547         (mips16_entry): New static function.
3548         (SignalException): Look for mips16 entry and exit instructions.
3549         (simulate): Use the correct index when setting fpr_state after
3550         doing a pending move.
3551
3552 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3553
3554         * interp.c: Fix byte-swapping code throughout to work on
3555         both little- and big-endian hosts.
3556
3557 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3558
3559         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3560         with gdb/config/i386/xm-windows.h.
3561
3562 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3563
3564         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3565         that messes up arithmetic shifts.
3566
3567 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3568
3569         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3570         SIGTRAP and SIGQUIT for _WIN32.
3571
3572 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3573
3574         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3575         force a 64 bit multiplication.
3576         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3577         destination register is 0, since that is the default mips16 nop
3578         instruction.
3579
3580 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3581
3582         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3583         (build_endian_shift): Don't check proc64.
3584         (build_instruction): Always set memval to uword64.  Cast op2 to
3585         uword64 when shifting it left in memory instructions.  Always use
3586         the same code for stores--don't special case proc64.
3587
3588         * gencode.c (build_mips16_operands): Fix base PC value for PC
3589         relative operands.
3590         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3591         jal instruction.
3592         * interp.c (simJALDELAYSLOT): Define.
3593         (JALDELAYSLOT): Define.
3594         (INDELAYSLOT, INJALDELAYSLOT): Define.
3595         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3596
3597 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3598
3599         * interp.c (sim_open): add flush_cache as a PMON routine
3600         (sim_monitor): handle flush_cache by ignoring it
3601
3602 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3603
3604         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3605         BigEndianMem.
3606         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3607         (BigEndianMem): Rename to ByteSwapMem and change sense.
3608         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3609         BigEndianMem references to !ByteSwapMem.
3610         (set_endianness): New function, with prototype.
3611         (sim_open): Call set_endianness.
3612         (sim_info): Use simBE instead of BigEndianMem.
3613         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3614         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3615         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3616         ifdefs, keeping the prototype declaration.
3617         (swap_word): Rewrite correctly.
3618         (ColdReset): Delete references to CONFIG.  Delete endianness related
3619         code; moved to set_endianness.
3620
3621 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3622
3623         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3624         * interp.c (CHECKHILO): Define away.
3625         (simSIGINT): New macro.
3626         (membank_size): Increase from 1MB to 2MB.
3627         (control_c): New function.
3628         (sim_resume): Rename parameter signal to signal_number.  Add local
3629         variable prev.  Call signal before and after simulate.
3630         (sim_stop_reason): Add simSIGINT support.
3631         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3632         functions always.
3633         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3634         if logfh is NULL.
3635         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3636         a call to sim_warning.
3637
3638 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3639
3640         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3641         16 bit instructions.
3642
3643 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3644
3645         Add support for mips16 (16 bit MIPS implementation):
3646         * gencode.c (inst_type): Add mips16 instruction encoding types.
3647         (GETDATASIZEINSN): Define.
3648         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3649         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3650         mtlo.
3651         (MIPS16_DECODE): New table, for mips16 instructions.
3652         (bitmap_val): New static function.
3653         (struct mips16_op): Define.
3654         (mips16_op_table): New table, for mips16 operands.
3655         (build_mips16_operands): New static function.
3656         (process_instructions): If PC is odd, decode a mips16
3657         instruction.  Break out instruction handling into new
3658         build_instruction function.
3659         (build_instruction): New static function, broken out of
3660         process_instructions.  Check modifiers rather than flags for SHIFT
3661         bit count and m[ft]{hi,lo} direction.
3662         (usage): Pass program name to fprintf.
3663         (main): Remove unused variable this_option_optind.  Change
3664         ``*loptarg++'' to ``loptarg++''.
3665         (my_strtoul): Parenthesize && within ||.
3666         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3667         (simulate): If PC is odd, fetch a 16 bit instruction, and
3668         increment PC by 2 rather than 4.
3669         * configure.in: Add case for mips16*-*-*.
3670         * configure: Rebuild.
3671
3672 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3673
3674         * interp.c: Allow -t to enable tracing in standalone simulator.
3675         Fix garbage output in trace file and error messages.
3676
3677 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3678
3679         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3680         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3681         * configure.in: Simplify using macros in ../common/aclocal.m4.
3682         * configure: Regenerated.
3683         * tconfig.in: New file.
3684
3685 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3686
3687         * interp.c: Fix bugs in 64-bit port.
3688         Use ansi function declarations for msvc compiler.
3689         Initialize and test file pointer in trace code.
3690         Prevent duplicate definition of LAST_EMED_REGNUM.
3691
3692 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3693
3694         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3695
3696 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3697
3698         * interp.c (SignalException): Check for explicit terminating
3699         breakpoint value.
3700         * gencode.c: Pass instruction value through SignalException()
3701         calls for Trap, Breakpoint and Syscall.
3702
3703 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3704
3705         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3706         only used on those hosts that provide it.
3707         * configure.in: Add sqrt() to list of functions to be checked for.
3708         * config.in: Re-generated.
3709         * configure: Re-generated.
3710
3711 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3712
3713         * gencode.c (process_instructions): Call build_endian_shift when
3714         expanding STORE RIGHT, to fix swr.
3715         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3716         clear the high bits.
3717         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3718         Fix float to int conversions to produce signed values.
3719
3720 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3721
3722         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3723         (process_instructions): Correct handling of nor instruction.
3724         Correct shift count for 32 bit shift instructions. Correct sign
3725         extension for arithmetic shifts to not shift the number of bits in
3726         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3727         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3728         Fix madd.
3729         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3730         It's OK to have a mult follow a mult.  What's not OK is to have a
3731         mult follow an mfhi.
3732         (Convert): Comment out incorrect rounding code.
3733
3734 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3735
3736         * interp.c (sim_monitor): Improved monitor printf
3737         simulation. Tidied up simulator warnings, and added "--log" option
3738         for directing warning message output.
3739         * gencode.c: Use sim_warning() rather than WARNING macro.
3740
3741 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3742
3743         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3744         getopt1.o, rather than on gencode.c.  Link objects together.
3745         Don't link against -liberty.
3746         (gencode.o, getopt.o, getopt1.o): New targets.
3747         * gencode.c: Include <ctype.h> and "ansidecl.h".
3748         (AND): Undefine after including "ansidecl.h".
3749         (ULONG_MAX): Define if not defined.
3750         (OP_*): Don't define macros; now defined in opcode/mips.h.
3751         (main): Call my_strtoul rather than strtoul.
3752         (my_strtoul): New static function.
3753
3754 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3755
3756         * gencode.c (process_instructions):  Generate word64 and uword64
3757         instead of `long long' and `unsigned long long' data types.
3758         * interp.c:  #include sysdep.h to get signals, and define default
3759         for SIGBUS.
3760         * (Convert):  Work around for Visual-C++ compiler bug with type
3761         conversion.
3762         * support.h:  Make things compile under Visual-C++ by using
3763         __int64 instead of `long long'.  Change many refs to long long
3764         into word64/uword64 typedefs.
3765
3766 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3767
3768         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3769         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3770         (docdir): Removed.
3771         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3772         (AC_PROG_INSTALL): Added.
3773         (AC_PROG_CC): Moved to before configure.host call.
3774         * configure: Rebuilt.
3775
3776 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3777
3778         * configure.in: Define @SIMCONF@ depending on mips target.
3779         * configure: Rebuild.
3780         * Makefile.in (run): Add @SIMCONF@ to control simulator
3781         construction.
3782         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3783         * interp.c: Remove some debugging, provide more detailed error
3784         messages, update memory accesses to use LOADDRMASK.
3785
3786 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3787
3788         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3789         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3790         stamp-h.
3791         * configure: Rebuild.
3792         * config.in: New file, generated by autoheader.
3793         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3794         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3795         HAVE_ANINT and HAVE_AINT, as appropriate.
3796         * Makefile.in (run): Use @LIBS@ rather than -lm.
3797         (interp.o): Depend upon config.h.
3798         (Makefile): Just rebuild Makefile.
3799         (clean): Remove stamp-h.
3800         (mostlyclean): Make the same as clean, not as distclean.
3801         (config.h, stamp-h): New targets.
3802
3803 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3804
3805         * interp.c (ColdReset): Fix boolean test. Make all simulator
3806         globals static.
3807
3808 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3809
3810         * interp.c (xfer_direct_word, xfer_direct_long,
3811         swap_direct_word, swap_direct_long, xfer_big_word,
3812         xfer_big_long, xfer_little_word, xfer_little_long,
3813         swap_word,swap_long): Added.
3814         * interp.c (ColdReset): Provide function indirection to
3815         host<->simulated_target transfer routines.
3816         * interp.c (sim_store_register, sim_fetch_register): Updated to
3817         make use of indirected transfer routines.
3818
3819 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3820
3821         * gencode.c (process_instructions): Ensure FP ABS instruction
3822         recognised.
3823         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3824         system call support.
3825
3826 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3827
3828         * interp.c (sim_do_command): Complain if callback structure not
3829         initialised.
3830
3831 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3832
3833         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3834         support for Sun hosts.
3835         * Makefile.in (gencode): Ensure the host compiler and libraries
3836         used for cross-hosted build.
3837
3838 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3839
3840         * interp.c, gencode.c: Some more (TODO) tidying.
3841
3842 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3843
3844         * gencode.c, interp.c: Replaced explicit long long references with
3845         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3846         * support.h (SET64LO, SET64HI): Macros added.
3847
3848 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3849
3850         * configure: Regenerate with autoconf 2.7.
3851
3852 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3853
3854         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3855         * support.h: Remove superfluous "1" from #if.
3856         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3857
3858 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3859
3860         * interp.c (StoreFPR): Control UndefinedResult() call on
3861         WARN_RESULT manifest.
3862
3863 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3864
3865         * gencode.c: Tidied instruction decoding, and added FP instruction
3866         support.
3867
3868         * interp.c: Added dineroIII, and BSD profiling support. Also
3869         run-time FP handling.
3870
3871 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3872
3873         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3874         gencode.c, interp.c, support.h: created.