1 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
3 * configure: Regenerate.
5 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
7 * configure: Regenerate to track ../common/common.m4 changes.
10 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
11 Daniel Jacobowitz <dan@codesourcery.com>
12 Joseph Myers <joseph@codesourcery.com>
14 * configure: Regenerate.
16 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
18 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
19 that unconditionally allows fmt_ps.
20 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
21 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
22 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
23 filter from 64,f to 32,f.
24 (PREFX): Change filter from 64 to 32.
25 (LDXC1, LUXC1): Provide separate mips32r2 implementations
26 that use do_load_double instead of do_load. Make both LUXC1
27 versions unpredictable if SizeFGR () != 64.
28 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
29 instead of do_store. Remove unused variable. Make both SUXC1
30 versions unpredictable if SizeFGR () != 64.
32 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
34 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
35 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
38 2007-09-04 Nick Clifton <nickc@redhat.com>
40 * interp.c (options enum): Add OPTION_INFO_MEMORY.
41 (display_mem_info): New static variable.
42 (mips_option_handler): Handle OPTION_INFO_MEMORY.
43 (mips_options): Add info-memory and memory-info.
44 (sim_open): After processing the command line and board
45 specification, check display_mem_info. If it is set then
46 call the real handler for the --memory-info command line
49 2007-08-24 Joel Brobecker <brobecker@adacore.com>
51 * configure.ac: Change license of multi-run.c to GPL version 3.
52 * configure: Regenerate.
54 2007-06-28 Richard Sandiford <richard@codesourcery.com>
56 * configure.ac, configure: Revert last patch.
58 2007-06-26 Richard Sandiford <richard@codesourcery.com>
60 * configure.ac (sim_mipsisa3264_configs): New variable.
61 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
62 every configuration support all four targets, using the triplet to
63 determine the default.
64 * configure: Regenerate.
66 2007-06-25 Richard Sandiford <richard@codesourcery.com>
68 * Makefile.in (m16run.o): New rule.
70 2007-05-15 Thiemo Seufer <ths@mips.com>
72 * mips3264r2.igen (DSHD): Fix compile warning.
74 2007-05-14 Thiemo Seufer <ths@mips.com>
76 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
77 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
78 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
79 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
82 2007-03-01 Thiemo Seufer <ths@mips.com>
84 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
87 2007-02-20 Thiemo Seufer <ths@mips.com>
89 * dsp.igen: Update copyright notice.
90 * dsp2.igen: Fix copyright notice.
92 2007-02-20 Thiemo Seufer <ths@mips.com>
93 Chao-Ying Fu <fu@mips.com>
95 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
96 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
97 Add dsp2 to sim_igen_machine.
98 * configure: Regenerate.
99 * dsp.igen (do_ph_op): Add MUL support when op = 2.
100 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
101 (mulq_rs.ph): Use do_ph_mulq.
102 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
103 * mips.igen: Add dsp2 model and include dsp2.igen.
104 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
105 for *mips32r2, *mips64r2, *dsp.
106 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
107 for *mips32r2, *mips64r2, *dsp2.
108 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
110 2007-02-19 Thiemo Seufer <ths@mips.com>
111 Nigel Stephens <nigel@mips.com>
113 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
114 jumps with hazard barrier.
116 2007-02-19 Thiemo Seufer <ths@mips.com>
117 Nigel Stephens <nigel@mips.com>
119 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
120 after each call to sim_io_write.
122 2007-02-19 Thiemo Seufer <ths@mips.com>
123 Nigel Stephens <nigel@mips.com>
125 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
126 supported by this simulator.
127 (decode_coproc): Recognise additional CP0 Config registers
130 2007-02-19 Thiemo Seufer <ths@mips.com>
131 Nigel Stephens <nigel@mips.com>
132 David Ung <davidu@mips.com>
134 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
135 uninterpreted formats. If fmt is one of the uninterpreted types
136 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
137 fmt_word, and fmt_uninterpreted_64 like fmt_long.
138 (store_fpr): When writing an invalid odd register, set the
139 matching even register to fmt_unknown, not the following register.
140 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
141 the the memory window at offset 0 set by --memory-size command
143 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
145 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
147 (sim_monitor): When returning the memory size to the MIPS
148 application, use the value in STATE_MEM_SIZE, not an arbitrary
150 (cop_lw): Don' mess around with FPR_STATE, just pass
151 fmt_uninterpreted_32 to StoreFPR.
153 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
155 * mips.igen (not_word_value): Single version for mips32, mips64
158 2007-02-19 Thiemo Seufer <ths@mips.com>
159 Nigel Stephens <nigel@mips.com>
161 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
164 2007-02-17 Thiemo Seufer <ths@mips.com>
166 * configure.ac (mips*-sde-elf*): Move in front of generic machine
168 * configure: Regenerate.
170 2007-02-17 Thiemo Seufer <ths@mips.com>
172 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
173 Add mdmx to sim_igen_machine.
174 (mipsisa64*-*-*): Likewise. Remove dsp.
175 (mipsisa32*-*-*): Remove dsp.
176 * configure: Regenerate.
178 2007-02-13 Thiemo Seufer <ths@mips.com>
180 * configure.ac: Add mips*-sde-elf* target.
181 * configure: Regenerate.
183 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
185 * acconfig.h: Remove.
186 * config.in, configure: Regenerate.
188 2006-11-07 Thiemo Seufer <ths@mips.com>
190 * dsp.igen (do_w_op): Fix compiler warning.
192 2006-08-29 Thiemo Seufer <ths@mips.com>
193 David Ung <davidu@mips.com>
195 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
197 * configure: Regenerate.
198 * mips.igen (model): Add smartmips.
199 (MADDU): Increment ACX if carry.
200 (do_mult): Clear ACX.
201 (ROR,RORV): Add smartmips.
202 (include): Include smartmips.igen.
203 * sim-main.h (ACX): Set to REGISTERS[89].
204 * smartmips.igen: New file.
206 2006-08-29 Thiemo Seufer <ths@mips.com>
207 David Ung <davidu@mips.com>
209 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
210 mips3264r2.igen. Add missing dependency rules.
211 * m16e.igen: Support for mips16e save/restore instructions.
213 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
215 * configure: Regenerated.
217 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
219 * configure: Regenerated.
221 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
223 * configure: Regenerated.
225 2006-05-15 Chao-ying Fu <fu@mips.com>
227 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
229 2006-04-18 Nick Clifton <nickc@redhat.com>
231 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
234 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
236 * configure: Regenerate.
238 2005-12-14 Chao-ying Fu <fu@mips.com>
240 * Makefile.in (SIM_OBJS): Add dsp.o.
241 (dsp.o): New dependency.
242 (IGEN_INCLUDE): Add dsp.igen.
243 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
244 mipsisa64*-*-*): Add dsp to sim_igen_machine.
245 * configure: Regenerate.
246 * mips.igen: Add dsp model and include dsp.igen.
247 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
248 because these instructions are extended in DSP ASE.
249 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
250 adding 6 DSP accumulator registers and 1 DSP control register.
251 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
252 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
253 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
254 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
255 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
256 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
257 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
258 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
259 DSPCR_CCOND_SMASK): New define.
260 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
261 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
263 2005-07-08 Ian Lance Taylor <ian@airs.com>
265 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
267 2005-06-16 David Ung <davidu@mips.com>
268 Nigel Stephens <nigel@mips.com>
270 * mips.igen: New mips16e model and include m16e.igen.
271 (check_u64): Add mips16e tag.
272 * m16e.igen: New file for MIPS16e instructions.
273 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
274 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
276 * configure: Regenerate.
278 2005-05-26 David Ung <davidu@mips.com>
280 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
281 tags to all instructions which are applicable to the new ISAs.
282 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
284 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
286 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
288 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
289 * configure: Regenerate.
291 2005-03-23 Mark Kettenis <kettenis@gnu.org>
293 * configure: Regenerate.
295 2005-01-14 Andrew Cagney <cagney@gnu.org>
297 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
298 explicit call to AC_CONFIG_HEADER.
299 * configure: Regenerate.
301 2005-01-12 Andrew Cagney <cagney@gnu.org>
303 * configure.ac: Update to use ../common/common.m4.
304 * configure: Re-generate.
306 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
308 * configure: Regenerated to track ../common/aclocal.m4 changes.
310 2005-01-07 Andrew Cagney <cagney@gnu.org>
312 * configure.ac: Rename configure.in, require autoconf 2.59.
313 * configure: Re-generate.
315 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
317 * configure: Regenerate for ../common/aclocal.m4 update.
319 2004-09-24 Monika Chaddha <monika@acmet.com>
321 Committed by Andrew Cagney.
322 * m16.igen (CMP, CMPI): Fix assembler.
324 2004-08-18 Chris Demetriou <cgd@broadcom.com>
326 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
327 * configure: Regenerate.
329 2004-06-25 Chris Demetriou <cgd@broadcom.com>
331 * configure.in (sim_m16_machine): Include mipsIII.
332 * configure: Regenerate.
334 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
336 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
338 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
340 2004-04-10 Chris Demetriou <cgd@broadcom.com>
342 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
344 2004-04-09 Chris Demetriou <cgd@broadcom.com>
346 * mips.igen (check_fmt): Remove.
347 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
348 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
349 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
350 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
351 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
352 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
353 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
354 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
355 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
356 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
358 2004-04-09 Chris Demetriou <cgd@broadcom.com>
360 * sb1.igen (check_sbx): New function.
361 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
363 2004-03-29 Chris Demetriou <cgd@broadcom.com>
364 Richard Sandiford <rsandifo@redhat.com>
366 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
367 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
368 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
369 separate implementations for mipsIV and mipsV. Use new macros to
370 determine whether the restrictions apply.
372 2004-01-19 Chris Demetriou <cgd@broadcom.com>
374 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
375 (check_mult_hilo): Improve comments.
376 (check_div_hilo): Likewise. Also, fork off a new version
377 to handle mips32/mips64 (since there are no hazards to check
380 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
382 * mips.igen (do_dmultx): Fix check for negative operands.
384 2003-05-16 Ian Lance Taylor <ian@airs.com>
386 * Makefile.in (SHELL): Make sure this is defined.
387 (various): Use $(SHELL) whenever we invoke move-if-change.
389 2003-05-03 Chris Demetriou <cgd@broadcom.com>
391 * cp1.c: Tweak attribution slightly.
394 * mdmx.igen: Likewise.
395 * mips3d.igen: Likewise.
396 * sb1.igen: Likewise.
398 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
400 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
403 2003-02-27 Andrew Cagney <cagney@redhat.com>
405 * interp.c (sim_open): Rename _bfd to bfd.
406 (sim_create_inferior): Ditto.
408 2003-01-14 Chris Demetriou <cgd@broadcom.com>
410 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
412 2003-01-14 Chris Demetriou <cgd@broadcom.com>
414 * mips.igen (EI, DI): Remove.
416 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
418 * Makefile.in (tmp-run-multi): Fix mips16 filter.
420 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
421 Andrew Cagney <ac131313@redhat.com>
422 Gavin Romig-Koch <gavin@redhat.com>
423 Graydon Hoare <graydon@redhat.com>
424 Aldy Hernandez <aldyh@redhat.com>
425 Dave Brolley <brolley@redhat.com>
426 Chris Demetriou <cgd@broadcom.com>
428 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
429 (sim_mach_default): New variable.
430 (mips64vr-*-*, mips64vrel-*-*): New configurations.
431 Add a new simulator generator, MULTI.
432 * configure: Regenerate.
433 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
434 (multi-run.o): New dependency.
435 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
436 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
437 (tmp-multi): Combine them.
438 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
439 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
440 (distclean-extra): New rule.
441 * sim-main.h: Include bfd.h.
442 (MIPS_MACH): New macro.
443 * mips.igen (vr4120, vr5400, vr5500): New models.
444 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
445 * vr.igen: Replace with new version.
447 2003-01-04 Chris Demetriou <cgd@broadcom.com>
449 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
450 * configure: Regenerate.
452 2002-12-31 Chris Demetriou <cgd@broadcom.com>
454 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
455 * mips.igen: Remove all invocations of check_branch_bug and
458 2002-12-16 Chris Demetriou <cgd@broadcom.com>
460 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
462 2002-07-30 Chris Demetriou <cgd@broadcom.com>
464 * mips.igen (do_load_double, do_store_double): New functions.
465 (LDC1, SDC1): Rename to...
466 (LDC1b, SDC1b): respectively.
467 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
469 2002-07-29 Michael Snyder <msnyder@redhat.com>
471 * cp1.c (fp_recip2): Modify initialization expression so that
472 GCC will recognize it as constant.
474 2002-06-18 Chris Demetriou <cgd@broadcom.com>
476 * mdmx.c (SD_): Delete.
477 (Unpredictable): Re-define, for now, to directly invoke
478 unpredictable_action().
479 (mdmx_acc_op): Fix error in .ob immediate handling.
481 2002-06-18 Andrew Cagney <cagney@redhat.com>
483 * interp.c (sim_firmware_command): Initialize `address'.
485 2002-06-16 Andrew Cagney <ac131313@redhat.com>
487 * configure: Regenerated to track ../common/aclocal.m4 changes.
489 2002-06-14 Chris Demetriou <cgd@broadcom.com>
490 Ed Satterthwaite <ehs@broadcom.com>
492 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
493 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
494 * mips.igen: Include mips3d.igen.
495 (mips3d): New model name for MIPS-3D ASE instructions.
496 (CVT.W.fmt): Don't use this instruction for word (source) format
498 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
499 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
500 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
501 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
502 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
503 (RSquareRoot1, RSquareRoot2): New macros.
504 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
505 (fp_rsqrt2): New functions.
506 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
507 * configure: Regenerate.
509 2002-06-13 Chris Demetriou <cgd@broadcom.com>
510 Ed Satterthwaite <ehs@broadcom.com>
512 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
513 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
514 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
515 (convert): Note that this function is not used for paired-single
517 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
518 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
519 (check_fmt_p): Enable paired-single support.
520 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
521 (PUU.PS): New instructions.
522 (CVT.S.fmt): Don't use this instruction for paired-single format
524 * sim-main.h (FP_formats): New value 'fmt_ps.'
525 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
526 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
528 2002-06-12 Chris Demetriou <cgd@broadcom.com>
530 * mips.igen: Fix formatting of function calls in
533 2002-06-12 Chris Demetriou <cgd@broadcom.com>
535 * mips.igen (MOVN, MOVZ): Trace result.
536 (TNEI): Print "tnei" as the opcode name in traces.
537 (CEIL.W): Add disassembly string for traces.
538 (RSQRT.fmt): Make location of disassembly string consistent
539 with other instructions.
541 2002-06-12 Chris Demetriou <cgd@broadcom.com>
543 * mips.igen (X): Delete unused function.
545 2002-06-08 Andrew Cagney <cagney@redhat.com>
547 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
549 2002-06-07 Chris Demetriou <cgd@broadcom.com>
550 Ed Satterthwaite <ehs@broadcom.com>
552 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
553 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
554 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
555 (fp_nmsub): New prototypes.
556 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
557 (NegMultiplySub): New defines.
558 * mips.igen (RSQRT.fmt): Use RSquareRoot().
559 (MADD.D, MADD.S): Replace with...
560 (MADD.fmt): New instruction.
561 (MSUB.D, MSUB.S): Replace with...
562 (MSUB.fmt): New instruction.
563 (NMADD.D, NMADD.S): Replace with...
564 (NMADD.fmt): New instruction.
565 (NMSUB.D, MSUB.S): Replace with...
566 (NMSUB.fmt): New instruction.
568 2002-06-07 Chris Demetriou <cgd@broadcom.com>
569 Ed Satterthwaite <ehs@broadcom.com>
571 * cp1.c: Fix more comment spelling and formatting.
572 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
573 (denorm_mode): New function.
574 (fpu_unary, fpu_binary): Round results after operation, collect
575 status from rounding operations, and update the FCSR.
576 (convert): Collect status from integer conversions and rounding
577 operations, and update the FCSR. Adjust NaN values that result
578 from conversions. Convert to use sim_io_eprintf rather than
579 fprintf, and remove some debugging code.
580 * cp1.h (fenr_FS): New define.
582 2002-06-07 Chris Demetriou <cgd@broadcom.com>
584 * cp1.c (convert): Remove unusable debugging code, and move MIPS
585 rounding mode to sim FP rounding mode flag conversion code into...
586 (rounding_mode): New function.
588 2002-06-07 Chris Demetriou <cgd@broadcom.com>
590 * cp1.c: Clean up formatting of a few comments.
591 (value_fpr): Reformat switch statement.
593 2002-06-06 Chris Demetriou <cgd@broadcom.com>
594 Ed Satterthwaite <ehs@broadcom.com>
597 * sim-main.h: Include cp1.h.
598 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
599 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
600 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
601 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
602 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
603 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
604 * cp1.c: Don't include sim-fpu.h; already included by
605 sim-main.h. Clean up formatting of some comments.
606 (NaN, Equal, Less): Remove.
607 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
608 (fp_cmp): New functions.
609 * mips.igen (do_c_cond_fmt): Remove.
610 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
611 Compare. Add result tracing.
612 (CxC1): Remove, replace with...
613 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
614 (DMxC1): Remove, replace with...
615 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
616 (MxC1): Remove, replace with...
617 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
619 2002-06-04 Chris Demetriou <cgd@broadcom.com>
621 * sim-main.h (FGRIDX): Remove, replace all uses with...
622 (FGR_BASE): New macro.
623 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
624 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
625 (NR_FGR, FGR): Likewise.
626 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
627 * mips.igen: Likewise.
629 2002-06-04 Chris Demetriou <cgd@broadcom.com>
631 * cp1.c: Add an FSF Copyright notice to this file.
633 2002-06-04 Chris Demetriou <cgd@broadcom.com>
634 Ed Satterthwaite <ehs@broadcom.com>
636 * cp1.c (Infinity): Remove.
637 * sim-main.h (Infinity): Likewise.
639 * cp1.c (fp_unary, fp_binary): New functions.
640 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
641 (fp_sqrt): New functions, implemented in terms of the above.
642 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
643 (Recip, SquareRoot): Remove (replaced by functions above).
644 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
645 (fp_recip, fp_sqrt): New prototypes.
646 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
647 (Recip, SquareRoot): Replace prototypes with #defines which
648 invoke the functions above.
650 2002-06-03 Chris Demetriou <cgd@broadcom.com>
652 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
653 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
654 file, remove PARAMS from prototypes.
655 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
656 simulator state arguments.
657 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
658 pass simulator state arguments.
659 * cp1.c (SD): Redefine as CPU_STATE(cpu).
660 (store_fpr, convert): Remove 'sd' argument.
661 (value_fpr): Likewise. Convert to use 'SD' instead.
663 2002-06-03 Chris Demetriou <cgd@broadcom.com>
665 * cp1.c (Min, Max): Remove #if 0'd functions.
666 * sim-main.h (Min, Max): Remove.
668 2002-06-03 Chris Demetriou <cgd@broadcom.com>
670 * cp1.c: fix formatting of switch case and default labels.
671 * interp.c: Likewise.
672 * sim-main.c: Likewise.
674 2002-06-03 Chris Demetriou <cgd@broadcom.com>
676 * cp1.c: Clean up comments which describe FP formats.
677 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
679 2002-06-03 Chris Demetriou <cgd@broadcom.com>
680 Ed Satterthwaite <ehs@broadcom.com>
682 * configure.in (mipsisa64sb1*-*-*): New target for supporting
683 Broadcom SiByte SB-1 processor configurations.
684 * configure: Regenerate.
685 * sb1.igen: New file.
686 * mips.igen: Include sb1.igen.
688 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
689 * mdmx.igen: Add "sb1" model to all appropriate functions and
691 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
692 (ob_func, ob_acc): Reference the above.
693 (qh_acc): Adjust to keep the same size as ob_acc.
694 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
695 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
697 2002-06-03 Chris Demetriou <cgd@broadcom.com>
699 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
701 2002-06-02 Chris Demetriou <cgd@broadcom.com>
702 Ed Satterthwaite <ehs@broadcom.com>
704 * mips.igen (mdmx): New (pseudo-)model.
705 * mdmx.c, mdmx.igen: New files.
706 * Makefile.in (SIM_OBJS): Add mdmx.o.
707 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
709 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
710 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
711 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
712 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
713 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
714 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
715 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
716 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
717 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
718 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
719 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
720 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
721 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
722 (qh_fmtsel): New macros.
723 (_sim_cpu): New member "acc".
724 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
725 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
727 2002-05-01 Chris Demetriou <cgd@broadcom.com>
729 * interp.c: Use 'deprecated' rather than 'depreciated.'
730 * sim-main.h: Likewise.
732 2002-05-01 Chris Demetriou <cgd@broadcom.com>
734 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
735 which wouldn't compile anyway.
736 * sim-main.h (unpredictable_action): New function prototype.
737 (Unpredictable): Define to call igen function unpredictable().
738 (NotWordValue): New macro to call igen function not_word_value().
739 (UndefinedResult): Remove.
740 * interp.c (undefined_result): Remove.
741 (unpredictable_action): New function.
742 * mips.igen (not_word_value, unpredictable): New functions.
743 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
744 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
745 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
746 NotWordValue() to check for unpredictable inputs, then
747 Unpredictable() to handle them.
749 2002-02-24 Chris Demetriou <cgd@broadcom.com>
751 * mips.igen: Fix formatting of calls to Unpredictable().
753 2002-04-20 Andrew Cagney <ac131313@redhat.com>
755 * interp.c (sim_open): Revert previous change.
757 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
759 * interp.c (sim_open): Disable chunk of code that wrote code in
760 vector table entries.
762 2002-03-19 Chris Demetriou <cgd@broadcom.com>
764 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
765 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
768 2002-03-19 Chris Demetriou <cgd@broadcom.com>
770 * cp1.c: Fix many formatting issues.
772 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
774 * cp1.c (fpu_format_name): New function to replace...
775 (DOFMT): This. Delete, and update all callers.
776 (fpu_rounding_mode_name): New function to replace...
777 (RMMODE): This. Delete, and update all callers.
779 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
781 * interp.c: Move FPU support routines from here to...
782 * cp1.c: Here. New file.
783 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
786 2002-03-12 Chris Demetriou <cgd@broadcom.com>
788 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
789 * mips.igen (mips32, mips64): New models, add to all instructions
790 and functions as appropriate.
791 (loadstore_ea, check_u64): New variant for model mips64.
792 (check_fmt_p): New variant for models mipsV and mips64, remove
793 mipsV model marking fro other variant.
796 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
797 for mips32 and mips64.
798 (DCLO, DCLZ): New instructions for mips64.
800 2002-03-07 Chris Demetriou <cgd@broadcom.com>
802 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
803 immediate or code as a hex value with the "%#lx" format.
804 (ANDI): Likewise, and fix printed instruction name.
806 2002-03-05 Chris Demetriou <cgd@broadcom.com>
808 * sim-main.h (UndefinedResult, Unpredictable): New macros
809 which currently do nothing.
811 2002-03-05 Chris Demetriou <cgd@broadcom.com>
813 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
814 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
815 (status_CU3): New definitions.
817 * sim-main.h (ExceptionCause): Add new values for MIPS32
818 and MIPS64: MDMX, MCheck, CacheErr. Update comments
819 for DebugBreakPoint and NMIReset to note their status in
821 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
822 (SignalExceptionCacheErr): New exception macros.
824 2002-03-05 Chris Demetriou <cgd@broadcom.com>
826 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
827 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
829 (SignalExceptionCoProcessorUnusable): Take as argument the
830 unusable coprocessor number.
832 2002-03-05 Chris Demetriou <cgd@broadcom.com>
834 * mips.igen: Fix formatting of all SignalException calls.
836 2002-03-05 Chris Demetriou <cgd@broadcom.com>
838 * sim-main.h (SIGNEXTEND): Remove.
840 2002-03-04 Chris Demetriou <cgd@broadcom.com>
842 * mips.igen: Remove gencode comment from top of file, fix
843 spelling in another comment.
845 2002-03-04 Chris Demetriou <cgd@broadcom.com>
847 * mips.igen (check_fmt, check_fmt_p): New functions to check
848 whether specific floating point formats are usable.
849 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
850 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
851 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
852 Use the new functions.
853 (do_c_cond_fmt): Remove format checks...
854 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
856 2002-03-03 Chris Demetriou <cgd@broadcom.com>
858 * mips.igen: Fix formatting of check_fpu calls.
860 2002-03-03 Chris Demetriou <cgd@broadcom.com>
862 * mips.igen (FLOOR.L.fmt): Store correct destination register.
864 2002-03-03 Chris Demetriou <cgd@broadcom.com>
866 * mips.igen: Remove whitespace at end of lines.
868 2002-03-02 Chris Demetriou <cgd@broadcom.com>
870 * mips.igen (loadstore_ea): New function to do effective
871 address calculations.
872 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
873 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
874 CACHE): Use loadstore_ea to do effective address computations.
876 2002-03-02 Chris Demetriou <cgd@broadcom.com>
878 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
879 * mips.igen (LL, CxC1, MxC1): Likewise.
881 2002-03-02 Chris Demetriou <cgd@broadcom.com>
883 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
884 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
885 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
886 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
887 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
888 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
889 Don't split opcode fields by hand, use the opcode field values
892 2002-03-01 Chris Demetriou <cgd@broadcom.com>
894 * mips.igen (do_divu): Fix spacing.
896 * mips.igen (do_dsllv): Move to be right before DSLLV,
897 to match the rest of the do_<shift> functions.
899 2002-03-01 Chris Demetriou <cgd@broadcom.com>
901 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
902 DSRL32, do_dsrlv): Trace inputs and results.
904 2002-03-01 Chris Demetriou <cgd@broadcom.com>
906 * mips.igen (CACHE): Provide instruction-printing string.
908 * interp.c (signal_exception): Comment tokens after #endif.
910 2002-02-28 Chris Demetriou <cgd@broadcom.com>
912 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
913 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
914 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
915 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
916 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
917 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
918 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
919 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
921 2002-02-28 Chris Demetriou <cgd@broadcom.com>
923 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
924 instruction-printing string.
925 (LWU): Use '64' as the filter flag.
927 2002-02-28 Chris Demetriou <cgd@broadcom.com>
929 * mips.igen (SDXC1): Fix instruction-printing string.
931 2002-02-28 Chris Demetriou <cgd@broadcom.com>
933 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
936 2002-02-27 Chris Demetriou <cgd@broadcom.com>
938 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
941 2002-02-27 Chris Demetriou <cgd@broadcom.com>
943 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
944 add a comma) so that it more closely match the MIPS ISA
945 documentation opcode partitioning.
946 (PREF): Put useful names on opcode fields, and include
947 instruction-printing string.
949 2002-02-27 Chris Demetriou <cgd@broadcom.com>
951 * mips.igen (check_u64): New function which in the future will
952 check whether 64-bit instructions are usable and signal an
953 exception if not. Currently a no-op.
954 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
955 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
956 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
957 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
959 * mips.igen (check_fpu): New function which in the future will
960 check whether FPU instructions are usable and signal an exception
961 if not. Currently a no-op.
962 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
963 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
964 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
965 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
966 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
967 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
968 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
969 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
971 2002-02-27 Chris Demetriou <cgd@broadcom.com>
973 * mips.igen (do_load_left, do_load_right): Move to be immediately
975 (do_store_left, do_store_right): Move to be immediately following
978 2002-02-27 Chris Demetriou <cgd@broadcom.com>
980 * mips.igen (mipsV): New model name. Also, add it to
981 all instructions and functions where it is appropriate.
983 2002-02-18 Chris Demetriou <cgd@broadcom.com>
985 * mips.igen: For all functions and instructions, list model
986 names that support that instruction one per line.
988 2002-02-11 Chris Demetriou <cgd@broadcom.com>
990 * mips.igen: Add some additional comments about supported
991 models, and about which instructions go where.
992 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
993 order as is used in the rest of the file.
995 2002-02-11 Chris Demetriou <cgd@broadcom.com>
997 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
998 indicating that ALU32_END or ALU64_END are there to check
1000 (DADD): Likewise, but also remove previous comment about
1003 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1005 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1006 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1007 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1008 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1009 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1010 fields (i.e., add and move commas) so that they more closely
1011 match the MIPS ISA documentation opcode partitioning.
1013 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1015 * mips.igen (ADDI): Print immediate value.
1016 (BREAK): Print code.
1017 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1018 (SLL): Print "nop" specially, and don't run the code
1019 that does the shift for the "nop" case.
1021 2001-11-17 Fred Fish <fnf@redhat.com>
1023 * sim-main.h (float_operation): Move enum declaration outside
1024 of _sim_cpu struct declaration.
1026 2001-04-12 Jim Blandy <jimb@redhat.com>
1028 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1029 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1031 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1032 PENDING_FILL, and you can get the intended effect gracefully by
1033 calling PENDING_SCHED directly.
1035 2001-02-23 Ben Elliston <bje@redhat.com>
1037 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1038 already defined elsewhere.
1040 2001-02-19 Ben Elliston <bje@redhat.com>
1042 * sim-main.h (sim_monitor): Return an int.
1043 * interp.c (sim_monitor): Add return values.
1044 (signal_exception): Handle error conditions from sim_monitor.
1046 2001-02-08 Ben Elliston <bje@redhat.com>
1048 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1049 (store_memory): Likewise, pass cia to sim_core_write*.
1051 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1053 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1054 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1056 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1058 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1059 * Makefile.in: Don't delete *.igen when cleaning directory.
1061 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1063 * m16.igen (break): Call SignalException not sim_engine_halt.
1065 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1067 From Jason Eckhardt:
1068 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1070 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1072 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1074 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1076 * mips.igen (do_dmultx): Fix typo.
1078 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1080 * configure: Regenerated to track ../common/aclocal.m4 changes.
1082 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1084 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1086 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1088 * sim-main.h (GPR_CLEAR): Define macro.
1090 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1092 * interp.c (decode_coproc): Output long using %lx and not %s.
1094 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1096 * interp.c (sim_open): Sort & extend dummy memory regions for
1097 --board=jmr3904 for eCos.
1099 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1101 * configure: Regenerated.
1103 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1105 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1106 calls, conditional on the simulator being in verbose mode.
1108 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1110 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1111 cache don't get ReservedInstruction traps.
1113 1999-11-29 Mark Salter <msalter@cygnus.com>
1115 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1116 to clear status bits in sdisr register. This is how the hardware works.
1118 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1119 being used by cygmon.
1121 1999-11-11 Andrew Haley <aph@cygnus.com>
1123 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1126 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1128 * mips.igen (MULT): Correct previous mis-applied patch.
1130 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1132 * mips.igen (delayslot32): Handle sequence like
1133 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1134 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1135 (MULT): Actually pass the third register...
1137 1999-09-03 Mark Salter <msalter@cygnus.com>
1139 * interp.c (sim_open): Added more memory aliases for additional
1140 hardware being touched by cygmon on jmr3904 board.
1142 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1144 * configure: Regenerated to track ../common/aclocal.m4 changes.
1146 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1148 * interp.c (sim_store_register): Handle case where client - GDB -
1149 specifies that a 4 byte register is 8 bytes in size.
1150 (sim_fetch_register): Ditto.
1152 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1154 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1155 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1156 (idt_monitor_base): Base address for IDT monitor traps.
1157 (pmon_monitor_base): Ditto for PMON.
1158 (lsipmon_monitor_base): Ditto for LSI PMON.
1159 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1160 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1161 (sim_firmware_command): New function.
1162 (mips_option_handler): Call it for OPTION_FIRMWARE.
1163 (sim_open): Allocate memory for idt_monitor region. If "--board"
1164 option was given, add no monitor by default. Add BREAK hooks only if
1165 monitors are also there.
1167 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1169 * interp.c (sim_monitor): Flush output before reading input.
1171 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1173 * tconfig.in (SIM_HANDLES_LMA): Always define.
1175 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1177 From Mark Salter <msalter@cygnus.com>:
1178 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1179 (sim_open): Add setup for BSP board.
1181 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1183 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1184 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1185 them as unimplemented.
1187 1999-05-08 Felix Lee <flee@cygnus.com>
1189 * configure: Regenerated to track ../common/aclocal.m4 changes.
1191 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1193 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1195 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1197 * configure.in: Any mips64vr5*-*-* target should have
1198 -DTARGET_ENABLE_FR=1.
1199 (default_endian): Any mips64vr*el-*-* target should default to
1201 * configure: Re-generate.
1203 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1205 * mips.igen (ldl): Extend from _16_, not 32.
1207 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1209 * interp.c (sim_store_register): Force registers written to by GDB
1210 into an un-interpreted state.
1212 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1214 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1215 CPU, start periodic background I/O polls.
1216 (tx3904sio_poll): New function: periodic I/O poller.
1218 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1220 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1222 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1224 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1227 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1229 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1230 (load_word): Call SIM_CORE_SIGNAL hook on error.
1231 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1232 starting. For exception dispatching, pass PC instead of NULL_CIA.
1233 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1234 * sim-main.h (COP0_BADVADDR): Define.
1235 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1236 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1237 (_sim_cpu): Add exc_* fields to store register value snapshots.
1238 * mips.igen (*): Replace memory-related SignalException* calls
1239 with references to SIM_CORE_SIGNAL hook.
1241 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1243 * sim-main.c (*): Minor warning cleanups.
1245 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1247 * m16.igen (DADDIU5): Correct type-o.
1249 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1251 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1254 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1256 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1258 (interp.o): Add dependency on itable.h
1259 (oengine.c, gencode): Delete remaining references.
1260 (BUILT_SRC_FROM_GEN): Clean up.
1262 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1265 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1266 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1267 tmp-run-hack) : New.
1268 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1269 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1270 Drop the "64" qualifier to get the HACK generator working.
1271 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1272 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1273 qualifier to get the hack generator working.
1274 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1275 (DSLL): Use do_dsll.
1276 (DSLLV): Use do_dsllv.
1277 (DSRA): Use do_dsra.
1278 (DSRL): Use do_dsrl.
1279 (DSRLV): Use do_dsrlv.
1280 (BC1): Move *vr4100 to get the HACK generator working.
1281 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1282 get the HACK generator working.
1283 (MACC) Rename to get the HACK generator working.
1284 (DMACC,MACCS,DMACCS): Add the 64.
1286 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1288 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1289 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1291 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1293 * mips/interp.c (DEBUG): Cleanups.
1295 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1297 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1298 (tx3904sio_tickle): fflush after a stdout character output.
1300 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1302 * interp.c (sim_close): Uninstall modules.
1304 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1306 * sim-main.h, interp.c (sim_monitor): Change to global
1309 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1311 * configure.in (vr4100): Only include vr4100 instructions in
1313 * configure: Re-generate.
1314 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1316 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1318 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1319 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1322 * configure.in (sim_default_gen, sim_use_gen): Replace with
1324 (--enable-sim-igen): Delete config option. Always using IGEN.
1325 * configure: Re-generate.
1327 * Makefile.in (gencode): Kill, kill, kill.
1330 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1332 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1333 bit mips16 igen simulator.
1334 * configure: Re-generate.
1336 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1337 as part of vr4100 ISA.
1338 * vr.igen: Mark all instructions as 64 bit only.
1340 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1342 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1345 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1347 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1348 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1349 * configure: Re-generate.
1351 * m16.igen (BREAK): Define breakpoint instruction.
1352 (JALX32): Mark instruction as mips16 and not r3900.
1353 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1355 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1357 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1359 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1360 insn as a debug breakpoint.
1362 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1364 (PENDING_SCHED): Clean up trace statement.
1365 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1366 (PENDING_FILL): Delay write by only one cycle.
1367 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1369 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1371 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1373 (pending_tick): Move incrementing of index to FOR statement.
1374 (pending_tick): Only update PENDING_OUT after a write has occured.
1376 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1378 * configure: Re-generate.
1380 * interp.c (sim_engine_run OLD): Delete explicit call to
1381 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1383 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1385 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1386 interrupt level number to match changed SignalExceptionInterrupt
1389 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1391 * interp.c: #include "itable.h" if WITH_IGEN.
1392 (get_insn_name): New function.
1393 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1394 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1396 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1398 * configure: Rebuilt to inhale new common/aclocal.m4.
1400 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1402 * dv-tx3904sio.c: Include sim-assert.h.
1404 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1406 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1407 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1408 Reorganize target-specific sim-hardware checks.
1409 * configure: rebuilt.
1410 * interp.c (sim_open): For tx39 target boards, set
1411 OPERATING_ENVIRONMENT, add tx3904sio devices.
1412 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1413 ROM executables. Install dv-sockser into sim-modules list.
1415 * dv-tx3904irc.c: Compiler warning clean-up.
1416 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1417 frequent hw-trace messages.
1419 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1421 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1423 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1425 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1427 * vr.igen: New file.
1428 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1429 * mips.igen: Define vr4100 model. Include vr.igen.
1430 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1432 * mips.igen (check_mf_hilo): Correct check.
1434 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1436 * sim-main.h (interrupt_event): Add prototype.
1438 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1439 register_ptr, register_value.
1440 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1442 * sim-main.h (tracefh): Make extern.
1444 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1446 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1447 Reduce unnecessarily high timer event frequency.
1448 * dv-tx3904cpu.c: Ditto for interrupt event.
1450 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1452 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1454 (interrupt_event): Made non-static.
1456 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1457 interchange of configuration values for external vs. internal
1460 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1462 * mips.igen (BREAK): Moved code to here for
1463 simulator-reserved break instructions.
1464 * gencode.c (build_instruction): Ditto.
1465 * interp.c (signal_exception): Code moved from here. Non-
1466 reserved instructions now use exception vector, rather
1468 * sim-main.h: Moved magic constants to here.
1470 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1472 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1473 register upon non-zero interrupt event level, clear upon zero
1475 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1476 by passing zero event value.
1477 (*_io_{read,write}_buffer): Endianness fixes.
1478 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1479 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1481 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1482 serial I/O and timer module at base address 0xFFFF0000.
1484 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1486 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1489 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1491 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1493 * configure: Update.
1495 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1497 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1498 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1499 * configure.in: Include tx3904tmr in hw_device list.
1500 * configure: Rebuilt.
1501 * interp.c (sim_open): Instantiate three timer instances.
1502 Fix address typo of tx3904irc instance.
1504 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1506 * interp.c (signal_exception): SystemCall exception now uses
1507 the exception vector.
1509 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1511 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1514 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1516 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1518 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1520 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1522 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1523 sim-main.h. Declare a struct hw_descriptor instead of struct
1524 hw_device_descriptor.
1526 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1528 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1529 right bits and then re-align left hand bytes to correct byte
1530 lanes. Fix incorrect computation in do_store_left when loading
1531 bytes from second word.
1533 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1535 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1536 * interp.c (sim_open): Only create a device tree when HW is
1539 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1540 * interp.c (signal_exception): Ditto.
1542 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1544 * gencode.c: Mark BEGEZALL as LIKELY.
1546 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1548 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1549 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1551 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1553 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1554 modules. Recognize TX39 target with "mips*tx39" pattern.
1555 * configure: Rebuilt.
1556 * sim-main.h (*): Added many macros defining bits in
1557 TX39 control registers.
1558 (SignalInterrupt): Send actual PC instead of NULL.
1559 (SignalNMIReset): New exception type.
1560 * interp.c (board): New variable for future use to identify
1561 a particular board being simulated.
1562 (mips_option_handler,mips_options): Added "--board" option.
1563 (interrupt_event): Send actual PC.
1564 (sim_open): Make memory layout conditional on board setting.
1565 (signal_exception): Initial implementation of hardware interrupt
1566 handling. Accept another break instruction variant for simulator
1568 (decode_coproc): Implement RFE instruction for TX39.
1569 (mips.igen): Decode RFE instruction as such.
1570 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1571 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1572 bbegin to implement memory map.
1573 * dv-tx3904cpu.c: New file.
1574 * dv-tx3904irc.c: New file.
1576 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1578 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1580 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1582 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1583 with calls to check_div_hilo.
1585 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1587 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1588 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1589 Add special r3900 version of do_mult_hilo.
1590 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1591 with calls to check_mult_hilo.
1592 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1593 with calls to check_div_hilo.
1595 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1597 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1598 Document a replacement.
1600 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1602 * interp.c (sim_monitor): Make mon_printf work.
1604 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1606 * sim-main.h (INSN_NAME): New arg `cpu'.
1608 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1610 * configure: Regenerated to track ../common/aclocal.m4 changes.
1612 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1614 * configure: Regenerated to track ../common/aclocal.m4 changes.
1617 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1619 * acconfig.h: New file.
1620 * configure.in: Reverted change of Apr 24; use sinclude again.
1622 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1624 * configure: Regenerated to track ../common/aclocal.m4 changes.
1627 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1629 * configure.in: Don't call sinclude.
1631 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1633 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1635 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1637 * mips.igen (ERET): Implement.
1639 * interp.c (decode_coproc): Return sign-extended EPC.
1641 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1643 * interp.c (signal_exception): Do not ignore Trap.
1644 (signal_exception): On TRAP, restart at exception address.
1645 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1646 (signal_exception): Update.
1647 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1648 so that TRAP instructions are caught.
1650 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1652 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1653 contains HI/LO access history.
1654 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1655 (HIACCESS, LOACCESS): Delete, replace with
1656 (HIHISTORY, LOHISTORY): New macros.
1657 (CHECKHILO): Delete all, moved to mips.igen
1659 * gencode.c (build_instruction): Do not generate checks for
1660 correct HI/LO register usage.
1662 * interp.c (old_engine_run): Delete checks for correct HI/LO
1665 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1666 check_mf_cycles): New functions.
1667 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1668 do_divu, domultx, do_mult, do_multu): Use.
1670 * tx.igen ("madd", "maddu"): Use.
1672 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1674 * mips.igen (DSRAV): Use function do_dsrav.
1675 (SRAV): Use new function do_srav.
1677 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1678 (B): Sign extend 11 bit immediate.
1679 (EXT-B*): Shift 16 bit immediate left by 1.
1680 (ADDIU*): Don't sign extend immediate value.
1682 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1684 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1686 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1689 * mips.igen (delayslot32, nullify_next_insn): New functions.
1690 (m16.igen): Always include.
1691 (do_*): Add more tracing.
1693 * m16.igen (delayslot16): Add NIA argument, could be called by a
1694 32 bit MIPS16 instruction.
1696 * interp.c (ifetch16): Move function from here.
1697 * sim-main.c (ifetch16): To here.
1699 * sim-main.c (ifetch16, ifetch32): Update to match current
1700 implementations of LH, LW.
1701 (signal_exception): Don't print out incorrect hex value of illegal
1704 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1706 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1709 * m16.igen: Implement MIPS16 instructions.
1711 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1712 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1713 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1714 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1715 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1716 bodies of corresponding code from 32 bit insn to these. Also used
1717 by MIPS16 versions of functions.
1719 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1720 (IMEM16): Drop NR argument from macro.
1722 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1724 * Makefile.in (SIM_OBJS): Add sim-main.o.
1726 * sim-main.h (address_translation, load_memory, store_memory,
1727 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1729 (pr_addr, pr_uword64): Declare.
1730 (sim-main.c): Include when H_REVEALS_MODULE_P.
1732 * interp.c (address_translation, load_memory, store_memory,
1733 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1735 * sim-main.c: To here. Fix compilation problems.
1737 * configure.in: Enable inlining.
1738 * configure: Re-config.
1740 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1742 * configure: Regenerated to track ../common/aclocal.m4 changes.
1744 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1746 * mips.igen: Include tx.igen.
1747 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1748 * tx.igen: New file, contains MADD and MADDU.
1750 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1751 the hardwired constant `7'.
1752 (store_memory): Ditto.
1753 (LOADDRMASK): Move definition to sim-main.h.
1755 mips.igen (MTC0): Enable for r3900.
1758 mips.igen (do_load_byte): Delete.
1759 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1760 do_store_right): New functions.
1761 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1763 configure.in: Let the tx39 use igen again.
1766 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1768 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1769 not an address sized quantity. Return zero for cache sizes.
1771 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1773 * mips.igen (r3900): r3900 does not support 64 bit integer
1776 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1778 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1780 * configure : Rebuild.
1782 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1784 * configure: Regenerated to track ../common/aclocal.m4 changes.
1786 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1788 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1790 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1792 * configure: Regenerated to track ../common/aclocal.m4 changes.
1793 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1795 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * configure: Regenerated to track ../common/aclocal.m4 changes.
1799 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1801 * interp.c (Max, Min): Comment out functions. Not yet used.
1803 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1805 * configure: Regenerated to track ../common/aclocal.m4 changes.
1807 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1809 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1810 configurable settings for stand-alone simulator.
1812 * configure.in: Added X11 search, just in case.
1814 * configure: Regenerated.
1816 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1818 * interp.c (sim_write, sim_read, load_memory, store_memory):
1819 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1821 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * sim-main.h (GETFCC): Return an unsigned value.
1825 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1827 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1828 (DADD): Result destination is RD not RT.
1830 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1832 * sim-main.h (HIACCESS, LOACCESS): Always define.
1834 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1836 * interp.c (sim_info): Delete.
1838 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1840 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1841 (mips_option_handler): New argument `cpu'.
1842 (sim_open): Update call to sim_add_option_table.
1844 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1846 * mips.igen (CxC1): Add tracing.
1848 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1850 * sim-main.h (Max, Min): Declare.
1852 * interp.c (Max, Min): New functions.
1854 * mips.igen (BC1): Add tracing.
1856 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1858 * interp.c Added memory map for stack in vr4100
1860 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1862 * interp.c (load_memory): Add missing "break"'s.
1864 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1866 * interp.c (sim_store_register, sim_fetch_register): Pass in
1867 length parameter. Return -1.
1869 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1871 * interp.c: Added hardware init hook, fixed warnings.
1873 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1875 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1877 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1879 * interp.c (ifetch16): New function.
1881 * sim-main.h (IMEM32): Rename IMEM.
1882 (IMEM16_IMMED): Define.
1884 (DELAY_SLOT): Update.
1886 * m16run.c (sim_engine_run): New file.
1888 * m16.igen: All instructions except LB.
1889 (LB): Call do_load_byte.
1890 * mips.igen (do_load_byte): New function.
1891 (LB): Call do_load_byte.
1893 * mips.igen: Move spec for insn bit size and high bit from here.
1894 * Makefile.in (tmp-igen, tmp-m16): To here.
1896 * m16.dc: New file, decode mips16 instructions.
1898 * Makefile.in (SIM_NO_ALL): Define.
1899 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1901 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1903 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1904 point unit to 32 bit registers.
1905 * configure: Re-generate.
1907 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1909 * configure.in (sim_use_gen): Make IGEN the default simulator
1910 generator for generic 32 and 64 bit mips targets.
1911 * configure: Re-generate.
1913 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1915 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1918 * interp.c (sim_fetch_register, sim_store_register): Read/write
1919 FGR from correct location.
1920 (sim_open): Set size of FGR's according to
1921 WITH_TARGET_FLOATING_POINT_BITSIZE.
1923 * sim-main.h (FGR): Store floating point registers in a separate
1926 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1928 * configure: Regenerated to track ../common/aclocal.m4 changes.
1930 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1932 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1934 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1936 * interp.c (pending_tick): New function. Deliver pending writes.
1938 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1939 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1940 it can handle mixed sized quantites and single bits.
1942 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1944 * interp.c (oengine.h): Do not include when building with IGEN.
1945 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1946 (sim_info): Ditto for PROCESSOR_64BIT.
1947 (sim_monitor): Replace ut_reg with unsigned_word.
1948 (*): Ditto for t_reg.
1949 (LOADDRMASK): Define.
1950 (sim_open): Remove defunct check that host FP is IEEE compliant,
1951 using software to emulate floating point.
1952 (value_fpr, ...): Always compile, was conditional on HASFPU.
1954 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1956 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1959 * interp.c (SD, CPU): Define.
1960 (mips_option_handler): Set flags in each CPU.
1961 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1962 (sim_close): Do not clear STATE, deleted anyway.
1963 (sim_write, sim_read): Assume CPU zero's vm should be used for
1965 (sim_create_inferior): Set the PC for all processors.
1966 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1968 (mips16_entry): Pass correct nr of args to store_word, load_word.
1969 (ColdReset): Cold reset all cpu's.
1970 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1971 (sim_monitor, load_memory, store_memory, signal_exception): Use
1972 `CPU' instead of STATE_CPU.
1975 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1978 * sim-main.h (signal_exception): Add sim_cpu arg.
1979 (SignalException*): Pass both SD and CPU to signal_exception.
1980 * interp.c (signal_exception): Update.
1982 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1984 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1985 address_translation): Ditto
1986 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1988 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1990 * configure: Regenerated to track ../common/aclocal.m4 changes.
1992 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1994 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1996 * mips.igen (model): Map processor names onto BFD name.
1998 * sim-main.h (CPU_CIA): Delete.
1999 (SET_CIA, GET_CIA): Define
2001 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2006 * configure.in (default_endian): Configure a big-endian simulator
2008 * configure: Re-generate.
2010 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2012 * configure: Regenerated to track ../common/aclocal.m4 changes.
2014 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2016 * interp.c (sim_monitor): Handle Densan monitor outbyte
2017 and inbyte functions.
2019 1997-12-29 Felix Lee <flee@cygnus.com>
2021 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2023 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2025 * Makefile.in (tmp-igen): Arrange for $zero to always be
2026 reset to zero after every instruction.
2028 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2030 * configure: Regenerated to track ../common/aclocal.m4 changes.
2033 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2035 * mips.igen (MSUB): Fix to work like MADD.
2036 * gencode.c (MSUB): Similarly.
2038 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2040 * configure: Regenerated to track ../common/aclocal.m4 changes.
2042 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2044 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2046 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2048 * sim-main.h (sim-fpu.h): Include.
2050 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2051 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2052 using host independant sim_fpu module.
2054 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2056 * interp.c (signal_exception): Report internal errors with SIGABRT
2059 * sim-main.h (C0_CONFIG): New register.
2060 (signal.h): No longer include.
2062 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2064 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2066 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2068 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2070 * mips.igen: Tag vr5000 instructions.
2071 (ANDI): Was missing mipsIV model, fix assembler syntax.
2072 (do_c_cond_fmt): New function.
2073 (C.cond.fmt): Handle mips I-III which do not support CC field
2075 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2076 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2078 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2079 vr5000 which saves LO in a GPR separatly.
2081 * configure.in (enable-sim-igen): For vr5000, select vr5000
2082 specific instructions.
2083 * configure: Re-generate.
2085 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2087 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2089 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2090 fmt_uninterpreted_64 bit cases to switch. Convert to
2093 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2095 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2096 as specified in IV3.2 spec.
2097 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2099 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2101 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2102 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2103 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2104 PENDING_FILL versions of instructions. Simplify.
2106 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2108 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2110 (MTHI, MFHI): Disable code checking HI-LO.
2112 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2114 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2116 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2118 * gencode.c (build_mips16_operands): Replace IPC with cia.
2120 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2121 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2123 (UndefinedResult): Replace function with macro/function
2125 (sim_engine_run): Don't save PC in IPC.
2127 * sim-main.h (IPC): Delete.
2130 * interp.c (signal_exception, store_word, load_word,
2131 address_translation, load_memory, store_memory, cache_op,
2132 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2133 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2134 current instruction address - cia - argument.
2135 (sim_read, sim_write): Call address_translation directly.
2136 (sim_engine_run): Rename variable vaddr to cia.
2137 (signal_exception): Pass cia to sim_monitor
2139 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2140 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2141 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2143 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2144 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2147 * interp.c (signal_exception): Pass restart address to
2150 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2151 idecode.o): Add dependency.
2153 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2155 (DELAY_SLOT): Update NIA not PC with branch address.
2156 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2158 * mips.igen: Use CIA not PC in branch calculations.
2159 (illegal): Call SignalException.
2160 (BEQ, ADDIU): Fix assembler.
2162 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2164 * m16.igen (JALX): Was missing.
2166 * configure.in (enable-sim-igen): New configuration option.
2167 * configure: Re-generate.
2169 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2171 * interp.c (load_memory, store_memory): Delete parameter RAW.
2172 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2173 bypassing {load,store}_memory.
2175 * sim-main.h (ByteSwapMem): Delete definition.
2177 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2179 * interp.c (sim_do_command, sim_commands): Delete mips specific
2180 commands. Handled by module sim-options.
2182 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2183 (WITH_MODULO_MEMORY): Define.
2185 * interp.c (sim_info): Delete code printing memory size.
2187 * interp.c (mips_size): Nee sim_size, delete function.
2189 (monitor, monitor_base, monitor_size): Delete global variables.
2190 (sim_open, sim_close): Delete code creating monitor and other
2191 memory regions. Use sim-memopts module, via sim_do_commandf, to
2192 manage memory regions.
2193 (load_memory, store_memory): Use sim-core for memory model.
2195 * interp.c (address_translation): Delete all memory map code
2196 except line forcing 32 bit addresses.
2198 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2200 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2203 * interp.c (logfh, logfile): Delete globals.
2204 (sim_open, sim_close): Delete code opening & closing log file.
2205 (mips_option_handler): Delete -l and -n options.
2206 (OPTION mips_options): Ditto.
2208 * interp.c (OPTION mips_options): Rename option trace to dinero.
2209 (mips_option_handler): Update.
2211 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2213 * interp.c (fetch_str): New function.
2214 (sim_monitor): Rewrite using sim_read & sim_write.
2215 (sim_open): Check magic number.
2216 (sim_open): Write monitor vectors into memory using sim_write.
2217 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2218 (sim_read, sim_write): Simplify - transfer data one byte at a
2220 (load_memory, store_memory): Clarify meaning of parameter RAW.
2222 * sim-main.h (isHOST): Defete definition.
2223 (isTARGET): Mark as depreciated.
2224 (address_translation): Delete parameter HOST.
2226 * interp.c (address_translation): Delete parameter HOST.
2228 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2232 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2233 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2235 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2237 * mips.igen: Add model filter field to records.
2239 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2241 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2243 interp.c (sim_engine_run): Do not compile function sim_engine_run
2244 when WITH_IGEN == 1.
2246 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2247 target architecture.
2249 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2250 igen. Replace with configuration variables sim_igen_flags /
2253 * m16.igen: New file. Copy mips16 insns here.
2254 * mips.igen: From here.
2256 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2258 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2260 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2262 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2264 * gencode.c (build_instruction): Follow sim_write's lead in using
2265 BigEndianMem instead of !ByteSwapMem.
2267 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2269 * configure.in (sim_gen): Dependent on target, select type of
2270 generator. Always select old style generator.
2272 configure: Re-generate.
2274 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2276 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2277 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2278 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2279 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2280 SIM_@sim_gen@_*, set by autoconf.
2282 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2284 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2286 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2287 CURRENT_FLOATING_POINT instead.
2289 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2290 (address_translation): Raise exception InstructionFetch when
2291 translation fails and isINSTRUCTION.
2293 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2294 sim_engine_run): Change type of of vaddr and paddr to
2296 (address_translation, prefetch, load_memory, store_memory,
2297 cache_op): Change type of vAddr and pAddr to address_word.
2299 * gencode.c (build_instruction): Change type of vaddr and paddr to
2302 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2304 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2305 macro to obtain result of ALU op.
2307 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2309 * interp.c (sim_info): Call profile_print.
2311 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2313 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2315 * sim-main.h (WITH_PROFILE): Do not define, defined in
2316 common/sim-config.h. Use sim-profile module.
2317 (simPROFILE): Delete defintion.
2319 * interp.c (PROFILE): Delete definition.
2320 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2321 (sim_close): Delete code writing profile histogram.
2322 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2324 (sim_engine_run): Delete code profiling the PC.
2326 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2328 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2330 * interp.c (sim_monitor): Make register pointers of type
2333 * sim-main.h: Make registers of type unsigned_word not
2336 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2338 * interp.c (sync_operation): Rename from SyncOperation, make
2339 global, add SD argument.
2340 (prefetch): Rename from Prefetch, make global, add SD argument.
2341 (decode_coproc): Make global.
2343 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2345 * gencode.c (build_instruction): Generate DecodeCoproc not
2346 decode_coproc calls.
2348 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2349 (SizeFGR): Move to sim-main.h
2350 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2351 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2352 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2354 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2355 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2356 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2357 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2358 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2359 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2361 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2363 (sim-alu.h): Include.
2364 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2365 (sim_cia): Typedef to instruction_address.
2367 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2369 * Makefile.in (interp.o): Rename generated file engine.c to
2374 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2376 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2378 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2380 * gencode.c (build_instruction): For "FPSQRT", output correct
2381 number of arguments to Recip.
2383 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2385 * Makefile.in (interp.o): Depends on sim-main.h
2387 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2389 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2390 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2391 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2392 STATE, DSSTATE): Define
2393 (GPR, FGRIDX, ..): Define.
2395 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2396 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2397 (GPR, FGRIDX, ...): Delete macros.
2399 * interp.c: Update names to match defines from sim-main.h
2401 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2403 * interp.c (sim_monitor): Add SD argument.
2404 (sim_warning): Delete. Replace calls with calls to
2406 (sim_error): Delete. Replace calls with sim_io_error.
2407 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2408 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2409 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2411 (mips_size): Rename from sim_size. Add SD argument.
2413 * interp.c (simulator): Delete global variable.
2414 (callback): Delete global variable.
2415 (mips_option_handler, sim_open, sim_write, sim_read,
2416 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2417 sim_size,sim_monitor): Use sim_io_* not callback->*.
2418 (sim_open): ZALLOC simulator struct.
2419 (PROFILE): Do not define.
2421 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2423 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2424 support.h with corresponding code.
2426 * sim-main.h (word64, uword64), support.h: Move definition to
2428 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2431 * Makefile.in: Update dependencies
2432 * interp.c: Do not include.
2434 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2436 * interp.c (address_translation, load_memory, store_memory,
2437 cache_op): Rename to from AddressTranslation et.al., make global,
2440 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2443 * interp.c (SignalException): Rename to signal_exception, make
2446 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2448 * sim-main.h (SignalException, SignalExceptionInterrupt,
2449 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2450 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2451 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2454 * interp.c, support.h: Use.
2456 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2459 to value_fpr / store_fpr. Add SD argument.
2460 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2461 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2463 * sim-main.h (ValueFPR, StoreFPR): Define.
2465 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2467 * interp.c (sim_engine_run): Check consistency between configure
2468 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2471 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2472 (mips_fpu): Configure WITH_FLOATING_POINT.
2473 (mips_endian): Configure WITH_TARGET_ENDIAN.
2474 * configure: Update.
2476 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2478 * configure: Regenerated to track ../common/aclocal.m4 changes.
2480 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2482 * configure: Regenerated.
2484 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2486 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2488 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2490 * gencode.c (print_igen_insn_models): Assume certain architectures
2491 include all mips* instructions.
2492 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2495 * Makefile.in (tmp.igen): Add target. Generate igen input from
2498 * gencode.c (FEATURE_IGEN): Define.
2499 (main): Add --igen option. Generate output in igen format.
2500 (process_instructions): Format output according to igen option.
2501 (print_igen_insn_format): New function.
2502 (print_igen_insn_models): New function.
2503 (process_instructions): Only issue warnings and ignore
2504 instructions when no FEATURE_IGEN.
2506 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2508 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2511 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2513 * configure: Regenerated to track ../common/aclocal.m4 changes.
2515 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2517 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2518 SIM_RESERVED_BITS): Delete, moved to common.
2519 (SIM_EXTRA_CFLAGS): Update.
2521 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2523 * configure.in: Configure non-strict memory alignment.
2524 * configure: Regenerated to track ../common/aclocal.m4 changes.
2526 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2528 * configure: Regenerated to track ../common/aclocal.m4 changes.
2530 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2532 * gencode.c (SDBBP,DERET): Added (3900) insns.
2533 (RFE): Turn on for 3900.
2534 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2535 (dsstate): Made global.
2536 (SUBTARGET_R3900): Added.
2537 (CANCELDELAYSLOT): New.
2538 (SignalException): Ignore SystemCall rather than ignore and
2539 terminate. Add DebugBreakPoint handling.
2540 (decode_coproc): New insns RFE, DERET; and new registers Debug
2541 and DEPC protected by SUBTARGET_R3900.
2542 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2544 * Makefile.in,configure.in: Add mips subtarget option.
2545 * configure: Update.
2547 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2549 * gencode.c: Add r3900 (tx39).
2552 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2554 * gencode.c (build_instruction): Don't need to subtract 4 for
2557 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2559 * interp.c: Correct some HASFPU problems.
2561 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2563 * configure: Regenerated to track ../common/aclocal.m4 changes.
2565 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2567 * interp.c (mips_options): Fix samples option short form, should
2570 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2572 * interp.c (sim_info): Enable info code. Was just returning.
2574 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2576 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2579 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2583 (build_instruction): Ditto for LL.
2585 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2587 * configure: Regenerated to track ../common/aclocal.m4 changes.
2589 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2591 * configure: Regenerated to track ../common/aclocal.m4 changes.
2594 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2596 * interp.c (sim_open): Add call to sim_analyze_program, update
2599 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2601 * interp.c (sim_kill): Delete.
2602 (sim_create_inferior): Add ABFD argument. Set PC from same.
2603 (sim_load): Move code initializing trap handlers from here.
2604 (sim_open): To here.
2605 (sim_load): Delete, use sim-hload.c.
2607 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2609 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2611 * configure: Regenerated to track ../common/aclocal.m4 changes.
2614 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2616 * interp.c (sim_open): Add ABFD argument.
2617 (sim_load): Move call to sim_config from here.
2618 (sim_open): To here. Check return status.
2620 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2622 * gencode.c (build_instruction): Two arg MADD should
2623 not assign result to $0.
2625 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2627 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2628 * sim/mips/configure.in: Regenerate.
2630 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2632 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2633 signed8, unsigned8 et.al. types.
2635 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2636 hosts when selecting subreg.
2638 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2640 * interp.c (sim_engine_run): Reset the ZERO register to zero
2641 regardless of FEATURE_WARN_ZERO.
2642 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2644 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2646 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2647 (SignalException): For BreakPoints ignore any mode bits and just
2649 (SignalException): Always set the CAUSE register.
2651 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2654 exception has been taken.
2656 * interp.c: Implement the ERET and mt/f sr instructions.
2658 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2660 * interp.c (SignalException): Don't bother restarting an
2663 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2665 * interp.c (SignalException): Really take an interrupt.
2666 (interrupt_event): Only deliver interrupts when enabled.
2668 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2670 * interp.c (sim_info): Only print info when verbose.
2671 (sim_info) Use sim_io_printf for output.
2673 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2675 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2678 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2680 * interp.c (sim_do_command): Check for common commands if a
2681 simulator specific command fails.
2683 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2685 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2686 and simBE when DEBUG is defined.
2688 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2690 * interp.c (interrupt_event): New function. Pass exception event
2691 onto exception handler.
2693 * configure.in: Check for stdlib.h.
2694 * configure: Regenerate.
2696 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2697 variable declaration.
2698 (build_instruction): Initialize memval1.
2699 (build_instruction): Add UNUSED attribute to byte, bigend,
2701 (build_operands): Ditto.
2703 * interp.c: Fix GCC warnings.
2704 (sim_get_quit_code): Delete.
2706 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2707 * Makefile.in: Ditto.
2708 * configure: Re-generate.
2710 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2712 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2714 * interp.c (mips_option_handler): New function parse argumes using
2716 (myname): Replace with STATE_MY_NAME.
2717 (sim_open): Delete check for host endianness - performed by
2719 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2720 (sim_open): Move much of the initialization from here.
2721 (sim_load): To here. After the image has been loaded and
2723 (sim_open): Move ColdReset from here.
2724 (sim_create_inferior): To here.
2725 (sim_open): Make FP check less dependant on host endianness.
2727 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2729 * interp.c (sim_set_callbacks): Delete.
2731 * interp.c (membank, membank_base, membank_size): Replace with
2732 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2733 (sim_open): Remove call to callback->init. gdb/run do this.
2737 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2739 * interp.c (big_endian_p): Delete, replaced by
2740 current_target_byte_order.
2742 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2744 * interp.c (host_read_long, host_read_word, host_swap_word,
2745 host_swap_long): Delete. Using common sim-endian.
2746 (sim_fetch_register, sim_store_register): Use H2T.
2747 (pipeline_ticks): Delete. Handled by sim-events.
2749 (sim_engine_run): Update.
2751 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2755 (SignalException): To here. Signal using sim_engine_halt.
2756 (sim_stop_reason): Delete, moved to common.
2758 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2760 * interp.c (sim_open): Add callback argument.
2761 (sim_set_callbacks): Delete SIM_DESC argument.
2764 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2766 * Makefile.in (SIM_OBJS): Add common modules.
2768 * interp.c (sim_set_callbacks): Also set SD callback.
2769 (set_endianness, xfer_*, swap_*): Delete.
2770 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2771 Change to functions using sim-endian macros.
2772 (control_c, sim_stop): Delete, use common version.
2773 (simulate): Convert into.
2774 (sim_engine_run): This function.
2775 (sim_resume): Delete.
2777 * interp.c (simulation): New variable - the simulator object.
2778 (sim_kind): Delete global - merged into simulation.
2779 (sim_load): Cleanup. Move PC assignment from here.
2780 (sim_create_inferior): To here.
2782 * sim-main.h: New file.
2783 * interp.c (sim-main.h): Include.
2785 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2787 * configure: Regenerated to track ../common/aclocal.m4 changes.
2789 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2791 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2793 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2795 * gencode.c (build_instruction): DIV instructions: check
2796 for division by zero and integer overflow before using
2797 host's division operation.
2799 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2801 * Makefile.in (SIM_OBJS): Add sim-load.o.
2802 * interp.c: #include bfd.h.
2803 (target_byte_order): Delete.
2804 (sim_kind, myname, big_endian_p): New static locals.
2805 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2806 after argument parsing. Recognize -E arg, set endianness accordingly.
2807 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2808 load file into simulator. Set PC from bfd.
2809 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2810 (set_endianness): Use big_endian_p instead of target_byte_order.
2812 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2814 * interp.c (sim_size): Delete prototype - conflicts with
2815 definition in remote-sim.h. Correct definition.
2817 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2819 * configure: Regenerated to track ../common/aclocal.m4 changes.
2822 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2824 * interp.c (sim_open): New arg `kind'.
2826 * configure: Regenerated to track ../common/aclocal.m4 changes.
2828 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2830 * configure: Regenerated to track ../common/aclocal.m4 changes.
2832 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2834 * interp.c (sim_open): Set optind to 0 before calling getopt.
2836 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2838 * configure: Regenerated to track ../common/aclocal.m4 changes.
2840 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2842 * interp.c : Replace uses of pr_addr with pr_uword64
2843 where the bit length is always 64 independent of SIM_ADDR.
2844 (pr_uword64) : added.
2846 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2848 * configure: Re-generate.
2850 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2852 * configure: Regenerate to track ../common/aclocal.m4 changes.
2854 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2856 * interp.c (sim_open): New SIM_DESC result. Argument is now
2858 (other sim_*): New SIM_DESC argument.
2860 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2862 * interp.c: Fix printing of addresses for non-64-bit targets.
2863 (pr_addr): Add function to print address based on size.
2865 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2867 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2869 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2871 * gencode.c (build_mips16_operands): Correct computation of base
2872 address for extended PC relative instruction.
2874 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2876 * interp.c (mips16_entry): Add support for floating point cases.
2877 (SignalException): Pass floating point cases to mips16_entry.
2878 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2880 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2882 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2883 and then set the state to fmt_uninterpreted.
2884 (COP_SW): Temporarily set the state to fmt_word while calling
2887 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2889 * gencode.c (build_instruction): The high order may be set in the
2890 comparison flags at any ISA level, not just ISA 4.
2892 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2894 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2895 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2896 * configure.in: sinclude ../common/aclocal.m4.
2897 * configure: Regenerated.
2899 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2901 * configure: Rebuild after change to aclocal.m4.
2903 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2905 * configure configure.in Makefile.in: Update to new configure
2906 scheme which is more compatible with WinGDB builds.
2907 * configure.in: Improve comment on how to run autoconf.
2908 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2909 * Makefile.in: Use autoconf substitution to install common
2912 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2914 * gencode.c (build_instruction): Use BigEndianCPU instead of
2917 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2919 * interp.c (sim_monitor): Make output to stdout visible in
2920 wingdb's I/O log window.
2922 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2924 * support.h: Undo previous change to SIGTRAP
2927 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2929 * interp.c (store_word, load_word): New static functions.
2930 (mips16_entry): New static function.
2931 (SignalException): Look for mips16 entry and exit instructions.
2932 (simulate): Use the correct index when setting fpr_state after
2933 doing a pending move.
2935 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2937 * interp.c: Fix byte-swapping code throughout to work on
2938 both little- and big-endian hosts.
2940 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2942 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2943 with gdb/config/i386/xm-windows.h.
2945 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2947 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2948 that messes up arithmetic shifts.
2950 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2952 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2953 SIGTRAP and SIGQUIT for _WIN32.
2955 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2957 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2958 force a 64 bit multiplication.
2959 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2960 destination register is 0, since that is the default mips16 nop
2963 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2965 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2966 (build_endian_shift): Don't check proc64.
2967 (build_instruction): Always set memval to uword64. Cast op2 to
2968 uword64 when shifting it left in memory instructions. Always use
2969 the same code for stores--don't special case proc64.
2971 * gencode.c (build_mips16_operands): Fix base PC value for PC
2973 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2975 * interp.c (simJALDELAYSLOT): Define.
2976 (JALDELAYSLOT): Define.
2977 (INDELAYSLOT, INJALDELAYSLOT): Define.
2978 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2980 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2982 * interp.c (sim_open): add flush_cache as a PMON routine
2983 (sim_monitor): handle flush_cache by ignoring it
2985 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2987 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2989 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2990 (BigEndianMem): Rename to ByteSwapMem and change sense.
2991 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2992 BigEndianMem references to !ByteSwapMem.
2993 (set_endianness): New function, with prototype.
2994 (sim_open): Call set_endianness.
2995 (sim_info): Use simBE instead of BigEndianMem.
2996 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2997 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2998 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2999 ifdefs, keeping the prototype declaration.
3000 (swap_word): Rewrite correctly.
3001 (ColdReset): Delete references to CONFIG. Delete endianness related
3002 code; moved to set_endianness.
3004 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3006 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3007 * interp.c (CHECKHILO): Define away.
3008 (simSIGINT): New macro.
3009 (membank_size): Increase from 1MB to 2MB.
3010 (control_c): New function.
3011 (sim_resume): Rename parameter signal to signal_number. Add local
3012 variable prev. Call signal before and after simulate.
3013 (sim_stop_reason): Add simSIGINT support.
3014 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3016 (sim_warning): Delete call to SignalException. Do call printf_filtered
3018 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3019 a call to sim_warning.
3021 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3023 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3024 16 bit instructions.
3026 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3028 Add support for mips16 (16 bit MIPS implementation):
3029 * gencode.c (inst_type): Add mips16 instruction encoding types.
3030 (GETDATASIZEINSN): Define.
3031 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3032 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3034 (MIPS16_DECODE): New table, for mips16 instructions.
3035 (bitmap_val): New static function.
3036 (struct mips16_op): Define.
3037 (mips16_op_table): New table, for mips16 operands.
3038 (build_mips16_operands): New static function.
3039 (process_instructions): If PC is odd, decode a mips16
3040 instruction. Break out instruction handling into new
3041 build_instruction function.
3042 (build_instruction): New static function, broken out of
3043 process_instructions. Check modifiers rather than flags for SHIFT
3044 bit count and m[ft]{hi,lo} direction.
3045 (usage): Pass program name to fprintf.
3046 (main): Remove unused variable this_option_optind. Change
3047 ``*loptarg++'' to ``loptarg++''.
3048 (my_strtoul): Parenthesize && within ||.
3049 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3050 (simulate): If PC is odd, fetch a 16 bit instruction, and
3051 increment PC by 2 rather than 4.
3052 * configure.in: Add case for mips16*-*-*.
3053 * configure: Rebuild.
3055 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3057 * interp.c: Allow -t to enable tracing in standalone simulator.
3058 Fix garbage output in trace file and error messages.
3060 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3062 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3063 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3064 * configure.in: Simplify using macros in ../common/aclocal.m4.
3065 * configure: Regenerated.
3066 * tconfig.in: New file.
3068 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3070 * interp.c: Fix bugs in 64-bit port.
3071 Use ansi function declarations for msvc compiler.
3072 Initialize and test file pointer in trace code.
3073 Prevent duplicate definition of LAST_EMED_REGNUM.
3075 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3077 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3079 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3081 * interp.c (SignalException): Check for explicit terminating
3083 * gencode.c: Pass instruction value through SignalException()
3084 calls for Trap, Breakpoint and Syscall.
3086 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3088 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3089 only used on those hosts that provide it.
3090 * configure.in: Add sqrt() to list of functions to be checked for.
3091 * config.in: Re-generated.
3092 * configure: Re-generated.
3094 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3096 * gencode.c (process_instructions): Call build_endian_shift when
3097 expanding STORE RIGHT, to fix swr.
3098 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3099 clear the high bits.
3100 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3101 Fix float to int conversions to produce signed values.
3103 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3105 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3106 (process_instructions): Correct handling of nor instruction.
3107 Correct shift count for 32 bit shift instructions. Correct sign
3108 extension for arithmetic shifts to not shift the number of bits in
3109 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3110 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3112 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3113 It's OK to have a mult follow a mult. What's not OK is to have a
3114 mult follow an mfhi.
3115 (Convert): Comment out incorrect rounding code.
3117 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3119 * interp.c (sim_monitor): Improved monitor printf
3120 simulation. Tidied up simulator warnings, and added "--log" option
3121 for directing warning message output.
3122 * gencode.c: Use sim_warning() rather than WARNING macro.
3124 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3126 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3127 getopt1.o, rather than on gencode.c. Link objects together.
3128 Don't link against -liberty.
3129 (gencode.o, getopt.o, getopt1.o): New targets.
3130 * gencode.c: Include <ctype.h> and "ansidecl.h".
3131 (AND): Undefine after including "ansidecl.h".
3132 (ULONG_MAX): Define if not defined.
3133 (OP_*): Don't define macros; now defined in opcode/mips.h.
3134 (main): Call my_strtoul rather than strtoul.
3135 (my_strtoul): New static function.
3137 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3139 * gencode.c (process_instructions): Generate word64 and uword64
3140 instead of `long long' and `unsigned long long' data types.
3141 * interp.c: #include sysdep.h to get signals, and define default
3143 * (Convert): Work around for Visual-C++ compiler bug with type
3145 * support.h: Make things compile under Visual-C++ by using
3146 __int64 instead of `long long'. Change many refs to long long
3147 into word64/uword64 typedefs.
3149 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3151 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3152 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3154 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3155 (AC_PROG_INSTALL): Added.
3156 (AC_PROG_CC): Moved to before configure.host call.
3157 * configure: Rebuilt.
3159 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3161 * configure.in: Define @SIMCONF@ depending on mips target.
3162 * configure: Rebuild.
3163 * Makefile.in (run): Add @SIMCONF@ to control simulator
3165 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3166 * interp.c: Remove some debugging, provide more detailed error
3167 messages, update memory accesses to use LOADDRMASK.
3169 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3171 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3172 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3174 * configure: Rebuild.
3175 * config.in: New file, generated by autoheader.
3176 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3177 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3178 HAVE_ANINT and HAVE_AINT, as appropriate.
3179 * Makefile.in (run): Use @LIBS@ rather than -lm.
3180 (interp.o): Depend upon config.h.
3181 (Makefile): Just rebuild Makefile.
3182 (clean): Remove stamp-h.
3183 (mostlyclean): Make the same as clean, not as distclean.
3184 (config.h, stamp-h): New targets.
3186 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3188 * interp.c (ColdReset): Fix boolean test. Make all simulator
3191 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3193 * interp.c (xfer_direct_word, xfer_direct_long,
3194 swap_direct_word, swap_direct_long, xfer_big_word,
3195 xfer_big_long, xfer_little_word, xfer_little_long,
3196 swap_word,swap_long): Added.
3197 * interp.c (ColdReset): Provide function indirection to
3198 host<->simulated_target transfer routines.
3199 * interp.c (sim_store_register, sim_fetch_register): Updated to
3200 make use of indirected transfer routines.
3202 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3204 * gencode.c (process_instructions): Ensure FP ABS instruction
3206 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3207 system call support.
3209 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3211 * interp.c (sim_do_command): Complain if callback structure not
3214 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3216 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3217 support for Sun hosts.
3218 * Makefile.in (gencode): Ensure the host compiler and libraries
3219 used for cross-hosted build.
3221 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3223 * interp.c, gencode.c: Some more (TODO) tidying.
3225 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3227 * gencode.c, interp.c: Replaced explicit long long references with
3228 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3229 * support.h (SET64LO, SET64HI): Macros added.
3231 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3233 * configure: Regenerate with autoconf 2.7.
3235 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3237 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3238 * support.h: Remove superfluous "1" from #if.
3239 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3241 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3243 * interp.c (StoreFPR): Control UndefinedResult() call on
3244 WARN_RESULT manifest.
3246 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3248 * gencode.c: Tidied instruction decoding, and added FP instruction
3251 * interp.c: Added dineroIII, and BSD profiling support. Also
3252 run-time FP handling.
3254 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3256 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3257 gencode.c, interp.c, support.h: created.