1 2016-11-11 Mike Frysinger <vapier@gentoo.org>
3 * mips.igen (check_u64): Enable for `r3900'.
5 2016-02-05 Mike Frysinger <vapier@gentoo.org>
7 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
9 * configure: Regenerate.
11 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
12 Maciej W. Rozycki <macro@imgtec.com>
15 * micromips.igen (delayslot_micromips): Enable for `micromips32',
16 `micromips64' and `micromipsdsp' only.
17 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
18 (do_micromips_jalr, do_micromips_jal): Likewise.
19 (compute_movep_src_reg): Likewise.
20 (compute_andi16_imm): Likewise.
21 (convert_fmt_micromips): Likewise.
22 (convert_fmt_micromips_cvt_d): Likewise.
23 (convert_fmt_micromips_cvt_s): Likewise.
24 (FMT_MICROMIPS): Likewise.
25 (FMT_MICROMIPS_CVT_D): Likewise.
26 (FMT_MICROMIPS_CVT_S): Likewise.
28 2016-01-12 Mike Frysinger <vapier@gentoo.org>
30 * interp.c: Include elf-bfd.h.
31 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
34 2016-01-10 Mike Frysinger <vapier@gentoo.org>
36 * config.in, configure: Regenerate.
38 2016-01-10 Mike Frysinger <vapier@gentoo.org>
40 * configure: Regenerate.
42 2016-01-10 Mike Frysinger <vapier@gentoo.org>
44 * configure: Regenerate.
46 2016-01-10 Mike Frysinger <vapier@gentoo.org>
48 * configure: Regenerate.
50 2016-01-10 Mike Frysinger <vapier@gentoo.org>
52 * configure: Regenerate.
54 2016-01-10 Mike Frysinger <vapier@gentoo.org>
56 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
57 * configure: Regenerate.
59 2016-01-10 Mike Frysinger <vapier@gentoo.org>
61 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
62 * configure: Regenerate.
64 2016-01-10 Mike Frysinger <vapier@gentoo.org>
66 * configure: Regenerate.
68 2016-01-10 Mike Frysinger <vapier@gentoo.org>
70 * configure: Regenerate.
72 2016-01-09 Mike Frysinger <vapier@gentoo.org>
74 * config.in, configure: Regenerate.
76 2016-01-06 Mike Frysinger <vapier@gentoo.org>
78 * interp.c (sim_open): Mark argv const.
79 (sim_create_inferior): Mark argv and env const.
81 2016-01-04 Mike Frysinger <vapier@gentoo.org>
83 * configure: Regenerate.
85 2016-01-03 Mike Frysinger <vapier@gentoo.org>
87 * interp.c (sim_open): Update sim_parse_args comment.
89 2016-01-03 Mike Frysinger <vapier@gentoo.org>
91 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
92 * configure: Regenerate.
94 2016-01-02 Mike Frysinger <vapier@gentoo.org>
96 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
97 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
98 * configure: Regenerate.
99 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
101 2016-01-02 Mike Frysinger <vapier@gentoo.org>
103 * dv-tx3904cpu.c (CPU, SD): Delete.
105 2015-12-30 Mike Frysinger <vapier@gentoo.org>
107 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
108 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
109 (sim_store_register): Rename to ...
110 (mips_reg_store): ... this. Delete local cpu var.
111 Update sim_io_eprintf calls.
112 (sim_fetch_register): Rename to ...
113 (mips_reg_fetch): ... this. Delete local cpu var.
114 Update sim_io_eprintf calls.
116 2015-12-27 Mike Frysinger <vapier@gentoo.org>
118 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
120 2015-12-26 Mike Frysinger <vapier@gentoo.org>
122 * config.in, configure: Regenerate.
124 2015-12-26 Mike Frysinger <vapier@gentoo.org>
126 * interp.c (sim_write, sim_read): Delete.
127 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
128 (load_word): Likewise.
129 * micromips.igen (cache): Likewise.
130 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
131 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
132 do_store_left, do_store_right, do_load_double, do_store_double):
134 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
135 (do_prefx): Likewise.
136 * sim-main.c (address_translation, prefetch): Delete.
137 (ifetch32, ifetch16): Delete call to AddressTranslation and set
139 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
140 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
141 (LoadMemory, StoreMemory): Delete CCA arg.
143 2015-12-24 Mike Frysinger <vapier@gentoo.org>
145 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
146 * configure: Regenerated.
148 2015-12-24 Mike Frysinger <vapier@gentoo.org>
150 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
153 2015-12-24 Mike Frysinger <vapier@gentoo.org>
155 * tconfig.h (SIM_HANDLES_LMA): Delete.
157 2015-12-24 Mike Frysinger <vapier@gentoo.org>
159 * sim-main.h (WITH_WATCHPOINTS): Delete.
161 2015-12-24 Mike Frysinger <vapier@gentoo.org>
163 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
165 2015-12-24 Mike Frysinger <vapier@gentoo.org>
167 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
169 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
171 * micromips.igen (process_isa_mode): Fix left shift of negative
174 2015-11-17 Mike Frysinger <vapier@gentoo.org>
176 * sim-main.h (WITH_MODULO_MEMORY): Delete.
178 2015-11-15 Mike Frysinger <vapier@gentoo.org>
180 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
182 2015-11-14 Mike Frysinger <vapier@gentoo.org>
184 * interp.c (sim_close): Rename to ...
185 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
187 * sim-main.h (mips_sim_close): Declare.
188 (SIM_CLOSE_HOOK): Define.
190 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
191 Ali Lown <ali.lown@imgtec.com>
193 * Makefile.in (tmp-micromips): New rule.
194 (tmp-mach-multi): Add support for micromips.
195 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
196 that works for both mips64 and micromips64.
197 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
199 Add build support for micromips.
200 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
201 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
202 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
203 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
204 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
205 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
206 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
207 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
208 Refactored instruction code to use these functions.
209 * dsp2.igen: Refactored instruction code to use the new functions.
210 * interp.c (decode_coproc): Refactored to work with any instruction
212 (isa_mode): New variable
213 (RSVD_INSTRUCTION): Changed to 0x00000039.
214 * m16.igen (BREAK16): Refactored instruction to use do_break16.
215 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
216 * micromips.dc: New file.
217 * micromips.igen: New file.
218 * micromips16.dc: New file.
219 * micromipsdsp.igen: New file.
220 * micromipsrun.c: New file.
221 * mips.igen (do_swc1): Changed to work with any instruction encoding.
222 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
223 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
224 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
225 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
226 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
227 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
228 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
229 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
230 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
231 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
232 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
233 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
234 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
235 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
236 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
237 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
238 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
239 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
241 Refactored instruction code to use these functions.
242 (RSVD): Changed to use new reserved instruction.
243 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
244 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
245 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
246 do_store_double): Added micromips32 and micromips64 models.
247 Added include for micromips.igen and micromipsdsp.igen
248 Add micromips32 and micromips64 models.
249 (DecodeCoproc): Updated to use new macro definition.
250 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
251 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
252 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
253 Refactored instruction code to use these functions.
254 * sim-main.h (CP0_operation): New enum.
255 (DecodeCoproc): Updated macro.
256 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
257 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
258 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
259 ISA_MODE_MICROMIPS): New defines.
260 (sim_state): Add isa_mode field.
262 2015-06-23 Mike Frysinger <vapier@gentoo.org>
264 * configure: Regenerate.
266 2015-06-12 Mike Frysinger <vapier@gentoo.org>
268 * configure.ac: Change configure.in to configure.ac.
269 * configure: Regenerate.
271 2015-06-12 Mike Frysinger <vapier@gentoo.org>
273 * configure: Regenerate.
275 2015-06-12 Mike Frysinger <vapier@gentoo.org>
277 * interp.c [TRACE]: Delete.
278 (TRACE): Change to WITH_TRACE_ANY_P.
279 [!WITH_TRACE_ANY_P] (open_trace): Define.
280 (mips_option_handler, open_trace, sim_close, dotrace):
281 Change defined(TRACE) to WITH_TRACE_ANY_P.
282 (sim_open): Delete TRACE ifdef check.
283 * sim-main.c (load_memory): Delete TRACE ifdef check.
284 (store_memory): Likewise.
285 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
286 [!WITH_TRACE_ANY_P] (dotrace): Define.
288 2015-04-18 Mike Frysinger <vapier@gentoo.org>
290 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
293 2015-04-18 Mike Frysinger <vapier@gentoo.org>
295 * sim-main.h (SIM_CPU): Delete.
297 2015-04-18 Mike Frysinger <vapier@gentoo.org>
299 * sim-main.h (sim_cia): Delete.
301 2015-04-17 Mike Frysinger <vapier@gentoo.org>
303 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
305 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
306 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
307 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
308 CIA_SET to CPU_PC_SET.
309 * sim-main.h (CIA_GET, CIA_SET): Delete.
311 2015-04-15 Mike Frysinger <vapier@gentoo.org>
313 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
314 * sim-main.h (STATE_CPU): Delete.
316 2015-04-13 Mike Frysinger <vapier@gentoo.org>
318 * configure: Regenerate.
320 2015-04-13 Mike Frysinger <vapier@gentoo.org>
322 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
323 * interp.c (mips_pc_get, mips_pc_set): New functions.
324 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
325 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
326 (sim_pc_get): Delete.
327 * sim-main.h (SIM_CPU): Define.
328 (struct sim_state): Change cpu to an array of pointers.
331 2015-04-13 Mike Frysinger <vapier@gentoo.org>
333 * interp.c (mips_option_handler, open_trace, sim_close,
334 sim_write, sim_read, sim_store_register, sim_fetch_register,
335 sim_create_inferior, pr_addr, pr_uword64): Convert old style
337 (sim_open): Convert old style prototype. Change casts with
338 sim_write to unsigned char *.
339 (fetch_str): Change null to unsigned char, and change cast to
341 (sim_monitor): Change c & ch to unsigned char. Change cast to
344 2015-04-12 Mike Frysinger <vapier@gentoo.org>
346 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
348 2015-04-06 Mike Frysinger <vapier@gentoo.org>
350 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
352 2015-04-01 Mike Frysinger <vapier@gentoo.org>
354 * tconfig.h (SIM_HAVE_PROFILE): Delete.
356 2015-03-31 Mike Frysinger <vapier@gentoo.org>
358 * config.in, configure: Regenerate.
360 2015-03-24 Mike Frysinger <vapier@gentoo.org>
362 * interp.c (sim_pc_get): New function.
364 2015-03-24 Mike Frysinger <vapier@gentoo.org>
366 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
367 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
369 2015-03-24 Mike Frysinger <vapier@gentoo.org>
371 * configure: Regenerate.
373 2015-03-23 Mike Frysinger <vapier@gentoo.org>
375 * configure: Regenerate.
377 2015-03-23 Mike Frysinger <vapier@gentoo.org>
379 * configure: Regenerate.
380 * configure.ac (mips_extra_objs): Delete.
381 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
382 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
384 2015-03-23 Mike Frysinger <vapier@gentoo.org>
386 * configure: Regenerate.
387 * configure.ac: Delete sim_hw checks for dv-sockser.
389 2015-03-16 Mike Frysinger <vapier@gentoo.org>
391 * config.in, configure: Regenerate.
392 * tconfig.in: Rename file ...
393 * tconfig.h: ... here.
395 2015-03-15 Mike Frysinger <vapier@gentoo.org>
397 * tconfig.in: Delete includes.
398 [HAVE_DV_SOCKSER]: Delete.
400 2015-03-14 Mike Frysinger <vapier@gentoo.org>
402 * Makefile.in (SIM_RUN_OBJS): Delete.
404 2015-03-14 Mike Frysinger <vapier@gentoo.org>
406 * configure.ac (AC_CHECK_HEADERS): Delete.
407 * aclocal.m4, configure: Regenerate.
409 2014-08-19 Alan Modra <amodra@gmail.com>
411 * configure: Regenerate.
413 2014-08-15 Roland McGrath <mcgrathr@google.com>
415 * configure: Regenerate.
416 * config.in: Regenerate.
418 2014-03-04 Mike Frysinger <vapier@gentoo.org>
420 * configure: Regenerate.
422 2013-09-23 Alan Modra <amodra@gmail.com>
424 * configure: Regenerate.
426 2013-06-03 Mike Frysinger <vapier@gentoo.org>
428 * aclocal.m4, configure: Regenerate.
430 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
432 * configure: Rebuild.
434 2013-03-26 Mike Frysinger <vapier@gentoo.org>
436 * configure: Regenerate.
438 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
440 * configure.ac: Address use of dv-sockser.o.
441 * tconfig.in: Conditionalize use of dv_sockser_install.
442 * configure: Regenerated.
443 * config.in: Regenerated.
445 2012-10-04 Chao-ying Fu <fu@mips.com>
446 Steve Ellcey <sellcey@mips.com>
448 * mips/mips3264r2.igen (rdhwr): New.
450 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
452 * configure.ac: Always link against dv-sockser.o.
453 * configure: Regenerate.
455 2012-06-15 Joel Brobecker <brobecker@adacore.com>
457 * config.in, configure: Regenerate.
459 2012-05-18 Nick Clifton <nickc@redhat.com>
462 * interp.c: Include config.h before system header files.
464 2012-03-24 Mike Frysinger <vapier@gentoo.org>
466 * aclocal.m4, config.in, configure: Regenerate.
468 2011-12-03 Mike Frysinger <vapier@gentoo.org>
470 * aclocal.m4: New file.
471 * configure: Regenerate.
473 2011-10-19 Mike Frysinger <vapier@gentoo.org>
475 * configure: Regenerate after common/acinclude.m4 update.
477 2011-10-17 Mike Frysinger <vapier@gentoo.org>
479 * configure.ac: Change include to common/acinclude.m4.
481 2011-10-17 Mike Frysinger <vapier@gentoo.org>
483 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
484 call. Replace common.m4 include with SIM_AC_COMMON.
485 * configure: Regenerate.
487 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
489 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
491 (tmp-mach-multi): Exit early when igen fails.
493 2011-07-05 Mike Frysinger <vapier@gentoo.org>
495 * interp.c (sim_do_command): Delete.
497 2011-02-14 Mike Frysinger <vapier@gentoo.org>
499 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
500 (tx3904sio_fifo_reset): Likewise.
501 * interp.c (sim_monitor): Likewise.
503 2010-04-14 Mike Frysinger <vapier@gentoo.org>
505 * interp.c (sim_write): Add const to buffer arg.
507 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
509 * interp.c: Don't include sysdep.h
511 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
513 * configure: Regenerate.
515 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
517 * config.in: Regenerate.
518 * configure: Likewise.
520 * configure: Regenerate.
522 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
524 * configure: Regenerate to track ../common/common.m4 changes.
527 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
528 Daniel Jacobowitz <dan@codesourcery.com>
529 Joseph Myers <joseph@codesourcery.com>
531 * configure: Regenerate.
533 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
535 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
536 that unconditionally allows fmt_ps.
537 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
538 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
539 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
540 filter from 64,f to 32,f.
541 (PREFX): Change filter from 64 to 32.
542 (LDXC1, LUXC1): Provide separate mips32r2 implementations
543 that use do_load_double instead of do_load. Make both LUXC1
544 versions unpredictable if SizeFGR () != 64.
545 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
546 instead of do_store. Remove unused variable. Make both SUXC1
547 versions unpredictable if SizeFGR () != 64.
549 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
551 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
552 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
553 shifts for that case.
555 2007-09-04 Nick Clifton <nickc@redhat.com>
557 * interp.c (options enum): Add OPTION_INFO_MEMORY.
558 (display_mem_info): New static variable.
559 (mips_option_handler): Handle OPTION_INFO_MEMORY.
560 (mips_options): Add info-memory and memory-info.
561 (sim_open): After processing the command line and board
562 specification, check display_mem_info. If it is set then
563 call the real handler for the --memory-info command line
566 2007-08-24 Joel Brobecker <brobecker@adacore.com>
568 * configure.ac: Change license of multi-run.c to GPL version 3.
569 * configure: Regenerate.
571 2007-06-28 Richard Sandiford <richard@codesourcery.com>
573 * configure.ac, configure: Revert last patch.
575 2007-06-26 Richard Sandiford <richard@codesourcery.com>
577 * configure.ac (sim_mipsisa3264_configs): New variable.
578 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
579 every configuration support all four targets, using the triplet to
580 determine the default.
581 * configure: Regenerate.
583 2007-06-25 Richard Sandiford <richard@codesourcery.com>
585 * Makefile.in (m16run.o): New rule.
587 2007-05-15 Thiemo Seufer <ths@mips.com>
589 * mips3264r2.igen (DSHD): Fix compile warning.
591 2007-05-14 Thiemo Seufer <ths@mips.com>
593 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
594 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
595 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
596 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
599 2007-03-01 Thiemo Seufer <ths@mips.com>
601 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
604 2007-02-20 Thiemo Seufer <ths@mips.com>
606 * dsp.igen: Update copyright notice.
607 * dsp2.igen: Fix copyright notice.
609 2007-02-20 Thiemo Seufer <ths@mips.com>
610 Chao-Ying Fu <fu@mips.com>
612 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
613 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
614 Add dsp2 to sim_igen_machine.
615 * configure: Regenerate.
616 * dsp.igen (do_ph_op): Add MUL support when op = 2.
617 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
618 (mulq_rs.ph): Use do_ph_mulq.
619 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
620 * mips.igen: Add dsp2 model and include dsp2.igen.
621 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
622 for *mips32r2, *mips64r2, *dsp.
623 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
624 for *mips32r2, *mips64r2, *dsp2.
625 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
627 2007-02-19 Thiemo Seufer <ths@mips.com>
628 Nigel Stephens <nigel@mips.com>
630 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
631 jumps with hazard barrier.
633 2007-02-19 Thiemo Seufer <ths@mips.com>
634 Nigel Stephens <nigel@mips.com>
636 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
637 after each call to sim_io_write.
639 2007-02-19 Thiemo Seufer <ths@mips.com>
640 Nigel Stephens <nigel@mips.com>
642 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
643 supported by this simulator.
644 (decode_coproc): Recognise additional CP0 Config registers
647 2007-02-19 Thiemo Seufer <ths@mips.com>
648 Nigel Stephens <nigel@mips.com>
649 David Ung <davidu@mips.com>
651 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
652 uninterpreted formats. If fmt is one of the uninterpreted types
653 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
654 fmt_word, and fmt_uninterpreted_64 like fmt_long.
655 (store_fpr): When writing an invalid odd register, set the
656 matching even register to fmt_unknown, not the following register.
657 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
658 the the memory window at offset 0 set by --memory-size command
660 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
662 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
664 (sim_monitor): When returning the memory size to the MIPS
665 application, use the value in STATE_MEM_SIZE, not an arbitrary
667 (cop_lw): Don' mess around with FPR_STATE, just pass
668 fmt_uninterpreted_32 to StoreFPR.
670 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
672 * mips.igen (not_word_value): Single version for mips32, mips64
675 2007-02-19 Thiemo Seufer <ths@mips.com>
676 Nigel Stephens <nigel@mips.com>
678 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
681 2007-02-17 Thiemo Seufer <ths@mips.com>
683 * configure.ac (mips*-sde-elf*): Move in front of generic machine
685 * configure: Regenerate.
687 2007-02-17 Thiemo Seufer <ths@mips.com>
689 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
690 Add mdmx to sim_igen_machine.
691 (mipsisa64*-*-*): Likewise. Remove dsp.
692 (mipsisa32*-*-*): Remove dsp.
693 * configure: Regenerate.
695 2007-02-13 Thiemo Seufer <ths@mips.com>
697 * configure.ac: Add mips*-sde-elf* target.
698 * configure: Regenerate.
700 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
702 * acconfig.h: Remove.
703 * config.in, configure: Regenerate.
705 2006-11-07 Thiemo Seufer <ths@mips.com>
707 * dsp.igen (do_w_op): Fix compiler warning.
709 2006-08-29 Thiemo Seufer <ths@mips.com>
710 David Ung <davidu@mips.com>
712 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
714 * configure: Regenerate.
715 * mips.igen (model): Add smartmips.
716 (MADDU): Increment ACX if carry.
717 (do_mult): Clear ACX.
718 (ROR,RORV): Add smartmips.
719 (include): Include smartmips.igen.
720 * sim-main.h (ACX): Set to REGISTERS[89].
721 * smartmips.igen: New file.
723 2006-08-29 Thiemo Seufer <ths@mips.com>
724 David Ung <davidu@mips.com>
726 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
727 mips3264r2.igen. Add missing dependency rules.
728 * m16e.igen: Support for mips16e save/restore instructions.
730 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
732 * configure: Regenerated.
734 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
736 * configure: Regenerated.
738 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
740 * configure: Regenerated.
742 2006-05-15 Chao-ying Fu <fu@mips.com>
744 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
746 2006-04-18 Nick Clifton <nickc@redhat.com>
748 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
751 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
753 * configure: Regenerate.
755 2005-12-14 Chao-ying Fu <fu@mips.com>
757 * Makefile.in (SIM_OBJS): Add dsp.o.
758 (dsp.o): New dependency.
759 (IGEN_INCLUDE): Add dsp.igen.
760 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
761 mipsisa64*-*-*): Add dsp to sim_igen_machine.
762 * configure: Regenerate.
763 * mips.igen: Add dsp model and include dsp.igen.
764 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
765 because these instructions are extended in DSP ASE.
766 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
767 adding 6 DSP accumulator registers and 1 DSP control register.
768 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
769 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
770 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
771 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
772 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
773 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
774 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
775 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
776 DSPCR_CCOND_SMASK): New define.
777 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
778 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
780 2005-07-08 Ian Lance Taylor <ian@airs.com>
782 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
784 2005-06-16 David Ung <davidu@mips.com>
785 Nigel Stephens <nigel@mips.com>
787 * mips.igen: New mips16e model and include m16e.igen.
788 (check_u64): Add mips16e tag.
789 * m16e.igen: New file for MIPS16e instructions.
790 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
791 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
793 * configure: Regenerate.
795 2005-05-26 David Ung <davidu@mips.com>
797 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
798 tags to all instructions which are applicable to the new ISAs.
799 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
801 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
803 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
805 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
806 * configure: Regenerate.
808 2005-03-23 Mark Kettenis <kettenis@gnu.org>
810 * configure: Regenerate.
812 2005-01-14 Andrew Cagney <cagney@gnu.org>
814 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
815 explicit call to AC_CONFIG_HEADER.
816 * configure: Regenerate.
818 2005-01-12 Andrew Cagney <cagney@gnu.org>
820 * configure.ac: Update to use ../common/common.m4.
821 * configure: Re-generate.
823 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
825 * configure: Regenerated to track ../common/aclocal.m4 changes.
827 2005-01-07 Andrew Cagney <cagney@gnu.org>
829 * configure.ac: Rename configure.in, require autoconf 2.59.
830 * configure: Re-generate.
832 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
834 * configure: Regenerate for ../common/aclocal.m4 update.
836 2004-09-24 Monika Chaddha <monika@acmet.com>
838 Committed by Andrew Cagney.
839 * m16.igen (CMP, CMPI): Fix assembler.
841 2004-08-18 Chris Demetriou <cgd@broadcom.com>
843 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
844 * configure: Regenerate.
846 2004-06-25 Chris Demetriou <cgd@broadcom.com>
848 * configure.in (sim_m16_machine): Include mipsIII.
849 * configure: Regenerate.
851 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
853 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
855 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
857 2004-04-10 Chris Demetriou <cgd@broadcom.com>
859 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
861 2004-04-09 Chris Demetriou <cgd@broadcom.com>
863 * mips.igen (check_fmt): Remove.
864 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
865 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
866 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
867 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
868 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
869 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
870 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
871 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
872 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
873 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
875 2004-04-09 Chris Demetriou <cgd@broadcom.com>
877 * sb1.igen (check_sbx): New function.
878 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
880 2004-03-29 Chris Demetriou <cgd@broadcom.com>
881 Richard Sandiford <rsandifo@redhat.com>
883 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
884 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
885 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
886 separate implementations for mipsIV and mipsV. Use new macros to
887 determine whether the restrictions apply.
889 2004-01-19 Chris Demetriou <cgd@broadcom.com>
891 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
892 (check_mult_hilo): Improve comments.
893 (check_div_hilo): Likewise. Also, fork off a new version
894 to handle mips32/mips64 (since there are no hazards to check
897 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
899 * mips.igen (do_dmultx): Fix check for negative operands.
901 2003-05-16 Ian Lance Taylor <ian@airs.com>
903 * Makefile.in (SHELL): Make sure this is defined.
904 (various): Use $(SHELL) whenever we invoke move-if-change.
906 2003-05-03 Chris Demetriou <cgd@broadcom.com>
908 * cp1.c: Tweak attribution slightly.
911 * mdmx.igen: Likewise.
912 * mips3d.igen: Likewise.
913 * sb1.igen: Likewise.
915 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
917 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
920 2003-02-27 Andrew Cagney <cagney@redhat.com>
922 * interp.c (sim_open): Rename _bfd to bfd.
923 (sim_create_inferior): Ditto.
925 2003-01-14 Chris Demetriou <cgd@broadcom.com>
927 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
929 2003-01-14 Chris Demetriou <cgd@broadcom.com>
931 * mips.igen (EI, DI): Remove.
933 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
935 * Makefile.in (tmp-run-multi): Fix mips16 filter.
937 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
938 Andrew Cagney <ac131313@redhat.com>
939 Gavin Romig-Koch <gavin@redhat.com>
940 Graydon Hoare <graydon@redhat.com>
941 Aldy Hernandez <aldyh@redhat.com>
942 Dave Brolley <brolley@redhat.com>
943 Chris Demetriou <cgd@broadcom.com>
945 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
946 (sim_mach_default): New variable.
947 (mips64vr-*-*, mips64vrel-*-*): New configurations.
948 Add a new simulator generator, MULTI.
949 * configure: Regenerate.
950 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
951 (multi-run.o): New dependency.
952 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
953 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
954 (tmp-multi): Combine them.
955 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
956 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
957 (distclean-extra): New rule.
958 * sim-main.h: Include bfd.h.
959 (MIPS_MACH): New macro.
960 * mips.igen (vr4120, vr5400, vr5500): New models.
961 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
962 * vr.igen: Replace with new version.
964 2003-01-04 Chris Demetriou <cgd@broadcom.com>
966 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
967 * configure: Regenerate.
969 2002-12-31 Chris Demetriou <cgd@broadcom.com>
971 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
972 * mips.igen: Remove all invocations of check_branch_bug and
975 2002-12-16 Chris Demetriou <cgd@broadcom.com>
977 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
979 2002-07-30 Chris Demetriou <cgd@broadcom.com>
981 * mips.igen (do_load_double, do_store_double): New functions.
982 (LDC1, SDC1): Rename to...
983 (LDC1b, SDC1b): respectively.
984 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
986 2002-07-29 Michael Snyder <msnyder@redhat.com>
988 * cp1.c (fp_recip2): Modify initialization expression so that
989 GCC will recognize it as constant.
991 2002-06-18 Chris Demetriou <cgd@broadcom.com>
993 * mdmx.c (SD_): Delete.
994 (Unpredictable): Re-define, for now, to directly invoke
995 unpredictable_action().
996 (mdmx_acc_op): Fix error in .ob immediate handling.
998 2002-06-18 Andrew Cagney <cagney@redhat.com>
1000 * interp.c (sim_firmware_command): Initialize `address'.
1002 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1004 * configure: Regenerated to track ../common/aclocal.m4 changes.
1006 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1007 Ed Satterthwaite <ehs@broadcom.com>
1009 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1010 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1011 * mips.igen: Include mips3d.igen.
1012 (mips3d): New model name for MIPS-3D ASE instructions.
1013 (CVT.W.fmt): Don't use this instruction for word (source) format
1015 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1016 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1017 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1018 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1019 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1020 (RSquareRoot1, RSquareRoot2): New macros.
1021 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1022 (fp_rsqrt2): New functions.
1023 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1024 * configure: Regenerate.
1026 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1027 Ed Satterthwaite <ehs@broadcom.com>
1029 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1030 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1031 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1032 (convert): Note that this function is not used for paired-single
1034 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1035 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1036 (check_fmt_p): Enable paired-single support.
1037 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1038 (PUU.PS): New instructions.
1039 (CVT.S.fmt): Don't use this instruction for paired-single format
1041 * sim-main.h (FP_formats): New value 'fmt_ps.'
1042 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1043 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1045 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1047 * mips.igen: Fix formatting of function calls in
1050 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1052 * mips.igen (MOVN, MOVZ): Trace result.
1053 (TNEI): Print "tnei" as the opcode name in traces.
1054 (CEIL.W): Add disassembly string for traces.
1055 (RSQRT.fmt): Make location of disassembly string consistent
1056 with other instructions.
1058 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1060 * mips.igen (X): Delete unused function.
1062 2002-06-08 Andrew Cagney <cagney@redhat.com>
1064 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1066 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1067 Ed Satterthwaite <ehs@broadcom.com>
1069 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1070 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1071 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1072 (fp_nmsub): New prototypes.
1073 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1074 (NegMultiplySub): New defines.
1075 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1076 (MADD.D, MADD.S): Replace with...
1077 (MADD.fmt): New instruction.
1078 (MSUB.D, MSUB.S): Replace with...
1079 (MSUB.fmt): New instruction.
1080 (NMADD.D, NMADD.S): Replace with...
1081 (NMADD.fmt): New instruction.
1082 (NMSUB.D, MSUB.S): Replace with...
1083 (NMSUB.fmt): New instruction.
1085 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1086 Ed Satterthwaite <ehs@broadcom.com>
1088 * cp1.c: Fix more comment spelling and formatting.
1089 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1090 (denorm_mode): New function.
1091 (fpu_unary, fpu_binary): Round results after operation, collect
1092 status from rounding operations, and update the FCSR.
1093 (convert): Collect status from integer conversions and rounding
1094 operations, and update the FCSR. Adjust NaN values that result
1095 from conversions. Convert to use sim_io_eprintf rather than
1096 fprintf, and remove some debugging code.
1097 * cp1.h (fenr_FS): New define.
1099 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1101 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1102 rounding mode to sim FP rounding mode flag conversion code into...
1103 (rounding_mode): New function.
1105 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1107 * cp1.c: Clean up formatting of a few comments.
1108 (value_fpr): Reformat switch statement.
1110 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1111 Ed Satterthwaite <ehs@broadcom.com>
1114 * sim-main.h: Include cp1.h.
1115 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1116 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1117 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1118 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1119 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1120 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1121 * cp1.c: Don't include sim-fpu.h; already included by
1122 sim-main.h. Clean up formatting of some comments.
1123 (NaN, Equal, Less): Remove.
1124 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1125 (fp_cmp): New functions.
1126 * mips.igen (do_c_cond_fmt): Remove.
1127 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1128 Compare. Add result tracing.
1129 (CxC1): Remove, replace with...
1130 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1131 (DMxC1): Remove, replace with...
1132 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1133 (MxC1): Remove, replace with...
1134 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1136 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1138 * sim-main.h (FGRIDX): Remove, replace all uses with...
1139 (FGR_BASE): New macro.
1140 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1141 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1142 (NR_FGR, FGR): Likewise.
1143 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1144 * mips.igen: Likewise.
1146 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1148 * cp1.c: Add an FSF Copyright notice to this file.
1150 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1151 Ed Satterthwaite <ehs@broadcom.com>
1153 * cp1.c (Infinity): Remove.
1154 * sim-main.h (Infinity): Likewise.
1156 * cp1.c (fp_unary, fp_binary): New functions.
1157 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1158 (fp_sqrt): New functions, implemented in terms of the above.
1159 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1160 (Recip, SquareRoot): Remove (replaced by functions above).
1161 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1162 (fp_recip, fp_sqrt): New prototypes.
1163 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1164 (Recip, SquareRoot): Replace prototypes with #defines which
1165 invoke the functions above.
1167 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1169 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1170 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1171 file, remove PARAMS from prototypes.
1172 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1173 simulator state arguments.
1174 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1175 pass simulator state arguments.
1176 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1177 (store_fpr, convert): Remove 'sd' argument.
1178 (value_fpr): Likewise. Convert to use 'SD' instead.
1180 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1182 * cp1.c (Min, Max): Remove #if 0'd functions.
1183 * sim-main.h (Min, Max): Remove.
1185 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1187 * cp1.c: fix formatting of switch case and default labels.
1188 * interp.c: Likewise.
1189 * sim-main.c: Likewise.
1191 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1193 * cp1.c: Clean up comments which describe FP formats.
1194 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1196 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1197 Ed Satterthwaite <ehs@broadcom.com>
1199 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1200 Broadcom SiByte SB-1 processor configurations.
1201 * configure: Regenerate.
1202 * sb1.igen: New file.
1203 * mips.igen: Include sb1.igen.
1205 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1206 * mdmx.igen: Add "sb1" model to all appropriate functions and
1208 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1209 (ob_func, ob_acc): Reference the above.
1210 (qh_acc): Adjust to keep the same size as ob_acc.
1211 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1212 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1214 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1216 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1218 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1219 Ed Satterthwaite <ehs@broadcom.com>
1221 * mips.igen (mdmx): New (pseudo-)model.
1222 * mdmx.c, mdmx.igen: New files.
1223 * Makefile.in (SIM_OBJS): Add mdmx.o.
1224 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1226 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1227 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1228 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1229 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1230 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1231 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1232 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1233 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1234 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1235 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1236 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1237 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1238 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1239 (qh_fmtsel): New macros.
1240 (_sim_cpu): New member "acc".
1241 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1242 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1244 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1246 * interp.c: Use 'deprecated' rather than 'depreciated.'
1247 * sim-main.h: Likewise.
1249 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1251 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1252 which wouldn't compile anyway.
1253 * sim-main.h (unpredictable_action): New function prototype.
1254 (Unpredictable): Define to call igen function unpredictable().
1255 (NotWordValue): New macro to call igen function not_word_value().
1256 (UndefinedResult): Remove.
1257 * interp.c (undefined_result): Remove.
1258 (unpredictable_action): New function.
1259 * mips.igen (not_word_value, unpredictable): New functions.
1260 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1261 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1262 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1263 NotWordValue() to check for unpredictable inputs, then
1264 Unpredictable() to handle them.
1266 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1268 * mips.igen: Fix formatting of calls to Unpredictable().
1270 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1272 * interp.c (sim_open): Revert previous change.
1274 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1276 * interp.c (sim_open): Disable chunk of code that wrote code in
1277 vector table entries.
1279 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1281 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1282 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1285 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1287 * cp1.c: Fix many formatting issues.
1289 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1291 * cp1.c (fpu_format_name): New function to replace...
1292 (DOFMT): This. Delete, and update all callers.
1293 (fpu_rounding_mode_name): New function to replace...
1294 (RMMODE): This. Delete, and update all callers.
1296 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1298 * interp.c: Move FPU support routines from here to...
1299 * cp1.c: Here. New file.
1300 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1301 (cp1.o): New target.
1303 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1305 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1306 * mips.igen (mips32, mips64): New models, add to all instructions
1307 and functions as appropriate.
1308 (loadstore_ea, check_u64): New variant for model mips64.
1309 (check_fmt_p): New variant for models mipsV and mips64, remove
1310 mipsV model marking fro other variant.
1313 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1314 for mips32 and mips64.
1315 (DCLO, DCLZ): New instructions for mips64.
1317 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1319 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1320 immediate or code as a hex value with the "%#lx" format.
1321 (ANDI): Likewise, and fix printed instruction name.
1323 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1325 * sim-main.h (UndefinedResult, Unpredictable): New macros
1326 which currently do nothing.
1328 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1330 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1331 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1332 (status_CU3): New definitions.
1334 * sim-main.h (ExceptionCause): Add new values for MIPS32
1335 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1336 for DebugBreakPoint and NMIReset to note their status in
1338 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1339 (SignalExceptionCacheErr): New exception macros.
1341 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1343 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1344 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1346 (SignalExceptionCoProcessorUnusable): Take as argument the
1347 unusable coprocessor number.
1349 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1351 * mips.igen: Fix formatting of all SignalException calls.
1353 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1355 * sim-main.h (SIGNEXTEND): Remove.
1357 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1359 * mips.igen: Remove gencode comment from top of file, fix
1360 spelling in another comment.
1362 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1364 * mips.igen (check_fmt, check_fmt_p): New functions to check
1365 whether specific floating point formats are usable.
1366 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1367 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1368 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1369 Use the new functions.
1370 (do_c_cond_fmt): Remove format checks...
1371 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1373 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen: Fix formatting of check_fpu calls.
1377 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1379 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1381 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1383 * mips.igen: Remove whitespace at end of lines.
1385 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1387 * mips.igen (loadstore_ea): New function to do effective
1388 address calculations.
1389 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1390 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1391 CACHE): Use loadstore_ea to do effective address computations.
1393 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1395 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1396 * mips.igen (LL, CxC1, MxC1): Likewise.
1398 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1400 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1401 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1402 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1403 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1404 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1405 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1406 Don't split opcode fields by hand, use the opcode field values
1409 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1411 * mips.igen (do_divu): Fix spacing.
1413 * mips.igen (do_dsllv): Move to be right before DSLLV,
1414 to match the rest of the do_<shift> functions.
1416 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1418 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1419 DSRL32, do_dsrlv): Trace inputs and results.
1421 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1423 * mips.igen (CACHE): Provide instruction-printing string.
1425 * interp.c (signal_exception): Comment tokens after #endif.
1427 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1429 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1430 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1431 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1432 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1433 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1434 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1435 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1436 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1438 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1440 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1441 instruction-printing string.
1442 (LWU): Use '64' as the filter flag.
1444 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1446 * mips.igen (SDXC1): Fix instruction-printing string.
1448 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1450 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1451 filter flags "32,f".
1453 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1455 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1458 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1460 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1461 add a comma) so that it more closely match the MIPS ISA
1462 documentation opcode partitioning.
1463 (PREF): Put useful names on opcode fields, and include
1464 instruction-printing string.
1466 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1468 * mips.igen (check_u64): New function which in the future will
1469 check whether 64-bit instructions are usable and signal an
1470 exception if not. Currently a no-op.
1471 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1472 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1473 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1474 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1476 * mips.igen (check_fpu): New function which in the future will
1477 check whether FPU instructions are usable and signal an exception
1478 if not. Currently a no-op.
1479 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1480 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1481 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1482 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1483 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1484 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1485 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1486 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1488 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1490 * mips.igen (do_load_left, do_load_right): Move to be immediately
1492 (do_store_left, do_store_right): Move to be immediately following
1495 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1497 * mips.igen (mipsV): New model name. Also, add it to
1498 all instructions and functions where it is appropriate.
1500 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1502 * mips.igen: For all functions and instructions, list model
1503 names that support that instruction one per line.
1505 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1507 * mips.igen: Add some additional comments about supported
1508 models, and about which instructions go where.
1509 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1510 order as is used in the rest of the file.
1512 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1514 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1515 indicating that ALU32_END or ALU64_END are there to check
1517 (DADD): Likewise, but also remove previous comment about
1520 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1522 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1523 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1524 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1525 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1526 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1527 fields (i.e., add and move commas) so that they more closely
1528 match the MIPS ISA documentation opcode partitioning.
1530 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1532 * mips.igen (ADDI): Print immediate value.
1533 (BREAK): Print code.
1534 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1535 (SLL): Print "nop" specially, and don't run the code
1536 that does the shift for the "nop" case.
1538 2001-11-17 Fred Fish <fnf@redhat.com>
1540 * sim-main.h (float_operation): Move enum declaration outside
1541 of _sim_cpu struct declaration.
1543 2001-04-12 Jim Blandy <jimb@redhat.com>
1545 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1546 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1548 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1549 PENDING_FILL, and you can get the intended effect gracefully by
1550 calling PENDING_SCHED directly.
1552 2001-02-23 Ben Elliston <bje@redhat.com>
1554 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1555 already defined elsewhere.
1557 2001-02-19 Ben Elliston <bje@redhat.com>
1559 * sim-main.h (sim_monitor): Return an int.
1560 * interp.c (sim_monitor): Add return values.
1561 (signal_exception): Handle error conditions from sim_monitor.
1563 2001-02-08 Ben Elliston <bje@redhat.com>
1565 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1566 (store_memory): Likewise, pass cia to sim_core_write*.
1568 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1570 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1571 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1573 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1575 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1576 * Makefile.in: Don't delete *.igen when cleaning directory.
1578 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1580 * m16.igen (break): Call SignalException not sim_engine_halt.
1582 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1584 From Jason Eckhardt:
1585 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1587 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1589 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1591 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1593 * mips.igen (do_dmultx): Fix typo.
1595 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1597 * configure: Regenerated to track ../common/aclocal.m4 changes.
1599 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1601 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1603 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1605 * sim-main.h (GPR_CLEAR): Define macro.
1607 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1609 * interp.c (decode_coproc): Output long using %lx and not %s.
1611 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1613 * interp.c (sim_open): Sort & extend dummy memory regions for
1614 --board=jmr3904 for eCos.
1616 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1618 * configure: Regenerated.
1620 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1622 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1623 calls, conditional on the simulator being in verbose mode.
1625 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1627 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1628 cache don't get ReservedInstruction traps.
1630 1999-11-29 Mark Salter <msalter@cygnus.com>
1632 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1633 to clear status bits in sdisr register. This is how the hardware works.
1635 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1636 being used by cygmon.
1638 1999-11-11 Andrew Haley <aph@cygnus.com>
1640 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1643 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1645 * mips.igen (MULT): Correct previous mis-applied patch.
1647 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1649 * mips.igen (delayslot32): Handle sequence like
1650 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1651 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1652 (MULT): Actually pass the third register...
1654 1999-09-03 Mark Salter <msalter@cygnus.com>
1656 * interp.c (sim_open): Added more memory aliases for additional
1657 hardware being touched by cygmon on jmr3904 board.
1659 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1661 * configure: Regenerated to track ../common/aclocal.m4 changes.
1663 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1665 * interp.c (sim_store_register): Handle case where client - GDB -
1666 specifies that a 4 byte register is 8 bytes in size.
1667 (sim_fetch_register): Ditto.
1669 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1671 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1672 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1673 (idt_monitor_base): Base address for IDT monitor traps.
1674 (pmon_monitor_base): Ditto for PMON.
1675 (lsipmon_monitor_base): Ditto for LSI PMON.
1676 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1677 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1678 (sim_firmware_command): New function.
1679 (mips_option_handler): Call it for OPTION_FIRMWARE.
1680 (sim_open): Allocate memory for idt_monitor region. If "--board"
1681 option was given, add no monitor by default. Add BREAK hooks only if
1682 monitors are also there.
1684 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1686 * interp.c (sim_monitor): Flush output before reading input.
1688 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1690 * tconfig.in (SIM_HANDLES_LMA): Always define.
1692 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1694 From Mark Salter <msalter@cygnus.com>:
1695 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1696 (sim_open): Add setup for BSP board.
1698 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1700 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1701 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1702 them as unimplemented.
1704 1999-05-08 Felix Lee <flee@cygnus.com>
1706 * configure: Regenerated to track ../common/aclocal.m4 changes.
1708 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1710 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1712 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1714 * configure.in: Any mips64vr5*-*-* target should have
1715 -DTARGET_ENABLE_FR=1.
1716 (default_endian): Any mips64vr*el-*-* target should default to
1718 * configure: Re-generate.
1720 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1722 * mips.igen (ldl): Extend from _16_, not 32.
1724 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1726 * interp.c (sim_store_register): Force registers written to by GDB
1727 into an un-interpreted state.
1729 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1731 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1732 CPU, start periodic background I/O polls.
1733 (tx3904sio_poll): New function: periodic I/O poller.
1735 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1737 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1739 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1741 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1744 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1746 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1747 (load_word): Call SIM_CORE_SIGNAL hook on error.
1748 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1749 starting. For exception dispatching, pass PC instead of NULL_CIA.
1750 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1751 * sim-main.h (COP0_BADVADDR): Define.
1752 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1753 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1754 (_sim_cpu): Add exc_* fields to store register value snapshots.
1755 * mips.igen (*): Replace memory-related SignalException* calls
1756 with references to SIM_CORE_SIGNAL hook.
1758 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1760 * sim-main.c (*): Minor warning cleanups.
1762 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1764 * m16.igen (DADDIU5): Correct type-o.
1766 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1768 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1771 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1773 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1775 (interp.o): Add dependency on itable.h
1776 (oengine.c, gencode): Delete remaining references.
1777 (BUILT_SRC_FROM_GEN): Clean up.
1779 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1782 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1783 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1784 tmp-run-hack) : New.
1785 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1786 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1787 Drop the "64" qualifier to get the HACK generator working.
1788 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1789 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1790 qualifier to get the hack generator working.
1791 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1792 (DSLL): Use do_dsll.
1793 (DSLLV): Use do_dsllv.
1794 (DSRA): Use do_dsra.
1795 (DSRL): Use do_dsrl.
1796 (DSRLV): Use do_dsrlv.
1797 (BC1): Move *vr4100 to get the HACK generator working.
1798 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1799 get the HACK generator working.
1800 (MACC) Rename to get the HACK generator working.
1801 (DMACC,MACCS,DMACCS): Add the 64.
1803 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1805 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1806 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1808 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1810 * mips/interp.c (DEBUG): Cleanups.
1812 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1814 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1815 (tx3904sio_tickle): fflush after a stdout character output.
1817 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1819 * interp.c (sim_close): Uninstall modules.
1821 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * sim-main.h, interp.c (sim_monitor): Change to global
1826 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1828 * configure.in (vr4100): Only include vr4100 instructions in
1830 * configure: Re-generate.
1831 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1833 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1835 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1836 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1839 * configure.in (sim_default_gen, sim_use_gen): Replace with
1841 (--enable-sim-igen): Delete config option. Always using IGEN.
1842 * configure: Re-generate.
1844 * Makefile.in (gencode): Kill, kill, kill.
1847 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1849 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1850 bit mips16 igen simulator.
1851 * configure: Re-generate.
1853 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1854 as part of vr4100 ISA.
1855 * vr.igen: Mark all instructions as 64 bit only.
1857 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1859 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1862 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1864 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1865 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1866 * configure: Re-generate.
1868 * m16.igen (BREAK): Define breakpoint instruction.
1869 (JALX32): Mark instruction as mips16 and not r3900.
1870 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1872 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1874 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1876 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1877 insn as a debug breakpoint.
1879 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1881 (PENDING_SCHED): Clean up trace statement.
1882 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1883 (PENDING_FILL): Delay write by only one cycle.
1884 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1886 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1888 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1890 (pending_tick): Move incrementing of index to FOR statement.
1891 (pending_tick): Only update PENDING_OUT after a write has occured.
1893 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1895 * configure: Re-generate.
1897 * interp.c (sim_engine_run OLD): Delete explicit call to
1898 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1900 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1902 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1903 interrupt level number to match changed SignalExceptionInterrupt
1906 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1908 * interp.c: #include "itable.h" if WITH_IGEN.
1909 (get_insn_name): New function.
1910 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1911 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1913 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1915 * configure: Rebuilt to inhale new common/aclocal.m4.
1917 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1919 * dv-tx3904sio.c: Include sim-assert.h.
1921 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1923 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1924 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1925 Reorganize target-specific sim-hardware checks.
1926 * configure: rebuilt.
1927 * interp.c (sim_open): For tx39 target boards, set
1928 OPERATING_ENVIRONMENT, add tx3904sio devices.
1929 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1930 ROM executables. Install dv-sockser into sim-modules list.
1932 * dv-tx3904irc.c: Compiler warning clean-up.
1933 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1934 frequent hw-trace messages.
1936 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1938 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1940 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1942 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1944 * vr.igen: New file.
1945 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1946 * mips.igen: Define vr4100 model. Include vr.igen.
1947 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1949 * mips.igen (check_mf_hilo): Correct check.
1951 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1953 * sim-main.h (interrupt_event): Add prototype.
1955 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1956 register_ptr, register_value.
1957 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1959 * sim-main.h (tracefh): Make extern.
1961 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1963 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1964 Reduce unnecessarily high timer event frequency.
1965 * dv-tx3904cpu.c: Ditto for interrupt event.
1967 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1969 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1971 (interrupt_event): Made non-static.
1973 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1974 interchange of configuration values for external vs. internal
1977 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1979 * mips.igen (BREAK): Moved code to here for
1980 simulator-reserved break instructions.
1981 * gencode.c (build_instruction): Ditto.
1982 * interp.c (signal_exception): Code moved from here. Non-
1983 reserved instructions now use exception vector, rather
1985 * sim-main.h: Moved magic constants to here.
1987 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1989 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1990 register upon non-zero interrupt event level, clear upon zero
1992 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1993 by passing zero event value.
1994 (*_io_{read,write}_buffer): Endianness fixes.
1995 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1996 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1998 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1999 serial I/O and timer module at base address 0xFFFF0000.
2001 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2003 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2006 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2008 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2010 * configure: Update.
2012 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2014 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2015 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2016 * configure.in: Include tx3904tmr in hw_device list.
2017 * configure: Rebuilt.
2018 * interp.c (sim_open): Instantiate three timer instances.
2019 Fix address typo of tx3904irc instance.
2021 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2023 * interp.c (signal_exception): SystemCall exception now uses
2024 the exception vector.
2026 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2028 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2031 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2033 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2035 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2037 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2039 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2040 sim-main.h. Declare a struct hw_descriptor instead of struct
2041 hw_device_descriptor.
2043 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2045 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2046 right bits and then re-align left hand bytes to correct byte
2047 lanes. Fix incorrect computation in do_store_left when loading
2048 bytes from second word.
2050 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2052 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2053 * interp.c (sim_open): Only create a device tree when HW is
2056 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2057 * interp.c (signal_exception): Ditto.
2059 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2061 * gencode.c: Mark BEGEZALL as LIKELY.
2063 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2065 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2066 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2068 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2070 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2071 modules. Recognize TX39 target with "mips*tx39" pattern.
2072 * configure: Rebuilt.
2073 * sim-main.h (*): Added many macros defining bits in
2074 TX39 control registers.
2075 (SignalInterrupt): Send actual PC instead of NULL.
2076 (SignalNMIReset): New exception type.
2077 * interp.c (board): New variable for future use to identify
2078 a particular board being simulated.
2079 (mips_option_handler,mips_options): Added "--board" option.
2080 (interrupt_event): Send actual PC.
2081 (sim_open): Make memory layout conditional on board setting.
2082 (signal_exception): Initial implementation of hardware interrupt
2083 handling. Accept another break instruction variant for simulator
2085 (decode_coproc): Implement RFE instruction for TX39.
2086 (mips.igen): Decode RFE instruction as such.
2087 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2088 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2089 bbegin to implement memory map.
2090 * dv-tx3904cpu.c: New file.
2091 * dv-tx3904irc.c: New file.
2093 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2095 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2097 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2099 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2100 with calls to check_div_hilo.
2102 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2104 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2105 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2106 Add special r3900 version of do_mult_hilo.
2107 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2108 with calls to check_mult_hilo.
2109 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2110 with calls to check_div_hilo.
2112 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2114 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2115 Document a replacement.
2117 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2119 * interp.c (sim_monitor): Make mon_printf work.
2121 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2123 * sim-main.h (INSN_NAME): New arg `cpu'.
2125 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2127 * configure: Regenerated to track ../common/aclocal.m4 changes.
2129 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2131 * configure: Regenerated to track ../common/aclocal.m4 changes.
2134 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2136 * acconfig.h: New file.
2137 * configure.in: Reverted change of Apr 24; use sinclude again.
2139 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2141 * configure: Regenerated to track ../common/aclocal.m4 changes.
2144 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2146 * configure.in: Don't call sinclude.
2148 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2150 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2152 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2154 * mips.igen (ERET): Implement.
2156 * interp.c (decode_coproc): Return sign-extended EPC.
2158 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2160 * interp.c (signal_exception): Do not ignore Trap.
2161 (signal_exception): On TRAP, restart at exception address.
2162 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2163 (signal_exception): Update.
2164 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2165 so that TRAP instructions are caught.
2167 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2169 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2170 contains HI/LO access history.
2171 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2172 (HIACCESS, LOACCESS): Delete, replace with
2173 (HIHISTORY, LOHISTORY): New macros.
2174 (CHECKHILO): Delete all, moved to mips.igen
2176 * gencode.c (build_instruction): Do not generate checks for
2177 correct HI/LO register usage.
2179 * interp.c (old_engine_run): Delete checks for correct HI/LO
2182 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2183 check_mf_cycles): New functions.
2184 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2185 do_divu, domultx, do_mult, do_multu): Use.
2187 * tx.igen ("madd", "maddu"): Use.
2189 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2191 * mips.igen (DSRAV): Use function do_dsrav.
2192 (SRAV): Use new function do_srav.
2194 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2195 (B): Sign extend 11 bit immediate.
2196 (EXT-B*): Shift 16 bit immediate left by 1.
2197 (ADDIU*): Don't sign extend immediate value.
2199 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2201 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2203 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2206 * mips.igen (delayslot32, nullify_next_insn): New functions.
2207 (m16.igen): Always include.
2208 (do_*): Add more tracing.
2210 * m16.igen (delayslot16): Add NIA argument, could be called by a
2211 32 bit MIPS16 instruction.
2213 * interp.c (ifetch16): Move function from here.
2214 * sim-main.c (ifetch16): To here.
2216 * sim-main.c (ifetch16, ifetch32): Update to match current
2217 implementations of LH, LW.
2218 (signal_exception): Don't print out incorrect hex value of illegal
2221 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2223 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2226 * m16.igen: Implement MIPS16 instructions.
2228 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2229 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2230 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2231 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2232 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2233 bodies of corresponding code from 32 bit insn to these. Also used
2234 by MIPS16 versions of functions.
2236 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2237 (IMEM16): Drop NR argument from macro.
2239 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2241 * Makefile.in (SIM_OBJS): Add sim-main.o.
2243 * sim-main.h (address_translation, load_memory, store_memory,
2244 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2246 (pr_addr, pr_uword64): Declare.
2247 (sim-main.c): Include when H_REVEALS_MODULE_P.
2249 * interp.c (address_translation, load_memory, store_memory,
2250 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2252 * sim-main.c: To here. Fix compilation problems.
2254 * configure.in: Enable inlining.
2255 * configure: Re-config.
2257 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2259 * configure: Regenerated to track ../common/aclocal.m4 changes.
2261 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2263 * mips.igen: Include tx.igen.
2264 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2265 * tx.igen: New file, contains MADD and MADDU.
2267 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2268 the hardwired constant `7'.
2269 (store_memory): Ditto.
2270 (LOADDRMASK): Move definition to sim-main.h.
2272 mips.igen (MTC0): Enable for r3900.
2275 mips.igen (do_load_byte): Delete.
2276 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2277 do_store_right): New functions.
2278 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2280 configure.in: Let the tx39 use igen again.
2283 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2285 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2286 not an address sized quantity. Return zero for cache sizes.
2288 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2290 * mips.igen (r3900): r3900 does not support 64 bit integer
2293 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2295 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2297 * configure : Rebuild.
2299 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2301 * configure: Regenerated to track ../common/aclocal.m4 changes.
2303 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2305 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2307 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2309 * configure: Regenerated to track ../common/aclocal.m4 changes.
2310 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2312 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2314 * configure: Regenerated to track ../common/aclocal.m4 changes.
2316 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2318 * interp.c (Max, Min): Comment out functions. Not yet used.
2320 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2322 * configure: Regenerated to track ../common/aclocal.m4 changes.
2324 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2326 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2327 configurable settings for stand-alone simulator.
2329 * configure.in: Added X11 search, just in case.
2331 * configure: Regenerated.
2333 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2335 * interp.c (sim_write, sim_read, load_memory, store_memory):
2336 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2338 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2340 * sim-main.h (GETFCC): Return an unsigned value.
2342 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2344 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2345 (DADD): Result destination is RD not RT.
2347 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2349 * sim-main.h (HIACCESS, LOACCESS): Always define.
2351 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2353 * interp.c (sim_info): Delete.
2355 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2357 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2358 (mips_option_handler): New argument `cpu'.
2359 (sim_open): Update call to sim_add_option_table.
2361 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2363 * mips.igen (CxC1): Add tracing.
2365 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2367 * sim-main.h (Max, Min): Declare.
2369 * interp.c (Max, Min): New functions.
2371 * mips.igen (BC1): Add tracing.
2373 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2375 * interp.c Added memory map for stack in vr4100
2377 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2379 * interp.c (load_memory): Add missing "break"'s.
2381 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2383 * interp.c (sim_store_register, sim_fetch_register): Pass in
2384 length parameter. Return -1.
2386 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2388 * interp.c: Added hardware init hook, fixed warnings.
2390 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2392 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2394 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2396 * interp.c (ifetch16): New function.
2398 * sim-main.h (IMEM32): Rename IMEM.
2399 (IMEM16_IMMED): Define.
2401 (DELAY_SLOT): Update.
2403 * m16run.c (sim_engine_run): New file.
2405 * m16.igen: All instructions except LB.
2406 (LB): Call do_load_byte.
2407 * mips.igen (do_load_byte): New function.
2408 (LB): Call do_load_byte.
2410 * mips.igen: Move spec for insn bit size and high bit from here.
2411 * Makefile.in (tmp-igen, tmp-m16): To here.
2413 * m16.dc: New file, decode mips16 instructions.
2415 * Makefile.in (SIM_NO_ALL): Define.
2416 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2418 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2420 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2421 point unit to 32 bit registers.
2422 * configure: Re-generate.
2424 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2426 * configure.in (sim_use_gen): Make IGEN the default simulator
2427 generator for generic 32 and 64 bit mips targets.
2428 * configure: Re-generate.
2430 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2432 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2435 * interp.c (sim_fetch_register, sim_store_register): Read/write
2436 FGR from correct location.
2437 (sim_open): Set size of FGR's according to
2438 WITH_TARGET_FLOATING_POINT_BITSIZE.
2440 * sim-main.h (FGR): Store floating point registers in a separate
2443 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2445 * configure: Regenerated to track ../common/aclocal.m4 changes.
2447 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2449 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2451 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2453 * interp.c (pending_tick): New function. Deliver pending writes.
2455 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2456 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2457 it can handle mixed sized quantites and single bits.
2459 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2461 * interp.c (oengine.h): Do not include when building with IGEN.
2462 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2463 (sim_info): Ditto for PROCESSOR_64BIT.
2464 (sim_monitor): Replace ut_reg with unsigned_word.
2465 (*): Ditto for t_reg.
2466 (LOADDRMASK): Define.
2467 (sim_open): Remove defunct check that host FP is IEEE compliant,
2468 using software to emulate floating point.
2469 (value_fpr, ...): Always compile, was conditional on HASFPU.
2471 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2473 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2476 * interp.c (SD, CPU): Define.
2477 (mips_option_handler): Set flags in each CPU.
2478 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2479 (sim_close): Do not clear STATE, deleted anyway.
2480 (sim_write, sim_read): Assume CPU zero's vm should be used for
2482 (sim_create_inferior): Set the PC for all processors.
2483 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2485 (mips16_entry): Pass correct nr of args to store_word, load_word.
2486 (ColdReset): Cold reset all cpu's.
2487 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2488 (sim_monitor, load_memory, store_memory, signal_exception): Use
2489 `CPU' instead of STATE_CPU.
2492 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2495 * sim-main.h (signal_exception): Add sim_cpu arg.
2496 (SignalException*): Pass both SD and CPU to signal_exception.
2497 * interp.c (signal_exception): Update.
2499 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2501 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2502 address_translation): Ditto
2503 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2505 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2507 * configure: Regenerated to track ../common/aclocal.m4 changes.
2509 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2511 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2513 * mips.igen (model): Map processor names onto BFD name.
2515 * sim-main.h (CPU_CIA): Delete.
2516 (SET_CIA, GET_CIA): Define
2518 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2520 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2523 * configure.in (default_endian): Configure a big-endian simulator
2525 * configure: Re-generate.
2527 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2529 * configure: Regenerated to track ../common/aclocal.m4 changes.
2531 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2533 * interp.c (sim_monitor): Handle Densan monitor outbyte
2534 and inbyte functions.
2536 1997-12-29 Felix Lee <flee@cygnus.com>
2538 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2540 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2542 * Makefile.in (tmp-igen): Arrange for $zero to always be
2543 reset to zero after every instruction.
2545 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2547 * configure: Regenerated to track ../common/aclocal.m4 changes.
2550 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2552 * mips.igen (MSUB): Fix to work like MADD.
2553 * gencode.c (MSUB): Similarly.
2555 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2557 * configure: Regenerated to track ../common/aclocal.m4 changes.
2559 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2561 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2563 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2565 * sim-main.h (sim-fpu.h): Include.
2567 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2568 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2569 using host independant sim_fpu module.
2571 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2573 * interp.c (signal_exception): Report internal errors with SIGABRT
2576 * sim-main.h (C0_CONFIG): New register.
2577 (signal.h): No longer include.
2579 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2581 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2583 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2585 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2587 * mips.igen: Tag vr5000 instructions.
2588 (ANDI): Was missing mipsIV model, fix assembler syntax.
2589 (do_c_cond_fmt): New function.
2590 (C.cond.fmt): Handle mips I-III which do not support CC field
2592 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2593 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2595 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2596 vr5000 which saves LO in a GPR separatly.
2598 * configure.in (enable-sim-igen): For vr5000, select vr5000
2599 specific instructions.
2600 * configure: Re-generate.
2602 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2604 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2606 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2607 fmt_uninterpreted_64 bit cases to switch. Convert to
2610 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2612 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2613 as specified in IV3.2 spec.
2614 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2616 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2618 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2619 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2620 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2621 PENDING_FILL versions of instructions. Simplify.
2623 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2625 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2627 (MTHI, MFHI): Disable code checking HI-LO.
2629 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2631 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2633 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2635 * gencode.c (build_mips16_operands): Replace IPC with cia.
2637 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2638 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2640 (UndefinedResult): Replace function with macro/function
2642 (sim_engine_run): Don't save PC in IPC.
2644 * sim-main.h (IPC): Delete.
2647 * interp.c (signal_exception, store_word, load_word,
2648 address_translation, load_memory, store_memory, cache_op,
2649 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2650 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2651 current instruction address - cia - argument.
2652 (sim_read, sim_write): Call address_translation directly.
2653 (sim_engine_run): Rename variable vaddr to cia.
2654 (signal_exception): Pass cia to sim_monitor
2656 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2657 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2658 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2660 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2661 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2664 * interp.c (signal_exception): Pass restart address to
2667 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2668 idecode.o): Add dependency.
2670 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2672 (DELAY_SLOT): Update NIA not PC with branch address.
2673 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2675 * mips.igen: Use CIA not PC in branch calculations.
2676 (illegal): Call SignalException.
2677 (BEQ, ADDIU): Fix assembler.
2679 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2681 * m16.igen (JALX): Was missing.
2683 * configure.in (enable-sim-igen): New configuration option.
2684 * configure: Re-generate.
2686 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2688 * interp.c (load_memory, store_memory): Delete parameter RAW.
2689 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2690 bypassing {load,store}_memory.
2692 * sim-main.h (ByteSwapMem): Delete definition.
2694 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2696 * interp.c (sim_do_command, sim_commands): Delete mips specific
2697 commands. Handled by module sim-options.
2699 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2700 (WITH_MODULO_MEMORY): Define.
2702 * interp.c (sim_info): Delete code printing memory size.
2704 * interp.c (mips_size): Nee sim_size, delete function.
2706 (monitor, monitor_base, monitor_size): Delete global variables.
2707 (sim_open, sim_close): Delete code creating monitor and other
2708 memory regions. Use sim-memopts module, via sim_do_commandf, to
2709 manage memory regions.
2710 (load_memory, store_memory): Use sim-core for memory model.
2712 * interp.c (address_translation): Delete all memory map code
2713 except line forcing 32 bit addresses.
2715 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2717 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2720 * interp.c (logfh, logfile): Delete globals.
2721 (sim_open, sim_close): Delete code opening & closing log file.
2722 (mips_option_handler): Delete -l and -n options.
2723 (OPTION mips_options): Ditto.
2725 * interp.c (OPTION mips_options): Rename option trace to dinero.
2726 (mips_option_handler): Update.
2728 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * interp.c (fetch_str): New function.
2731 (sim_monitor): Rewrite using sim_read & sim_write.
2732 (sim_open): Check magic number.
2733 (sim_open): Write monitor vectors into memory using sim_write.
2734 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2735 (sim_read, sim_write): Simplify - transfer data one byte at a
2737 (load_memory, store_memory): Clarify meaning of parameter RAW.
2739 * sim-main.h (isHOST): Defete definition.
2740 (isTARGET): Mark as depreciated.
2741 (address_translation): Delete parameter HOST.
2743 * interp.c (address_translation): Delete parameter HOST.
2745 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2749 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2750 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2752 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2754 * mips.igen: Add model filter field to records.
2756 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2758 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2760 interp.c (sim_engine_run): Do not compile function sim_engine_run
2761 when WITH_IGEN == 1.
2763 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2764 target architecture.
2766 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2767 igen. Replace with configuration variables sim_igen_flags /
2770 * m16.igen: New file. Copy mips16 insns here.
2771 * mips.igen: From here.
2773 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2777 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2779 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2781 * gencode.c (build_instruction): Follow sim_write's lead in using
2782 BigEndianMem instead of !ByteSwapMem.
2784 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2786 * configure.in (sim_gen): Dependent on target, select type of
2787 generator. Always select old style generator.
2789 configure: Re-generate.
2791 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2793 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2794 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2795 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2796 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2797 SIM_@sim_gen@_*, set by autoconf.
2799 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2801 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2803 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2804 CURRENT_FLOATING_POINT instead.
2806 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2807 (address_translation): Raise exception InstructionFetch when
2808 translation fails and isINSTRUCTION.
2810 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2811 sim_engine_run): Change type of of vaddr and paddr to
2813 (address_translation, prefetch, load_memory, store_memory,
2814 cache_op): Change type of vAddr and pAddr to address_word.
2816 * gencode.c (build_instruction): Change type of vaddr and paddr to
2819 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2821 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2822 macro to obtain result of ALU op.
2824 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2826 * interp.c (sim_info): Call profile_print.
2828 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2830 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2832 * sim-main.h (WITH_PROFILE): Do not define, defined in
2833 common/sim-config.h. Use sim-profile module.
2834 (simPROFILE): Delete defintion.
2836 * interp.c (PROFILE): Delete definition.
2837 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2838 (sim_close): Delete code writing profile histogram.
2839 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2841 (sim_engine_run): Delete code profiling the PC.
2843 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2845 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2847 * interp.c (sim_monitor): Make register pointers of type
2850 * sim-main.h: Make registers of type unsigned_word not
2853 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2855 * interp.c (sync_operation): Rename from SyncOperation, make
2856 global, add SD argument.
2857 (prefetch): Rename from Prefetch, make global, add SD argument.
2858 (decode_coproc): Make global.
2860 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2862 * gencode.c (build_instruction): Generate DecodeCoproc not
2863 decode_coproc calls.
2865 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2866 (SizeFGR): Move to sim-main.h
2867 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2868 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2869 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2871 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2872 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2873 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2874 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2875 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2876 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2878 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2880 (sim-alu.h): Include.
2881 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2882 (sim_cia): Typedef to instruction_address.
2884 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2886 * Makefile.in (interp.o): Rename generated file engine.c to
2891 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2893 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2895 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2897 * gencode.c (build_instruction): For "FPSQRT", output correct
2898 number of arguments to Recip.
2900 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2902 * Makefile.in (interp.o): Depends on sim-main.h
2904 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2906 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2907 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2908 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2909 STATE, DSSTATE): Define
2910 (GPR, FGRIDX, ..): Define.
2912 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2913 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2914 (GPR, FGRIDX, ...): Delete macros.
2916 * interp.c: Update names to match defines from sim-main.h
2918 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2920 * interp.c (sim_monitor): Add SD argument.
2921 (sim_warning): Delete. Replace calls with calls to
2923 (sim_error): Delete. Replace calls with sim_io_error.
2924 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2925 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2926 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2928 (mips_size): Rename from sim_size. Add SD argument.
2930 * interp.c (simulator): Delete global variable.
2931 (callback): Delete global variable.
2932 (mips_option_handler, sim_open, sim_write, sim_read,
2933 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2934 sim_size,sim_monitor): Use sim_io_* not callback->*.
2935 (sim_open): ZALLOC simulator struct.
2936 (PROFILE): Do not define.
2938 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2940 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2941 support.h with corresponding code.
2943 * sim-main.h (word64, uword64), support.h: Move definition to
2945 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2948 * Makefile.in: Update dependencies
2949 * interp.c: Do not include.
2951 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2953 * interp.c (address_translation, load_memory, store_memory,
2954 cache_op): Rename to from AddressTranslation et.al., make global,
2957 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2960 * interp.c (SignalException): Rename to signal_exception, make
2963 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2965 * sim-main.h (SignalException, SignalExceptionInterrupt,
2966 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2967 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2968 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2971 * interp.c, support.h: Use.
2973 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2975 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2976 to value_fpr / store_fpr. Add SD argument.
2977 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2978 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2980 * sim-main.h (ValueFPR, StoreFPR): Define.
2982 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2984 * interp.c (sim_engine_run): Check consistency between configure
2985 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2988 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2989 (mips_fpu): Configure WITH_FLOATING_POINT.
2990 (mips_endian): Configure WITH_TARGET_ENDIAN.
2991 * configure: Update.
2993 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2995 * configure: Regenerated to track ../common/aclocal.m4 changes.
2997 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2999 * configure: Regenerated.
3001 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3003 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3005 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3007 * gencode.c (print_igen_insn_models): Assume certain architectures
3008 include all mips* instructions.
3009 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3012 * Makefile.in (tmp.igen): Add target. Generate igen input from
3015 * gencode.c (FEATURE_IGEN): Define.
3016 (main): Add --igen option. Generate output in igen format.
3017 (process_instructions): Format output according to igen option.
3018 (print_igen_insn_format): New function.
3019 (print_igen_insn_models): New function.
3020 (process_instructions): Only issue warnings and ignore
3021 instructions when no FEATURE_IGEN.
3023 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3025 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3028 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3030 * configure: Regenerated to track ../common/aclocal.m4 changes.
3032 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3034 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3035 SIM_RESERVED_BITS): Delete, moved to common.
3036 (SIM_EXTRA_CFLAGS): Update.
3038 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * configure.in: Configure non-strict memory alignment.
3041 * configure: Regenerated to track ../common/aclocal.m4 changes.
3043 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3045 * configure: Regenerated to track ../common/aclocal.m4 changes.
3047 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3049 * gencode.c (SDBBP,DERET): Added (3900) insns.
3050 (RFE): Turn on for 3900.
3051 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3052 (dsstate): Made global.
3053 (SUBTARGET_R3900): Added.
3054 (CANCELDELAYSLOT): New.
3055 (SignalException): Ignore SystemCall rather than ignore and
3056 terminate. Add DebugBreakPoint handling.
3057 (decode_coproc): New insns RFE, DERET; and new registers Debug
3058 and DEPC protected by SUBTARGET_R3900.
3059 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3061 * Makefile.in,configure.in: Add mips subtarget option.
3062 * configure: Update.
3064 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3066 * gencode.c: Add r3900 (tx39).
3069 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3071 * gencode.c (build_instruction): Don't need to subtract 4 for
3074 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3076 * interp.c: Correct some HASFPU problems.
3078 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3080 * configure: Regenerated to track ../common/aclocal.m4 changes.
3082 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3084 * interp.c (mips_options): Fix samples option short form, should
3087 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3089 * interp.c (sim_info): Enable info code. Was just returning.
3091 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3093 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3096 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3098 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3100 (build_instruction): Ditto for LL.
3102 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3104 * configure: Regenerated to track ../common/aclocal.m4 changes.
3106 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3108 * configure: Regenerated to track ../common/aclocal.m4 changes.
3111 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3113 * interp.c (sim_open): Add call to sim_analyze_program, update
3116 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3118 * interp.c (sim_kill): Delete.
3119 (sim_create_inferior): Add ABFD argument. Set PC from same.
3120 (sim_load): Move code initializing trap handlers from here.
3121 (sim_open): To here.
3122 (sim_load): Delete, use sim-hload.c.
3124 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3126 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3128 * configure: Regenerated to track ../common/aclocal.m4 changes.
3131 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3133 * interp.c (sim_open): Add ABFD argument.
3134 (sim_load): Move call to sim_config from here.
3135 (sim_open): To here. Check return status.
3137 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3139 * gencode.c (build_instruction): Two arg MADD should
3140 not assign result to $0.
3142 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3144 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3145 * sim/mips/configure.in: Regenerate.
3147 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3149 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3150 signed8, unsigned8 et.al. types.
3152 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3153 hosts when selecting subreg.
3155 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3157 * interp.c (sim_engine_run): Reset the ZERO register to zero
3158 regardless of FEATURE_WARN_ZERO.
3159 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3161 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3163 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3164 (SignalException): For BreakPoints ignore any mode bits and just
3166 (SignalException): Always set the CAUSE register.
3168 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3170 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3171 exception has been taken.
3173 * interp.c: Implement the ERET and mt/f sr instructions.
3175 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3177 * interp.c (SignalException): Don't bother restarting an
3180 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3182 * interp.c (SignalException): Really take an interrupt.
3183 (interrupt_event): Only deliver interrupts when enabled.
3185 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3187 * interp.c (sim_info): Only print info when verbose.
3188 (sim_info) Use sim_io_printf for output.
3190 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3192 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3195 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3197 * interp.c (sim_do_command): Check for common commands if a
3198 simulator specific command fails.
3200 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3202 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3203 and simBE when DEBUG is defined.
3205 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3207 * interp.c (interrupt_event): New function. Pass exception event
3208 onto exception handler.
3210 * configure.in: Check for stdlib.h.
3211 * configure: Regenerate.
3213 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3214 variable declaration.
3215 (build_instruction): Initialize memval1.
3216 (build_instruction): Add UNUSED attribute to byte, bigend,
3218 (build_operands): Ditto.
3220 * interp.c: Fix GCC warnings.
3221 (sim_get_quit_code): Delete.
3223 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3224 * Makefile.in: Ditto.
3225 * configure: Re-generate.
3227 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3229 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3231 * interp.c (mips_option_handler): New function parse argumes using
3233 (myname): Replace with STATE_MY_NAME.
3234 (sim_open): Delete check for host endianness - performed by
3236 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3237 (sim_open): Move much of the initialization from here.
3238 (sim_load): To here. After the image has been loaded and
3240 (sim_open): Move ColdReset from here.
3241 (sim_create_inferior): To here.
3242 (sim_open): Make FP check less dependant on host endianness.
3244 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3246 * interp.c (sim_set_callbacks): Delete.
3248 * interp.c (membank, membank_base, membank_size): Replace with
3249 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3250 (sim_open): Remove call to callback->init. gdb/run do this.
3254 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3256 * interp.c (big_endian_p): Delete, replaced by
3257 current_target_byte_order.
3259 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3261 * interp.c (host_read_long, host_read_word, host_swap_word,
3262 host_swap_long): Delete. Using common sim-endian.
3263 (sim_fetch_register, sim_store_register): Use H2T.
3264 (pipeline_ticks): Delete. Handled by sim-events.
3266 (sim_engine_run): Update.
3268 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3270 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3272 (SignalException): To here. Signal using sim_engine_halt.
3273 (sim_stop_reason): Delete, moved to common.
3275 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3277 * interp.c (sim_open): Add callback argument.
3278 (sim_set_callbacks): Delete SIM_DESC argument.
3281 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3283 * Makefile.in (SIM_OBJS): Add common modules.
3285 * interp.c (sim_set_callbacks): Also set SD callback.
3286 (set_endianness, xfer_*, swap_*): Delete.
3287 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3288 Change to functions using sim-endian macros.
3289 (control_c, sim_stop): Delete, use common version.
3290 (simulate): Convert into.
3291 (sim_engine_run): This function.
3292 (sim_resume): Delete.
3294 * interp.c (simulation): New variable - the simulator object.
3295 (sim_kind): Delete global - merged into simulation.
3296 (sim_load): Cleanup. Move PC assignment from here.
3297 (sim_create_inferior): To here.
3299 * sim-main.h: New file.
3300 * interp.c (sim-main.h): Include.
3302 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3304 * configure: Regenerated to track ../common/aclocal.m4 changes.
3306 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3308 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3310 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3312 * gencode.c (build_instruction): DIV instructions: check
3313 for division by zero and integer overflow before using
3314 host's division operation.
3316 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3318 * Makefile.in (SIM_OBJS): Add sim-load.o.
3319 * interp.c: #include bfd.h.
3320 (target_byte_order): Delete.
3321 (sim_kind, myname, big_endian_p): New static locals.
3322 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3323 after argument parsing. Recognize -E arg, set endianness accordingly.
3324 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3325 load file into simulator. Set PC from bfd.
3326 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3327 (set_endianness): Use big_endian_p instead of target_byte_order.
3329 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3331 * interp.c (sim_size): Delete prototype - conflicts with
3332 definition in remote-sim.h. Correct definition.
3334 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3336 * configure: Regenerated to track ../common/aclocal.m4 changes.
3339 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3341 * interp.c (sim_open): New arg `kind'.
3343 * configure: Regenerated to track ../common/aclocal.m4 changes.
3345 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3347 * configure: Regenerated to track ../common/aclocal.m4 changes.
3349 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3351 * interp.c (sim_open): Set optind to 0 before calling getopt.
3353 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3355 * configure: Regenerated to track ../common/aclocal.m4 changes.
3357 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3359 * interp.c : Replace uses of pr_addr with pr_uword64
3360 where the bit length is always 64 independent of SIM_ADDR.
3361 (pr_uword64) : added.
3363 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3365 * configure: Re-generate.
3367 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3369 * configure: Regenerate to track ../common/aclocal.m4 changes.
3371 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3373 * interp.c (sim_open): New SIM_DESC result. Argument is now
3375 (other sim_*): New SIM_DESC argument.
3377 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3379 * interp.c: Fix printing of addresses for non-64-bit targets.
3380 (pr_addr): Add function to print address based on size.
3382 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3384 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3386 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3388 * gencode.c (build_mips16_operands): Correct computation of base
3389 address for extended PC relative instruction.
3391 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3393 * interp.c (mips16_entry): Add support for floating point cases.
3394 (SignalException): Pass floating point cases to mips16_entry.
3395 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3397 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3399 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3400 and then set the state to fmt_uninterpreted.
3401 (COP_SW): Temporarily set the state to fmt_word while calling
3404 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3406 * gencode.c (build_instruction): The high order may be set in the
3407 comparison flags at any ISA level, not just ISA 4.
3409 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3411 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3412 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3413 * configure.in: sinclude ../common/aclocal.m4.
3414 * configure: Regenerated.
3416 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3418 * configure: Rebuild after change to aclocal.m4.
3420 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3422 * configure configure.in Makefile.in: Update to new configure
3423 scheme which is more compatible with WinGDB builds.
3424 * configure.in: Improve comment on how to run autoconf.
3425 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3426 * Makefile.in: Use autoconf substitution to install common
3429 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3431 * gencode.c (build_instruction): Use BigEndianCPU instead of
3434 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3436 * interp.c (sim_monitor): Make output to stdout visible in
3437 wingdb's I/O log window.
3439 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3441 * support.h: Undo previous change to SIGTRAP
3444 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3446 * interp.c (store_word, load_word): New static functions.
3447 (mips16_entry): New static function.
3448 (SignalException): Look for mips16 entry and exit instructions.
3449 (simulate): Use the correct index when setting fpr_state after
3450 doing a pending move.
3452 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3454 * interp.c: Fix byte-swapping code throughout to work on
3455 both little- and big-endian hosts.
3457 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3459 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3460 with gdb/config/i386/xm-windows.h.
3462 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3464 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3465 that messes up arithmetic shifts.
3467 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3469 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3470 SIGTRAP and SIGQUIT for _WIN32.
3472 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3474 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3475 force a 64 bit multiplication.
3476 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3477 destination register is 0, since that is the default mips16 nop
3480 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3482 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3483 (build_endian_shift): Don't check proc64.
3484 (build_instruction): Always set memval to uword64. Cast op2 to
3485 uword64 when shifting it left in memory instructions. Always use
3486 the same code for stores--don't special case proc64.
3488 * gencode.c (build_mips16_operands): Fix base PC value for PC
3490 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3492 * interp.c (simJALDELAYSLOT): Define.
3493 (JALDELAYSLOT): Define.
3494 (INDELAYSLOT, INJALDELAYSLOT): Define.
3495 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3497 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3499 * interp.c (sim_open): add flush_cache as a PMON routine
3500 (sim_monitor): handle flush_cache by ignoring it
3502 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3504 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3506 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3507 (BigEndianMem): Rename to ByteSwapMem and change sense.
3508 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3509 BigEndianMem references to !ByteSwapMem.
3510 (set_endianness): New function, with prototype.
3511 (sim_open): Call set_endianness.
3512 (sim_info): Use simBE instead of BigEndianMem.
3513 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3514 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3515 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3516 ifdefs, keeping the prototype declaration.
3517 (swap_word): Rewrite correctly.
3518 (ColdReset): Delete references to CONFIG. Delete endianness related
3519 code; moved to set_endianness.
3521 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3523 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3524 * interp.c (CHECKHILO): Define away.
3525 (simSIGINT): New macro.
3526 (membank_size): Increase from 1MB to 2MB.
3527 (control_c): New function.
3528 (sim_resume): Rename parameter signal to signal_number. Add local
3529 variable prev. Call signal before and after simulate.
3530 (sim_stop_reason): Add simSIGINT support.
3531 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3533 (sim_warning): Delete call to SignalException. Do call printf_filtered
3535 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3536 a call to sim_warning.
3538 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3540 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3541 16 bit instructions.
3543 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3545 Add support for mips16 (16 bit MIPS implementation):
3546 * gencode.c (inst_type): Add mips16 instruction encoding types.
3547 (GETDATASIZEINSN): Define.
3548 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3549 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3551 (MIPS16_DECODE): New table, for mips16 instructions.
3552 (bitmap_val): New static function.
3553 (struct mips16_op): Define.
3554 (mips16_op_table): New table, for mips16 operands.
3555 (build_mips16_operands): New static function.
3556 (process_instructions): If PC is odd, decode a mips16
3557 instruction. Break out instruction handling into new
3558 build_instruction function.
3559 (build_instruction): New static function, broken out of
3560 process_instructions. Check modifiers rather than flags for SHIFT
3561 bit count and m[ft]{hi,lo} direction.
3562 (usage): Pass program name to fprintf.
3563 (main): Remove unused variable this_option_optind. Change
3564 ``*loptarg++'' to ``loptarg++''.
3565 (my_strtoul): Parenthesize && within ||.
3566 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3567 (simulate): If PC is odd, fetch a 16 bit instruction, and
3568 increment PC by 2 rather than 4.
3569 * configure.in: Add case for mips16*-*-*.
3570 * configure: Rebuild.
3572 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3574 * interp.c: Allow -t to enable tracing in standalone simulator.
3575 Fix garbage output in trace file and error messages.
3577 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3579 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3580 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3581 * configure.in: Simplify using macros in ../common/aclocal.m4.
3582 * configure: Regenerated.
3583 * tconfig.in: New file.
3585 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3587 * interp.c: Fix bugs in 64-bit port.
3588 Use ansi function declarations for msvc compiler.
3589 Initialize and test file pointer in trace code.
3590 Prevent duplicate definition of LAST_EMED_REGNUM.
3592 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3594 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3596 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3598 * interp.c (SignalException): Check for explicit terminating
3600 * gencode.c: Pass instruction value through SignalException()
3601 calls for Trap, Breakpoint and Syscall.
3603 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3605 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3606 only used on those hosts that provide it.
3607 * configure.in: Add sqrt() to list of functions to be checked for.
3608 * config.in: Re-generated.
3609 * configure: Re-generated.
3611 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3613 * gencode.c (process_instructions): Call build_endian_shift when
3614 expanding STORE RIGHT, to fix swr.
3615 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3616 clear the high bits.
3617 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3618 Fix float to int conversions to produce signed values.
3620 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3622 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3623 (process_instructions): Correct handling of nor instruction.
3624 Correct shift count for 32 bit shift instructions. Correct sign
3625 extension for arithmetic shifts to not shift the number of bits in
3626 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3627 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3629 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3630 It's OK to have a mult follow a mult. What's not OK is to have a
3631 mult follow an mfhi.
3632 (Convert): Comment out incorrect rounding code.
3634 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3636 * interp.c (sim_monitor): Improved monitor printf
3637 simulation. Tidied up simulator warnings, and added "--log" option
3638 for directing warning message output.
3639 * gencode.c: Use sim_warning() rather than WARNING macro.
3641 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3643 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3644 getopt1.o, rather than on gencode.c. Link objects together.
3645 Don't link against -liberty.
3646 (gencode.o, getopt.o, getopt1.o): New targets.
3647 * gencode.c: Include <ctype.h> and "ansidecl.h".
3648 (AND): Undefine after including "ansidecl.h".
3649 (ULONG_MAX): Define if not defined.
3650 (OP_*): Don't define macros; now defined in opcode/mips.h.
3651 (main): Call my_strtoul rather than strtoul.
3652 (my_strtoul): New static function.
3654 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3656 * gencode.c (process_instructions): Generate word64 and uword64
3657 instead of `long long' and `unsigned long long' data types.
3658 * interp.c: #include sysdep.h to get signals, and define default
3660 * (Convert): Work around for Visual-C++ compiler bug with type
3662 * support.h: Make things compile under Visual-C++ by using
3663 __int64 instead of `long long'. Change many refs to long long
3664 into word64/uword64 typedefs.
3666 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3668 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3669 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3671 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3672 (AC_PROG_INSTALL): Added.
3673 (AC_PROG_CC): Moved to before configure.host call.
3674 * configure: Rebuilt.
3676 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3678 * configure.in: Define @SIMCONF@ depending on mips target.
3679 * configure: Rebuild.
3680 * Makefile.in (run): Add @SIMCONF@ to control simulator
3682 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3683 * interp.c: Remove some debugging, provide more detailed error
3684 messages, update memory accesses to use LOADDRMASK.
3686 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3688 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3689 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3691 * configure: Rebuild.
3692 * config.in: New file, generated by autoheader.
3693 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3694 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3695 HAVE_ANINT and HAVE_AINT, as appropriate.
3696 * Makefile.in (run): Use @LIBS@ rather than -lm.
3697 (interp.o): Depend upon config.h.
3698 (Makefile): Just rebuild Makefile.
3699 (clean): Remove stamp-h.
3700 (mostlyclean): Make the same as clean, not as distclean.
3701 (config.h, stamp-h): New targets.
3703 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3705 * interp.c (ColdReset): Fix boolean test. Make all simulator
3708 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3710 * interp.c (xfer_direct_word, xfer_direct_long,
3711 swap_direct_word, swap_direct_long, xfer_big_word,
3712 xfer_big_long, xfer_little_word, xfer_little_long,
3713 swap_word,swap_long): Added.
3714 * interp.c (ColdReset): Provide function indirection to
3715 host<->simulated_target transfer routines.
3716 * interp.c (sim_store_register, sim_fetch_register): Updated to
3717 make use of indirected transfer routines.
3719 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3721 * gencode.c (process_instructions): Ensure FP ABS instruction
3723 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3724 system call support.
3726 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3728 * interp.c (sim_do_command): Complain if callback structure not
3731 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3733 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3734 support for Sun hosts.
3735 * Makefile.in (gencode): Ensure the host compiler and libraries
3736 used for cross-hosted build.
3738 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3740 * interp.c, gencode.c: Some more (TODO) tidying.
3742 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3744 * gencode.c, interp.c: Replaced explicit long long references with
3745 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3746 * support.h (SET64LO, SET64HI): Macros added.
3748 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3750 * configure: Regenerate with autoconf 2.7.
3752 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3754 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3755 * support.h: Remove superfluous "1" from #if.
3756 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3758 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3760 * interp.c (StoreFPR): Control UndefinedResult() call on
3761 WARN_RESULT manifest.
3763 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3765 * gencode.c: Tidied instruction decoding, and added FP instruction
3768 * interp.c: Added dineroIII, and BSD profiling support. Also
3769 run-time FP handling.
3771 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3773 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3774 gencode.c, interp.c, support.h: created.