sim/mips/ChangeLog

   1 start-sanitize-sky
   2         Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
   3
   4         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
   5
   6         * interp.c (decode_coproc): Refer to VU CIA as a "special"
   7         register, not as a "misc" register.  Aha.  Add activity
   8         assertions after VCALLMS* instructions.
   9
  10 end-sanitize-sky
  11 start-sanitize-sky
  12         Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
  13
  14         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
  15         to upper code of generated VU instruction.
  16
  17 end-sanitize-sky
  18 start-sanitize-sky
  19 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
  20
  21         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
  22
  23         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
  24         for TARGET_SKY.
  25
  26         * r5900.igen (SQC2): Thinko.
  27
  28 end-sanitize-sky
  29 start-sanitize-sky
  30 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
  31
  32         * interp.c (*): Adapt code to merged VU device & state structs.
  33         (decode_coproc): Execute COP2 each macroinstruction without
  34         pipelining, by stepping VU to completion state.  Adapted to
  35         read_vu_*_reg style of register access.
  36
  37         * mips.igen ([SL]QC2): Removed these COP2 instructions.
  38
  39         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
  40
  41         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
  42
  43 end-sanitize-sky
  44 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  45
  46         * Makefile.in (SIM_OBJS): Add sim-main.o.
  47
  48         * sim-main.h (address_translation, load_memory, store_memory,
  49         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
  50         as INLINE_SIM_MAIN.
  51         (pr_addr, pr_uword64): Declare.
  52         (sim-main.c): Include when H_REVEALS_MODULE_P.
  53
  54         * interp.c (address_translation, load_memory, store_memory,
  55         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
  56         from here.
  57         * sim-main.c: To here. Fix compilation problems.
  58
  59         * configure.in: Enable inlining.
  60         * configure: Re-config.
  61
  62 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  63
  64         * configure: Regenerated to track ../common/aclocal.m4 changes.
  65
  66 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  67
  68         * mips.igen: Include tx.igen.
  69         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
  70         * tx.igen: New file, contains MADD and MADDU.
  71
  72         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
  73         the hardwired constant `7'.
  74         (store_memory): Ditto.
  75         (LOADDRMASK): Move definition to sim-main.h.
  76
  77         mips.igen (MTC0): Enable for r3900.
  78         (ADDU): Add trace.
  79
  80         mips.igen (do_load_byte): Delete.
  81         (do_load, do_store, do_load_left, do_load_write, do_store_left,
  82         do_store_right): New functions.
  83         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
  84
  85         configure.in: Let the tx39 use igen again.
  86         configure: Update.
  87
  88 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  89
  90         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
  91         not an address sized quantity.  Return zero for cache sizes.
  92
  93 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  94
  95         * mips.igen (r3900): r3900 does not support 64 bit integer
  96         operations.
  97
  98 start-sanitize-sky
  99 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 100
 101         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 102
 103 end-sanitize-sky
 104 start-sanitize-sky
 105 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 106
 107         * interp.c (decode_coproc): Continuing COP2 work.
 108         (cop_[ls]q): Make sky-target-only.
 109
 110         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 111 end-sanitize-sky
 112 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 113
 114         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 115         than igen one.
 116         * configure : Rebuild.
 117
 118 start-sanitize-sky
 119 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 120
 121         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 122         around COP2 implementation skeleton.
 123
 124 end-sanitize-sky
 125 start-sanitize-sky
 126 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 127
 128         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 129
 130         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 131         static to access VU registers.
 132         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 133         decoding.  Work in progress.
 134
 135         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 136         overlapping/redundant bit pattern.
 137         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 138         progress.
 139
 140         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 141         status register.
 142
 143         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 144         access to coprocessor registers.
 145
 146         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 147 end-sanitize-sky
 148 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 149
 150         * configure: Regenerated to track ../common/aclocal.m4 changes.
 151
 152 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 153
 154         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 155
 156 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 157
 158         * configure: Regenerated to track ../common/aclocal.m4 changes.
 159         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 160
 161 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 162
 163         * configure: Regenerated to track ../common/aclocal.m4 changes.
 164
 165 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 166
 167         * interp.c (Max, Min): Comment out functions. Not yet used.
 168
 169 start-sanitize-vr4320
 170 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 171
 172         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 173
 174 end-sanitize-vr4320
 175 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 176
 177         * configure: Regenerated to track ../common/aclocal.m4 changes.
 178
 179 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 180
 181         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 182         configurable settings for stand-alone simulator.
 183
 184 start-sanitize-sky
 185         * configure.in: Added --with-sim-gpu2 option to specify path of
 186         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 187         links/compiles stand-alone simulator with this library.
 188
 189         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 190 end-sanitize-sky
 191         * configure.in: Added X11 search, just in case.
 192
 193         * configure: Regenerated.
 194
 195 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 196
 197         * interp.c (sim_write, sim_read, load_memory, store_memory):
 198         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 199
 200 start-sanitize-vr4320
 201 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 202
 203         * vr4320.igen (clz,dclz) : Added.
 204         (dmac): Replaced 99, with LO.
 205
 206 end-sanitize-vr4320
 207 start-sanitize-vr5400
 208 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 209
 210         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 211
 212 end-sanitize-vr5400
 213 start-sanitize-vr4320
 214 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 215
 216         * vr4320.igen: New file.
 217         * Makefile.in (vr4320.igen) : Added.
 218         * configure.in (mips64vr4320-*-*): Added.
 219         * configure : Rebuilt.
 220         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 221         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 222
 223 end-sanitize-vr4320
 224 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 225
 226         * sim-main.h (GETFCC): Return an unsigned value.
 227
 228 start-sanitize-r5900
 229         * r5900.igen: Use an unsigned array index variable `i'.
 230         (QFSRV): Ditto for variable bytes.
 231
 232 end-sanitize-r5900
 233 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 234
 235         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 236         (DADD): Result destination is RD not RT.
 237
 238 start-sanitize-r5900
 239         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 240         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 241         divide.
 242
 243 end-sanitize-r5900
 244 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 245
 246         * sim-main.h (HIACCESS, LOACCESS): Always define.
 247
 248         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 249
 250         * interp.c (sim_info): Delete.
 251
 252 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 253
 254         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 255         (mips_option_handler): New argument `cpu'.
 256         (sim_open): Update call to sim_add_option_table.
 257
 258 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 259
 260         * mips.igen (CxC1): Add tracing.
 261
 262 start-sanitize-r5900
 263 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 264
 265         * r5900.igen (StoreFP): Delete.
 266         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 267         New functions.
 268         (rsqrt.s, sqrt.s): Implement.
 269         (r59cond): New function.
 270         (C.COND.S): Call r59cond in assembler line.
 271         (cvt.w.s, cvt.s.w): Implement.
 272
 273         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 274         instruction set.
 275
 276         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 277
 278 end-sanitize-r5900
 279 start-sanitize-r5900
 280 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 281
 282         * r5900.igen: Add tracing to all p* instructions.
 283
 284 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 285
 286         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 287         to get gdb talking to re-aranged sim_cpu register structure.
 288
 289 end-sanitize-r5900
 290 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 291
 292         * sim-main.h (Max, Min): Declare.
 293
 294         * interp.c (Max, Min): New functions.
 295
 296         * mips.igen (BC1): Add tracing.
 297
 298 start-sanitize-vr5400
 299 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 300
 301         * mdmx.igen: Tag all functions as requiring either with mdmx or
 302         vr5400 processor.
 303
 304 end-sanitize-vr5400
 305 start-sanitize-r5900
 306 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 307
 308         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 309         to 32.
 310         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 311
 312         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 313
 314         * r5900.igen: Rewrite.
 315
 316         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 317         struct.
 318         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 319         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 320
 321 end-sanitize-r5900
 322 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 323
 324         * interp.c Added memory map for stack in vr4100
 325
 326 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 327
 328         * interp.c (load_memory): Add missing "break"'s.
 329
 330 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 331
 332         * interp.c (sim_store_register, sim_fetch_register): Pass in
 333         length parameter.  Return -1.
 334
 335 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 336
 337         * interp.c: Added hardware init hook, fixed warnings.
 338
 339 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 340
 341         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 342
 343 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 344
 345         * interp.c (ifetch16): New function.
 346
 347         * sim-main.h (IMEM32): Rename IMEM.
 348         (IMEM16_IMMED): Define.
 349         (IMEM16): Define.
 350         (DELAY_SLOT): Update.
 351
 352         * m16run.c (sim_engine_run): New file.
 353
 354         * m16.igen: All instructions except LB.
 355         (LB): Call do_load_byte.
 356         * mips.igen (do_load_byte): New function.
 357         (LB): Call do_load_byte.
 358
 359         * mips.igen: Move spec for insn bit size and high bit from here.
 360         * Makefile.in (tmp-igen, tmp-m16): To here.
 361
 362         * m16.dc: New file, decode mips16 instructions.
 363
 364         * Makefile.in (SIM_NO_ALL): Define.
 365         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 366
 367 start-sanitize-tx19
 368         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 369         set.
 370
 371 end-sanitize-tx19
 372 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 373
 374         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 375         point unit to 32 bit registers.
 376         * configure: Re-generate.
 377
 378 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 379
 380         * configure.in (sim_use_gen): Make IGEN the default simulator
 381         generator for generic 32 and 64 bit mips targets.
 382         * configure: Re-generate.
 383
 384 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 385
 386         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 387         bitsize.
 388
 389         * interp.c (sim_fetch_register, sim_store_register): Read/write
 390         FGR from correct location.
 391         (sim_open): Set size of FGR's according to
 392         WITH_TARGET_FLOATING_POINT_BITSIZE.
 393
 394         * sim-main.h (FGR): Store floating point registers in a separate
 395         array.
 396
 397 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 398
 399         * configure: Regenerated to track ../common/aclocal.m4 changes.
 400
 401 start-sanitize-vr5400
 402         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 403
 404 end-sanitize-vr5400
 405 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 406
 407         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 408
 409         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 410
 411         * interp.c (pending_tick): New function.  Deliver pending writes.
 412
 413         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 414         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 415         it can handle mixed sized quantites and single bits.
 416
 417 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 418
 419         * interp.c (oengine.h): Do not include when building with IGEN.
 420         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 421         (sim_info): Ditto for PROCESSOR_64BIT.
 422         (sim_monitor): Replace ut_reg with unsigned_word.
 423         (*): Ditto for t_reg.
 424         (LOADDRMASK): Define.
 425         (sim_open): Remove defunct check that host FP is IEEE compliant,
 426         using software to emulate floating point.
 427         (value_fpr, ...): Always compile, was conditional on HASFPU.
 428
 429 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 430
 431         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 432         size.
 433
 434         * interp.c (SD, CPU): Define.
 435         (mips_option_handler): Set flags in each CPU.
 436         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 437         (sim_close): Do not clear STATE, deleted anyway.
 438         (sim_write, sim_read): Assume CPU zero's vm should be used for
 439         data transfers.
 440         (sim_create_inferior): Set the PC for all processors.
 441         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 442         argument.
 443         (mips16_entry): Pass correct nr of args to store_word, load_word.
 444         (ColdReset): Cold reset all cpu's.
 445         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 446         (sim_monitor, load_memory, store_memory, signal_exception): Use
 447         `CPU' instead of STATE_CPU.
 448
 449
 450         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 451         SD or CPU_.
 452
 453         * sim-main.h (signal_exception): Add sim_cpu arg.
 454         (SignalException*): Pass both SD and CPU to signal_exception.
 455         * interp.c (signal_exception): Update.
 456
 457         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 458         Ditto
 459         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 460         address_translation): Ditto
 461         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 462
 463 start-sanitize-vr5400
 464         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 465         `sd'.
 466         (ByteAlign): Use StoreFPR, pass args in correct order.
 467
 468 end-sanitize-vr5400
 469 start-sanitize-r5900
 470 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 471
 472         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 473
 474 end-sanitize-r5900
 475 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 476
 477         * configure: Regenerated to track ../common/aclocal.m4 changes.
 478
 479 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 480
 481 start-sanitize-r5900
 482         * configure.in (sim_igen_filter): For r5900, use igen.
 483         * configure: Re-generate.
 484
 485 end-sanitize-r5900
 486         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 487
 488         * mips.igen (model): Map processor names onto BFD name.
 489
 490         * sim-main.h (CPU_CIA): Delete.
 491         (SET_CIA, GET_CIA): Define
 492
 493 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 494
 495         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 496         regiser.
 497
 498         * configure.in (default_endian): Configure a big-endian simulator
 499         by default.
 500         * configure: Re-generate.
 501
 502 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 503
 504         * configure: Regenerated to track ../common/aclocal.m4 changes.
 505
 506 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 507
 508         * interp.c (sim_monitor): Handle Densan monitor outbyte
 509         and inbyte functions.
 510
 511 1997-12-29  Felix Lee  <flee@cygnus.com>
 512
 513         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 514
 515 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 516
 517         * Makefile.in (tmp-igen): Arrange for $zero to always be
 518         reset to zero after every instruction.
 519
 520 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 521
 522         * configure: Regenerated to track ../common/aclocal.m4 changes.
 523         * config.in: Ditto.
 524
 525 start-sanitize-vr5400
 526 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 527
 528         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 529         bit values.
 530
 531 end-sanitize-vr5400
 532 start-sanitize-vr5400
 533 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 534
 535         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 536         vr5400 with the vr5000 as the default.
 537
 538 end-sanitize-vr5400
 539 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 540
 541         * mips.igen (MSUB): Fix to work like MADD.
 542         * gencode.c (MSUB): Similarly.
 543
 544 start-sanitize-vr5400
 545 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 546
 547         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 548         vr5400.
 549
 550 end-sanitize-vr5400
 551 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 552
 553         * configure: Regenerated to track ../common/aclocal.m4 changes.
 554
 555 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 556
 557         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 558
 559 start-sanitize-vr5400
 560         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 561         (value_cc, store_cc): Implement.
 562
 563         * sim-main.h: Add 8*3*8 bit accumulator.
 564
 565         * vr5400.igen: Move mdmx instructins from here
 566         * mdmx.igen: To here - new file. Add/fix missing instructions.
 567         * mips.igen: Include mdmx.igen.
 568         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 569
 570 end-sanitize-vr5400
 571 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 572
 573         * sim-main.h (sim-fpu.h): Include.
 574
 575         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 576         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 577         using host independant sim_fpu module.
 578
 579 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 580
 581         * interp.c (signal_exception): Report internal errors with SIGABRT
 582         not SIGQUIT.
 583
 584         * sim-main.h (C0_CONFIG): New register.
 585         (signal.h): No longer include.
 586
 587         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 588
 589 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 590
 591         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 592
 593 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 594
 595         * mips.igen: Tag vr5000 instructions.
 596         (ANDI): Was missing mipsIV model, fix assembler syntax.
 597         (do_c_cond_fmt): New function.
 598         (C.cond.fmt): Handle mips I-III which do not support CC field
 599         separatly.
 600         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 601         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 602         in IV3.2 spec.
 603         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 604         vr5000 which saves LO in a GPR separatly.
 605
 606         * configure.in (enable-sim-igen): For vr5000, select vr5000
 607         specific instructions.
 608         * configure: Re-generate.
 609
 610 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 611
 612         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 613
 614         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 615         fmt_uninterpreted_64 bit cases to switch.  Convert to
 616         fmt_formatted,
 617
 618         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 619
 620         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 621         as specified in IV3.2 spec.
 622         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 623
 624 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 625
 626         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 627         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 628         (start-sanitize-r5900):
 629         (LWXC1, SWXC1): Delete from r5900 instruction set.
 630         (end-sanitize-r5900):
 631         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 632         PENDING_FILL versions of instructions.  Simplify.
 633         (X): New function.
 634         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 635         instructions.
 636         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 637         a signed value.
 638         (MTHI, MFHI): Disable code checking HI-LO.
 639
 640         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 641         global.
 642         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 643
 644 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 645
 646         * gencode.c (build_mips16_operands): Replace IPC with cia.
 647
 648         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 649         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 650         IPC to `cia'.
 651         (UndefinedResult): Replace function with macro/function
 652         combination.
 653         (sim_engine_run): Don't save PC in IPC.
 654
 655         * sim-main.h (IPC): Delete.
 656
 657         start-sanitize-vr5400
 658         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 659         (do_select): Rename function select.
 660         end-sanitize-vr5400
 661
 662         * interp.c (signal_exception, store_word, load_word,
 663         address_translation, load_memory, store_memory, cache_op,
 664         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 665         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 666         current instruction address - cia - argument.
 667         (sim_read, sim_write): Call address_translation directly.
 668         (sim_engine_run): Rename variable vaddr to cia.
 669         (signal_exception): Pass cia to sim_monitor
 670
 671         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 672         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 673         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 674
 675         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 676         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 677         SIM_ASSERT.
 678
 679         * interp.c (signal_exception): Pass restart address to
 680         sim_engine_restart.
 681
 682         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 683         idecode.o): Add dependency.
 684
 685         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 686         Delete definitions
 687         (DELAY_SLOT): Update NIA not PC with branch address.
 688         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 689
 690         * mips.igen: Use CIA not PC in branch calculations.
 691         (illegal): Call SignalException.
 692         (BEQ, ADDIU): Fix assembler.
 693
 694 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 695
 696         * m16.igen (JALX): Was missing.
 697
 698         * configure.in (enable-sim-igen): New configuration option.
 699         * configure: Re-generate.
 700
 701         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 702
 703         * interp.c (load_memory, store_memory): Delete parameter RAW.
 704         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 705         bypassing {load,store}_memory.
 706
 707         * sim-main.h (ByteSwapMem): Delete definition.
 708
 709         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 710
 711         * interp.c (sim_do_command, sim_commands): Delete mips specific
 712         commands.  Handled by module sim-options.
 713
 714         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 715         (WITH_MODULO_MEMORY): Define.
 716
 717         * interp.c (sim_info): Delete code printing memory size.
 718
 719         * interp.c (mips_size): Nee sim_size, delete function.
 720         (power2): Delete.
 721         (monitor, monitor_base, monitor_size): Delete global variables.
 722         (sim_open, sim_close): Delete code creating monitor and other
 723         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 724         manage memory regions.
 725         (load_memory, store_memory): Use sim-core for memory model.
 726
 727         * interp.c (address_translation): Delete all memory map code
 728         except line forcing 32 bit addresses.
 729
 730 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 731
 732         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 733         trace options.
 734
 735         * interp.c (logfh, logfile): Delete globals.
 736         (sim_open, sim_close): Delete code opening & closing log file.
 737         (mips_option_handler): Delete -l and -n options.
 738         (OPTION mips_options): Ditto.
 739
 740         * interp.c (OPTION mips_options): Rename option trace to dinero.
 741         (mips_option_handler): Update.
 742
 743 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 744
 745         * interp.c (fetch_str): New function.
 746         (sim_monitor): Rewrite using sim_read & sim_write.
 747         (sim_open): Check magic number.
 748         (sim_open): Write monitor vectors into memory using sim_write.
 749         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 750         (sim_read, sim_write): Simplify - transfer data one byte at a
 751         time.
 752         (load_memory, store_memory): Clarify meaning of parameter RAW.
 753
 754         * sim-main.h (isHOST): Defete definition.
 755         (isTARGET): Mark as depreciated.
 756         (address_translation): Delete parameter HOST.
 757
 758         * interp.c (address_translation): Delete parameter HOST.
 759
 760 start-sanitize-tx49
 761 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 762
 763         * gencode.c: Add tx49 configury and insns.
 764         * configure.in: Add tx49 configury.
 765         * configure: Update.
 766
 767 end-sanitize-tx49
 768 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 769
 770         * mips.igen:
 771
 772         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 773         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 774
 775 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 776
 777         * mips.igen: Add model filter field to records.
 778
 779 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 780
 781         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 782
 783         interp.c (sim_engine_run): Do not compile function sim_engine_run
 784         when WITH_IGEN == 1.
 785
 786         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 787         target architecture.
 788
 789         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 790         igen. Replace with configuration variables sim_igen_flags /
 791         sim_m16_flags.
 792
 793         start-sanitize-r5900
 794         * r5900.igen: New file. Copy r5900 insns here.
 795         end-sanitize-r5900
 796         start-sanitize-vr5400
 797         * vr5400.igen: New file.
 798         end-sanitize-vr5400
 799         * m16.igen: New file.  Copy mips16 insns here.
 800         * mips.igen: From here.
 801
 802 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 803
 804         start-sanitize-vr5400
 805         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 806
 807         * configure.in: Add mips64vr5400 target.
 808         * configure: Re-generate.
 809
 810         end-sanitize-vr5400
 811         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 812         to top.
 813         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 814
 815 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 816
 817         * gencode.c (build_instruction): Follow sim_write's lead in using
 818         BigEndianMem instead of !ByteSwapMem.
 819
 820 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 821
 822         * configure.in (sim_gen): Dependent on target, select type of
 823         generator.  Always select old style generator.
 824
 825         configure: Re-generate.
 826
 827         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 828         targets.
 829         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 830         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 831         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 832         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 833         SIM_@sim_gen@_*, set by autoconf.
 834
 835 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 836
 837         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 838
 839         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 840         CURRENT_FLOATING_POINT instead.
 841
 842         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 843         (address_translation): Raise exception InstructionFetch when
 844         translation fails and isINSTRUCTION.
 845
 846         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 847         sim_engine_run): Change type of of vaddr and paddr to
 848         address_word.
 849         (address_translation, prefetch, load_memory, store_memory,
 850         cache_op): Change type of vAddr and pAddr to address_word.
 851
 852         * gencode.c (build_instruction): Change type of vaddr and paddr to
 853         address_word.
 854
 855 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 856
 857         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 858         macro to obtain result of ALU op.
 859
 860 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 861
 862         * interp.c (sim_info): Call profile_print.
 863
 864 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 865
 866         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 867
 868         * sim-main.h (WITH_PROFILE): Do not define, defined in
 869         common/sim-config.h.  Use sim-profile module.
 870         (simPROFILE): Delete defintion.
 871
 872         * interp.c (PROFILE): Delete definition.
 873         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 874         (sim_close): Delete code writing profile histogram.
 875         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 876         Delete.
 877         (sim_engine_run): Delete code profiling the PC.
 878
 879 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 882
 883         * interp.c (sim_monitor): Make register pointers of type
 884         unsigned_word*.
 885
 886         * sim-main.h: Make registers of type unsigned_word not
 887         signed_word.
 888
 889 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 890
 891 start-sanitize-r5900
 892         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 893         ...): Move to sim-main.h
 894
 895 end-sanitize-r5900
 896         * interp.c (sync_operation): Rename from SyncOperation, make
 897         global, add SD argument.
 898         (prefetch): Rename from Prefetch, make global, add SD argument.
 899         (decode_coproc): Make global.
 900
 901         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 902
 903         * gencode.c (build_instruction): Generate DecodeCoproc not
 904         decode_coproc calls.
 905
 906         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 907         (SizeFGR): Move to sim-main.h
 908         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 909         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 910         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 911         sim-main.h.
 912         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 913         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 914         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 915         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 916         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 917         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 918
 919         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 920         exception.
 921         (sim-alu.h): Include.
 922         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 923         (sim_cia): Typedef to instruction_address.
 924
 925 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 926
 927         * Makefile.in (interp.o): Rename generated file engine.c to
 928         oengine.c.
 929
 930         * interp.c: Update.
 931
 932 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 933
 934         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 935
 936 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 937
 938         * gencode.c (build_instruction): For "FPSQRT", output correct
 939         number of arguments to Recip.
 940
 941 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 942
 943         * Makefile.in (interp.o): Depends on sim-main.h
 944
 945         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 946
 947         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 948         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 949         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 950         STATE, DSSTATE): Define
 951         (GPR, FGRIDX, ..): Define.
 952
 953         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 954         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 955         (GPR, FGRIDX, ...): Delete macros.
 956
 957         * interp.c: Update names to match defines from sim-main.h
 958
 959 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 960
 961         * interp.c (sim_monitor): Add SD argument.
 962         (sim_warning): Delete.  Replace calls with calls to
 963         sim_io_eprintf.
 964         (sim_error): Delete. Replace calls with sim_io_error.
 965         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 966         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 967         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 968         argument.
 969         (mips_size): Rename from sim_size. Add SD argument.
 970
 971         * interp.c (simulator): Delete global variable.
 972         (callback): Delete global variable.
 973         (mips_option_handler, sim_open, sim_write, sim_read,
 974         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 975         sim_size,sim_monitor): Use sim_io_* not callback->*.
 976         (sim_open): ZALLOC simulator struct.
 977         (PROFILE): Do not define.
 978
 979 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 980
 981         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 982         support.h with corresponding code.
 983
 984         * sim-main.h (word64, uword64), support.h: Move definition to
 985         sim-main.h.
 986         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 987
 988         * support.h: Delete
 989         * Makefile.in: Update dependencies
 990         * interp.c: Do not include.
 991
 992 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 993
 994         * interp.c (address_translation, load_memory, store_memory,
 995         cache_op): Rename to from AddressTranslation et.al., make global,
 996         add SD argument
 997
 998         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 999         CacheOp): Define.
1000
1001         * interp.c (SignalException): Rename to signal_exception, make
1002         global.
1003
1004         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1005
1006         * sim-main.h (SignalException, SignalExceptionInterrupt,
1007         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1008         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1009         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1010         Define.
1011
1012         * interp.c, support.h: Use.
1013
1014 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1015
1016         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1017         to value_fpr / store_fpr. Add SD argument.
1018         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1019         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1020
1021         * sim-main.h (ValueFPR, StoreFPR): Define.
1022
1023 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1024
1025         * interp.c (sim_engine_run): Check consistency between configure
1026         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1027         and HASFPU.
1028
1029         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1030         (mips_fpu): Configure WITH_FLOATING_POINT.
1031         (mips_endian): Configure WITH_TARGET_ENDIAN.
1032         * configure: Update.
1033
1034 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1035
1036         * configure: Regenerated to track ../common/aclocal.m4 changes.
1037
1038 start-sanitize-r5900
1039 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1040
1041         * interp.c (MAX_REG): Allow up-to 128 registers.
1042         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1043         (REGISTER_SA): Ditto.
1044         (sim_open): Initialize register_widths for r5900 specific
1045         registers.
1046         (sim_fetch_register, sim_store_register): Check for request of
1047         r5900 specific SA register.  Check for request for hi 64 bits of
1048         r5900 specific registers.
1049
1050 end-sanitize-r5900
1051 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1052
1053         * configure: Regenerated.
1054
1055 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1056
1057         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1058
1059 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1060
1061         * gencode.c (print_igen_insn_models): Assume certain architectures
1062         include all mips* instructions.
1063         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1064         instruction.
1065
1066         * Makefile.in (tmp.igen): Add target. Generate igen input from
1067         gencode file.
1068
1069         * gencode.c (FEATURE_IGEN): Define.
1070         (main): Add --igen option.  Generate output in igen format.
1071         (process_instructions): Format output according to igen option.
1072         (print_igen_insn_format): New function.
1073         (print_igen_insn_models): New function.
1074         (process_instructions): Only issue warnings and ignore
1075         instructions when no FEATURE_IGEN.
1076
1077 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1078
1079         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1080         MIPS targets.
1081
1082 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1083
1084         * configure: Regenerated to track ../common/aclocal.m4 changes.
1085
1086 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1087
1088         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1089         SIM_RESERVED_BITS): Delete, moved to common.
1090         (SIM_EXTRA_CFLAGS): Update.
1091
1092 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1093
1094         * configure.in: Configure non-strict memory alignment.
1095         * configure: Regenerated to track ../common/aclocal.m4 changes.
1096
1097 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1098
1099         * configure: Regenerated to track ../common/aclocal.m4 changes.
1100
1101 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1102
1103         * gencode.c (SDBBP,DERET): Added (3900) insns.
1104         (RFE): Turn on for 3900.
1105         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1106         (dsstate): Made global.
1107         (SUBTARGET_R3900): Added.
1108         (CANCELDELAYSLOT): New.
1109         (SignalException): Ignore SystemCall rather than ignore and
1110         terminate.  Add DebugBreakPoint handling.
1111         (decode_coproc): New insns RFE, DERET; and new registers Debug
1112         and DEPC protected by SUBTARGET_R3900.
1113         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1114         bits explicitly.
1115         * Makefile.in,configure.in: Add mips subtarget option.
1116         * configure: Update.
1117
1118 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1119
1120         * gencode.c: Add r3900 (tx39).
1121
1122 start-sanitize-tx19
1123         * gencode.c: Fix some configuration problems by improving
1124         the relationship between tx19 and tx39.
1125 end-sanitize-tx19
1126
1127 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1128
1129         * gencode.c (build_instruction): Don't need to subtract 4 for
1130         JALR, just 2.
1131
1132 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1133
1134         * interp.c: Correct some HASFPU problems.
1135
1136 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1137
1138         * configure: Regenerated to track ../common/aclocal.m4 changes.
1139
1140 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1141
1142         * interp.c (mips_options): Fix samples option short form, should
1143         be `x'.
1144
1145 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1146
1147         * interp.c (sim_info): Enable info code.  Was just returning.
1148
1149 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1150
1151         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1152         MFC0.
1153
1154 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1155
1156         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1157         constants.
1158         (build_instruction): Ditto for LL.
1159
1160 start-sanitize-tx19
1161 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1162
1163         * mips/configure.in, mips/gencode: Add tx19/r1900.
1164
1165 end-sanitize-tx19
1166 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1167
1168         * configure: Regenerated to track ../common/aclocal.m4 changes.
1169
1170 start-sanitize-r5900
1171 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1172
1173         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1174         for overflow due to ABS of MININT, set result to MAXINT.
1175         (build_instruction): For "psrlvw", signextend bit 31.
1176
1177 end-sanitize-r5900
1178 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1179
1180         * configure: Regenerated to track ../common/aclocal.m4 changes.
1181         * config.in: Ditto.
1182
1183 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1184
1185         * interp.c (sim_open): Add call to sim_analyze_program, update
1186         call to sim_config.
1187
1188 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1189
1190         * interp.c (sim_kill): Delete.
1191         (sim_create_inferior): Add ABFD argument. Set PC from same.
1192         (sim_load): Move code initializing trap handlers from here.
1193         (sim_open): To here.
1194         (sim_load): Delete, use sim-hload.c.
1195
1196         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1197
1198 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1199
1200         * configure: Regenerated to track ../common/aclocal.m4 changes.
1201         * config.in: Ditto.
1202
1203 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1204
1205         * interp.c (sim_open): Add ABFD argument.
1206         (sim_load): Move call to sim_config from here.
1207         (sim_open): To here.  Check return status.
1208
1209 start-sanitize-r5900
1210         * gencode.c (build_instruction): Do not define x8000000000000000,
1211         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1212
1213 end-sanitize-r5900
1214 start-sanitize-r5900
1215 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1216
1217         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1218         "pdivuw" check for overflow due to signed divide by -1.
1219
1220 end-sanitize-r5900
1221 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1222
1223         * gencode.c (build_instruction): Two arg MADD should
1224         not assign result to $0.
1225
1226 start-sanitize-r5900
1227 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1228
1229         * gencode.c (build_instruction): For "ppac5" use unsigned
1230         arrithmetic so that the sign bit doesn't smear when right shifted.
1231         (build_instruction): For "pdiv" perform sign extension when
1232         storing results in HI and LO.
1233         (build_instructions): For "pdiv" and "pdivbw" check for
1234         divide-by-zero.
1235         (build_instruction): For "pmfhl.slw" update hi part of dest
1236         register as well as low part.
1237         (build_instruction): For "pmfhl" portably handle long long values.
1238         (build_instruction): For "pmfhl.sh" correctly negative values.
1239         Store half words 2 and three in the correct place.
1240         (build_instruction): For "psllvw", sign extend value after shift.
1241
1242 end-sanitize-r5900
1243 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1244
1245         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1246         * sim/mips/configure.in: Regenerate.
1247
1248 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1249
1250         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1251         signed8, unsigned8 et.al. types.
1252
1253 start-sanitize-r5900
1254         * gencode.c (build_instruction): For PMULTU* do not sign extend
1255         registers.  Make generated code easier to debug.
1256
1257 end-sanitize-r5900
1258         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1259         hosts when selecting subreg.
1260
1261 start-sanitize-r5900
1262 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1263
1264         * gencode.c (type_for_data_len): For 32bit operations concerned
1265         with overflow, perform op using 64bits.
1266         (build_instruction): For PADD, always compute operation using type
1267         returned by type_for_data_len.
1268         (build_instruction): For PSUBU, when overflow, saturate to zero as
1269         actually underflow.
1270
1271 end-sanitize-r5900
1272 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1273
1274 start-sanitize-r5900
1275         * gencode.c (build_instruction): Handle "pext5" according to
1276         version 1.95 of the r5900 ISA.
1277
1278         * gencode.c (build_instruction): Handle "ppac5" according to
1279         version 1.95 of the r5900 ISA.
1280
1281 end-sanitize-r5900
1282         * interp.c (sim_engine_run): Reset the ZERO register to zero
1283         regardless of FEATURE_WARN_ZERO.
1284         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1285
1286 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1287
1288         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1289         (SignalException): For BreakPoints ignore any mode bits and just
1290         save the PC.
1291         (SignalException): Always set the CAUSE register.
1292
1293 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1294
1295         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1296         exception has been taken.
1297
1298         * interp.c: Implement the ERET and mt/f sr instructions.
1299
1300 start-sanitize-r5900
1301 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1302
1303         * gencode.c (build_instruction): For paddu, extract unsigned
1304         sub-fields.
1305
1306         * gencode.c (build_instruction): Saturate padds instead of padd
1307         instructions.
1308
1309 end-sanitize-r5900
1310 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1311
1312         * interp.c (SignalException): Don't bother restarting an
1313         interrupt.
1314
1315 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1316
1317         * interp.c (SignalException): Really take an interrupt.
1318         (interrupt_event): Only deliver interrupts when enabled.
1319
1320 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1321
1322         * interp.c (sim_info): Only print info when verbose.
1323         (sim_info) Use sim_io_printf for output.
1324
1325 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1326
1327         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1328         mips architectures.
1329
1330 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1331
1332         * interp.c (sim_do_command): Check for common commands if a
1333         simulator specific command fails.
1334
1335 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1336
1337         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1338         and simBE when DEBUG is defined.
1339
1340 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1341
1342         * interp.c (interrupt_event): New function.  Pass exception event
1343         onto exception handler.
1344
1345         * configure.in: Check for stdlib.h.
1346         * configure: Regenerate.
1347
1348         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1349         variable declaration.
1350         (build_instruction): Initialize memval1.
1351         (build_instruction): Add UNUSED attribute to byte, bigend,
1352         reverse.
1353         (build_operands): Ditto.
1354
1355         * interp.c: Fix GCC warnings.
1356         (sim_get_quit_code): Delete.
1357
1358         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1359         * Makefile.in: Ditto.
1360         * configure: Re-generate.
1361
1362         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1363
1364 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1365
1366         * interp.c (mips_option_handler): New function parse argumes using
1367         sim-options.
1368         (myname): Replace with STATE_MY_NAME.
1369         (sim_open): Delete check for host endianness - performed by
1370         sim_config.
1371         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1372         (sim_open): Move much of the initialization from here.
1373         (sim_load): To here.  After the image has been loaded and
1374         endianness set.
1375         (sim_open): Move ColdReset from here.
1376         (sim_create_inferior): To here.
1377         (sim_open): Make FP check less dependant on host endianness.
1378
1379         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1380         run.
1381         * interp.c (sim_set_callbacks): Delete.
1382
1383         * interp.c (membank, membank_base, membank_size): Replace with
1384         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1385         (sim_open): Remove call to callback->init. gdb/run do this.
1386
1387         * interp.c: Update
1388
1389         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1390
1391         * interp.c (big_endian_p): Delete, replaced by
1392         current_target_byte_order.
1393
1394 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1395
1396         * interp.c (host_read_long, host_read_word, host_swap_word,
1397         host_swap_long): Delete. Using common sim-endian.
1398         (sim_fetch_register, sim_store_register): Use H2T.
1399         (pipeline_ticks): Delete.  Handled by sim-events.
1400         (sim_info): Update.
1401         (sim_engine_run): Update.
1402
1403 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1404
1405         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1406         reason from here.
1407         (SignalException): To here. Signal using sim_engine_halt.
1408         (sim_stop_reason): Delete, moved to common.
1409
1410 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1411
1412         * interp.c (sim_open): Add callback argument.
1413         (sim_set_callbacks): Delete SIM_DESC argument.
1414         (sim_size): Ditto.
1415
1416 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1417
1418         * Makefile.in (SIM_OBJS): Add common modules.
1419
1420         * interp.c (sim_set_callbacks): Also set SD callback.
1421         (set_endianness, xfer_*, swap_*): Delete.
1422         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1423         Change to functions using sim-endian macros.
1424         (control_c, sim_stop): Delete, use common version.
1425         (simulate): Convert into.
1426         (sim_engine_run): This function.
1427         (sim_resume): Delete.
1428
1429         * interp.c (simulation): New variable - the simulator object.
1430         (sim_kind): Delete global - merged into simulation.
1431         (sim_load): Cleanup.  Move PC assignment from here.
1432         (sim_create_inferior): To here.
1433
1434         * sim-main.h: New file.
1435         * interp.c (sim-main.h): Include.
1436
1437 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1438
1439         * configure: Regenerated to track ../common/aclocal.m4 changes.
1440
1441 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1442
1443         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1444
1445 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1446
1447         * gencode.c (build_instruction): DIV instructions: check
1448         for division by zero and integer overflow before using
1449         host's division operation.
1450
1451 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1452
1453         * Makefile.in (SIM_OBJS): Add sim-load.o.
1454         * interp.c: #include bfd.h.
1455         (target_byte_order): Delete.
1456         (sim_kind, myname, big_endian_p): New static locals.
1457         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1458         after argument parsing.  Recognize -E arg, set endianness accordingly.
1459         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1460         load file into simulator.  Set PC from bfd.
1461         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1462         (set_endianness): Use big_endian_p instead of target_byte_order.
1463
1464 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1465
1466         * interp.c (sim_size): Delete prototype - conflicts with
1467         definition in remote-sim.h.  Correct definition.
1468
1469 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1470
1471         * configure: Regenerated to track ../common/aclocal.m4 changes.
1472         * config.in: Ditto.
1473
1474 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1475
1476         * interp.c (sim_open): New arg `kind'.
1477
1478         * configure: Regenerated to track ../common/aclocal.m4 changes.
1479
1480 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1481
1482         * configure: Regenerated to track ../common/aclocal.m4 changes.
1483
1484 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1485
1486         * interp.c (sim_open): Set optind to 0 before calling getopt.
1487
1488 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1489
1490         * configure: Regenerated to track ../common/aclocal.m4 changes.
1491
1492 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1493
1494         * interp.c : Replace uses of pr_addr with pr_uword64
1495         where the bit length is always 64 independent of SIM_ADDR.
1496         (pr_uword64) : added.
1497
1498 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1499
1500         * configure: Re-generate.
1501
1502 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1503
1504         * configure: Regenerate to track ../common/aclocal.m4 changes.
1505
1506 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1507
1508         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1509         in argv form.
1510         (other sim_*): New SIM_DESC argument.
1511
1512 start-sanitize-r5900
1513 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1514
1515         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1516         Change values to avoid overloading DOUBLEWORD which is tested
1517         for all insns.
1518         * gencode.c: reinstate "offending code".
1519
1520 end-sanitize-r5900
1521 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1522
1523         * interp.c: Fix printing of addresses for non-64-bit targets.
1524         (pr_addr): Add function to print address based on size.
1525 start-sanitize-r5900
1526         * gencode.c: #ifdef out offending code until a permanent fix
1527         can be added.  Code is causing build errors for non-5900 mips targets.
1528 end-sanitize-r5900
1529
1530 start-sanitize-r5900
1531 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1532
1533         * gencode.c (process_instructions): Correct test for ISA dependent
1534         architecture bits in isa field of MIPS_DECODE.
1535
1536 end-sanitize-r5900
1537 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1538
1539         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1540
1541 start-sanitize-r5900
1542 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1543
1544         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1545         PMADDUW.
1546
1547 end-sanitize-r5900
1548 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1549
1550         * gencode.c (build_mips16_operands): Correct computation of base
1551         address for extended PC relative instruction.
1552
1553 start-sanitize-r5900
1554 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1555
1556         * Makefile.in, configure, configure.in, gencode.c,
1557         interp.c, support.h: add r5900.
1558
1559 end-sanitize-r5900
1560 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1561
1562         * interp.c (mips16_entry): Add support for floating point cases.
1563         (SignalException): Pass floating point cases to mips16_entry.
1564         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1565         registers.
1566         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1567         or fmt_word.
1568         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1569         and then set the state to fmt_uninterpreted.
1570         (COP_SW): Temporarily set the state to fmt_word while calling
1571         ValueFPR.
1572
1573 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1574
1575         * gencode.c (build_instruction): The high order may be set in the
1576         comparison flags at any ISA level, not just ISA 4.
1577
1578 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1579
1580         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1581         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1582         * configure.in: sinclude ../common/aclocal.m4.
1583         * configure: Regenerated.
1584
1585 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1586
1587         * configure: Rebuild after change to aclocal.m4.
1588
1589 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1590
1591         * configure configure.in Makefile.in:  Update to new configure
1592         scheme which is more compatible with WinGDB builds.
1593         * configure.in:  Improve comment on how to run autoconf.
1594         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1595         * Makefile.in:  Use autoconf substitution to install common
1596         makefile fragment.
1597
1598 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1599
1600         * gencode.c (build_instruction): Use BigEndianCPU instead of
1601         ByteSwapMem.
1602
1603 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1604
1605         * interp.c (sim_monitor): Make output to stdout visible in
1606         wingdb's I/O log window.
1607
1608 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1609
1610         * support.h: Undo previous change to SIGTRAP
1611         and SIGQUIT values.
1612
1613 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1614
1615         * interp.c (store_word, load_word): New static functions.
1616         (mips16_entry): New static function.
1617         (SignalException): Look for mips16 entry and exit instructions.
1618         (simulate): Use the correct index when setting fpr_state after
1619         doing a pending move.
1620
1621 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1622
1623         * interp.c: Fix byte-swapping code throughout to work on
1624         both little- and big-endian hosts.
1625
1626 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1627
1628         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1629         with gdb/config/i386/xm-windows.h.
1630
1631 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1632
1633         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1634         that messes up arithmetic shifts.
1635
1636 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1637
1638         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1639         SIGTRAP and SIGQUIT for _WIN32.
1640
1641 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1642
1643         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1644         force a 64 bit multiplication.
1645         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1646         destination register is 0, since that is the default mips16 nop
1647         instruction.
1648
1649 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1650
1651         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1652         (build_endian_shift): Don't check proc64.
1653         (build_instruction): Always set memval to uword64.  Cast op2 to
1654         uword64 when shifting it left in memory instructions.  Always use
1655         the same code for stores--don't special case proc64.
1656
1657         * gencode.c (build_mips16_operands): Fix base PC value for PC
1658         relative operands.
1659         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1660         jal instruction.
1661         * interp.c (simJALDELAYSLOT): Define.
1662         (JALDELAYSLOT): Define.
1663         (INDELAYSLOT, INJALDELAYSLOT): Define.
1664         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1665
1666 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1667
1668         * interp.c (sim_open): add flush_cache as a PMON routine
1669         (sim_monitor): handle flush_cache by ignoring it
1670
1671 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1672
1673         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1674         BigEndianMem.
1675         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1676         (BigEndianMem): Rename to ByteSwapMem and change sense.
1677         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1678         BigEndianMem references to !ByteSwapMem.
1679         (set_endianness): New function, with prototype.
1680         (sim_open): Call set_endianness.
1681         (sim_info): Use simBE instead of BigEndianMem.
1682         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1683         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1684         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1685         ifdefs, keeping the prototype declaration.
1686         (swap_word): Rewrite correctly.
1687         (ColdReset): Delete references to CONFIG.  Delete endianness related
1688         code; moved to set_endianness.
1689
1690 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1691
1692         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1693         * interp.c (CHECKHILO): Define away.
1694         (simSIGINT): New macro.
1695         (membank_size): Increase from 1MB to 2MB.
1696         (control_c): New function.
1697         (sim_resume): Rename parameter signal to signal_number.  Add local
1698         variable prev.  Call signal before and after simulate.
1699         (sim_stop_reason): Add simSIGINT support.
1700         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1701         functions always.
1702         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1703         if logfh is NULL.
1704         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1705         a call to sim_warning.
1706
1707 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1708
1709         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1710         16 bit instructions.
1711
1712 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1713
1714         Add support for mips16 (16 bit MIPS implementation):
1715         * gencode.c (inst_type): Add mips16 instruction encoding types.
1716         (GETDATASIZEINSN): Define.
1717         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1718         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1719         mtlo.
1720         (MIPS16_DECODE): New table, for mips16 instructions.
1721         (bitmap_val): New static function.
1722         (struct mips16_op): Define.
1723         (mips16_op_table): New table, for mips16 operands.
1724         (build_mips16_operands): New static function.
1725         (process_instructions): If PC is odd, decode a mips16
1726         instruction.  Break out instruction handling into new
1727         build_instruction function.
1728         (build_instruction): New static function, broken out of
1729         process_instructions.  Check modifiers rather than flags for SHIFT
1730         bit count and m[ft]{hi,lo} direction.
1731         (usage): Pass program name to fprintf.
1732         (main): Remove unused variable this_option_optind.  Change
1733         ``*loptarg++'' to ``loptarg++''.
1734         (my_strtoul): Parenthesize && within ||.
1735         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1736         (simulate): If PC is odd, fetch a 16 bit instruction, and
1737         increment PC by 2 rather than 4.
1738         * configure.in: Add case for mips16*-*-*.
1739         * configure: Rebuild.
1740
1741 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1742
1743         * interp.c: Allow -t to enable tracing in standalone simulator.
1744         Fix garbage output in trace file and error messages.
1745
1746 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1747
1748         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1749         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1750         * configure.in: Simplify using macros in ../common/aclocal.m4.
1751         * configure: Regenerated.
1752         * tconfig.in: New file.
1753
1754 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1755
1756         * interp.c: Fix bugs in 64-bit port.
1757         Use ansi function declarations for msvc compiler.
1758         Initialize and test file pointer in trace code.
1759         Prevent duplicate definition of LAST_EMED_REGNUM.
1760
1761 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1762
1763         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1764
1765 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1766
1767         * interp.c (SignalException): Check for explicit terminating
1768         breakpoint value.
1769         * gencode.c: Pass instruction value through SignalException()
1770         calls for Trap, Breakpoint and Syscall.
1771
1772 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1773
1774         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1775         only used on those hosts that provide it.
1776         * configure.in: Add sqrt() to list of functions to be checked for.
1777         * config.in: Re-generated.
1778         * configure: Re-generated.
1779
1780 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1781
1782         * gencode.c (process_instructions): Call build_endian_shift when
1783         expanding STORE RIGHT, to fix swr.
1784         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1785         clear the high bits.
1786         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1787         Fix float to int conversions to produce signed values.
1788
1789 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1790
1791         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1792         (process_instructions): Correct handling of nor instruction.
1793         Correct shift count for 32 bit shift instructions. Correct sign
1794         extension for arithmetic shifts to not shift the number of bits in
1795         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1796         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1797         Fix madd.
1798         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1799         It's OK to have a mult follow a mult.  What's not OK is to have a
1800         mult follow an mfhi.
1801         (Convert): Comment out incorrect rounding code.
1802
1803 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1804
1805         * interp.c (sim_monitor): Improved monitor printf
1806         simulation. Tidied up simulator warnings, and added "--log" option
1807         for directing warning message output.
1808         * gencode.c: Use sim_warning() rather than WARNING macro.
1809
1810 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1811
1812         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1813         getopt1.o, rather than on gencode.c.  Link objects together.
1814         Don't link against -liberty.
1815         (gencode.o, getopt.o, getopt1.o): New targets.
1816         * gencode.c: Include <ctype.h> and "ansidecl.h".
1817         (AND): Undefine after including "ansidecl.h".
1818         (ULONG_MAX): Define if not defined.
1819         (OP_*): Don't define macros; now defined in opcode/mips.h.
1820         (main): Call my_strtoul rather than strtoul.
1821         (my_strtoul): New static function.
1822
1823 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1824
1825         * gencode.c (process_instructions):  Generate word64 and uword64
1826         instead of `long long' and `unsigned long long' data types.
1827         * interp.c:  #include sysdep.h to get signals, and define default
1828         for SIGBUS.
1829         * (Convert):  Work around for Visual-C++ compiler bug with type
1830         conversion.
1831         * support.h:  Make things compile under Visual-C++ by using
1832         __int64 instead of `long long'.  Change many refs to long long
1833         into word64/uword64 typedefs.
1834
1835 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1836
1837         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1838         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1839         (docdir): Removed.
1840         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1841         (AC_PROG_INSTALL): Added.
1842         (AC_PROG_CC): Moved to before configure.host call.
1843         * configure: Rebuilt.
1844
1845 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1846
1847         * configure.in: Define @SIMCONF@ depending on mips target.
1848         * configure: Rebuild.
1849         * Makefile.in (run): Add @SIMCONF@ to control simulator
1850         construction.
1851         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1852         * interp.c: Remove some debugging, provide more detailed error
1853         messages, update memory accesses to use LOADDRMASK.
1854
1855 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1856
1857         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1858         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1859         stamp-h.
1860         * configure: Rebuild.
1861         * config.in: New file, generated by autoheader.
1862         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1863         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1864         HAVE_ANINT and HAVE_AINT, as appropriate.
1865         * Makefile.in (run): Use @LIBS@ rather than -lm.
1866         (interp.o): Depend upon config.h.
1867         (Makefile): Just rebuild Makefile.
1868         (clean): Remove stamp-h.
1869         (mostlyclean): Make the same as clean, not as distclean.
1870         (config.h, stamp-h): New targets.
1871
1872 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1873
1874         * interp.c (ColdReset): Fix boolean test. Make all simulator
1875         globals static.
1876
1877 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1878
1879         * interp.c (xfer_direct_word, xfer_direct_long,
1880         swap_direct_word, swap_direct_long, xfer_big_word,
1881         xfer_big_long, xfer_little_word, xfer_little_long,
1882         swap_word,swap_long): Added.
1883         * interp.c (ColdReset): Provide function indirection to
1884         host<->simulated_target transfer routines.
1885         * interp.c (sim_store_register, sim_fetch_register): Updated to
1886         make use of indirected transfer routines.
1887
1888 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1889
1890         * gencode.c (process_instructions): Ensure FP ABS instruction
1891         recognised.
1892         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1893         system call support.
1894
1895 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1896
1897         * interp.c (sim_do_command): Complain if callback structure not
1898         initialised.
1899
1900 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1901
1902         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1903         support for Sun hosts.
1904         * Makefile.in (gencode): Ensure the host compiler and libraries
1905         used for cross-hosted build.
1906
1907 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1908
1909         * interp.c, gencode.c: Some more (TODO) tidying.
1910
1911 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1912
1913         * gencode.c, interp.c: Replaced explicit long long references with
1914         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1915         * support.h (SET64LO, SET64HI): Macros added.
1916
1917 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1918
1919         * configure: Regenerate with autoconf 2.7.
1920
1921 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1922
1923         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1924         * support.h: Remove superfluous "1" from #if.
1925         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1926
1927 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1928
1929         * interp.c (StoreFPR): Control UndefinedResult() call on
1930         WARN_RESULT manifest.
1931
1932 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1933
1934         * gencode.c: Tidied instruction decoding, and added FP instruction
1935         support.
1936
1937         * interp.c: Added dineroIII, and BSD profiling support. Also
1938         run-time FP handling.
1939
1940 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1941
1942         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1943         gencode.c, interp.c, support.h: created.