sim/mips/ChangeLog

   1 2021-04-22  Tom Tromey  <tom@tromey.com>
   2
   3         * configure: Rebuild.
   4
   5 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * aclocal.m4: Regenerate.
   8
   9 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
  10
  11         * configure: Regenerate.
  12
  13 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
  14
  15         * configure: Regenerate.
  16
  17 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
  18
  19         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
  20
  21 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
  22
  23         * Makefile.in: Set ASAN_OPTIONS when running igen.
  24
  25 2021-04-04  Steve Ellcey  <sellcey@mips.com>
  26             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  27
  28         * interp.c (sim_monitor): Add switch entries for unlink (13),
  29         lseek (14), and stat (15).
  30
  31 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * Makefile.in (../igen/igen): Delete rule.
  34         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  35
  36 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * aclocal.m4, configure: Regenerate.
  39
  40 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  41
  42         * configure: Regenerate.
  43
  44 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  45
  46         * Makefile.in (SIM_EXTRA_ALL): Delete.
  47         (all): New target.
  48
  49 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  50
  51         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  52         * aclocal.m4, configure: Regenerate.
  53
  54 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  57         * aclocal.m4, configure: Regenerate.
  58
  59 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  62
  63 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  64
  65         * configure: Regenerate.
  66
  67 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  68
  69         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  70
  71 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  72
  73         * config.in, configure: Regenerate.
  74         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  75         and strings.h include.
  76
  77 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  78
  79         * configure: Regenerate.
  80
  81 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  82
  83         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  84         * configure: Regenerate.
  85
  86 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  87
  88         * configure: Regenerate.
  89
  90 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  91
  92         * configure: Regenerate.
  93
  94 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  95
  96         *  sim-main.c: Include <stdlib.h>.
  97
  98 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  99
 100         * cp1.c: Include <stdlib.h>.
 101
 102 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 103
 104         * configure: Re-generate.
 105
 106 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 107
 108         * configure: Regenerate.
 109
 110 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 111
 112         PR sim/20808
 113         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 114         and SD to sd.
 115
 116 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 117
 118         PR sim/20809
 119         * mips.igen (check_u64): Enable for `r3900'.
 120
 121 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 122
 123         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 124         STATE_PROG_BFD (sd).
 125         * configure: Regenerate.
 126
 127 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 128             Maciej W. Rozycki  <macro@imgtec.com>
 129
 130         PR sim/19441
 131         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 132         `micromips64' and `micromipsdsp' only.
 133         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 134         (do_micromips_jalr, do_micromips_jal): Likewise.
 135         (compute_movep_src_reg): Likewise.
 136         (compute_andi16_imm): Likewise.
 137         (convert_fmt_micromips): Likewise.
 138         (convert_fmt_micromips_cvt_d): Likewise.
 139         (convert_fmt_micromips_cvt_s): Likewise.
 140         (FMT_MICROMIPS): Likewise.
 141         (FMT_MICROMIPS_CVT_D): Likewise.
 142         (FMT_MICROMIPS_CVT_S): Likewise.
 143
 144 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 145
 146         * interp.c: Include elf-bfd.h.
 147         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 148         ELFCLASS32.
 149
 150 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * config.in, configure: Regenerate.
 153
 154 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure: Regenerate.
 157
 158 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * configure: Regenerate.
 161
 162 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure: Regenerate.
 165
 166 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * configure: Regenerate.
 169
 170 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 173         * configure: Regenerate.
 174
 175 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 176
 177         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 178         * configure: Regenerate.
 179
 180 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * configure: Regenerate.
 183
 184 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * configure: Regenerate.
 187
 188 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 189
 190         * config.in, configure: Regenerate.
 191
 192 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 193
 194         * interp.c (sim_open): Mark argv const.
 195         (sim_create_inferior): Mark argv and env const.
 196
 197 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * configure: Regenerate.
 200
 201 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * interp.c (sim_open): Update sim_parse_args comment.
 204
 205 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 208         * configure: Regenerate.
 209
 210 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 211
 212         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 213         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 214         * configure: Regenerate.
 215         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 216
 217 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 218
 219         * dv-tx3904cpu.c (CPU, SD): Delete.
 220
 221 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 222
 223         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 224         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 225         (sim_store_register): Rename to ...
 226         (mips_reg_store): ... this.  Delete local cpu var.
 227         Update sim_io_eprintf calls.
 228         (sim_fetch_register): Rename to ...
 229         (mips_reg_fetch): ... this.  Delete local cpu var.
 230         Update sim_io_eprintf calls.
 231
 232 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 233
 234         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 235
 236 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 237
 238         * config.in, configure: Regenerate.
 239
 240 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 241
 242         * interp.c (sim_write, sim_read): Delete.
 243         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 244         (load_word): Likewise.
 245         * micromips.igen (cache): Likewise.
 246         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 247         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 248         do_store_left, do_store_right, do_load_double, do_store_double):
 249         Likewise.
 250         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 251         (do_prefx): Likewise.
 252         * sim-main.c (address_translation, prefetch): Delete.
 253         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 254         paddr=vaddr.
 255         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 256         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 257         (LoadMemory, StoreMemory): Delete CCA arg.
 258
 259 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 260
 261         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 262         * configure: Regenerated.
 263
 264 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 265
 266         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 267         * tconfig.h: Delete.
 268
 269 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 270
 271         * tconfig.h (SIM_HANDLES_LMA): Delete.
 272
 273 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 274
 275         * sim-main.h (WITH_WATCHPOINTS): Delete.
 276
 277 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 278
 279         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 280
 281 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 282
 283         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 284
 285 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 286
 287         * micromips.igen (process_isa_mode): Fix left shift of negative
 288         value.
 289
 290 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 291
 292         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 293
 294 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 295
 296         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 297
 298 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 299
 300         * interp.c (sim_close): Rename to ...
 301         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 302         sim_io_shutdown.
 303         * sim-main.h (mips_sim_close): Declare.
 304         (SIM_CLOSE_HOOK): Define.
 305
 306 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 307             Ali Lown  <ali.lown@imgtec.com>
 308
 309         * Makefile.in (tmp-micromips): New rule.
 310         (tmp-mach-multi): Add support for micromips.
 311         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 312         that works for both mips64 and micromips64.
 313         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 314         micromips32.
 315         Add build support for micromips.
 316         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 317         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 318         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 319         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 320         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 321         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 322         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 323         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 324         Refactored instruction code to use these functions.
 325         * dsp2.igen: Refactored instruction code to use the new functions.
 326         * interp.c (decode_coproc): Refactored to work with any instruction
 327         encoding.
 328         (isa_mode): New variable
 329         (RSVD_INSTRUCTION): Changed to 0x00000039.
 330         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 331         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 332         * micromips.dc: New file.
 333         * micromips.igen: New file.
 334         * micromips16.dc: New file.
 335         * micromipsdsp.igen: New file.
 336         * micromipsrun.c: New file.
 337         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 338         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 339         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 340         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 341         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 342         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 343         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 344         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 345         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 346         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 347         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 348         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 349         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 350         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 351         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 352         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 353         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 354         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 355         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 356         instructions.
 357         Refactored instruction code to use these functions.
 358         (RSVD): Changed to use new reserved instruction.
 359         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 360         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 361         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 362         do_store_double):  Added micromips32 and micromips64 models.
 363         Added include for micromips.igen and micromipsdsp.igen
 364         Add micromips32 and micromips64 models.
 365         (DecodeCoproc): Updated to use new macro definition.
 366         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 367         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 368         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 369         Refactored instruction code to use these functions.
 370         * sim-main.h (CP0_operation): New enum.
 371         (DecodeCoproc): Updated macro.
 372         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 373         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 374         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 375         ISA_MODE_MICROMIPS): New defines.
 376         (sim_state): Add isa_mode field.
 377
 378 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 379
 380         * configure: Regenerate.
 381
 382 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 383
 384         * configure.ac: Change configure.in to configure.ac.
 385         * configure: Regenerate.
 386
 387 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 388
 389         * configure: Regenerate.
 390
 391 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 392
 393         * interp.c [TRACE]: Delete.
 394         (TRACE): Change to WITH_TRACE_ANY_P.
 395         [!WITH_TRACE_ANY_P] (open_trace): Define.
 396         (mips_option_handler, open_trace, sim_close, dotrace):
 397         Change defined(TRACE) to WITH_TRACE_ANY_P.
 398         (sim_open): Delete TRACE ifdef check.
 399         * sim-main.c (load_memory): Delete TRACE ifdef check.
 400         (store_memory): Likewise.
 401         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 402         [!WITH_TRACE_ANY_P] (dotrace): Define.
 403
 404 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 405
 406         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 407         comments.
 408
 409 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 410
 411         * sim-main.h (SIM_CPU): Delete.
 412
 413 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 414
 415         * sim-main.h (sim_cia): Delete.
 416
 417 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 418
 419         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 420         PU_PC_GET.
 421         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 422         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 423         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 424         CIA_SET to CPU_PC_SET.
 425         * sim-main.h (CIA_GET, CIA_SET): Delete.
 426
 427 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 430         * sim-main.h (STATE_CPU): Delete.
 431
 432 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 433
 434         * configure: Regenerate.
 435
 436 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 437
 438         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 439         * interp.c (mips_pc_get, mips_pc_set): New functions.
 440         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 441         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 442         (sim_pc_get): Delete.
 443         * sim-main.h (SIM_CPU): Define.
 444         (struct sim_state): Change cpu to an array of pointers.
 445         (STATE_CPU): Drop &.
 446
 447 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 448
 449         * interp.c (mips_option_handler, open_trace, sim_close,
 450         sim_write, sim_read, sim_store_register, sim_fetch_register,
 451         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 452         prototypes.
 453         (sim_open): Convert old style prototype.  Change casts with
 454         sim_write to unsigned char *.
 455         (fetch_str): Change null to unsigned char, and change cast to
 456         unsigned char *.
 457         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 458         unsigned char *.
 459
 460 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 461
 462         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 463
 464 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 465
 466         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 467
 468 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 469
 470         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 471
 472 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 473
 474         * config.in, configure: Regenerate.
 475
 476 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 477
 478         * interp.c (sim_pc_get): New function.
 479
 480 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 481
 482         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 483         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 484
 485 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 486
 487         * configure: Regenerate.
 488
 489 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 490
 491         * configure: Regenerate.
 492
 493 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 494
 495         * configure: Regenerate.
 496         * configure.ac (mips_extra_objs): Delete.
 497         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 498         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 499
 500 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 501
 502         * configure: Regenerate.
 503         * configure.ac: Delete sim_hw checks for dv-sockser.
 504
 505 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 506
 507         * config.in, configure: Regenerate.
 508         * tconfig.in: Rename file ...
 509         * tconfig.h: ... here.
 510
 511 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 512
 513         * tconfig.in: Delete includes.
 514         [HAVE_DV_SOCKSER]: Delete.
 515
 516 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 517
 518         * Makefile.in (SIM_RUN_OBJS): Delete.
 519
 520 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 521
 522         * configure.ac (AC_CHECK_HEADERS): Delete.
 523         * aclocal.m4, configure: Regenerate.
 524
 525 2014-08-19  Alan Modra  <amodra@gmail.com>
 526
 527         * configure: Regenerate.
 528
 529 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 530
 531         * configure: Regenerate.
 532         * config.in: Regenerate.
 533
 534 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 535
 536         * configure: Regenerate.
 537
 538 2013-09-23  Alan Modra  <amodra@gmail.com>
 539
 540         * configure: Regenerate.
 541
 542 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 543
 544         * aclocal.m4, configure: Regenerate.
 545
 546 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 547
 548         * configure: Rebuild.
 549
 550 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 551
 552         * configure: Regenerate.
 553
 554 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 555
 556         * configure.ac: Address use of dv-sockser.o.
 557         * tconfig.in: Conditionalize use of dv_sockser_install.
 558         * configure: Regenerated.
 559         * config.in: Regenerated.
 560
 561 2012-10-04  Chao-ying Fu  <fu@mips.com>
 562             Steve Ellcey  <sellcey@mips.com>
 563
 564         * mips/mips3264r2.igen (rdhwr): New.
 565
 566 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 567
 568         * configure.ac: Always link against dv-sockser.o.
 569         * configure: Regenerate.
 570
 571 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 572
 573         * config.in, configure: Regenerate.
 574
 575 2012-05-18  Nick Clifton  <nickc@redhat.com>
 576
 577         PR 14072
 578         * interp.c: Include config.h before system header files.
 579
 580 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 581
 582         * aclocal.m4, config.in, configure: Regenerate.
 583
 584 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 585
 586         * aclocal.m4: New file.
 587         * configure: Regenerate.
 588
 589 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 590
 591         * configure: Regenerate after common/acinclude.m4 update.
 592
 593 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 594
 595         * configure.ac: Change include to common/acinclude.m4.
 596
 597 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 598
 599         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 600         call.  Replace common.m4 include with SIM_AC_COMMON.
 601         * configure: Regenerate.
 602
 603 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 604
 605         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 606         $(SIM_EXTRA_DEPS).
 607         (tmp-mach-multi): Exit early when igen fails.
 608
 609 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 610
 611         * interp.c (sim_do_command): Delete.
 612
 613 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 614
 615         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 616         (tx3904sio_fifo_reset): Likewise.
 617         * interp.c (sim_monitor): Likewise.
 618
 619 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 620
 621         * interp.c (sim_write): Add const to buffer arg.
 622
 623 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 624
 625         * interp.c: Don't include sysdep.h
 626
 627 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 628
 629         * configure: Regenerate.
 630
 631 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 632
 633         * config.in: Regenerate.
 634         * configure: Likewise.
 635
 636         * configure: Regenerate.
 637
 638 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 639
 640         * configure: Regenerate to track ../common/common.m4 changes.
 641         * config.in: Ditto.
 642
 643 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 644             Daniel Jacobowitz  <dan@codesourcery.com>
 645             Joseph Myers  <joseph@codesourcery.com>
 646
 647         * configure: Regenerate.
 648
 649 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 650
 651         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 652         that unconditionally allows fmt_ps.
 653         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 654         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 655         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 656         filter from 64,f to 32,f.
 657         (PREFX): Change filter from 64 to 32.
 658         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 659         that use do_load_double instead of do_load.  Make both LUXC1
 660         versions unpredictable if SizeFGR () != 64.
 661         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 662         instead of do_store.  Remove unused variable.  Make both SUXC1
 663         versions unpredictable if SizeFGR () != 64.
 664
 665 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 666
 667         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 668         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 669         shifts for that case.
 670
 671 2007-09-04  Nick Clifton  <nickc@redhat.com>
 672
 673         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 674         (display_mem_info): New static variable.
 675         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 676         (mips_options): Add info-memory and memory-info.
 677         (sim_open): After processing the command line and board
 678         specification, check display_mem_info.  If it is set then
 679         call the real handler for the --memory-info command line
 680         switch.
 681
 682 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 683
 684         * configure.ac: Change license of multi-run.c to GPL version 3.
 685         * configure: Regenerate.
 686
 687 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 688
 689         * configure.ac, configure: Revert last patch.
 690
 691 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 692
 693         * configure.ac (sim_mipsisa3264_configs): New variable.
 694         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 695         every configuration support all four targets, using the triplet to
 696         determine the default.
 697         * configure: Regenerate.
 698
 699 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 700
 701         * Makefile.in (m16run.o): New rule.
 702
 703 2007-05-15  Thiemo Seufer  <ths@mips.com>
 704
 705         * mips3264r2.igen (DSHD): Fix compile warning.
 706
 707 2007-05-14  Thiemo Seufer  <ths@mips.com>
 708
 709         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 710         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 711         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 712         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 713         for mips32r2.
 714
 715 2007-03-01  Thiemo Seufer  <ths@mips.com>
 716
 717         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 718         and mips64.
 719
 720 2007-02-20  Thiemo Seufer  <ths@mips.com>
 721
 722         * dsp.igen: Update copyright notice.
 723         * dsp2.igen: Fix copyright notice.
 724
 725 2007-02-20  Thiemo Seufer  <ths@mips.com>
 726             Chao-Ying Fu  <fu@mips.com>
 727
 728         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 729         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 730         Add dsp2 to sim_igen_machine.
 731         * configure: Regenerate.
 732         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 733         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 734         (mulq_rs.ph): Use do_ph_mulq.
 735         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 736         * mips.igen: Add dsp2 model and include dsp2.igen.
 737         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 738         for *mips32r2, *mips64r2, *dsp.
 739         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 740         for *mips32r2, *mips64r2, *dsp2.
 741         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 742
 743 2007-02-19  Thiemo Seufer  <ths@mips.com>
 744             Nigel Stephens  <nigel@mips.com>
 745
 746         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 747         jumps with hazard barrier.
 748
 749 2007-02-19  Thiemo Seufer  <ths@mips.com>
 750             Nigel Stephens  <nigel@mips.com>
 751
 752         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 753         after each call to sim_io_write.
 754
 755 2007-02-19  Thiemo Seufer  <ths@mips.com>
 756             Nigel Stephens  <nigel@mips.com>
 757
 758         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 759         supported by this simulator.
 760         (decode_coproc): Recognise additional CP0 Config registers
 761         correctly.
 762
 763 2007-02-19  Thiemo Seufer  <ths@mips.com>
 764             Nigel Stephens  <nigel@mips.com>
 765             David Ung  <davidu@mips.com>
 766
 767         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 768         uninterpreted formats. If fmt is one of the uninterpreted types
 769         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 770         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 771         (store_fpr): When writing an invalid odd register, set the
 772         matching even register to fmt_unknown, not the following register.
 773         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 774         the the memory window at offset 0 set by --memory-size command
 775         line option.
 776         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 777         point register.
 778         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 779         register.
 780         (sim_monitor): When returning the memory size to the MIPS
 781         application, use the value in STATE_MEM_SIZE, not an arbitrary
 782         hardcoded value.
 783         (cop_lw): Don' mess around with FPR_STATE, just pass
 784         fmt_uninterpreted_32 to StoreFPR.
 785         (cop_sw): Similarly.
 786         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 787         (cop_sd): Similarly.
 788         * mips.igen (not_word_value): Single version for mips32, mips64
 789         and mips16.
 790
 791 2007-02-19  Thiemo Seufer <ths@mips.com>
 792             Nigel Stephens  <nigel@mips.com>
 793
 794         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 795         MBytes.
 796
 797 2007-02-17  Thiemo Seufer  <ths@mips.com>
 798
 799         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 800         configuration.
 801         * configure: Regenerate.
 802
 803 2007-02-17  Thiemo Seufer  <ths@mips.com>
 804
 805         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 806         Add mdmx to sim_igen_machine.
 807         (mipsisa64*-*-*): Likewise. Remove dsp.
 808         (mipsisa32*-*-*): Remove dsp.
 809         * configure: Regenerate.
 810
 811 2007-02-13  Thiemo Seufer  <ths@mips.com>
 812
 813         * configure.ac: Add mips*-sde-elf* target.
 814         * configure: Regenerate.
 815
 816 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 817
 818         * acconfig.h: Remove.
 819         * config.in, configure: Regenerate.
 820
 821 2006-11-07  Thiemo Seufer  <ths@mips.com>
 822
 823         * dsp.igen (do_w_op): Fix compiler warning.
 824
 825 2006-08-29  Thiemo Seufer  <ths@mips.com>
 826             David Ung  <davidu@mips.com>
 827
 828         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 829         sim_igen_machine.
 830         * configure: Regenerate.
 831         * mips.igen (model): Add smartmips.
 832         (MADDU): Increment ACX if carry.
 833         (do_mult): Clear ACX.
 834         (ROR,RORV): Add smartmips.
 835         (include): Include smartmips.igen.
 836         * sim-main.h (ACX): Set to REGISTERS[89].
 837         * smartmips.igen: New file.
 838
 839 2006-08-29  Thiemo Seufer  <ths@mips.com>
 840             David Ung  <davidu@mips.com>
 841
 842         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 843         mips3264r2.igen. Add missing dependency rules.
 844         * m16e.igen: Support for mips16e save/restore instructions.
 845
 846 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 847
 848         * configure: Regenerated.
 849
 850 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 851
 852         * configure: Regenerated.
 853
 854 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 855
 856         * configure: Regenerated.
 857
 858 2006-05-15 Chao-ying Fu  <fu@mips.com>
 859
 860         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 861
 862 2006-04-18  Nick Clifton  <nickc@redhat.com>
 863
 864         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 865         statement.
 866
 867 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 868
 869         * configure: Regenerate.
 870
 871 2005-12-14  Chao-ying Fu  <fu@mips.com>
 872
 873         * Makefile.in (SIM_OBJS): Add dsp.o.
 874         (dsp.o): New dependency.
 875         (IGEN_INCLUDE): Add dsp.igen.
 876         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 877         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 878         * configure: Regenerate.
 879         * mips.igen: Add dsp model and include dsp.igen.
 880         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 881         because these instructions are extended in DSP ASE.
 882         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 883         adding 6 DSP accumulator registers and 1 DSP control register.
 884         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 885         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 886         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 887         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 888         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 889         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 890         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 891         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 892         DSPCR_CCOND_SMASK): New define.
 893         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 894         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 895
 896 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 897
 898         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 899
 900 2005-06-16  David Ung  <davidu@mips.com>
 901             Nigel Stephens  <nigel@mips.com>
 902
 903         * mips.igen: New mips16e model and include m16e.igen.
 904         (check_u64): Add mips16e tag.
 905         * m16e.igen: New file for MIPS16e instructions.
 906         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 907         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 908         models.
 909         * configure: Regenerate.
 910
 911 2005-05-26  David Ung  <davidu@mips.com>
 912
 913         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 914         tags to all instructions which are applicable to the new ISAs.
 915         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 916         vr.igen.
 917         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 918         instructions.
 919         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 920         to mips.igen.
 921         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 922         * configure: Regenerate.
 923
 924 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 925
 926         * configure: Regenerate.
 927
 928 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 929
 930         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 931         explicit call to AC_CONFIG_HEADER.
 932         * configure: Regenerate.
 933
 934 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 935
 936         * configure.ac: Update to use ../common/common.m4.
 937         * configure: Re-generate.
 938
 939 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 940
 941         * configure: Regenerated to track ../common/aclocal.m4 changes.
 942
 943 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 944
 945         * configure.ac: Rename configure.in, require autoconf 2.59.
 946         * configure: Re-generate.
 947
 948 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 949
 950         * configure: Regenerate for ../common/aclocal.m4 update.
 951
 952 2004-09-24  Monika Chaddha  <monika@acmet.com>
 953
 954         Committed by Andrew Cagney.
 955         * m16.igen (CMP, CMPI): Fix assembler.
 956
 957 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 958
 959         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 960         * configure: Regenerate.
 961
 962 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 963
 964         * configure.in (sim_m16_machine): Include mipsIII.
 965         * configure: Regenerate.
 966
 967 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 968
 969         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 970         from COP0_BADVADDR.
 971         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 972
 973 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 974
 975         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 976
 977 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 978
 979         * mips.igen (check_fmt): Remove.
 980         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 981         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 982         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 983         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 984         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 985         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 986         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 987         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 988         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 989         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 990
 991 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 992
 993         * sb1.igen (check_sbx): New function.
 994         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 995
 996 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 997             Richard Sandiford  <rsandifo@redhat.com>
 998
 999         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1000         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1001         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1002         separate implementations for mipsIV and mipsV.  Use new macros to
1003         determine whether the restrictions apply.
1004
1005 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1006
1007         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1008         (check_mult_hilo): Improve comments.
1009         (check_div_hilo): Likewise.  Also, fork off a new version
1010         to handle mips32/mips64 (since there are no hazards to check
1011         in MIPS32/MIPS64).
1012
1013 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1014
1015         * mips.igen (do_dmultx): Fix check for negative operands.
1016
1017 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1018
1019         * Makefile.in (SHELL): Make sure this is defined.
1020         (various): Use $(SHELL) whenever we invoke move-if-change.
1021
1022 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1023
1024         * cp1.c: Tweak attribution slightly.
1025         * cp1.h: Likewise.
1026         * mdmx.c: Likewise.
1027         * mdmx.igen: Likewise.
1028         * mips3d.igen: Likewise.
1029         * sb1.igen: Likewise.
1030
1031 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1032
1033         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1034         unsigned operands.
1035
1036 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1037
1038         * interp.c (sim_open): Rename _bfd to bfd.
1039         (sim_create_inferior): Ditto.
1040
1041 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1042
1043         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1044
1045 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1046
1047         * mips.igen (EI, DI): Remove.
1048
1049 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1050
1051         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1052
1053 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1054             Andrew Cagney  <ac131313@redhat.com>
1055             Gavin Romig-Koch  <gavin@redhat.com>
1056             Graydon Hoare  <graydon@redhat.com>
1057             Aldy Hernandez  <aldyh@redhat.com>
1058             Dave Brolley  <brolley@redhat.com>
1059             Chris Demetriou  <cgd@broadcom.com>
1060
1061         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1062         (sim_mach_default): New variable.
1063         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1064         Add a new simulator generator, MULTI.
1065         * configure: Regenerate.
1066         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1067         (multi-run.o): New dependency.
1068         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1069         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1070         (tmp-multi): Combine them.
1071         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1072         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1073         (distclean-extra): New rule.
1074         * sim-main.h: Include bfd.h.
1075         (MIPS_MACH): New macro.
1076         * mips.igen (vr4120, vr5400, vr5500): New models.
1077         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1078         * vr.igen: Replace with new version.
1079
1080 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1081
1082         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1083         * configure: Regenerate.
1084
1085 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1086
1087         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1088         * mips.igen: Remove all invocations of check_branch_bug and
1089         mark_branch_bug.
1090
1091 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1092
1093         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1094
1095 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1096
1097         * mips.igen (do_load_double, do_store_double): New functions.
1098         (LDC1, SDC1): Rename to...
1099         (LDC1b, SDC1b): respectively.
1100         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1101
1102 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1103
1104         * cp1.c (fp_recip2): Modify initialization expression so that
1105         GCC will recognize it as constant.
1106
1107 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1108
1109         * mdmx.c (SD_): Delete.
1110         (Unpredictable): Re-define, for now, to directly invoke
1111         unpredictable_action().
1112         (mdmx_acc_op): Fix error in .ob immediate handling.
1113
1114 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1115
1116         * interp.c (sim_firmware_command): Initialize `address'.
1117
1118 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1119
1120         * configure: Regenerated to track ../common/aclocal.m4 changes.
1121
1122 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1123             Ed Satterthwaite  <ehs@broadcom.com>
1124
1125         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1126         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1127         * mips.igen: Include mips3d.igen.
1128         (mips3d): New model name for MIPS-3D ASE instructions.
1129         (CVT.W.fmt): Don't use this instruction for word (source) format
1130         instructions.
1131         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1132         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1133         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1134         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1135         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1136         (RSquareRoot1, RSquareRoot2): New macros.
1137         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1138         (fp_rsqrt2): New functions.
1139         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1140         * configure: Regenerate.
1141
1142 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1143             Ed Satterthwaite  <ehs@broadcom.com>
1144
1145         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1146         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1147         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1148         (convert): Note that this function is not used for paired-single
1149         format conversions.
1150         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1151         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1152         (check_fmt_p): Enable paired-single support.
1153         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1154         (PUU.PS): New instructions.
1155         (CVT.S.fmt): Don't use this instruction for paired-single format
1156         destinations.
1157         * sim-main.h (FP_formats): New value 'fmt_ps.'
1158         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1159         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1160
1161 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1162
1163         * mips.igen: Fix formatting of function calls in
1164         many FP operations.
1165
1166 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1167
1168         * mips.igen (MOVN, MOVZ): Trace result.
1169         (TNEI): Print "tnei" as the opcode name in traces.
1170         (CEIL.W): Add disassembly string for traces.
1171         (RSQRT.fmt): Make location of disassembly string consistent
1172         with other instructions.
1173
1174 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1175
1176         * mips.igen (X): Delete unused function.
1177
1178 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1179
1180         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1181
1182 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1183             Ed Satterthwaite  <ehs@broadcom.com>
1184
1185         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1186         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1187         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1188         (fp_nmsub): New prototypes.
1189         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1190         (NegMultiplySub): New defines.
1191         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1192         (MADD.D, MADD.S): Replace with...
1193         (MADD.fmt): New instruction.
1194         (MSUB.D, MSUB.S): Replace with...
1195         (MSUB.fmt): New instruction.
1196         (NMADD.D, NMADD.S): Replace with...
1197         (NMADD.fmt): New instruction.
1198         (NMSUB.D, MSUB.S): Replace with...
1199         (NMSUB.fmt): New instruction.
1200
1201 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1202             Ed Satterthwaite  <ehs@broadcom.com>
1203
1204         * cp1.c: Fix more comment spelling and formatting.
1205         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1206         (denorm_mode): New function.
1207         (fpu_unary, fpu_binary): Round results after operation, collect
1208         status from rounding operations, and update the FCSR.
1209         (convert): Collect status from integer conversions and rounding
1210         operations, and update the FCSR.  Adjust NaN values that result
1211         from conversions.  Convert to use sim_io_eprintf rather than
1212         fprintf, and remove some debugging code.
1213         * cp1.h (fenr_FS): New define.
1214
1215 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1216
1217         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1218         rounding mode to sim FP rounding mode flag conversion code into...
1219         (rounding_mode): New function.
1220
1221 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1222
1223         * cp1.c: Clean up formatting of a few comments.
1224         (value_fpr): Reformat switch statement.
1225
1226 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1227             Ed Satterthwaite  <ehs@broadcom.com>
1228
1229         * cp1.h: New file.
1230         * sim-main.h: Include cp1.h.
1231         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1232         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1233         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1234         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1235         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1236         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1237         * cp1.c: Don't include sim-fpu.h; already included by
1238         sim-main.h.  Clean up formatting of some comments.
1239         (NaN, Equal, Less): Remove.
1240         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1241         (fp_cmp): New functions.
1242         * mips.igen (do_c_cond_fmt): Remove.
1243         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1244         Compare.  Add result tracing.
1245         (CxC1): Remove, replace with...
1246         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1247         (DMxC1): Remove, replace with...
1248         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1249         (MxC1): Remove, replace with...
1250         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1251
1252 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1253
1254         * sim-main.h (FGRIDX): Remove, replace all uses with...
1255         (FGR_BASE): New macro.
1256         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1257         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1258         (NR_FGR, FGR): Likewise.
1259         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1260         * mips.igen: Likewise.
1261
1262 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1263
1264         * cp1.c: Add an FSF Copyright notice to this file.
1265
1266 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1267             Ed Satterthwaite  <ehs@broadcom.com>
1268
1269         * cp1.c (Infinity): Remove.
1270         * sim-main.h (Infinity): Likewise.
1271
1272         * cp1.c (fp_unary, fp_binary): New functions.
1273         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1274         (fp_sqrt): New functions, implemented in terms of the above.
1275         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1276         (Recip, SquareRoot): Remove (replaced by functions above).
1277         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1278         (fp_recip, fp_sqrt): New prototypes.
1279         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1280         (Recip, SquareRoot): Replace prototypes with #defines which
1281         invoke the functions above.
1282
1283 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1284
1285         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1286         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1287         file, remove PARAMS from prototypes.
1288         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1289         simulator state arguments.
1290         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1291         pass simulator state arguments.
1292         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1293         (store_fpr, convert): Remove 'sd' argument.
1294         (value_fpr): Likewise.  Convert to use 'SD' instead.
1295
1296 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1297
1298         * cp1.c (Min, Max): Remove #if 0'd functions.
1299         * sim-main.h (Min, Max): Remove.
1300
1301 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1302
1303         * cp1.c: fix formatting of switch case and default labels.
1304         * interp.c: Likewise.
1305         * sim-main.c: Likewise.
1306
1307 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1308
1309         * cp1.c: Clean up comments which describe FP formats.
1310          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1311
1312 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1313             Ed Satterthwaite  <ehs@broadcom.com>
1314
1315         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1316         Broadcom SiByte SB-1 processor configurations.
1317         * configure: Regenerate.
1318         * sb1.igen: New file.
1319         * mips.igen: Include sb1.igen.
1320         (sb1): New model.
1321         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1322         * mdmx.igen: Add "sb1" model to all appropriate functions and
1323         instructions.
1324         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1325         (ob_func, ob_acc): Reference the above.
1326         (qh_acc): Adjust to keep the same size as ob_acc.
1327         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1328         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1329
1330 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1331
1332         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1333
1334 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1335             Ed Satterthwaite  <ehs@broadcom.com>
1336
1337         * mips.igen (mdmx): New (pseudo-)model.
1338         * mdmx.c, mdmx.igen: New files.
1339         * Makefile.in (SIM_OBJS): Add mdmx.o.
1340         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1341         New typedefs.
1342         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1343         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1344         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1345         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1346         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1347         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1348         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1349         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1350         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1351         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1352         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1353         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1354         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1355         (qh_fmtsel): New macros.
1356         (_sim_cpu): New member "acc".
1357         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1358         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1359
1360 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1361
1362         * interp.c: Use 'deprecated' rather than 'depreciated.'
1363         * sim-main.h: Likewise.
1364
1365 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1366
1367         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1368         which wouldn't compile anyway.
1369         * sim-main.h (unpredictable_action): New function prototype.
1370         (Unpredictable): Define to call igen function unpredictable().
1371         (NotWordValue): New macro to call igen function not_word_value().
1372         (UndefinedResult): Remove.
1373         * interp.c (undefined_result): Remove.
1374         (unpredictable_action): New function.
1375         * mips.igen (not_word_value, unpredictable): New functions.
1376         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1377         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1378         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1379         NotWordValue() to check for unpredictable inputs, then
1380         Unpredictable() to handle them.
1381
1382 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1383
1384         * mips.igen: Fix formatting of calls to Unpredictable().
1385
1386 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1387
1388         * interp.c (sim_open): Revert previous change.
1389
1390 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1391
1392         * interp.c (sim_open): Disable chunk of code that wrote code in
1393         vector table entries.
1394
1395 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1396
1397         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1398         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1399         unused definitions.
1400
1401 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1402
1403         * cp1.c: Fix many formatting issues.
1404
1405 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1406
1407         * cp1.c (fpu_format_name): New function to replace...
1408         (DOFMT): This.  Delete, and update all callers.
1409         (fpu_rounding_mode_name): New function to replace...
1410         (RMMODE): This.  Delete, and update all callers.
1411
1412 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1413
1414         * interp.c: Move FPU support routines from here to...
1415         * cp1.c: Here.  New file.
1416         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1417         (cp1.o): New target.
1418
1419 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1420
1421         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1422         * mips.igen (mips32, mips64): New models, add to all instructions
1423         and functions as appropriate.
1424         (loadstore_ea, check_u64): New variant for model mips64.
1425         (check_fmt_p): New variant for models mipsV and mips64, remove
1426         mipsV model marking fro other variant.
1427         (SLL) Rename to...
1428         (SLLa) this.
1429         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1430         for mips32 and mips64.
1431         (DCLO, DCLZ): New instructions for mips64.
1432
1433 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1434
1435         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1436         immediate or code as a hex value with the "%#lx" format.
1437         (ANDI): Likewise, and fix printed instruction name.
1438
1439 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1440
1441         * sim-main.h (UndefinedResult, Unpredictable): New macros
1442         which currently do nothing.
1443
1444 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1445
1446         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1447         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1448         (status_CU3): New definitions.
1449
1450         * sim-main.h (ExceptionCause): Add new values for MIPS32
1451         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1452         for DebugBreakPoint and NMIReset to note their status in
1453         MIPS32 and MIPS64.
1454         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1455         (SignalExceptionCacheErr): New exception macros.
1456
1457 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1458
1459         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1460         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1461         is always enabled.
1462         (SignalExceptionCoProcessorUnusable): Take as argument the
1463         unusable coprocessor number.
1464
1465 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1466
1467         * mips.igen: Fix formatting of all SignalException calls.
1468
1469 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1470
1471         * sim-main.h (SIGNEXTEND): Remove.
1472
1473 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1474
1475         * mips.igen: Remove gencode comment from top of file, fix
1476         spelling in another comment.
1477
1478 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1479
1480         * mips.igen (check_fmt, check_fmt_p): New functions to check
1481         whether specific floating point formats are usable.
1482         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1483         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1484         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1485         Use the new functions.
1486         (do_c_cond_fmt): Remove format checks...
1487         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1488
1489 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1490
1491         * mips.igen: Fix formatting of check_fpu calls.
1492
1493 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1494
1495         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1496
1497 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1498
1499         * mips.igen: Remove whitespace at end of lines.
1500
1501 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1502
1503         * mips.igen (loadstore_ea): New function to do effective
1504         address calculations.
1505         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1506         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1507         CACHE): Use loadstore_ea to do effective address computations.
1508
1509 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1510
1511         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1512         * mips.igen (LL, CxC1, MxC1): Likewise.
1513
1514 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1515
1516         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1517         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1518         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1519         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1520         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1521         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1522         Don't split opcode fields by hand, use the opcode field values
1523         provided by igen.
1524
1525 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1526
1527         * mips.igen (do_divu): Fix spacing.
1528
1529         * mips.igen (do_dsllv): Move to be right before DSLLV,
1530         to match the rest of the do_<shift> functions.
1531
1532 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1533
1534         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1535         DSRL32, do_dsrlv): Trace inputs and results.
1536
1537 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1538
1539         * mips.igen (CACHE): Provide instruction-printing string.
1540
1541         * interp.c (signal_exception): Comment tokens after #endif.
1542
1543 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1544
1545         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1546         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1547         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1548         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1549         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1550         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1551         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1552         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1553
1554 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1555
1556         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1557         instruction-printing string.
1558         (LWU): Use '64' as the filter flag.
1559
1560 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1561
1562         * mips.igen (SDXC1): Fix instruction-printing string.
1563
1564 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1565
1566         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1567         filter flags "32,f".
1568
1569 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1570
1571         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1572         as the filter flag.
1573
1574 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1575
1576         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1577         add a comma) so that it more closely match the MIPS ISA
1578         documentation opcode partitioning.
1579         (PREF): Put useful names on opcode fields, and include
1580         instruction-printing string.
1581
1582 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1583
1584         * mips.igen (check_u64): New function which in the future will
1585         check whether 64-bit instructions are usable and signal an
1586         exception if not.  Currently a no-op.
1587         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1588         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1589         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1590         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1591
1592         * mips.igen (check_fpu): New function which in the future will
1593         check whether FPU instructions are usable and signal an exception
1594         if not.  Currently a no-op.
1595         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1596         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1597         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1598         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1599         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1600         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1601         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1602         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1603
1604 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1605
1606         * mips.igen (do_load_left, do_load_right): Move to be immediately
1607         following do_load.
1608         (do_store_left, do_store_right): Move to be immediately following
1609         do_store.
1610
1611 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1612
1613         * mips.igen (mipsV): New model name.  Also, add it to
1614         all instructions and functions where it is appropriate.
1615
1616 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1617
1618         * mips.igen: For all functions and instructions, list model
1619         names that support that instruction one per line.
1620
1621 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1622
1623         * mips.igen: Add some additional comments about supported
1624         models, and about which instructions go where.
1625         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1626         order as is used in the rest of the file.
1627
1628 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1629
1630         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1631         indicating that ALU32_END or ALU64_END are there to check
1632         for overflow.
1633         (DADD): Likewise, but also remove previous comment about
1634         overflow checking.
1635
1636 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1637
1638         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1639         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1640         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1641         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1642         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1643         fields (i.e., add and move commas) so that they more closely
1644         match the MIPS ISA documentation opcode partitioning.
1645
1646 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1647
1648         * mips.igen (ADDI): Print immediate value.
1649         (BREAK): Print code.
1650         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1651         (SLL): Print "nop" specially, and don't run the code
1652         that does the shift for the "nop" case.
1653
1654 2001-11-17  Fred Fish  <fnf@redhat.com>
1655
1656         * sim-main.h (float_operation): Move enum declaration outside
1657         of _sim_cpu struct declaration.
1658
1659 2001-04-12  Jim Blandy  <jimb@redhat.com>
1660
1661         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1662         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1663         set of the FCSR.
1664         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1665         PENDING_FILL, and you can get the intended effect gracefully by
1666         calling PENDING_SCHED directly.
1667
1668 2001-02-23  Ben Elliston  <bje@redhat.com>
1669
1670         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1671         already defined elsewhere.
1672
1673 2001-02-19  Ben Elliston  <bje@redhat.com>
1674
1675         * sim-main.h (sim_monitor): Return an int.
1676         * interp.c (sim_monitor): Add return values.
1677         (signal_exception): Handle error conditions from sim_monitor.
1678
1679 2001-02-08  Ben Elliston  <bje@redhat.com>
1680
1681         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1682         (store_memory): Likewise, pass cia to sim_core_write*.
1683
1684 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1685
1686         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1687         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1688
1689 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1690
1691         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1692         * Makefile.in: Don't delete *.igen when cleaning directory.
1693
1694 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1695
1696         * m16.igen (break): Call SignalException not sim_engine_halt.
1697
1698 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1699
1700         From Jason Eckhardt:
1701         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1702
1703 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1706
1707 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1708
1709         * mips.igen (do_dmultx): Fix typo.
1710
1711 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1712
1713         * configure: Regenerated to track ../common/aclocal.m4 changes.
1714
1715 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1716
1717         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1718
1719 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1720
1721         * sim-main.h (GPR_CLEAR): Define macro.
1722
1723 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1724
1725         * interp.c (decode_coproc): Output long using %lx and not %s.
1726
1727 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1728
1729         * interp.c (sim_open): Sort & extend dummy memory regions for
1730         --board=jmr3904 for eCos.
1731
1732 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1733
1734         * configure: Regenerated.
1735
1736 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1737
1738         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1739         calls, conditional on the simulator being in verbose mode.
1740
1741 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1742
1743         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1744         cache don't get ReservedInstruction traps.
1745
1746 1999-11-29  Mark Salter  <msalter@cygnus.com>
1747
1748         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1749         to clear status bits in sdisr register. This is how the hardware works.
1750
1751         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1752         being used by cygmon.
1753
1754 1999-11-11  Andrew Haley  <aph@cygnus.com>
1755
1756         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1757         instructions.
1758
1759 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1760
1761         * mips.igen (MULT): Correct previous mis-applied patch.
1762
1763 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1764
1765         * mips.igen (delayslot32): Handle sequence like
1766         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1767         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1768         (MULT): Actually pass the third register...
1769
1770 1999-09-03  Mark Salter  <msalter@cygnus.com>
1771
1772         * interp.c (sim_open): Added more memory aliases for additional
1773         hardware being touched by cygmon on jmr3904 board.
1774
1775 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1776
1777         * configure: Regenerated to track ../common/aclocal.m4 changes.
1778
1779 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1780
1781         * interp.c (sim_store_register): Handle case where client - GDB -
1782         specifies that a 4 byte register is 8 bytes in size.
1783         (sim_fetch_register): Ditto.
1784
1785 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1786
1787         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1788         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1789         (idt_monitor_base): Base address for IDT monitor traps.
1790         (pmon_monitor_base): Ditto for PMON.
1791         (lsipmon_monitor_base): Ditto for LSI PMON.
1792         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1793         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1794         (sim_firmware_command): New function.
1795         (mips_option_handler): Call it for OPTION_FIRMWARE.
1796         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1797         option was given, add no monitor by default.  Add BREAK hooks only if
1798         monitors are also there.
1799
1800 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1801
1802         * interp.c (sim_monitor): Flush output before reading input.
1803
1804 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1805
1806         * tconfig.in (SIM_HANDLES_LMA): Always define.
1807
1808 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1809
1810         From Mark Salter <msalter@cygnus.com>:
1811         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1812         (sim_open): Add setup for BSP board.
1813
1814 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1815
1816         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1817         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1818         them as unimplemented.
1819
1820 1999-05-08  Felix Lee  <flee@cygnus.com>
1821
1822         * configure: Regenerated to track ../common/aclocal.m4 changes.
1823
1824 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1825
1826         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1827
1828 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1829
1830         * configure.in: Any mips64vr5*-*-* target should have
1831         -DTARGET_ENABLE_FR=1.
1832         (default_endian): Any mips64vr*el-*-* target should default to
1833         LITTLE_ENDIAN.
1834         * configure: Re-generate.
1835
1836 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1837
1838         * mips.igen (ldl): Extend from _16_, not 32.
1839
1840 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1841
1842         * interp.c (sim_store_register): Force registers written to by GDB
1843         into an un-interpreted state.
1844
1845 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1846
1847         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1848         CPU, start periodic background I/O polls.
1849         (tx3904sio_poll): New function: periodic I/O poller.
1850
1851 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1852
1853         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1854
1855 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1856
1857         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1858         case statement.
1859
1860 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1861
1862         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1863         (load_word): Call SIM_CORE_SIGNAL hook on error.
1864         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1865         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1866         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1867         * sim-main.h (COP0_BADVADDR): Define.
1868         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1869         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1870         (_sim_cpu): Add exc_* fields to store register value snapshots.
1871         * mips.igen (*): Replace memory-related SignalException* calls
1872         with references to SIM_CORE_SIGNAL hook.
1873
1874         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1875         fix.
1876         * sim-main.c (*): Minor warning cleanups.
1877
1878 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1879
1880         * m16.igen (DADDIU5): Correct type-o.
1881
1882 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1883
1884         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1885         variables.
1886
1887 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1888
1889         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1890         to include path.
1891         (interp.o): Add dependency on itable.h
1892         (oengine.c, gencode): Delete remaining references.
1893         (BUILT_SRC_FROM_GEN): Clean up.
1894
1895 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1896
1897         * vr4run.c: New.
1898         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1899         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1900         tmp-run-hack) : New.
1901         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1902         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1903         Drop the "64" qualifier to get the HACK generator working.
1904         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1905         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1906         qualifier to get the hack generator working.
1907         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1908         (DSLL): Use do_dsll.
1909         (DSLLV): Use do_dsllv.
1910         (DSRA): Use do_dsra.
1911         (DSRL): Use do_dsrl.
1912         (DSRLV): Use do_dsrlv.
1913         (BC1): Move *vr4100 to get the HACK generator working.
1914         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1915         get the HACK generator working.
1916         (MACC) Rename to get the HACK generator working.
1917         (DMACC,MACCS,DMACCS): Add the 64.
1918
1919 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1920
1921         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1922         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1923
1924 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1925
1926     * mips/interp.c (DEBUG): Cleanups.
1927
1928 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1929
1930         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1931         (tx3904sio_tickle): fflush after a stdout character output.
1932
1933 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1934
1935         * interp.c (sim_close): Uninstall modules.
1936
1937 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1938
1939         * sim-main.h, interp.c (sim_monitor): Change to global
1940         function.
1941
1942 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1943
1944         * configure.in (vr4100): Only include vr4100 instructions in
1945         simulator.
1946         * configure: Re-generate.
1947         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1948
1949 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1950
1951         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1952         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1953         true alternative.
1954
1955         * configure.in (sim_default_gen, sim_use_gen): Replace with
1956         sim_gen.
1957         (--enable-sim-igen): Delete config option. Always using IGEN.
1958         * configure: Re-generate.
1959
1960         * Makefile.in (gencode): Kill, kill, kill.
1961         * gencode.c: Ditto.
1962
1963 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1964
1965         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1966         bit mips16 igen simulator.
1967         * configure: Re-generate.
1968
1969         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1970         as part of vr4100 ISA.
1971         * vr.igen: Mark all instructions as 64 bit only.
1972
1973 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1974
1975         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1976         Pacify GCC.
1977
1978 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1979
1980         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1981         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1982         * configure: Re-generate.
1983
1984         * m16.igen (BREAK): Define breakpoint instruction.
1985         (JALX32): Mark instruction as mips16 and not r3900.
1986         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1987
1988         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1989
1990 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1991
1992         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1993         insn as a debug breakpoint.
1994
1995         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1996         pending.slot_size.
1997         (PENDING_SCHED): Clean up trace statement.
1998         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1999         (PENDING_FILL): Delay write by only one cycle.
2000         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2001
2002         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2003         of pending writes.
2004         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2005         32 & 64.
2006         (pending_tick): Move incrementing of index to FOR statement.
2007         (pending_tick): Only update PENDING_OUT after a write has occured.
2008
2009         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2010         build simulator.
2011         * configure: Re-generate.
2012
2013         * interp.c (sim_engine_run OLD): Delete explicit call to
2014         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2015
2016 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2017
2018         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2019         interrupt level number to match changed SignalExceptionInterrupt
2020         macro.
2021
2022 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2023
2024         * interp.c: #include "itable.h" if WITH_IGEN.
2025         (get_insn_name): New function.
2026         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2027         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2028
2029 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2030
2031         * configure: Rebuilt to inhale new common/aclocal.m4.
2032
2033 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2034
2035         * dv-tx3904sio.c: Include sim-assert.h.
2036
2037 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2038
2039         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2040         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2041         Reorganize target-specific sim-hardware checks.
2042         * configure: rebuilt.
2043         * interp.c (sim_open): For tx39 target boards, set
2044         OPERATING_ENVIRONMENT, add tx3904sio devices.
2045         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2046         ROM executables.  Install dv-sockser into sim-modules list.
2047
2048         * dv-tx3904irc.c: Compiler warning clean-up.
2049         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2050         frequent hw-trace messages.
2051
2052 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2053
2054         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2055
2056 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2057
2058         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2059
2060         * vr.igen: New file.
2061         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2062         * mips.igen: Define vr4100 model. Include vr.igen.
2063 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2064
2065         * mips.igen (check_mf_hilo): Correct check.
2066
2067 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2068
2069         * sim-main.h (interrupt_event): Add prototype.
2070
2071         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2072         register_ptr, register_value.
2073         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2074
2075         * sim-main.h (tracefh): Make extern.
2076
2077 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2078
2079         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2080         Reduce unnecessarily high timer event frequency.
2081         * dv-tx3904cpu.c: Ditto for interrupt event.
2082
2083 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2084
2085         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2086         to allay warnings.
2087         (interrupt_event): Made non-static.
2088
2089         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2090         interchange of configuration values for external vs. internal
2091         clock dividers.
2092
2093 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2094
2095         * mips.igen (BREAK): Moved code to here for
2096         simulator-reserved break instructions.
2097         * gencode.c (build_instruction): Ditto.
2098         * interp.c (signal_exception): Code moved from here.  Non-
2099         reserved instructions now use exception vector, rather
2100         than halting sim.
2101         * sim-main.h: Moved magic constants to here.
2102
2103 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2104
2105         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2106         register upon non-zero interrupt event level, clear upon zero
2107         event value.
2108         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2109         by passing zero event value.
2110         (*_io_{read,write}_buffer): Endianness fixes.
2111         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2112         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2113
2114         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2115         serial I/O and timer module at base address 0xFFFF0000.
2116
2117 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2118
2119         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2120         and BigEndianCPU.
2121
2122 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2123
2124         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2125         parts.
2126         * configure: Update.
2127
2128 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2129
2130         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2131         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2132         * configure.in: Include tx3904tmr in hw_device list.
2133         * configure: Rebuilt.
2134         * interp.c (sim_open): Instantiate three timer instances.
2135         Fix address typo of tx3904irc instance.
2136
2137 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2138
2139         * interp.c (signal_exception): SystemCall exception now uses
2140         the exception vector.
2141
2142 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2143
2144         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2145         to allay warnings.
2146
2147 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2148
2149         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2150
2151 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2152
2153         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2154
2155         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2156         sim-main.h. Declare a struct hw_descriptor instead of struct
2157         hw_device_descriptor.
2158
2159 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2160
2161         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2162         right bits and then re-align left hand bytes to correct byte
2163         lanes.  Fix incorrect computation in do_store_left when loading
2164         bytes from second word.
2165
2166 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2167
2168         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2169         * interp.c (sim_open): Only create a device tree when HW is
2170         enabled.
2171
2172         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2173         * interp.c (signal_exception): Ditto.
2174
2175 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2176
2177         * gencode.c: Mark BEGEZALL as LIKELY.
2178
2179 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2180
2181         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2182         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2183
2184 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2185
2186         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2187         modules.  Recognize TX39 target with "mips*tx39" pattern.
2188         * configure: Rebuilt.
2189         * sim-main.h (*): Added many macros defining bits in
2190         TX39 control registers.
2191         (SignalInterrupt): Send actual PC instead of NULL.
2192         (SignalNMIReset): New exception type.
2193         * interp.c (board): New variable for future use to identify
2194         a particular board being simulated.
2195         (mips_option_handler,mips_options): Added "--board" option.
2196         (interrupt_event): Send actual PC.
2197         (sim_open): Make memory layout conditional on board setting.
2198         (signal_exception): Initial implementation of hardware interrupt
2199         handling.  Accept another break instruction variant for simulator
2200         exit.
2201         (decode_coproc): Implement RFE instruction for TX39.
2202         (mips.igen): Decode RFE instruction as such.
2203         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2204         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2205         bbegin to implement memory map.
2206         * dv-tx3904cpu.c: New file.
2207         * dv-tx3904irc.c: New file.
2208
2209 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2210
2211         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2212
2213 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2214
2215         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2216         with calls to check_div_hilo.
2217
2218 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2219
2220         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2221         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2222         Add special r3900 version of do_mult_hilo.
2223         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2224         with calls to check_mult_hilo.
2225         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2226         with calls to check_div_hilo.
2227
2228 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2229
2230         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2231         Document a replacement.
2232
2233 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2234
2235         * interp.c (sim_monitor): Make mon_printf work.
2236
2237 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2238
2239         * sim-main.h (INSN_NAME): New arg `cpu'.
2240
2241 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2242
2243         * configure: Regenerated to track ../common/aclocal.m4 changes.
2244
2245 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2246
2247         * configure: Regenerated to track ../common/aclocal.m4 changes.
2248         * config.in: Ditto.
2249
2250 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2251
2252         * acconfig.h: New file.
2253         * configure.in: Reverted change of Apr 24; use sinclude again.
2254
2255 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2256
2257         * configure: Regenerated to track ../common/aclocal.m4 changes.
2258         * config.in: Ditto.
2259
2260 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2261
2262         * configure.in: Don't call sinclude.
2263
2264 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2265
2266         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2267
2268 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2269
2270         * mips.igen (ERET): Implement.
2271
2272         * interp.c (decode_coproc): Return sign-extended EPC.
2273
2274         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2275
2276         * interp.c (signal_exception): Do not ignore Trap.
2277         (signal_exception): On TRAP, restart at exception address.
2278         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2279         (signal_exception): Update.
2280         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2281         so that TRAP instructions are caught.
2282
2283 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2286         contains HI/LO access history.
2287         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2288         (HIACCESS, LOACCESS): Delete, replace with
2289         (HIHISTORY, LOHISTORY): New macros.
2290         (CHECKHILO): Delete all, moved to mips.igen
2291
2292         * gencode.c (build_instruction): Do not generate checks for
2293         correct HI/LO register usage.
2294
2295         * interp.c (old_engine_run): Delete checks for correct HI/LO
2296         register usage.
2297
2298         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2299         check_mf_cycles): New functions.
2300         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2301         do_divu, domultx, do_mult, do_multu): Use.
2302
2303         * tx.igen ("madd", "maddu"): Use.
2304
2305 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2306
2307         * mips.igen (DSRAV): Use function do_dsrav.
2308         (SRAV): Use new function do_srav.
2309
2310         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2311         (B): Sign extend 11 bit immediate.
2312         (EXT-B*): Shift 16 bit immediate left by 1.
2313         (ADDIU*): Don't sign extend immediate value.
2314
2315 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2318
2319         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2320         functions.
2321
2322         * mips.igen (delayslot32, nullify_next_insn): New functions.
2323         (m16.igen): Always include.
2324         (do_*): Add more tracing.
2325
2326         * m16.igen (delayslot16): Add NIA argument, could be called by a
2327         32 bit MIPS16 instruction.
2328
2329         * interp.c (ifetch16): Move function from here.
2330         * sim-main.c (ifetch16): To here.
2331
2332         * sim-main.c (ifetch16, ifetch32): Update to match current
2333         implementations of LH, LW.
2334         (signal_exception): Don't print out incorrect hex value of illegal
2335         instruction.
2336
2337 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2338
2339         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2340         instruction.
2341
2342         * m16.igen: Implement MIPS16 instructions.
2343
2344         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2345         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2346         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2347         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2348         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2349         bodies of corresponding code from 32 bit insn to these.  Also used
2350         by MIPS16 versions of functions.
2351
2352         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2353         (IMEM16): Drop NR argument from macro.
2354
2355 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2356
2357         * Makefile.in (SIM_OBJS): Add sim-main.o.
2358
2359         * sim-main.h (address_translation, load_memory, store_memory,
2360         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2361         as INLINE_SIM_MAIN.
2362         (pr_addr, pr_uword64): Declare.
2363         (sim-main.c): Include when H_REVEALS_MODULE_P.
2364
2365         * interp.c (address_translation, load_memory, store_memory,
2366         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2367         from here.
2368         * sim-main.c: To here. Fix compilation problems.
2369
2370         * configure.in: Enable inlining.
2371         * configure: Re-config.
2372
2373 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2374
2375         * configure: Regenerated to track ../common/aclocal.m4 changes.
2376
2377 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2378
2379         * mips.igen: Include tx.igen.
2380         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2381         * tx.igen: New file, contains MADD and MADDU.
2382
2383         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2384         the hardwired constant `7'.
2385         (store_memory): Ditto.
2386         (LOADDRMASK): Move definition to sim-main.h.
2387
2388         mips.igen (MTC0): Enable for r3900.
2389         (ADDU): Add trace.
2390
2391         mips.igen (do_load_byte): Delete.
2392         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2393         do_store_right): New functions.
2394         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2395
2396         configure.in: Let the tx39 use igen again.
2397         configure: Update.
2398
2399 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2400
2401         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2402         not an address sized quantity.  Return zero for cache sizes.
2403
2404 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2405
2406         * mips.igen (r3900): r3900 does not support 64 bit integer
2407         operations.
2408
2409 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2410
2411         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2412         than igen one.
2413         * configure : Rebuild.
2414
2415 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2416
2417         * configure: Regenerated to track ../common/aclocal.m4 changes.
2418
2419 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2420
2421         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2422
2423 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2424
2425         * configure: Regenerated to track ../common/aclocal.m4 changes.
2426         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2427
2428 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2429
2430         * configure: Regenerated to track ../common/aclocal.m4 changes.
2431
2432 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2433
2434         * interp.c (Max, Min): Comment out functions. Not yet used.
2435
2436 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2437
2438         * configure: Regenerated to track ../common/aclocal.m4 changes.
2439
2440 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2441
2442         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2443         configurable settings for stand-alone simulator.
2444
2445         * configure.in: Added X11 search, just in case.
2446
2447         * configure: Regenerated.
2448
2449 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2450
2451         * interp.c (sim_write, sim_read, load_memory, store_memory):
2452         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2453
2454 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * sim-main.h (GETFCC): Return an unsigned value.
2457
2458 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2459
2460         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2461         (DADD): Result destination is RD not RT.
2462
2463 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2464
2465         * sim-main.h (HIACCESS, LOACCESS): Always define.
2466
2467         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2468
2469         * interp.c (sim_info): Delete.
2470
2471 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2472
2473         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2474         (mips_option_handler): New argument `cpu'.
2475         (sim_open): Update call to sim_add_option_table.
2476
2477 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2478
2479         * mips.igen (CxC1): Add tracing.
2480
2481 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * sim-main.h (Max, Min): Declare.
2484
2485         * interp.c (Max, Min): New functions.
2486
2487         * mips.igen (BC1): Add tracing.
2488
2489 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2490
2491         * interp.c Added memory map for stack in vr4100
2492
2493 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2494
2495         * interp.c (load_memory): Add missing "break"'s.
2496
2497 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2498
2499         * interp.c (sim_store_register, sim_fetch_register): Pass in
2500         length parameter.  Return -1.
2501
2502 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2503
2504         * interp.c: Added hardware init hook, fixed warnings.
2505
2506 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2507
2508         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2509
2510 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2511
2512         * interp.c (ifetch16): New function.
2513
2514         * sim-main.h (IMEM32): Rename IMEM.
2515         (IMEM16_IMMED): Define.
2516         (IMEM16): Define.
2517         (DELAY_SLOT): Update.
2518
2519         * m16run.c (sim_engine_run): New file.
2520
2521         * m16.igen: All instructions except LB.
2522         (LB): Call do_load_byte.
2523         * mips.igen (do_load_byte): New function.
2524         (LB): Call do_load_byte.
2525
2526         * mips.igen: Move spec for insn bit size and high bit from here.
2527         * Makefile.in (tmp-igen, tmp-m16): To here.
2528
2529         * m16.dc: New file, decode mips16 instructions.
2530
2531         * Makefile.in (SIM_NO_ALL): Define.
2532         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2533
2534 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2537         point unit to 32 bit registers.
2538         * configure: Re-generate.
2539
2540 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2541
2542         * configure.in (sim_use_gen): Make IGEN the default simulator
2543         generator for generic 32 and 64 bit mips targets.
2544         * configure: Re-generate.
2545
2546 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2547
2548         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2549         bitsize.
2550
2551         * interp.c (sim_fetch_register, sim_store_register): Read/write
2552         FGR from correct location.
2553         (sim_open): Set size of FGR's according to
2554         WITH_TARGET_FLOATING_POINT_BITSIZE.
2555
2556         * sim-main.h (FGR): Store floating point registers in a separate
2557         array.
2558
2559 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2560
2561         * configure: Regenerated to track ../common/aclocal.m4 changes.
2562
2563 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2564
2565         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2566
2567         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2568
2569         * interp.c (pending_tick): New function.  Deliver pending writes.
2570
2571         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2572         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2573         it can handle mixed sized quantites and single bits.
2574
2575 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2576
2577         * interp.c (oengine.h): Do not include when building with IGEN.
2578         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2579         (sim_info): Ditto for PROCESSOR_64BIT.
2580         (sim_monitor): Replace ut_reg with unsigned_word.
2581         (*): Ditto for t_reg.
2582         (LOADDRMASK): Define.
2583         (sim_open): Remove defunct check that host FP is IEEE compliant,
2584         using software to emulate floating point.
2585         (value_fpr, ...): Always compile, was conditional on HASFPU.
2586
2587 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2588
2589         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2590         size.
2591
2592         * interp.c (SD, CPU): Define.
2593         (mips_option_handler): Set flags in each CPU.
2594         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2595         (sim_close): Do not clear STATE, deleted anyway.
2596         (sim_write, sim_read): Assume CPU zero's vm should be used for
2597         data transfers.
2598         (sim_create_inferior): Set the PC for all processors.
2599         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2600         argument.
2601         (mips16_entry): Pass correct nr of args to store_word, load_word.
2602         (ColdReset): Cold reset all cpu's.
2603         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2604         (sim_monitor, load_memory, store_memory, signal_exception): Use
2605         `CPU' instead of STATE_CPU.
2606
2607
2608         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2609         SD or CPU_.
2610
2611         * sim-main.h (signal_exception): Add sim_cpu arg.
2612         (SignalException*): Pass both SD and CPU to signal_exception.
2613         * interp.c (signal_exception): Update.
2614
2615         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2616         Ditto
2617         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2618         address_translation): Ditto
2619         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2620
2621 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2622
2623         * configure: Regenerated to track ../common/aclocal.m4 changes.
2624
2625 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2626
2627         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2628
2629         * mips.igen (model): Map processor names onto BFD name.
2630
2631         * sim-main.h (CPU_CIA): Delete.
2632         (SET_CIA, GET_CIA): Define
2633
2634 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2635
2636         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2637         regiser.
2638
2639         * configure.in (default_endian): Configure a big-endian simulator
2640         by default.
2641         * configure: Re-generate.
2642
2643 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2644
2645         * configure: Regenerated to track ../common/aclocal.m4 changes.
2646
2647 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2648
2649         * interp.c (sim_monitor): Handle Densan monitor outbyte
2650         and inbyte functions.
2651
2652 1997-12-29  Felix Lee  <flee@cygnus.com>
2653
2654         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2655
2656 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2657
2658         * Makefile.in (tmp-igen): Arrange for $zero to always be
2659         reset to zero after every instruction.
2660
2661 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2662
2663         * configure: Regenerated to track ../common/aclocal.m4 changes.
2664         * config.in: Ditto.
2665
2666 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2667
2668         * mips.igen (MSUB): Fix to work like MADD.
2669         * gencode.c (MSUB): Similarly.
2670
2671 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2672
2673         * configure: Regenerated to track ../common/aclocal.m4 changes.
2674
2675 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2676
2677         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2678
2679 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2680
2681         * sim-main.h (sim-fpu.h): Include.
2682
2683         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2684         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2685         using host independant sim_fpu module.
2686
2687 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2688
2689         * interp.c (signal_exception): Report internal errors with SIGABRT
2690         not SIGQUIT.
2691
2692         * sim-main.h (C0_CONFIG): New register.
2693         (signal.h): No longer include.
2694
2695         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2696
2697 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2698
2699         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2700
2701 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2702
2703         * mips.igen: Tag vr5000 instructions.
2704         (ANDI): Was missing mipsIV model, fix assembler syntax.
2705         (do_c_cond_fmt): New function.
2706         (C.cond.fmt): Handle mips I-III which do not support CC field
2707         separatly.
2708         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2709         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2710         in IV3.2 spec.
2711         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2712         vr5000 which saves LO in a GPR separatly.
2713
2714         * configure.in (enable-sim-igen): For vr5000, select vr5000
2715         specific instructions.
2716         * configure: Re-generate.
2717
2718 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2719
2720         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2721
2722         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2723         fmt_uninterpreted_64 bit cases to switch.  Convert to
2724         fmt_formatted,
2725
2726         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2727
2728         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2729         as specified in IV3.2 spec.
2730         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2731
2732 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2733
2734         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2735         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2736         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2737         PENDING_FILL versions of instructions.  Simplify.
2738         (X): New function.
2739         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2740         instructions.
2741         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2742         a signed value.
2743         (MTHI, MFHI): Disable code checking HI-LO.
2744
2745         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2746         global.
2747         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2748
2749 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2750
2751         * gencode.c (build_mips16_operands): Replace IPC with cia.
2752
2753         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2754         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2755         IPC to `cia'.
2756         (UndefinedResult): Replace function with macro/function
2757         combination.
2758         (sim_engine_run): Don't save PC in IPC.
2759
2760         * sim-main.h (IPC): Delete.
2761
2762
2763         * interp.c (signal_exception, store_word, load_word,
2764         address_translation, load_memory, store_memory, cache_op,
2765         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2766         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2767         current instruction address - cia - argument.
2768         (sim_read, sim_write): Call address_translation directly.
2769         (sim_engine_run): Rename variable vaddr to cia.
2770         (signal_exception): Pass cia to sim_monitor
2771
2772         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2773         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2774         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2775
2776         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2777         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2778         SIM_ASSERT.
2779
2780         * interp.c (signal_exception): Pass restart address to
2781         sim_engine_restart.
2782
2783         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2784         idecode.o): Add dependency.
2785
2786         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2787         Delete definitions
2788         (DELAY_SLOT): Update NIA not PC with branch address.
2789         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2790
2791         * mips.igen: Use CIA not PC in branch calculations.
2792         (illegal): Call SignalException.
2793         (BEQ, ADDIU): Fix assembler.
2794
2795 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2796
2797         * m16.igen (JALX): Was missing.
2798
2799         * configure.in (enable-sim-igen): New configuration option.
2800         * configure: Re-generate.
2801
2802         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2803
2804         * interp.c (load_memory, store_memory): Delete parameter RAW.
2805         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2806         bypassing {load,store}_memory.
2807
2808         * sim-main.h (ByteSwapMem): Delete definition.
2809
2810         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2811
2812         * interp.c (sim_do_command, sim_commands): Delete mips specific
2813         commands.  Handled by module sim-options.
2814
2815         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2816         (WITH_MODULO_MEMORY): Define.
2817
2818         * interp.c (sim_info): Delete code printing memory size.
2819
2820         * interp.c (mips_size): Nee sim_size, delete function.
2821         (power2): Delete.
2822         (monitor, monitor_base, monitor_size): Delete global variables.
2823         (sim_open, sim_close): Delete code creating monitor and other
2824         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2825         manage memory regions.
2826         (load_memory, store_memory): Use sim-core for memory model.
2827
2828         * interp.c (address_translation): Delete all memory map code
2829         except line forcing 32 bit addresses.
2830
2831 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2832
2833         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2834         trace options.
2835
2836         * interp.c (logfh, logfile): Delete globals.
2837         (sim_open, sim_close): Delete code opening & closing log file.
2838         (mips_option_handler): Delete -l and -n options.
2839         (OPTION mips_options): Ditto.
2840
2841         * interp.c (OPTION mips_options): Rename option trace to dinero.
2842         (mips_option_handler): Update.
2843
2844 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2845
2846         * interp.c (fetch_str): New function.
2847         (sim_monitor): Rewrite using sim_read & sim_write.
2848         (sim_open): Check magic number.
2849         (sim_open): Write monitor vectors into memory using sim_write.
2850         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2851         (sim_read, sim_write): Simplify - transfer data one byte at a
2852         time.
2853         (load_memory, store_memory): Clarify meaning of parameter RAW.
2854
2855         * sim-main.h (isHOST): Defete definition.
2856         (isTARGET): Mark as depreciated.
2857         (address_translation): Delete parameter HOST.
2858
2859         * interp.c (address_translation): Delete parameter HOST.
2860
2861 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2862
2863         * mips.igen:
2864
2865         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2866         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2867
2868 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2869
2870         * mips.igen: Add model filter field to records.
2871
2872 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2873
2874         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2875
2876         interp.c (sim_engine_run): Do not compile function sim_engine_run
2877         when WITH_IGEN == 1.
2878
2879         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2880         target architecture.
2881
2882         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2883         igen. Replace with configuration variables sim_igen_flags /
2884         sim_m16_flags.
2885
2886         * m16.igen: New file.  Copy mips16 insns here.
2887         * mips.igen: From here.
2888
2889 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2890
2891         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2892         to top.
2893         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2894
2895 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2896
2897         * gencode.c (build_instruction): Follow sim_write's lead in using
2898         BigEndianMem instead of !ByteSwapMem.
2899
2900 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2901
2902         * configure.in (sim_gen): Dependent on target, select type of
2903         generator.  Always select old style generator.
2904
2905         configure: Re-generate.
2906
2907         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2908         targets.
2909         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2910         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2911         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2912         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2913         SIM_@sim_gen@_*, set by autoconf.
2914
2915 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2916
2917         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2918
2919         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2920         CURRENT_FLOATING_POINT instead.
2921
2922         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2923         (address_translation): Raise exception InstructionFetch when
2924         translation fails and isINSTRUCTION.
2925
2926         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2927         sim_engine_run): Change type of of vaddr and paddr to
2928         address_word.
2929         (address_translation, prefetch, load_memory, store_memory,
2930         cache_op): Change type of vAddr and pAddr to address_word.
2931
2932         * gencode.c (build_instruction): Change type of vaddr and paddr to
2933         address_word.
2934
2935 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2936
2937         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2938         macro to obtain result of ALU op.
2939
2940 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2941
2942         * interp.c (sim_info): Call profile_print.
2943
2944 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2945
2946         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2947
2948         * sim-main.h (WITH_PROFILE): Do not define, defined in
2949         common/sim-config.h.  Use sim-profile module.
2950         (simPROFILE): Delete defintion.
2951
2952         * interp.c (PROFILE): Delete definition.
2953         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2954         (sim_close): Delete code writing profile histogram.
2955         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2956         Delete.
2957         (sim_engine_run): Delete code profiling the PC.
2958
2959 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2960
2961         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2962
2963         * interp.c (sim_monitor): Make register pointers of type
2964         unsigned_word*.
2965
2966         * sim-main.h: Make registers of type unsigned_word not
2967         signed_word.
2968
2969 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2970
2971         * interp.c (sync_operation): Rename from SyncOperation, make
2972         global, add SD argument.
2973         (prefetch): Rename from Prefetch, make global, add SD argument.
2974         (decode_coproc): Make global.
2975
2976         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2977
2978         * gencode.c (build_instruction): Generate DecodeCoproc not
2979         decode_coproc calls.
2980
2981         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2982         (SizeFGR): Move to sim-main.h
2983         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2984         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2985         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2986         sim-main.h.
2987         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2988         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2989         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2990         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2991         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2992         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2993
2994         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2995         exception.
2996         (sim-alu.h): Include.
2997         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2998         (sim_cia): Typedef to instruction_address.
2999
3000 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3001
3002         * Makefile.in (interp.o): Rename generated file engine.c to
3003         oengine.c.
3004
3005         * interp.c: Update.
3006
3007 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3008
3009         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3010
3011 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3012
3013         * gencode.c (build_instruction): For "FPSQRT", output correct
3014         number of arguments to Recip.
3015
3016 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3017
3018         * Makefile.in (interp.o): Depends on sim-main.h
3019
3020         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3021
3022         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3023         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3024         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3025         STATE, DSSTATE): Define
3026         (GPR, FGRIDX, ..): Define.
3027
3028         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3029         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3030         (GPR, FGRIDX, ...): Delete macros.
3031
3032         * interp.c: Update names to match defines from sim-main.h
3033
3034 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3035
3036         * interp.c (sim_monitor): Add SD argument.
3037         (sim_warning): Delete.  Replace calls with calls to
3038         sim_io_eprintf.
3039         (sim_error): Delete. Replace calls with sim_io_error.
3040         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3041         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3042         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3043         argument.
3044         (mips_size): Rename from sim_size. Add SD argument.
3045
3046         * interp.c (simulator): Delete global variable.
3047         (callback): Delete global variable.
3048         (mips_option_handler, sim_open, sim_write, sim_read,
3049         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3050         sim_size,sim_monitor): Use sim_io_* not callback->*.
3051         (sim_open): ZALLOC simulator struct.
3052         (PROFILE): Do not define.
3053
3054 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3055
3056         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3057         support.h with corresponding code.
3058
3059         * sim-main.h (word64, uword64), support.h: Move definition to
3060         sim-main.h.
3061         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3062
3063         * support.h: Delete
3064         * Makefile.in: Update dependencies
3065         * interp.c: Do not include.
3066
3067 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3068
3069         * interp.c (address_translation, load_memory, store_memory,
3070         cache_op): Rename to from AddressTranslation et.al., make global,
3071         add SD argument
3072
3073         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3074         CacheOp): Define.
3075
3076         * interp.c (SignalException): Rename to signal_exception, make
3077         global.
3078
3079         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3080
3081         * sim-main.h (SignalException, SignalExceptionInterrupt,
3082         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3083         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3084         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3085         Define.
3086
3087         * interp.c, support.h: Use.
3088
3089 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3090
3091         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3092         to value_fpr / store_fpr. Add SD argument.
3093         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3094         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3095
3096         * sim-main.h (ValueFPR, StoreFPR): Define.
3097
3098 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3099
3100         * interp.c (sim_engine_run): Check consistency between configure
3101         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3102         and HASFPU.
3103
3104         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3105         (mips_fpu): Configure WITH_FLOATING_POINT.
3106         (mips_endian): Configure WITH_TARGET_ENDIAN.
3107         * configure: Update.
3108
3109 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3110
3111         * configure: Regenerated to track ../common/aclocal.m4 changes.
3112
3113 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3114
3115         * configure: Regenerated.
3116
3117 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3118
3119         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3120
3121 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3122
3123         * gencode.c (print_igen_insn_models): Assume certain architectures
3124         include all mips* instructions.
3125         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3126         instruction.
3127
3128         * Makefile.in (tmp.igen): Add target. Generate igen input from
3129         gencode file.
3130
3131         * gencode.c (FEATURE_IGEN): Define.
3132         (main): Add --igen option.  Generate output in igen format.
3133         (process_instructions): Format output according to igen option.
3134         (print_igen_insn_format): New function.
3135         (print_igen_insn_models): New function.
3136         (process_instructions): Only issue warnings and ignore
3137         instructions when no FEATURE_IGEN.
3138
3139 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3140
3141         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3142         MIPS targets.
3143
3144 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3145
3146         * configure: Regenerated to track ../common/aclocal.m4 changes.
3147
3148 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3149
3150         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3151         SIM_RESERVED_BITS): Delete, moved to common.
3152         (SIM_EXTRA_CFLAGS): Update.
3153
3154 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3155
3156         * configure.in: Configure non-strict memory alignment.
3157         * configure: Regenerated to track ../common/aclocal.m4 changes.
3158
3159 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3160
3161         * configure: Regenerated to track ../common/aclocal.m4 changes.
3162
3163 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3164
3165         * gencode.c (SDBBP,DERET): Added (3900) insns.
3166         (RFE): Turn on for 3900.
3167         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3168         (dsstate): Made global.
3169         (SUBTARGET_R3900): Added.
3170         (CANCELDELAYSLOT): New.
3171         (SignalException): Ignore SystemCall rather than ignore and
3172         terminate.  Add DebugBreakPoint handling.
3173         (decode_coproc): New insns RFE, DERET; and new registers Debug
3174         and DEPC protected by SUBTARGET_R3900.
3175         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3176         bits explicitly.
3177         * Makefile.in,configure.in: Add mips subtarget option.
3178         * configure: Update.
3179
3180 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3181
3182         * gencode.c: Add r3900 (tx39).
3183
3184
3185 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3186
3187         * gencode.c (build_instruction): Don't need to subtract 4 for
3188         JALR, just 2.
3189
3190 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3191
3192         * interp.c: Correct some HASFPU problems.
3193
3194 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3195
3196         * configure: Regenerated to track ../common/aclocal.m4 changes.
3197
3198 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3199
3200         * interp.c (mips_options): Fix samples option short form, should
3201         be `x'.
3202
3203 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3204
3205         * interp.c (sim_info): Enable info code.  Was just returning.
3206
3207 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3208
3209         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3210         MFC0.
3211
3212 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3213
3214         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3215         constants.
3216         (build_instruction): Ditto for LL.
3217
3218 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3219
3220         * configure: Regenerated to track ../common/aclocal.m4 changes.
3221
3222 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * configure: Regenerated to track ../common/aclocal.m4 changes.
3225         * config.in: Ditto.
3226
3227 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3228
3229         * interp.c (sim_open): Add call to sim_analyze_program, update
3230         call to sim_config.
3231
3232 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3233
3234         * interp.c (sim_kill): Delete.
3235         (sim_create_inferior): Add ABFD argument. Set PC from same.
3236         (sim_load): Move code initializing trap handlers from here.
3237         (sim_open): To here.
3238         (sim_load): Delete, use sim-hload.c.
3239
3240         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3241
3242 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3243
3244         * configure: Regenerated to track ../common/aclocal.m4 changes.
3245         * config.in: Ditto.
3246
3247 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3248
3249         * interp.c (sim_open): Add ABFD argument.
3250         (sim_load): Move call to sim_config from here.
3251         (sim_open): To here.  Check return status.
3252
3253 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3254
3255         * gencode.c (build_instruction): Two arg MADD should
3256         not assign result to $0.
3257
3258 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3259
3260         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3261         * sim/mips/configure.in: Regenerate.
3262
3263 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3264
3265         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3266         signed8, unsigned8 et.al. types.
3267
3268         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3269         hosts when selecting subreg.
3270
3271 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3272
3273         * interp.c (sim_engine_run): Reset the ZERO register to zero
3274         regardless of FEATURE_WARN_ZERO.
3275         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3276
3277 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3278
3279         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3280         (SignalException): For BreakPoints ignore any mode bits and just
3281         save the PC.
3282         (SignalException): Always set the CAUSE register.
3283
3284 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3285
3286         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3287         exception has been taken.
3288
3289         * interp.c: Implement the ERET and mt/f sr instructions.
3290
3291 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3292
3293         * interp.c (SignalException): Don't bother restarting an
3294         interrupt.
3295
3296 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3297
3298         * interp.c (SignalException): Really take an interrupt.
3299         (interrupt_event): Only deliver interrupts when enabled.
3300
3301 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3302
3303         * interp.c (sim_info): Only print info when verbose.
3304         (sim_info) Use sim_io_printf for output.
3305
3306 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3307
3308         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3309         mips architectures.
3310
3311 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3312
3313         * interp.c (sim_do_command): Check for common commands if a
3314         simulator specific command fails.
3315
3316 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3317
3318         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3319         and simBE when DEBUG is defined.
3320
3321 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3322
3323         * interp.c (interrupt_event): New function.  Pass exception event
3324         onto exception handler.
3325
3326         * configure.in: Check for stdlib.h.
3327         * configure: Regenerate.
3328
3329         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3330         variable declaration.
3331         (build_instruction): Initialize memval1.
3332         (build_instruction): Add UNUSED attribute to byte, bigend,
3333         reverse.
3334         (build_operands): Ditto.
3335
3336         * interp.c: Fix GCC warnings.
3337         (sim_get_quit_code): Delete.
3338
3339         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3340         * Makefile.in: Ditto.
3341         * configure: Re-generate.
3342
3343         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3344
3345 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3346
3347         * interp.c (mips_option_handler): New function parse argumes using
3348         sim-options.
3349         (myname): Replace with STATE_MY_NAME.
3350         (sim_open): Delete check for host endianness - performed by
3351         sim_config.
3352         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3353         (sim_open): Move much of the initialization from here.
3354         (sim_load): To here.  After the image has been loaded and
3355         endianness set.
3356         (sim_open): Move ColdReset from here.
3357         (sim_create_inferior): To here.
3358         (sim_open): Make FP check less dependant on host endianness.
3359
3360         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3361         run.
3362         * interp.c (sim_set_callbacks): Delete.
3363
3364         * interp.c (membank, membank_base, membank_size): Replace with
3365         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3366         (sim_open): Remove call to callback->init. gdb/run do this.
3367
3368         * interp.c: Update
3369
3370         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3371
3372         * interp.c (big_endian_p): Delete, replaced by
3373         current_target_byte_order.
3374
3375 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3376
3377         * interp.c (host_read_long, host_read_word, host_swap_word,
3378         host_swap_long): Delete. Using common sim-endian.
3379         (sim_fetch_register, sim_store_register): Use H2T.
3380         (pipeline_ticks): Delete.  Handled by sim-events.
3381         (sim_info): Update.
3382         (sim_engine_run): Update.
3383
3384 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3385
3386         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3387         reason from here.
3388         (SignalException): To here. Signal using sim_engine_halt.
3389         (sim_stop_reason): Delete, moved to common.
3390
3391 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3392
3393         * interp.c (sim_open): Add callback argument.
3394         (sim_set_callbacks): Delete SIM_DESC argument.
3395         (sim_size): Ditto.
3396
3397 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3398
3399         * Makefile.in (SIM_OBJS): Add common modules.
3400
3401         * interp.c (sim_set_callbacks): Also set SD callback.
3402         (set_endianness, xfer_*, swap_*): Delete.
3403         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3404         Change to functions using sim-endian macros.
3405         (control_c, sim_stop): Delete, use common version.
3406         (simulate): Convert into.
3407         (sim_engine_run): This function.
3408         (sim_resume): Delete.
3409
3410         * interp.c (simulation): New variable - the simulator object.
3411         (sim_kind): Delete global - merged into simulation.
3412         (sim_load): Cleanup.  Move PC assignment from here.
3413         (sim_create_inferior): To here.
3414
3415         * sim-main.h: New file.
3416         * interp.c (sim-main.h): Include.
3417
3418 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3419
3420         * configure: Regenerated to track ../common/aclocal.m4 changes.
3421
3422 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3423
3424         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3425
3426 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3427
3428         * gencode.c (build_instruction): DIV instructions: check
3429         for division by zero and integer overflow before using
3430         host's division operation.
3431
3432 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3433
3434         * Makefile.in (SIM_OBJS): Add sim-load.o.
3435         * interp.c: #include bfd.h.
3436         (target_byte_order): Delete.
3437         (sim_kind, myname, big_endian_p): New static locals.
3438         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3439         after argument parsing.  Recognize -E arg, set endianness accordingly.
3440         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3441         load file into simulator.  Set PC from bfd.
3442         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3443         (set_endianness): Use big_endian_p instead of target_byte_order.
3444
3445 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3446
3447         * interp.c (sim_size): Delete prototype - conflicts with
3448         definition in remote-sim.h.  Correct definition.
3449
3450 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3451
3452         * configure: Regenerated to track ../common/aclocal.m4 changes.
3453         * config.in: Ditto.
3454
3455 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3456
3457         * interp.c (sim_open): New arg `kind'.
3458
3459         * configure: Regenerated to track ../common/aclocal.m4 changes.
3460
3461 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3462
3463         * configure: Regenerated to track ../common/aclocal.m4 changes.
3464
3465 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3466
3467         * interp.c (sim_open): Set optind to 0 before calling getopt.
3468
3469 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3470
3471         * configure: Regenerated to track ../common/aclocal.m4 changes.
3472
3473 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3474
3475         * interp.c : Replace uses of pr_addr with pr_uword64
3476         where the bit length is always 64 independent of SIM_ADDR.
3477         (pr_uword64) : added.
3478
3479 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3480
3481         * configure: Re-generate.
3482
3483 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3484
3485         * configure: Regenerate to track ../common/aclocal.m4 changes.
3486
3487 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3488
3489         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3490         in argv form.
3491         (other sim_*): New SIM_DESC argument.
3492
3493 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3494
3495         * interp.c: Fix printing of addresses for non-64-bit targets.
3496         (pr_addr): Add function to print address based on size.
3497
3498 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3499
3500         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3501
3502 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3503
3504         * gencode.c (build_mips16_operands): Correct computation of base
3505         address for extended PC relative instruction.
3506
3507 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3508
3509         * interp.c (mips16_entry): Add support for floating point cases.
3510         (SignalException): Pass floating point cases to mips16_entry.
3511         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3512         registers.
3513         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3514         or fmt_word.
3515         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3516         and then set the state to fmt_uninterpreted.
3517         (COP_SW): Temporarily set the state to fmt_word while calling
3518         ValueFPR.
3519
3520 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3521
3522         * gencode.c (build_instruction): The high order may be set in the
3523         comparison flags at any ISA level, not just ISA 4.
3524
3525 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3526
3527         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3528         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3529         * configure.in: sinclude ../common/aclocal.m4.
3530         * configure: Regenerated.
3531
3532 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3533
3534         * configure: Rebuild after change to aclocal.m4.
3535
3536 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3537
3538         * configure configure.in Makefile.in:  Update to new configure
3539         scheme which is more compatible with WinGDB builds.
3540         * configure.in:  Improve comment on how to run autoconf.
3541         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3542         * Makefile.in:  Use autoconf substitution to install common
3543         makefile fragment.
3544
3545 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3546
3547         * gencode.c (build_instruction): Use BigEndianCPU instead of
3548         ByteSwapMem.
3549
3550 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3551
3552         * interp.c (sim_monitor): Make output to stdout visible in
3553         wingdb's I/O log window.
3554
3555 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3556
3557         * support.h: Undo previous change to SIGTRAP
3558         and SIGQUIT values.
3559
3560 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3561
3562         * interp.c (store_word, load_word): New static functions.
3563         (mips16_entry): New static function.
3564         (SignalException): Look for mips16 entry and exit instructions.
3565         (simulate): Use the correct index when setting fpr_state after
3566         doing a pending move.
3567
3568 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3569
3570         * interp.c: Fix byte-swapping code throughout to work on
3571         both little- and big-endian hosts.
3572
3573 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3574
3575         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3576         with gdb/config/i386/xm-windows.h.
3577
3578 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3579
3580         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3581         that messes up arithmetic shifts.
3582
3583 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3584
3585         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3586         SIGTRAP and SIGQUIT for _WIN32.
3587
3588 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3589
3590         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3591         force a 64 bit multiplication.
3592         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3593         destination register is 0, since that is the default mips16 nop
3594         instruction.
3595
3596 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3597
3598         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3599         (build_endian_shift): Don't check proc64.
3600         (build_instruction): Always set memval to uword64.  Cast op2 to
3601         uword64 when shifting it left in memory instructions.  Always use
3602         the same code for stores--don't special case proc64.
3603
3604         * gencode.c (build_mips16_operands): Fix base PC value for PC
3605         relative operands.
3606         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3607         jal instruction.
3608         * interp.c (simJALDELAYSLOT): Define.
3609         (JALDELAYSLOT): Define.
3610         (INDELAYSLOT, INJALDELAYSLOT): Define.
3611         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3612
3613 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3614
3615         * interp.c (sim_open): add flush_cache as a PMON routine
3616         (sim_monitor): handle flush_cache by ignoring it
3617
3618 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3619
3620         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3621         BigEndianMem.
3622         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3623         (BigEndianMem): Rename to ByteSwapMem and change sense.
3624         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3625         BigEndianMem references to !ByteSwapMem.
3626         (set_endianness): New function, with prototype.
3627         (sim_open): Call set_endianness.
3628         (sim_info): Use simBE instead of BigEndianMem.
3629         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3630         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3631         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3632         ifdefs, keeping the prototype declaration.
3633         (swap_word): Rewrite correctly.
3634         (ColdReset): Delete references to CONFIG.  Delete endianness related
3635         code; moved to set_endianness.
3636
3637 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3638
3639         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3640         * interp.c (CHECKHILO): Define away.
3641         (simSIGINT): New macro.
3642         (membank_size): Increase from 1MB to 2MB.
3643         (control_c): New function.
3644         (sim_resume): Rename parameter signal to signal_number.  Add local
3645         variable prev.  Call signal before and after simulate.
3646         (sim_stop_reason): Add simSIGINT support.
3647         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3648         functions always.
3649         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3650         if logfh is NULL.
3651         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3652         a call to sim_warning.
3653
3654 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3655
3656         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3657         16 bit instructions.
3658
3659 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3660
3661         Add support for mips16 (16 bit MIPS implementation):
3662         * gencode.c (inst_type): Add mips16 instruction encoding types.
3663         (GETDATASIZEINSN): Define.
3664         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3665         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3666         mtlo.
3667         (MIPS16_DECODE): New table, for mips16 instructions.
3668         (bitmap_val): New static function.
3669         (struct mips16_op): Define.
3670         (mips16_op_table): New table, for mips16 operands.
3671         (build_mips16_operands): New static function.
3672         (process_instructions): If PC is odd, decode a mips16
3673         instruction.  Break out instruction handling into new
3674         build_instruction function.
3675         (build_instruction): New static function, broken out of
3676         process_instructions.  Check modifiers rather than flags for SHIFT
3677         bit count and m[ft]{hi,lo} direction.
3678         (usage): Pass program name to fprintf.
3679         (main): Remove unused variable this_option_optind.  Change
3680         ``*loptarg++'' to ``loptarg++''.
3681         (my_strtoul): Parenthesize && within ||.
3682         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3683         (simulate): If PC is odd, fetch a 16 bit instruction, and
3684         increment PC by 2 rather than 4.
3685         * configure.in: Add case for mips16*-*-*.
3686         * configure: Rebuild.
3687
3688 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3689
3690         * interp.c: Allow -t to enable tracing in standalone simulator.
3691         Fix garbage output in trace file and error messages.
3692
3693 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3694
3695         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3696         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3697         * configure.in: Simplify using macros in ../common/aclocal.m4.
3698         * configure: Regenerated.
3699         * tconfig.in: New file.
3700
3701 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3702
3703         * interp.c: Fix bugs in 64-bit port.
3704         Use ansi function declarations for msvc compiler.
3705         Initialize and test file pointer in trace code.
3706         Prevent duplicate definition of LAST_EMED_REGNUM.
3707
3708 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3709
3710         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3711
3712 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3713
3714         * interp.c (SignalException): Check for explicit terminating
3715         breakpoint value.
3716         * gencode.c: Pass instruction value through SignalException()
3717         calls for Trap, Breakpoint and Syscall.
3718
3719 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3720
3721         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3722         only used on those hosts that provide it.
3723         * configure.in: Add sqrt() to list of functions to be checked for.
3724         * config.in: Re-generated.
3725         * configure: Re-generated.
3726
3727 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3728
3729         * gencode.c (process_instructions): Call build_endian_shift when
3730         expanding STORE RIGHT, to fix swr.
3731         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3732         clear the high bits.
3733         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3734         Fix float to int conversions to produce signed values.
3735
3736 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3737
3738         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3739         (process_instructions): Correct handling of nor instruction.
3740         Correct shift count for 32 bit shift instructions. Correct sign
3741         extension for arithmetic shifts to not shift the number of bits in
3742         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3743         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3744         Fix madd.
3745         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3746         It's OK to have a mult follow a mult.  What's not OK is to have a
3747         mult follow an mfhi.
3748         (Convert): Comment out incorrect rounding code.
3749
3750 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3751
3752         * interp.c (sim_monitor): Improved monitor printf
3753         simulation. Tidied up simulator warnings, and added "--log" option
3754         for directing warning message output.
3755         * gencode.c: Use sim_warning() rather than WARNING macro.
3756
3757 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3758
3759         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3760         getopt1.o, rather than on gencode.c.  Link objects together.
3761         Don't link against -liberty.
3762         (gencode.o, getopt.o, getopt1.o): New targets.
3763         * gencode.c: Include <ctype.h> and "ansidecl.h".
3764         (AND): Undefine after including "ansidecl.h".
3765         (ULONG_MAX): Define if not defined.
3766         (OP_*): Don't define macros; now defined in opcode/mips.h.
3767         (main): Call my_strtoul rather than strtoul.
3768         (my_strtoul): New static function.
3769
3770 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3771
3772         * gencode.c (process_instructions):  Generate word64 and uword64
3773         instead of `long long' and `unsigned long long' data types.
3774         * interp.c:  #include sysdep.h to get signals, and define default
3775         for SIGBUS.
3776         * (Convert):  Work around for Visual-C++ compiler bug with type
3777         conversion.
3778         * support.h:  Make things compile under Visual-C++ by using
3779         __int64 instead of `long long'.  Change many refs to long long
3780         into word64/uword64 typedefs.
3781
3782 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3783
3784         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3785         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3786         (docdir): Removed.
3787         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3788         (AC_PROG_INSTALL): Added.
3789         (AC_PROG_CC): Moved to before configure.host call.
3790         * configure: Rebuilt.
3791
3792 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3793
3794         * configure.in: Define @SIMCONF@ depending on mips target.
3795         * configure: Rebuild.
3796         * Makefile.in (run): Add @SIMCONF@ to control simulator
3797         construction.
3798         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3799         * interp.c: Remove some debugging, provide more detailed error
3800         messages, update memory accesses to use LOADDRMASK.
3801
3802 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3803
3804         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3805         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3806         stamp-h.
3807         * configure: Rebuild.
3808         * config.in: New file, generated by autoheader.
3809         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3810         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3811         HAVE_ANINT and HAVE_AINT, as appropriate.
3812         * Makefile.in (run): Use @LIBS@ rather than -lm.
3813         (interp.o): Depend upon config.h.
3814         (Makefile): Just rebuild Makefile.
3815         (clean): Remove stamp-h.
3816         (mostlyclean): Make the same as clean, not as distclean.
3817         (config.h, stamp-h): New targets.
3818
3819 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3820
3821         * interp.c (ColdReset): Fix boolean test. Make all simulator
3822         globals static.
3823
3824 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3825
3826         * interp.c (xfer_direct_word, xfer_direct_long,
3827         swap_direct_word, swap_direct_long, xfer_big_word,
3828         xfer_big_long, xfer_little_word, xfer_little_long,
3829         swap_word,swap_long): Added.
3830         * interp.c (ColdReset): Provide function indirection to
3831         host<->simulated_target transfer routines.
3832         * interp.c (sim_store_register, sim_fetch_register): Updated to
3833         make use of indirected transfer routines.
3834
3835 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3836
3837         * gencode.c (process_instructions): Ensure FP ABS instruction
3838         recognised.
3839         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3840         system call support.
3841
3842 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3843
3844         * interp.c (sim_do_command): Complain if callback structure not
3845         initialised.
3846
3847 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3848
3849         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3850         support for Sun hosts.
3851         * Makefile.in (gencode): Ensure the host compiler and libraries
3852         used for cross-hosted build.
3853
3854 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3855
3856         * interp.c, gencode.c: Some more (TODO) tidying.
3857
3858 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3859
3860         * gencode.c, interp.c: Replaced explicit long long references with
3861         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3862         * support.h (SET64LO, SET64HI): Macros added.
3863
3864 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3865
3866         * configure: Regenerate with autoconf 2.7.
3867
3868 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3869
3870         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3871         * support.h: Remove superfluous "1" from #if.
3872         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3873
3874 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3875
3876         * interp.c (StoreFPR): Control UndefinedResult() call on
3877         WARN_RESULT manifest.
3878
3879 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3880
3881         * gencode.c: Tidied instruction decoding, and added FP instruction
3882         support.
3883
3884         * interp.c: Added dineroIII, and BSD profiling support. Also
3885         run-time FP handling.
3886
3887 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3888
3889         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3890         gencode.c, interp.c, support.h: created.