sim/mips/ChangeLog

   1 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
   4
   5 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * interp.c (sim_open): Switch to sim_state_alloc_extra.
   8         * micromips.igen: Change SD to mips_sim_state.
   9         * micromipsrun.c (sim_engine_run): Likewise.
  10         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
  11         (watch_options_install): Delete.
  12         (struct swatch): Delete.
  13         (struct sim_state): Delete.
  14         (struct mips_sim_state): New struct.
  15         (MIPS_SIM_STATE): Define.
  16
  17 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  18
  19         * interp.c: Replace config.h include with defs.h.
  20         * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
  21         dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
  22         Include defs.h.
  23
  24 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * config.in, configure: Regenerate.
  27
  28 2021-05-14  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * interp.c: Update include path.
  31
  32 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  33
  34         * dv-tx3904sio.c: Include stdlib.h.
  35
  36 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  37
  38         * configure.ac (hw_extra_devices): Inline contents into
  39         SIM_AC_OPTION_HARDWARE and delete.
  40         * configure: Regenerate.
  41
  42 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  43
  44         * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
  45         (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
  46         * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
  47         * configure: Regenerate.
  48
  49 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  50
  51         * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
  52
  53 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
  54
  55         * configure: Regenerate.
  56
  57 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * cp1.c (store_fcr): Mark static.
  60
  61 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * config.in, configure: Regenerate.
  64
  65 2021-04-23  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * configure.ac (hw_enabled): Delete.
  68         (SIM_AC_OPTION_HARDWARE): Delete first two args.
  69         * configure: Regenerate.
  70
  71 2021-04-22  Tom Tromey  <tom@tromey.com>
  72
  73         * configure, config.in: Rebuild.
  74
  75 2021-04-22  Tom Tromey  <tom@tromey.com>
  76
  77         * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
  78         Remove.
  79         (SIM_EXTRA_DEPS): New variable.
  80
  81 2021-04-22  Tom Tromey  <tom@tromey.com>
  82
  83         * configure: Rebuild.
  84
  85 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
  86
  87         * aclocal.m4: Regenerate.
  88
  89 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
  90
  91         * configure: Regenerate.
  92
  93 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
  94
  95         * configure: Regenerate.
  96
  97 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
  98
  99         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
 100
 101 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
 102
 103         * Makefile.in: Set ASAN_OPTIONS when running igen.
 104
 105 2021-04-04  Steve Ellcey  <sellcey@mips.com>
 106             Faraz Shahbazker  <fshahbazker@wavecomp.com>
 107
 108         * interp.c (sim_monitor): Add switch entries for unlink (13),
 109         lseek (14), and stat (15).
 110
 111 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * Makefile.in (../igen/igen): Delete rule.
 114         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
 115
 116 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * aclocal.m4, configure: Regenerate.
 119
 120 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * configure: Regenerate.
 123
 124 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * Makefile.in (SIM_EXTRA_ALL): Delete.
 127         (all): New target.
 128
 129 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
 132         * aclocal.m4, configure: Regenerate.
 133
 134 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
 135
 136         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
 137         * aclocal.m4, configure: Regenerate.
 138
 139 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 140
 141         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
 142
 143 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 144
 145         * configure: Regenerate.
 146
 147 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
 148
 149         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
 150
 151 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 152
 153         * config.in, configure: Regenerate.
 154         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
 155         and strings.h include.
 156
 157 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 158
 159         * configure: Regenerate.
 160
 161 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 162
 163         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
 164         * configure: Regenerate.
 165
 166 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 167
 168         * configure: Regenerate.
 169
 170 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * configure: Regenerate.
 173
 174 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 175
 176         *  sim-main.c: Include <stdlib.h>.
 177
 178 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 179
 180         * cp1.c: Include <stdlib.h>.
 181
 182 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 183
 184         * configure: Re-generate.
 185
 186 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 187
 188         * configure: Regenerate.
 189
 190 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 191
 192         PR sim/20808
 193         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 194         and SD to sd.
 195
 196 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 197
 198         PR sim/20809
 199         * mips.igen (check_u64): Enable for `r3900'.
 200
 201 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 204         STATE_PROG_BFD (sd).
 205         * configure: Regenerate.
 206
 207 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 208             Maciej W. Rozycki  <macro@imgtec.com>
 209
 210         PR sim/19441
 211         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 212         `micromips64' and `micromipsdsp' only.
 213         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 214         (do_micromips_jalr, do_micromips_jal): Likewise.
 215         (compute_movep_src_reg): Likewise.
 216         (compute_andi16_imm): Likewise.
 217         (convert_fmt_micromips): Likewise.
 218         (convert_fmt_micromips_cvt_d): Likewise.
 219         (convert_fmt_micromips_cvt_s): Likewise.
 220         (FMT_MICROMIPS): Likewise.
 221         (FMT_MICROMIPS_CVT_D): Likewise.
 222         (FMT_MICROMIPS_CVT_S): Likewise.
 223
 224 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 225
 226         * interp.c: Include elf-bfd.h.
 227         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 228         ELFCLASS32.
 229
 230 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 231
 232         * config.in, configure: Regenerate.
 233
 234 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * configure: Regenerate.
 237
 238 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 239
 240         * configure: Regenerate.
 241
 242 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 243
 244         * configure: Regenerate.
 245
 246 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 247
 248         * configure: Regenerate.
 249
 250 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 251
 252         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 253         * configure: Regenerate.
 254
 255 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 256
 257         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 258         * configure: Regenerate.
 259
 260 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 261
 262         * configure: Regenerate.
 263
 264 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 265
 266         * configure: Regenerate.
 267
 268 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 269
 270         * config.in, configure: Regenerate.
 271
 272 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 273
 274         * interp.c (sim_open): Mark argv const.
 275         (sim_create_inferior): Mark argv and env const.
 276
 277 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 278
 279         * configure: Regenerate.
 280
 281 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 282
 283         * interp.c (sim_open): Update sim_parse_args comment.
 284
 285 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 286
 287         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 288         * configure: Regenerate.
 289
 290 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 291
 292         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 293         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 294         * configure: Regenerate.
 295         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 296
 297 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 298
 299         * dv-tx3904cpu.c (CPU, SD): Delete.
 300
 301 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 302
 303         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 304         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 305         (sim_store_register): Rename to ...
 306         (mips_reg_store): ... this.  Delete local cpu var.
 307         Update sim_io_eprintf calls.
 308         (sim_fetch_register): Rename to ...
 309         (mips_reg_fetch): ... this.  Delete local cpu var.
 310         Update sim_io_eprintf calls.
 311
 312 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 313
 314         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 315
 316 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 317
 318         * config.in, configure: Regenerate.
 319
 320 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 321
 322         * interp.c (sim_write, sim_read): Delete.
 323         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 324         (load_word): Likewise.
 325         * micromips.igen (cache): Likewise.
 326         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 327         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 328         do_store_left, do_store_right, do_load_double, do_store_double):
 329         Likewise.
 330         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 331         (do_prefx): Likewise.
 332         * sim-main.c (address_translation, prefetch): Delete.
 333         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 334         paddr=vaddr.
 335         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 336         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 337         (LoadMemory, StoreMemory): Delete CCA arg.
 338
 339 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 340
 341         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 342         * configure: Regenerated.
 343
 344 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 345
 346         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 347         * tconfig.h: Delete.
 348
 349 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 350
 351         * tconfig.h (SIM_HANDLES_LMA): Delete.
 352
 353 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 354
 355         * sim-main.h (WITH_WATCHPOINTS): Delete.
 356
 357 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 358
 359         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 360
 361 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 362
 363         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 364
 365 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 366
 367         * micromips.igen (process_isa_mode): Fix left shift of negative
 368         value.
 369
 370 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 373
 374 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 377
 378 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 379
 380         * interp.c (sim_close): Rename to ...
 381         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 382         sim_io_shutdown.
 383         * sim-main.h (mips_sim_close): Declare.
 384         (SIM_CLOSE_HOOK): Define.
 385
 386 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 387             Ali Lown  <ali.lown@imgtec.com>
 388
 389         * Makefile.in (tmp-micromips): New rule.
 390         (tmp-mach-multi): Add support for micromips.
 391         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 392         that works for both mips64 and micromips64.
 393         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 394         micromips32.
 395         Add build support for micromips.
 396         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 397         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 398         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 399         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 400         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 401         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 402         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 403         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 404         Refactored instruction code to use these functions.
 405         * dsp2.igen: Refactored instruction code to use the new functions.
 406         * interp.c (decode_coproc): Refactored to work with any instruction
 407         encoding.
 408         (isa_mode): New variable
 409         (RSVD_INSTRUCTION): Changed to 0x00000039.
 410         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 411         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 412         * micromips.dc: New file.
 413         * micromips.igen: New file.
 414         * micromips16.dc: New file.
 415         * micromipsdsp.igen: New file.
 416         * micromipsrun.c: New file.
 417         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 418         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 419         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 420         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 421         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 422         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 423         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 424         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 425         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 426         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 427         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 428         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 429         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 430         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 431         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 432         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 433         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 434         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 435         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 436         instructions.
 437         Refactored instruction code to use these functions.
 438         (RSVD): Changed to use new reserved instruction.
 439         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 440         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 441         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 442         do_store_double):  Added micromips32 and micromips64 models.
 443         Added include for micromips.igen and micromipsdsp.igen
 444         Add micromips32 and micromips64 models.
 445         (DecodeCoproc): Updated to use new macro definition.
 446         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 447         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 448         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 449         Refactored instruction code to use these functions.
 450         * sim-main.h (CP0_operation): New enum.
 451         (DecodeCoproc): Updated macro.
 452         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 453         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 454         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 455         ISA_MODE_MICROMIPS): New defines.
 456         (sim_state): Add isa_mode field.
 457
 458 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 459
 460         * configure: Regenerate.
 461
 462 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 463
 464         * configure.ac: Change configure.in to configure.ac.
 465         * configure: Regenerate.
 466
 467 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 468
 469         * configure: Regenerate.
 470
 471 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 472
 473         * interp.c [TRACE]: Delete.
 474         (TRACE): Change to WITH_TRACE_ANY_P.
 475         [!WITH_TRACE_ANY_P] (open_trace): Define.
 476         (mips_option_handler, open_trace, sim_close, dotrace):
 477         Change defined(TRACE) to WITH_TRACE_ANY_P.
 478         (sim_open): Delete TRACE ifdef check.
 479         * sim-main.c (load_memory): Delete TRACE ifdef check.
 480         (store_memory): Likewise.
 481         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 482         [!WITH_TRACE_ANY_P] (dotrace): Define.
 483
 484 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 485
 486         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 487         comments.
 488
 489 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 490
 491         * sim-main.h (SIM_CPU): Delete.
 492
 493 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 494
 495         * sim-main.h (sim_cia): Delete.
 496
 497 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 498
 499         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 500         PU_PC_GET.
 501         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 502         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 503         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 504         CIA_SET to CPU_PC_SET.
 505         * sim-main.h (CIA_GET, CIA_SET): Delete.
 506
 507 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 508
 509         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 510         * sim-main.h (STATE_CPU): Delete.
 511
 512 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 513
 514         * configure: Regenerate.
 515
 516 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 517
 518         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 519         * interp.c (mips_pc_get, mips_pc_set): New functions.
 520         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 521         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 522         (sim_pc_get): Delete.
 523         * sim-main.h (SIM_CPU): Define.
 524         (struct sim_state): Change cpu to an array of pointers.
 525         (STATE_CPU): Drop &.
 526
 527 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 528
 529         * interp.c (mips_option_handler, open_trace, sim_close,
 530         sim_write, sim_read, sim_store_register, sim_fetch_register,
 531         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 532         prototypes.
 533         (sim_open): Convert old style prototype.  Change casts with
 534         sim_write to unsigned char *.
 535         (fetch_str): Change null to unsigned char, and change cast to
 536         unsigned char *.
 537         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 538         unsigned char *.
 539
 540 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 541
 542         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 543
 544 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 545
 546         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 547
 548 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 549
 550         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 551
 552 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 553
 554         * config.in, configure: Regenerate.
 555
 556 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 557
 558         * interp.c (sim_pc_get): New function.
 559
 560 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 561
 562         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 563         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 564
 565 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 566
 567         * configure: Regenerate.
 568
 569 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 570
 571         * configure: Regenerate.
 572
 573 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 574
 575         * configure: Regenerate.
 576         * configure.ac (mips_extra_objs): Delete.
 577         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 578         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 579
 580 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 581
 582         * configure: Regenerate.
 583         * configure.ac: Delete sim_hw checks for dv-sockser.
 584
 585 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 586
 587         * config.in, configure: Regenerate.
 588         * tconfig.in: Rename file ...
 589         * tconfig.h: ... here.
 590
 591 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 592
 593         * tconfig.in: Delete includes.
 594         [HAVE_DV_SOCKSER]: Delete.
 595
 596 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 597
 598         * Makefile.in (SIM_RUN_OBJS): Delete.
 599
 600 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 601
 602         * configure.ac (AC_CHECK_HEADERS): Delete.
 603         * aclocal.m4, configure: Regenerate.
 604
 605 2014-08-19  Alan Modra  <amodra@gmail.com>
 606
 607         * configure: Regenerate.
 608
 609 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 610
 611         * configure: Regenerate.
 612         * config.in: Regenerate.
 613
 614 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 615
 616         * configure: Regenerate.
 617
 618 2013-09-23  Alan Modra  <amodra@gmail.com>
 619
 620         * configure: Regenerate.
 621
 622 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 623
 624         * aclocal.m4, configure: Regenerate.
 625
 626 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 627
 628         * configure: Rebuild.
 629
 630 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 631
 632         * configure: Regenerate.
 633
 634 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 635
 636         * configure.ac: Address use of dv-sockser.o.
 637         * tconfig.in: Conditionalize use of dv_sockser_install.
 638         * configure: Regenerated.
 639         * config.in: Regenerated.
 640
 641 2012-10-04  Chao-ying Fu  <fu@mips.com>
 642             Steve Ellcey  <sellcey@mips.com>
 643
 644         * mips/mips3264r2.igen (rdhwr): New.
 645
 646 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 647
 648         * configure.ac: Always link against dv-sockser.o.
 649         * configure: Regenerate.
 650
 651 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 652
 653         * config.in, configure: Regenerate.
 654
 655 2012-05-18  Nick Clifton  <nickc@redhat.com>
 656
 657         PR 14072
 658         * interp.c: Include config.h before system header files.
 659
 660 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 661
 662         * aclocal.m4, config.in, configure: Regenerate.
 663
 664 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 665
 666         * aclocal.m4: New file.
 667         * configure: Regenerate.
 668
 669 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 670
 671         * configure: Regenerate after common/acinclude.m4 update.
 672
 673 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 674
 675         * configure.ac: Change include to common/acinclude.m4.
 676
 677 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 678
 679         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 680         call.  Replace common.m4 include with SIM_AC_COMMON.
 681         * configure: Regenerate.
 682
 683 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 684
 685         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 686         $(SIM_EXTRA_DEPS).
 687         (tmp-mach-multi): Exit early when igen fails.
 688
 689 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 690
 691         * interp.c (sim_do_command): Delete.
 692
 693 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 694
 695         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 696         (tx3904sio_fifo_reset): Likewise.
 697         * interp.c (sim_monitor): Likewise.
 698
 699 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 700
 701         * interp.c (sim_write): Add const to buffer arg.
 702
 703 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 704
 705         * interp.c: Don't include sysdep.h
 706
 707 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 708
 709         * configure: Regenerate.
 710
 711 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 712
 713         * config.in: Regenerate.
 714         * configure: Likewise.
 715
 716         * configure: Regenerate.
 717
 718 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 719
 720         * configure: Regenerate to track ../common/common.m4 changes.
 721         * config.in: Ditto.
 722
 723 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 724             Daniel Jacobowitz  <dan@codesourcery.com>
 725             Joseph Myers  <joseph@codesourcery.com>
 726
 727         * configure: Regenerate.
 728
 729 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 730
 731         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 732         that unconditionally allows fmt_ps.
 733         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 734         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 735         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 736         filter from 64,f to 32,f.
 737         (PREFX): Change filter from 64 to 32.
 738         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 739         that use do_load_double instead of do_load.  Make both LUXC1
 740         versions unpredictable if SizeFGR () != 64.
 741         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 742         instead of do_store.  Remove unused variable.  Make both SUXC1
 743         versions unpredictable if SizeFGR () != 64.
 744
 745 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 746
 747         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 748         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 749         shifts for that case.
 750
 751 2007-09-04  Nick Clifton  <nickc@redhat.com>
 752
 753         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 754         (display_mem_info): New static variable.
 755         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 756         (mips_options): Add info-memory and memory-info.
 757         (sim_open): After processing the command line and board
 758         specification, check display_mem_info.  If it is set then
 759         call the real handler for the --memory-info command line
 760         switch.
 761
 762 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 763
 764         * configure.ac: Change license of multi-run.c to GPL version 3.
 765         * configure: Regenerate.
 766
 767 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 768
 769         * configure.ac, configure: Revert last patch.
 770
 771 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 772
 773         * configure.ac (sim_mipsisa3264_configs): New variable.
 774         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 775         every configuration support all four targets, using the triplet to
 776         determine the default.
 777         * configure: Regenerate.
 778
 779 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 780
 781         * Makefile.in (m16run.o): New rule.
 782
 783 2007-05-15  Thiemo Seufer  <ths@mips.com>
 784
 785         * mips3264r2.igen (DSHD): Fix compile warning.
 786
 787 2007-05-14  Thiemo Seufer  <ths@mips.com>
 788
 789         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 790         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 791         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 792         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 793         for mips32r2.
 794
 795 2007-03-01  Thiemo Seufer  <ths@mips.com>
 796
 797         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 798         and mips64.
 799
 800 2007-02-20  Thiemo Seufer  <ths@mips.com>
 801
 802         * dsp.igen: Update copyright notice.
 803         * dsp2.igen: Fix copyright notice.
 804
 805 2007-02-20  Thiemo Seufer  <ths@mips.com>
 806             Chao-Ying Fu  <fu@mips.com>
 807
 808         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 809         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 810         Add dsp2 to sim_igen_machine.
 811         * configure: Regenerate.
 812         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 813         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 814         (mulq_rs.ph): Use do_ph_mulq.
 815         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 816         * mips.igen: Add dsp2 model and include dsp2.igen.
 817         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 818         for *mips32r2, *mips64r2, *dsp.
 819         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 820         for *mips32r2, *mips64r2, *dsp2.
 821         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 822
 823 2007-02-19  Thiemo Seufer  <ths@mips.com>
 824             Nigel Stephens  <nigel@mips.com>
 825
 826         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 827         jumps with hazard barrier.
 828
 829 2007-02-19  Thiemo Seufer  <ths@mips.com>
 830             Nigel Stephens  <nigel@mips.com>
 831
 832         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 833         after each call to sim_io_write.
 834
 835 2007-02-19  Thiemo Seufer  <ths@mips.com>
 836             Nigel Stephens  <nigel@mips.com>
 837
 838         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 839         supported by this simulator.
 840         (decode_coproc): Recognise additional CP0 Config registers
 841         correctly.
 842
 843 2007-02-19  Thiemo Seufer  <ths@mips.com>
 844             Nigel Stephens  <nigel@mips.com>
 845             David Ung  <davidu@mips.com>
 846
 847         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 848         uninterpreted formats. If fmt is one of the uninterpreted types
 849         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 850         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 851         (store_fpr): When writing an invalid odd register, set the
 852         matching even register to fmt_unknown, not the following register.
 853         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 854         the the memory window at offset 0 set by --memory-size command
 855         line option.
 856         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 857         point register.
 858         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 859         register.
 860         (sim_monitor): When returning the memory size to the MIPS
 861         application, use the value in STATE_MEM_SIZE, not an arbitrary
 862         hardcoded value.
 863         (cop_lw): Don' mess around with FPR_STATE, just pass
 864         fmt_uninterpreted_32 to StoreFPR.
 865         (cop_sw): Similarly.
 866         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 867         (cop_sd): Similarly.
 868         * mips.igen (not_word_value): Single version for mips32, mips64
 869         and mips16.
 870
 871 2007-02-19  Thiemo Seufer <ths@mips.com>
 872             Nigel Stephens  <nigel@mips.com>
 873
 874         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 875         MBytes.
 876
 877 2007-02-17  Thiemo Seufer  <ths@mips.com>
 878
 879         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 880         configuration.
 881         * configure: Regenerate.
 882
 883 2007-02-17  Thiemo Seufer  <ths@mips.com>
 884
 885         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 886         Add mdmx to sim_igen_machine.
 887         (mipsisa64*-*-*): Likewise. Remove dsp.
 888         (mipsisa32*-*-*): Remove dsp.
 889         * configure: Regenerate.
 890
 891 2007-02-13  Thiemo Seufer  <ths@mips.com>
 892
 893         * configure.ac: Add mips*-sde-elf* target.
 894         * configure: Regenerate.
 895
 896 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 897
 898         * acconfig.h: Remove.
 899         * config.in, configure: Regenerate.
 900
 901 2006-11-07  Thiemo Seufer  <ths@mips.com>
 902
 903         * dsp.igen (do_w_op): Fix compiler warning.
 904
 905 2006-08-29  Thiemo Seufer  <ths@mips.com>
 906             David Ung  <davidu@mips.com>
 907
 908         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 909         sim_igen_machine.
 910         * configure: Regenerate.
 911         * mips.igen (model): Add smartmips.
 912         (MADDU): Increment ACX if carry.
 913         (do_mult): Clear ACX.
 914         (ROR,RORV): Add smartmips.
 915         (include): Include smartmips.igen.
 916         * sim-main.h (ACX): Set to REGISTERS[89].
 917         * smartmips.igen: New file.
 918
 919 2006-08-29  Thiemo Seufer  <ths@mips.com>
 920             David Ung  <davidu@mips.com>
 921
 922         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 923         mips3264r2.igen. Add missing dependency rules.
 924         * m16e.igen: Support for mips16e save/restore instructions.
 925
 926 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 927
 928         * configure: Regenerated.
 929
 930 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 931
 932         * configure: Regenerated.
 933
 934 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 935
 936         * configure: Regenerated.
 937
 938 2006-05-15 Chao-ying Fu  <fu@mips.com>
 939
 940         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 941
 942 2006-04-18  Nick Clifton  <nickc@redhat.com>
 943
 944         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 945         statement.
 946
 947 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 948
 949         * configure: Regenerate.
 950
 951 2005-12-14  Chao-ying Fu  <fu@mips.com>
 952
 953         * Makefile.in (SIM_OBJS): Add dsp.o.
 954         (dsp.o): New dependency.
 955         (IGEN_INCLUDE): Add dsp.igen.
 956         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 957         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 958         * configure: Regenerate.
 959         * mips.igen: Add dsp model and include dsp.igen.
 960         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 961         because these instructions are extended in DSP ASE.
 962         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 963         adding 6 DSP accumulator registers and 1 DSP control register.
 964         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 965         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 966         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 967         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 968         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 969         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 970         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 971         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 972         DSPCR_CCOND_SMASK): New define.
 973         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 974         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 975
 976 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 977
 978         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 979
 980 2005-06-16  David Ung  <davidu@mips.com>
 981             Nigel Stephens  <nigel@mips.com>
 982
 983         * mips.igen: New mips16e model and include m16e.igen.
 984         (check_u64): Add mips16e tag.
 985         * m16e.igen: New file for MIPS16e instructions.
 986         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 987         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 988         models.
 989         * configure: Regenerate.
 990
 991 2005-05-26  David Ung  <davidu@mips.com>
 992
 993         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 994         tags to all instructions which are applicable to the new ISAs.
 995         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 996         vr.igen.
 997         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 998         instructions.
 999         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1000         to mips.igen.
1001         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1002         * configure: Regenerate.
1003
1004 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
1005
1006         * configure: Regenerate.
1007
1008 2005-01-14  Andrew Cagney  <cagney@gnu.org>
1009
1010         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
1011         explicit call to AC_CONFIG_HEADER.
1012         * configure: Regenerate.
1013
1014 2005-01-12  Andrew Cagney  <cagney@gnu.org>
1015
1016         * configure.ac: Update to use ../common/common.m4.
1017         * configure: Re-generate.
1018
1019 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
1020
1021         * configure: Regenerated to track ../common/aclocal.m4 changes.
1022
1023 2005-01-07  Andrew Cagney  <cagney@gnu.org>
1024
1025         * configure.ac: Rename configure.in, require autoconf 2.59.
1026         * configure: Re-generate.
1027
1028 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
1029
1030         * configure: Regenerate for ../common/aclocal.m4 update.
1031
1032 2004-09-24  Monika Chaddha  <monika@acmet.com>
1033
1034         Committed by Andrew Cagney.
1035         * m16.igen (CMP, CMPI): Fix assembler.
1036
1037 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
1038
1039         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1040         * configure: Regenerate.
1041
1042 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
1043
1044         * configure.in (sim_m16_machine): Include mipsIII.
1045         * configure: Regenerate.
1046
1047 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
1048
1049         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1050         from COP0_BADVADDR.
1051         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1052
1053 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
1054
1055         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1056
1057 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1058
1059         * mips.igen (check_fmt): Remove.
1060         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1061         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1062         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1063         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1064         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1065         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1066         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1067         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1068         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1069         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1070
1071 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1072
1073         * sb1.igen (check_sbx): New function.
1074         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1075
1076 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
1077             Richard Sandiford  <rsandifo@redhat.com>
1078
1079         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1080         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1081         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1082         separate implementations for mipsIV and mipsV.  Use new macros to
1083         determine whether the restrictions apply.
1084
1085 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1086
1087         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1088         (check_mult_hilo): Improve comments.
1089         (check_div_hilo): Likewise.  Also, fork off a new version
1090         to handle mips32/mips64 (since there are no hazards to check
1091         in MIPS32/MIPS64).
1092
1093 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1094
1095         * mips.igen (do_dmultx): Fix check for negative operands.
1096
1097 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1098
1099         * Makefile.in (SHELL): Make sure this is defined.
1100         (various): Use $(SHELL) whenever we invoke move-if-change.
1101
1102 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1103
1104         * cp1.c: Tweak attribution slightly.
1105         * cp1.h: Likewise.
1106         * mdmx.c: Likewise.
1107         * mdmx.igen: Likewise.
1108         * mips3d.igen: Likewise.
1109         * sb1.igen: Likewise.
1110
1111 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1112
1113         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1114         unsigned operands.
1115
1116 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1117
1118         * interp.c (sim_open): Rename _bfd to bfd.
1119         (sim_create_inferior): Ditto.
1120
1121 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1122
1123         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1124
1125 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1126
1127         * mips.igen (EI, DI): Remove.
1128
1129 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1130
1131         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1132
1133 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1134             Andrew Cagney  <ac131313@redhat.com>
1135             Gavin Romig-Koch  <gavin@redhat.com>
1136             Graydon Hoare  <graydon@redhat.com>
1137             Aldy Hernandez  <aldyh@redhat.com>
1138             Dave Brolley  <brolley@redhat.com>
1139             Chris Demetriou  <cgd@broadcom.com>
1140
1141         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1142         (sim_mach_default): New variable.
1143         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1144         Add a new simulator generator, MULTI.
1145         * configure: Regenerate.
1146         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1147         (multi-run.o): New dependency.
1148         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1149         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1150         (tmp-multi): Combine them.
1151         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1152         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1153         (distclean-extra): New rule.
1154         * sim-main.h: Include bfd.h.
1155         (MIPS_MACH): New macro.
1156         * mips.igen (vr4120, vr5400, vr5500): New models.
1157         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1158         * vr.igen: Replace with new version.
1159
1160 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1161
1162         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1163         * configure: Regenerate.
1164
1165 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1166
1167         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1168         * mips.igen: Remove all invocations of check_branch_bug and
1169         mark_branch_bug.
1170
1171 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1172
1173         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1174
1175 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1176
1177         * mips.igen (do_load_double, do_store_double): New functions.
1178         (LDC1, SDC1): Rename to...
1179         (LDC1b, SDC1b): respectively.
1180         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1181
1182 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1183
1184         * cp1.c (fp_recip2): Modify initialization expression so that
1185         GCC will recognize it as constant.
1186
1187 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1188
1189         * mdmx.c (SD_): Delete.
1190         (Unpredictable): Re-define, for now, to directly invoke
1191         unpredictable_action().
1192         (mdmx_acc_op): Fix error in .ob immediate handling.
1193
1194 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1195
1196         * interp.c (sim_firmware_command): Initialize `address'.
1197
1198 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1199
1200         * configure: Regenerated to track ../common/aclocal.m4 changes.
1201
1202 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1203             Ed Satterthwaite  <ehs@broadcom.com>
1204
1205         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1206         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1207         * mips.igen: Include mips3d.igen.
1208         (mips3d): New model name for MIPS-3D ASE instructions.
1209         (CVT.W.fmt): Don't use this instruction for word (source) format
1210         instructions.
1211         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1212         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1213         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1214         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1215         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1216         (RSquareRoot1, RSquareRoot2): New macros.
1217         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1218         (fp_rsqrt2): New functions.
1219         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1220         * configure: Regenerate.
1221
1222 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1223             Ed Satterthwaite  <ehs@broadcom.com>
1224
1225         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1226         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1227         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1228         (convert): Note that this function is not used for paired-single
1229         format conversions.
1230         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1231         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1232         (check_fmt_p): Enable paired-single support.
1233         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1234         (PUU.PS): New instructions.
1235         (CVT.S.fmt): Don't use this instruction for paired-single format
1236         destinations.
1237         * sim-main.h (FP_formats): New value 'fmt_ps.'
1238         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1239         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1240
1241 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1242
1243         * mips.igen: Fix formatting of function calls in
1244         many FP operations.
1245
1246 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1247
1248         * mips.igen (MOVN, MOVZ): Trace result.
1249         (TNEI): Print "tnei" as the opcode name in traces.
1250         (CEIL.W): Add disassembly string for traces.
1251         (RSQRT.fmt): Make location of disassembly string consistent
1252         with other instructions.
1253
1254 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1255
1256         * mips.igen (X): Delete unused function.
1257
1258 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1259
1260         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1261
1262 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1263             Ed Satterthwaite  <ehs@broadcom.com>
1264
1265         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1266         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1267         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1268         (fp_nmsub): New prototypes.
1269         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1270         (NegMultiplySub): New defines.
1271         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1272         (MADD.D, MADD.S): Replace with...
1273         (MADD.fmt): New instruction.
1274         (MSUB.D, MSUB.S): Replace with...
1275         (MSUB.fmt): New instruction.
1276         (NMADD.D, NMADD.S): Replace with...
1277         (NMADD.fmt): New instruction.
1278         (NMSUB.D, MSUB.S): Replace with...
1279         (NMSUB.fmt): New instruction.
1280
1281 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1282             Ed Satterthwaite  <ehs@broadcom.com>
1283
1284         * cp1.c: Fix more comment spelling and formatting.
1285         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1286         (denorm_mode): New function.
1287         (fpu_unary, fpu_binary): Round results after operation, collect
1288         status from rounding operations, and update the FCSR.
1289         (convert): Collect status from integer conversions and rounding
1290         operations, and update the FCSR.  Adjust NaN values that result
1291         from conversions.  Convert to use sim_io_eprintf rather than
1292         fprintf, and remove some debugging code.
1293         * cp1.h (fenr_FS): New define.
1294
1295 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1296
1297         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1298         rounding mode to sim FP rounding mode flag conversion code into...
1299         (rounding_mode): New function.
1300
1301 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1302
1303         * cp1.c: Clean up formatting of a few comments.
1304         (value_fpr): Reformat switch statement.
1305
1306 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1307             Ed Satterthwaite  <ehs@broadcom.com>
1308
1309         * cp1.h: New file.
1310         * sim-main.h: Include cp1.h.
1311         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1312         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1313         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1314         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1315         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1316         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1317         * cp1.c: Don't include sim-fpu.h; already included by
1318         sim-main.h.  Clean up formatting of some comments.
1319         (NaN, Equal, Less): Remove.
1320         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1321         (fp_cmp): New functions.
1322         * mips.igen (do_c_cond_fmt): Remove.
1323         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1324         Compare.  Add result tracing.
1325         (CxC1): Remove, replace with...
1326         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1327         (DMxC1): Remove, replace with...
1328         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1329         (MxC1): Remove, replace with...
1330         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1331
1332 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1333
1334         * sim-main.h (FGRIDX): Remove, replace all uses with...
1335         (FGR_BASE): New macro.
1336         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1337         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1338         (NR_FGR, FGR): Likewise.
1339         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1340         * mips.igen: Likewise.
1341
1342 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1343
1344         * cp1.c: Add an FSF Copyright notice to this file.
1345
1346 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1347             Ed Satterthwaite  <ehs@broadcom.com>
1348
1349         * cp1.c (Infinity): Remove.
1350         * sim-main.h (Infinity): Likewise.
1351
1352         * cp1.c (fp_unary, fp_binary): New functions.
1353         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1354         (fp_sqrt): New functions, implemented in terms of the above.
1355         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1356         (Recip, SquareRoot): Remove (replaced by functions above).
1357         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1358         (fp_recip, fp_sqrt): New prototypes.
1359         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1360         (Recip, SquareRoot): Replace prototypes with #defines which
1361         invoke the functions above.
1362
1363 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1364
1365         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1366         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1367         file, remove PARAMS from prototypes.
1368         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1369         simulator state arguments.
1370         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1371         pass simulator state arguments.
1372         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1373         (store_fpr, convert): Remove 'sd' argument.
1374         (value_fpr): Likewise.  Convert to use 'SD' instead.
1375
1376 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1377
1378         * cp1.c (Min, Max): Remove #if 0'd functions.
1379         * sim-main.h (Min, Max): Remove.
1380
1381 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1382
1383         * cp1.c: fix formatting of switch case and default labels.
1384         * interp.c: Likewise.
1385         * sim-main.c: Likewise.
1386
1387 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1388
1389         * cp1.c: Clean up comments which describe FP formats.
1390          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1391
1392 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1393             Ed Satterthwaite  <ehs@broadcom.com>
1394
1395         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1396         Broadcom SiByte SB-1 processor configurations.
1397         * configure: Regenerate.
1398         * sb1.igen: New file.
1399         * mips.igen: Include sb1.igen.
1400         (sb1): New model.
1401         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1402         * mdmx.igen: Add "sb1" model to all appropriate functions and
1403         instructions.
1404         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1405         (ob_func, ob_acc): Reference the above.
1406         (qh_acc): Adjust to keep the same size as ob_acc.
1407         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1408         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1409
1410 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1411
1412         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1413
1414 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1415             Ed Satterthwaite  <ehs@broadcom.com>
1416
1417         * mips.igen (mdmx): New (pseudo-)model.
1418         * mdmx.c, mdmx.igen: New files.
1419         * Makefile.in (SIM_OBJS): Add mdmx.o.
1420         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1421         New typedefs.
1422         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1423         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1424         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1425         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1426         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1427         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1428         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1429         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1430         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1431         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1432         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1433         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1434         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1435         (qh_fmtsel): New macros.
1436         (_sim_cpu): New member "acc".
1437         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1438         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1439
1440 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1441
1442         * interp.c: Use 'deprecated' rather than 'depreciated.'
1443         * sim-main.h: Likewise.
1444
1445 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1446
1447         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1448         which wouldn't compile anyway.
1449         * sim-main.h (unpredictable_action): New function prototype.
1450         (Unpredictable): Define to call igen function unpredictable().
1451         (NotWordValue): New macro to call igen function not_word_value().
1452         (UndefinedResult): Remove.
1453         * interp.c (undefined_result): Remove.
1454         (unpredictable_action): New function.
1455         * mips.igen (not_word_value, unpredictable): New functions.
1456         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1457         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1458         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1459         NotWordValue() to check for unpredictable inputs, then
1460         Unpredictable() to handle them.
1461
1462 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1463
1464         * mips.igen: Fix formatting of calls to Unpredictable().
1465
1466 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1467
1468         * interp.c (sim_open): Revert previous change.
1469
1470 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1471
1472         * interp.c (sim_open): Disable chunk of code that wrote code in
1473         vector table entries.
1474
1475 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1476
1477         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1478         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1479         unused definitions.
1480
1481 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1482
1483         * cp1.c: Fix many formatting issues.
1484
1485 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1486
1487         * cp1.c (fpu_format_name): New function to replace...
1488         (DOFMT): This.  Delete, and update all callers.
1489         (fpu_rounding_mode_name): New function to replace...
1490         (RMMODE): This.  Delete, and update all callers.
1491
1492 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1493
1494         * interp.c: Move FPU support routines from here to...
1495         * cp1.c: Here.  New file.
1496         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1497         (cp1.o): New target.
1498
1499 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1500
1501         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1502         * mips.igen (mips32, mips64): New models, add to all instructions
1503         and functions as appropriate.
1504         (loadstore_ea, check_u64): New variant for model mips64.
1505         (check_fmt_p): New variant for models mipsV and mips64, remove
1506         mipsV model marking fro other variant.
1507         (SLL) Rename to...
1508         (SLLa) this.
1509         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1510         for mips32 and mips64.
1511         (DCLO, DCLZ): New instructions for mips64.
1512
1513 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1514
1515         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1516         immediate or code as a hex value with the "%#lx" format.
1517         (ANDI): Likewise, and fix printed instruction name.
1518
1519 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1520
1521         * sim-main.h (UndefinedResult, Unpredictable): New macros
1522         which currently do nothing.
1523
1524 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1525
1526         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1527         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1528         (status_CU3): New definitions.
1529
1530         * sim-main.h (ExceptionCause): Add new values for MIPS32
1531         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1532         for DebugBreakPoint and NMIReset to note their status in
1533         MIPS32 and MIPS64.
1534         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1535         (SignalExceptionCacheErr): New exception macros.
1536
1537 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1538
1539         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1540         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1541         is always enabled.
1542         (SignalExceptionCoProcessorUnusable): Take as argument the
1543         unusable coprocessor number.
1544
1545 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1546
1547         * mips.igen: Fix formatting of all SignalException calls.
1548
1549 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1550
1551         * sim-main.h (SIGNEXTEND): Remove.
1552
1553 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1554
1555         * mips.igen: Remove gencode comment from top of file, fix
1556         spelling in another comment.
1557
1558 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1559
1560         * mips.igen (check_fmt, check_fmt_p): New functions to check
1561         whether specific floating point formats are usable.
1562         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1563         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1564         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1565         Use the new functions.
1566         (do_c_cond_fmt): Remove format checks...
1567         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1568
1569 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1570
1571         * mips.igen: Fix formatting of check_fpu calls.
1572
1573 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1574
1575         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1576
1577 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1578
1579         * mips.igen: Remove whitespace at end of lines.
1580
1581 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1582
1583         * mips.igen (loadstore_ea): New function to do effective
1584         address calculations.
1585         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1586         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1587         CACHE): Use loadstore_ea to do effective address computations.
1588
1589 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1590
1591         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1592         * mips.igen (LL, CxC1, MxC1): Likewise.
1593
1594 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1595
1596         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1597         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1598         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1599         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1600         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1601         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1602         Don't split opcode fields by hand, use the opcode field values
1603         provided by igen.
1604
1605 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1606
1607         * mips.igen (do_divu): Fix spacing.
1608
1609         * mips.igen (do_dsllv): Move to be right before DSLLV,
1610         to match the rest of the do_<shift> functions.
1611
1612 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1613
1614         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1615         DSRL32, do_dsrlv): Trace inputs and results.
1616
1617 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1618
1619         * mips.igen (CACHE): Provide instruction-printing string.
1620
1621         * interp.c (signal_exception): Comment tokens after #endif.
1622
1623 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1624
1625         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1626         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1627         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1628         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1629         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1630         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1631         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1632         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1633
1634 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1635
1636         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1637         instruction-printing string.
1638         (LWU): Use '64' as the filter flag.
1639
1640 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1641
1642         * mips.igen (SDXC1): Fix instruction-printing string.
1643
1644 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1645
1646         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1647         filter flags "32,f".
1648
1649 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1650
1651         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1652         as the filter flag.
1653
1654 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1655
1656         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1657         add a comma) so that it more closely match the MIPS ISA
1658         documentation opcode partitioning.
1659         (PREF): Put useful names on opcode fields, and include
1660         instruction-printing string.
1661
1662 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1663
1664         * mips.igen (check_u64): New function which in the future will
1665         check whether 64-bit instructions are usable and signal an
1666         exception if not.  Currently a no-op.
1667         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1668         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1669         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1670         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1671
1672         * mips.igen (check_fpu): New function which in the future will
1673         check whether FPU instructions are usable and signal an exception
1674         if not.  Currently a no-op.
1675         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1676         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1677         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1678         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1679         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1680         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1681         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1682         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1683
1684 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1685
1686         * mips.igen (do_load_left, do_load_right): Move to be immediately
1687         following do_load.
1688         (do_store_left, do_store_right): Move to be immediately following
1689         do_store.
1690
1691 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1692
1693         * mips.igen (mipsV): New model name.  Also, add it to
1694         all instructions and functions where it is appropriate.
1695
1696 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1697
1698         * mips.igen: For all functions and instructions, list model
1699         names that support that instruction one per line.
1700
1701 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1702
1703         * mips.igen: Add some additional comments about supported
1704         models, and about which instructions go where.
1705         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1706         order as is used in the rest of the file.
1707
1708 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1709
1710         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1711         indicating that ALU32_END or ALU64_END are there to check
1712         for overflow.
1713         (DADD): Likewise, but also remove previous comment about
1714         overflow checking.
1715
1716 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1717
1718         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1719         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1720         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1721         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1722         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1723         fields (i.e., add and move commas) so that they more closely
1724         match the MIPS ISA documentation opcode partitioning.
1725
1726 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1727
1728         * mips.igen (ADDI): Print immediate value.
1729         (BREAK): Print code.
1730         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1731         (SLL): Print "nop" specially, and don't run the code
1732         that does the shift for the "nop" case.
1733
1734 2001-11-17  Fred Fish  <fnf@redhat.com>
1735
1736         * sim-main.h (float_operation): Move enum declaration outside
1737         of _sim_cpu struct declaration.
1738
1739 2001-04-12  Jim Blandy  <jimb@redhat.com>
1740
1741         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1742         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1743         set of the FCSR.
1744         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1745         PENDING_FILL, and you can get the intended effect gracefully by
1746         calling PENDING_SCHED directly.
1747
1748 2001-02-23  Ben Elliston  <bje@redhat.com>
1749
1750         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1751         already defined elsewhere.
1752
1753 2001-02-19  Ben Elliston  <bje@redhat.com>
1754
1755         * sim-main.h (sim_monitor): Return an int.
1756         * interp.c (sim_monitor): Add return values.
1757         (signal_exception): Handle error conditions from sim_monitor.
1758
1759 2001-02-08  Ben Elliston  <bje@redhat.com>
1760
1761         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1762         (store_memory): Likewise, pass cia to sim_core_write*.
1763
1764 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1765
1766         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1767         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1768
1769 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1770
1771         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1772         * Makefile.in: Don't delete *.igen when cleaning directory.
1773
1774 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1775
1776         * m16.igen (break): Call SignalException not sim_engine_halt.
1777
1778 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1779
1780         From Jason Eckhardt:
1781         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1782
1783 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1784
1785         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1786
1787 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1788
1789         * mips.igen (do_dmultx): Fix typo.
1790
1791 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1792
1793         * configure: Regenerated to track ../common/aclocal.m4 changes.
1794
1795 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1796
1797         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1798
1799 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1800
1801         * sim-main.h (GPR_CLEAR): Define macro.
1802
1803 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1804
1805         * interp.c (decode_coproc): Output long using %lx and not %s.
1806
1807 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1808
1809         * interp.c (sim_open): Sort & extend dummy memory regions for
1810         --board=jmr3904 for eCos.
1811
1812 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1813
1814         * configure: Regenerated.
1815
1816 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1817
1818         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1819         calls, conditional on the simulator being in verbose mode.
1820
1821 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1822
1823         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1824         cache don't get ReservedInstruction traps.
1825
1826 1999-11-29  Mark Salter  <msalter@cygnus.com>
1827
1828         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1829         to clear status bits in sdisr register. This is how the hardware works.
1830
1831         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1832         being used by cygmon.
1833
1834 1999-11-11  Andrew Haley  <aph@cygnus.com>
1835
1836         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1837         instructions.
1838
1839 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1840
1841         * mips.igen (MULT): Correct previous mis-applied patch.
1842
1843 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1844
1845         * mips.igen (delayslot32): Handle sequence like
1846         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1847         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1848         (MULT): Actually pass the third register...
1849
1850 1999-09-03  Mark Salter  <msalter@cygnus.com>
1851
1852         * interp.c (sim_open): Added more memory aliases for additional
1853         hardware being touched by cygmon on jmr3904 board.
1854
1855 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1856
1857         * configure: Regenerated to track ../common/aclocal.m4 changes.
1858
1859 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1860
1861         * interp.c (sim_store_register): Handle case where client - GDB -
1862         specifies that a 4 byte register is 8 bytes in size.
1863         (sim_fetch_register): Ditto.
1864
1865 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1866
1867         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1868         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1869         (idt_monitor_base): Base address for IDT monitor traps.
1870         (pmon_monitor_base): Ditto for PMON.
1871         (lsipmon_monitor_base): Ditto for LSI PMON.
1872         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1873         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1874         (sim_firmware_command): New function.
1875         (mips_option_handler): Call it for OPTION_FIRMWARE.
1876         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1877         option was given, add no monitor by default.  Add BREAK hooks only if
1878         monitors are also there.
1879
1880 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1881
1882         * interp.c (sim_monitor): Flush output before reading input.
1883
1884 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1885
1886         * tconfig.in (SIM_HANDLES_LMA): Always define.
1887
1888 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1889
1890         From Mark Salter <msalter@cygnus.com>:
1891         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1892         (sim_open): Add setup for BSP board.
1893
1894 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1895
1896         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1897         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1898         them as unimplemented.
1899
1900 1999-05-08  Felix Lee  <flee@cygnus.com>
1901
1902         * configure: Regenerated to track ../common/aclocal.m4 changes.
1903
1904 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1905
1906         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1907
1908 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1909
1910         * configure.in: Any mips64vr5*-*-* target should have
1911         -DTARGET_ENABLE_FR=1.
1912         (default_endian): Any mips64vr*el-*-* target should default to
1913         LITTLE_ENDIAN.
1914         * configure: Re-generate.
1915
1916 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1917
1918         * mips.igen (ldl): Extend from _16_, not 32.
1919
1920 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1921
1922         * interp.c (sim_store_register): Force registers written to by GDB
1923         into an un-interpreted state.
1924
1925 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1926
1927         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1928         CPU, start periodic background I/O polls.
1929         (tx3904sio_poll): New function: periodic I/O poller.
1930
1931 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1932
1933         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1934
1935 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1936
1937         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1938         case statement.
1939
1940 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1941
1942         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1943         (load_word): Call SIM_CORE_SIGNAL hook on error.
1944         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1945         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1946         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1947         * sim-main.h (COP0_BADVADDR): Define.
1948         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1949         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1950         (_sim_cpu): Add exc_* fields to store register value snapshots.
1951         * mips.igen (*): Replace memory-related SignalException* calls
1952         with references to SIM_CORE_SIGNAL hook.
1953
1954         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1955         fix.
1956         * sim-main.c (*): Minor warning cleanups.
1957
1958 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1959
1960         * m16.igen (DADDIU5): Correct type-o.
1961
1962 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1963
1964         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1965         variables.
1966
1967 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1968
1969         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1970         to include path.
1971         (interp.o): Add dependency on itable.h
1972         (oengine.c, gencode): Delete remaining references.
1973         (BUILT_SRC_FROM_GEN): Clean up.
1974
1975 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1976
1977         * vr4run.c: New.
1978         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1979         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1980         tmp-run-hack) : New.
1981         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1982         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1983         Drop the "64" qualifier to get the HACK generator working.
1984         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1985         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1986         qualifier to get the hack generator working.
1987         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1988         (DSLL): Use do_dsll.
1989         (DSLLV): Use do_dsllv.
1990         (DSRA): Use do_dsra.
1991         (DSRL): Use do_dsrl.
1992         (DSRLV): Use do_dsrlv.
1993         (BC1): Move *vr4100 to get the HACK generator working.
1994         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1995         get the HACK generator working.
1996         (MACC) Rename to get the HACK generator working.
1997         (DMACC,MACCS,DMACCS): Add the 64.
1998
1999 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
2000
2001         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2002         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2003
2004 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
2005
2006     * mips/interp.c (DEBUG): Cleanups.
2007
2008 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
2009
2010         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2011         (tx3904sio_tickle): fflush after a stdout character output.
2012
2013 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
2014
2015         * interp.c (sim_close): Uninstall modules.
2016
2017 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2018
2019         * sim-main.h, interp.c (sim_monitor): Change to global
2020         function.
2021
2022 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2023
2024         * configure.in (vr4100): Only include vr4100 instructions in
2025         simulator.
2026         * configure: Re-generate.
2027         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2028
2029 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2030
2031         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2032         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2033         true alternative.
2034
2035         * configure.in (sim_default_gen, sim_use_gen): Replace with
2036         sim_gen.
2037         (--enable-sim-igen): Delete config option. Always using IGEN.
2038         * configure: Re-generate.
2039
2040         * Makefile.in (gencode): Kill, kill, kill.
2041         * gencode.c: Ditto.
2042
2043 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2044
2045         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2046         bit mips16 igen simulator.
2047         * configure: Re-generate.
2048
2049         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2050         as part of vr4100 ISA.
2051         * vr.igen: Mark all instructions as 64 bit only.
2052
2053 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2054
2055         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2056         Pacify GCC.
2057
2058 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2059
2060         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2061         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
2062         * configure: Re-generate.
2063
2064         * m16.igen (BREAK): Define breakpoint instruction.
2065         (JALX32): Mark instruction as mips16 and not r3900.
2066         * mips.igen (C.cond.fmt): Fix typo in instruction format.
2067
2068         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2069
2070 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2071
2072         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2073         insn as a debug breakpoint.
2074
2075         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2076         pending.slot_size.
2077         (PENDING_SCHED): Clean up trace statement.
2078         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2079         (PENDING_FILL): Delay write by only one cycle.
2080         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2081
2082         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2083         of pending writes.
2084         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2085         32 & 64.
2086         (pending_tick): Move incrementing of index to FOR statement.
2087         (pending_tick): Only update PENDING_OUT after a write has occured.
2088
2089         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2090         build simulator.
2091         * configure: Re-generate.
2092
2093         * interp.c (sim_engine_run OLD): Delete explicit call to
2094         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2095
2096 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2097
2098         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2099         interrupt level number to match changed SignalExceptionInterrupt
2100         macro.
2101
2102 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2103
2104         * interp.c: #include "itable.h" if WITH_IGEN.
2105         (get_insn_name): New function.
2106         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2107         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2108
2109 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2110
2111         * configure: Rebuilt to inhale new common/aclocal.m4.
2112
2113 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2114
2115         * dv-tx3904sio.c: Include sim-assert.h.
2116
2117 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2118
2119         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2120         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2121         Reorganize target-specific sim-hardware checks.
2122         * configure: rebuilt.
2123         * interp.c (sim_open): For tx39 target boards, set
2124         OPERATING_ENVIRONMENT, add tx3904sio devices.
2125         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2126         ROM executables.  Install dv-sockser into sim-modules list.
2127
2128         * dv-tx3904irc.c: Compiler warning clean-up.
2129         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2130         frequent hw-trace messages.
2131
2132 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2133
2134         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2135
2136 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2137
2138         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2139
2140         * vr.igen: New file.
2141         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2142         * mips.igen: Define vr4100 model. Include vr.igen.
2143 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2144
2145         * mips.igen (check_mf_hilo): Correct check.
2146
2147 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2148
2149         * sim-main.h (interrupt_event): Add prototype.
2150
2151         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2152         register_ptr, register_value.
2153         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2154
2155         * sim-main.h (tracefh): Make extern.
2156
2157 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2158
2159         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2160         Reduce unnecessarily high timer event frequency.
2161         * dv-tx3904cpu.c: Ditto for interrupt event.
2162
2163 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2164
2165         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2166         to allay warnings.
2167         (interrupt_event): Made non-static.
2168
2169         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2170         interchange of configuration values for external vs. internal
2171         clock dividers.
2172
2173 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2174
2175         * mips.igen (BREAK): Moved code to here for
2176         simulator-reserved break instructions.
2177         * gencode.c (build_instruction): Ditto.
2178         * interp.c (signal_exception): Code moved from here.  Non-
2179         reserved instructions now use exception vector, rather
2180         than halting sim.
2181         * sim-main.h: Moved magic constants to here.
2182
2183 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2184
2185         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2186         register upon non-zero interrupt event level, clear upon zero
2187         event value.
2188         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2189         by passing zero event value.
2190         (*_io_{read,write}_buffer): Endianness fixes.
2191         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2192         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2193
2194         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2195         serial I/O and timer module at base address 0xFFFF0000.
2196
2197 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2198
2199         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2200         and BigEndianCPU.
2201
2202 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2203
2204         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2205         parts.
2206         * configure: Update.
2207
2208 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2209
2210         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2211         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2212         * configure.in: Include tx3904tmr in hw_device list.
2213         * configure: Rebuilt.
2214         * interp.c (sim_open): Instantiate three timer instances.
2215         Fix address typo of tx3904irc instance.
2216
2217 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2218
2219         * interp.c (signal_exception): SystemCall exception now uses
2220         the exception vector.
2221
2222 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2223
2224         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2225         to allay warnings.
2226
2227 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2228
2229         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2230
2231 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2232
2233         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2234
2235         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2236         sim-main.h. Declare a struct hw_descriptor instead of struct
2237         hw_device_descriptor.
2238
2239 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2240
2241         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2242         right bits and then re-align left hand bytes to correct byte
2243         lanes.  Fix incorrect computation in do_store_left when loading
2244         bytes from second word.
2245
2246 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2247
2248         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2249         * interp.c (sim_open): Only create a device tree when HW is
2250         enabled.
2251
2252         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2253         * interp.c (signal_exception): Ditto.
2254
2255 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2256
2257         * gencode.c: Mark BEGEZALL as LIKELY.
2258
2259 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2260
2261         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2262         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2263
2264 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2265
2266         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2267         modules.  Recognize TX39 target with "mips*tx39" pattern.
2268         * configure: Rebuilt.
2269         * sim-main.h (*): Added many macros defining bits in
2270         TX39 control registers.
2271         (SignalInterrupt): Send actual PC instead of NULL.
2272         (SignalNMIReset): New exception type.
2273         * interp.c (board): New variable for future use to identify
2274         a particular board being simulated.
2275         (mips_option_handler,mips_options): Added "--board" option.
2276         (interrupt_event): Send actual PC.
2277         (sim_open): Make memory layout conditional on board setting.
2278         (signal_exception): Initial implementation of hardware interrupt
2279         handling.  Accept another break instruction variant for simulator
2280         exit.
2281         (decode_coproc): Implement RFE instruction for TX39.
2282         (mips.igen): Decode RFE instruction as such.
2283         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2284         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2285         bbegin to implement memory map.
2286         * dv-tx3904cpu.c: New file.
2287         * dv-tx3904irc.c: New file.
2288
2289 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2290
2291         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2292
2293 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2294
2295         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2296         with calls to check_div_hilo.
2297
2298 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2299
2300         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2301         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2302         Add special r3900 version of do_mult_hilo.
2303         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2304         with calls to check_mult_hilo.
2305         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2306         with calls to check_div_hilo.
2307
2308 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2309
2310         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2311         Document a replacement.
2312
2313 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2314
2315         * interp.c (sim_monitor): Make mon_printf work.
2316
2317 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2318
2319         * sim-main.h (INSN_NAME): New arg `cpu'.
2320
2321 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2322
2323         * configure: Regenerated to track ../common/aclocal.m4 changes.
2324
2325 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2326
2327         * configure: Regenerated to track ../common/aclocal.m4 changes.
2328         * config.in: Ditto.
2329
2330 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2331
2332         * acconfig.h: New file.
2333         * configure.in: Reverted change of Apr 24; use sinclude again.
2334
2335 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2336
2337         * configure: Regenerated to track ../common/aclocal.m4 changes.
2338         * config.in: Ditto.
2339
2340 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2341
2342         * configure.in: Don't call sinclude.
2343
2344 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2345
2346         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2347
2348 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2349
2350         * mips.igen (ERET): Implement.
2351
2352         * interp.c (decode_coproc): Return sign-extended EPC.
2353
2354         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2355
2356         * interp.c (signal_exception): Do not ignore Trap.
2357         (signal_exception): On TRAP, restart at exception address.
2358         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2359         (signal_exception): Update.
2360         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2361         so that TRAP instructions are caught.
2362
2363 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2364
2365         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2366         contains HI/LO access history.
2367         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2368         (HIACCESS, LOACCESS): Delete, replace with
2369         (HIHISTORY, LOHISTORY): New macros.
2370         (CHECKHILO): Delete all, moved to mips.igen
2371
2372         * gencode.c (build_instruction): Do not generate checks for
2373         correct HI/LO register usage.
2374
2375         * interp.c (old_engine_run): Delete checks for correct HI/LO
2376         register usage.
2377
2378         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2379         check_mf_cycles): New functions.
2380         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2381         do_divu, domultx, do_mult, do_multu): Use.
2382
2383         * tx.igen ("madd", "maddu"): Use.
2384
2385 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2386
2387         * mips.igen (DSRAV): Use function do_dsrav.
2388         (SRAV): Use new function do_srav.
2389
2390         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2391         (B): Sign extend 11 bit immediate.
2392         (EXT-B*): Shift 16 bit immediate left by 1.
2393         (ADDIU*): Don't sign extend immediate value.
2394
2395 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2396
2397         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2398
2399         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2400         functions.
2401
2402         * mips.igen (delayslot32, nullify_next_insn): New functions.
2403         (m16.igen): Always include.
2404         (do_*): Add more tracing.
2405
2406         * m16.igen (delayslot16): Add NIA argument, could be called by a
2407         32 bit MIPS16 instruction.
2408
2409         * interp.c (ifetch16): Move function from here.
2410         * sim-main.c (ifetch16): To here.
2411
2412         * sim-main.c (ifetch16, ifetch32): Update to match current
2413         implementations of LH, LW.
2414         (signal_exception): Don't print out incorrect hex value of illegal
2415         instruction.
2416
2417 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2420         instruction.
2421
2422         * m16.igen: Implement MIPS16 instructions.
2423
2424         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2425         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2426         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2427         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2428         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2429         bodies of corresponding code from 32 bit insn to these.  Also used
2430         by MIPS16 versions of functions.
2431
2432         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2433         (IMEM16): Drop NR argument from macro.
2434
2435 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2436
2437         * Makefile.in (SIM_OBJS): Add sim-main.o.
2438
2439         * sim-main.h (address_translation, load_memory, store_memory,
2440         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2441         as INLINE_SIM_MAIN.
2442         (pr_addr, pr_uword64): Declare.
2443         (sim-main.c): Include when H_REVEALS_MODULE_P.
2444
2445         * interp.c (address_translation, load_memory, store_memory,
2446         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2447         from here.
2448         * sim-main.c: To here. Fix compilation problems.
2449
2450         * configure.in: Enable inlining.
2451         * configure: Re-config.
2452
2453 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2454
2455         * configure: Regenerated to track ../common/aclocal.m4 changes.
2456
2457 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2458
2459         * mips.igen: Include tx.igen.
2460         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2461         * tx.igen: New file, contains MADD and MADDU.
2462
2463         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2464         the hardwired constant `7'.
2465         (store_memory): Ditto.
2466         (LOADDRMASK): Move definition to sim-main.h.
2467
2468         mips.igen (MTC0): Enable for r3900.
2469         (ADDU): Add trace.
2470
2471         mips.igen (do_load_byte): Delete.
2472         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2473         do_store_right): New functions.
2474         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2475
2476         configure.in: Let the tx39 use igen again.
2477         configure: Update.
2478
2479 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2480
2481         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2482         not an address sized quantity.  Return zero for cache sizes.
2483
2484 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2485
2486         * mips.igen (r3900): r3900 does not support 64 bit integer
2487         operations.
2488
2489 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2490
2491         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2492         than igen one.
2493         * configure : Rebuild.
2494
2495 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2496
2497         * configure: Regenerated to track ../common/aclocal.m4 changes.
2498
2499 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2500
2501         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2502
2503 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2504
2505         * configure: Regenerated to track ../common/aclocal.m4 changes.
2506         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2507
2508 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2509
2510         * configure: Regenerated to track ../common/aclocal.m4 changes.
2511
2512 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2513
2514         * interp.c (Max, Min): Comment out functions. Not yet used.
2515
2516 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2517
2518         * configure: Regenerated to track ../common/aclocal.m4 changes.
2519
2520 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2521
2522         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2523         configurable settings for stand-alone simulator.
2524
2525         * configure.in: Added X11 search, just in case.
2526
2527         * configure: Regenerated.
2528
2529 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2530
2531         * interp.c (sim_write, sim_read, load_memory, store_memory):
2532         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2533
2534 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2535
2536         * sim-main.h (GETFCC): Return an unsigned value.
2537
2538 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2539
2540         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2541         (DADD): Result destination is RD not RT.
2542
2543 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2544
2545         * sim-main.h (HIACCESS, LOACCESS): Always define.
2546
2547         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2548
2549         * interp.c (sim_info): Delete.
2550
2551 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2552
2553         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2554         (mips_option_handler): New argument `cpu'.
2555         (sim_open): Update call to sim_add_option_table.
2556
2557 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2558
2559         * mips.igen (CxC1): Add tracing.
2560
2561 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2562
2563         * sim-main.h (Max, Min): Declare.
2564
2565         * interp.c (Max, Min): New functions.
2566
2567         * mips.igen (BC1): Add tracing.
2568
2569 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2570
2571         * interp.c Added memory map for stack in vr4100
2572
2573 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2574
2575         * interp.c (load_memory): Add missing "break"'s.
2576
2577 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2578
2579         * interp.c (sim_store_register, sim_fetch_register): Pass in
2580         length parameter.  Return -1.
2581
2582 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2583
2584         * interp.c: Added hardware init hook, fixed warnings.
2585
2586 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2587
2588         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2589
2590 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2591
2592         * interp.c (ifetch16): New function.
2593
2594         * sim-main.h (IMEM32): Rename IMEM.
2595         (IMEM16_IMMED): Define.
2596         (IMEM16): Define.
2597         (DELAY_SLOT): Update.
2598
2599         * m16run.c (sim_engine_run): New file.
2600
2601         * m16.igen: All instructions except LB.
2602         (LB): Call do_load_byte.
2603         * mips.igen (do_load_byte): New function.
2604         (LB): Call do_load_byte.
2605
2606         * mips.igen: Move spec for insn bit size and high bit from here.
2607         * Makefile.in (tmp-igen, tmp-m16): To here.
2608
2609         * m16.dc: New file, decode mips16 instructions.
2610
2611         * Makefile.in (SIM_NO_ALL): Define.
2612         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2613
2614 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2615
2616         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2617         point unit to 32 bit registers.
2618         * configure: Re-generate.
2619
2620 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2621
2622         * configure.in (sim_use_gen): Make IGEN the default simulator
2623         generator for generic 32 and 64 bit mips targets.
2624         * configure: Re-generate.
2625
2626 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2629         bitsize.
2630
2631         * interp.c (sim_fetch_register, sim_store_register): Read/write
2632         FGR from correct location.
2633         (sim_open): Set size of FGR's according to
2634         WITH_TARGET_FLOATING_POINT_BITSIZE.
2635
2636         * sim-main.h (FGR): Store floating point registers in a separate
2637         array.
2638
2639 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2640
2641         * configure: Regenerated to track ../common/aclocal.m4 changes.
2642
2643 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2644
2645         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2646
2647         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2648
2649         * interp.c (pending_tick): New function.  Deliver pending writes.
2650
2651         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2652         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2653         it can handle mixed sized quantites and single bits.
2654
2655 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2656
2657         * interp.c (oengine.h): Do not include when building with IGEN.
2658         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2659         (sim_info): Ditto for PROCESSOR_64BIT.
2660         (sim_monitor): Replace ut_reg with unsigned_word.
2661         (*): Ditto for t_reg.
2662         (LOADDRMASK): Define.
2663         (sim_open): Remove defunct check that host FP is IEEE compliant,
2664         using software to emulate floating point.
2665         (value_fpr, ...): Always compile, was conditional on HASFPU.
2666
2667 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2668
2669         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2670         size.
2671
2672         * interp.c (SD, CPU): Define.
2673         (mips_option_handler): Set flags in each CPU.
2674         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2675         (sim_close): Do not clear STATE, deleted anyway.
2676         (sim_write, sim_read): Assume CPU zero's vm should be used for
2677         data transfers.
2678         (sim_create_inferior): Set the PC for all processors.
2679         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2680         argument.
2681         (mips16_entry): Pass correct nr of args to store_word, load_word.
2682         (ColdReset): Cold reset all cpu's.
2683         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2684         (sim_monitor, load_memory, store_memory, signal_exception): Use
2685         `CPU' instead of STATE_CPU.
2686
2687
2688         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2689         SD or CPU_.
2690
2691         * sim-main.h (signal_exception): Add sim_cpu arg.
2692         (SignalException*): Pass both SD and CPU to signal_exception.
2693         * interp.c (signal_exception): Update.
2694
2695         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2696         Ditto
2697         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2698         address_translation): Ditto
2699         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2700
2701 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2702
2703         * configure: Regenerated to track ../common/aclocal.m4 changes.
2704
2705 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2706
2707         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2708
2709         * mips.igen (model): Map processor names onto BFD name.
2710
2711         * sim-main.h (CPU_CIA): Delete.
2712         (SET_CIA, GET_CIA): Define
2713
2714 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2715
2716         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2717         regiser.
2718
2719         * configure.in (default_endian): Configure a big-endian simulator
2720         by default.
2721         * configure: Re-generate.
2722
2723 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2724
2725         * configure: Regenerated to track ../common/aclocal.m4 changes.
2726
2727 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2728
2729         * interp.c (sim_monitor): Handle Densan monitor outbyte
2730         and inbyte functions.
2731
2732 1997-12-29  Felix Lee  <flee@cygnus.com>
2733
2734         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2735
2736 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2737
2738         * Makefile.in (tmp-igen): Arrange for $zero to always be
2739         reset to zero after every instruction.
2740
2741 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2742
2743         * configure: Regenerated to track ../common/aclocal.m4 changes.
2744         * config.in: Ditto.
2745
2746 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2747
2748         * mips.igen (MSUB): Fix to work like MADD.
2749         * gencode.c (MSUB): Similarly.
2750
2751 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2752
2753         * configure: Regenerated to track ../common/aclocal.m4 changes.
2754
2755 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2756
2757         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2758
2759 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2760
2761         * sim-main.h (sim-fpu.h): Include.
2762
2763         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2764         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2765         using host independant sim_fpu module.
2766
2767 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2768
2769         * interp.c (signal_exception): Report internal errors with SIGABRT
2770         not SIGQUIT.
2771
2772         * sim-main.h (C0_CONFIG): New register.
2773         (signal.h): No longer include.
2774
2775         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2776
2777 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2778
2779         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2780
2781 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2782
2783         * mips.igen: Tag vr5000 instructions.
2784         (ANDI): Was missing mipsIV model, fix assembler syntax.
2785         (do_c_cond_fmt): New function.
2786         (C.cond.fmt): Handle mips I-III which do not support CC field
2787         separatly.
2788         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2789         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2790         in IV3.2 spec.
2791         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2792         vr5000 which saves LO in a GPR separatly.
2793
2794         * configure.in (enable-sim-igen): For vr5000, select vr5000
2795         specific instructions.
2796         * configure: Re-generate.
2797
2798 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2799
2800         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2801
2802         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2803         fmt_uninterpreted_64 bit cases to switch.  Convert to
2804         fmt_formatted,
2805
2806         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2807
2808         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2809         as specified in IV3.2 spec.
2810         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2811
2812 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2813
2814         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2815         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2816         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2817         PENDING_FILL versions of instructions.  Simplify.
2818         (X): New function.
2819         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2820         instructions.
2821         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2822         a signed value.
2823         (MTHI, MFHI): Disable code checking HI-LO.
2824
2825         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2826         global.
2827         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2828
2829 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * gencode.c (build_mips16_operands): Replace IPC with cia.
2832
2833         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2834         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2835         IPC to `cia'.
2836         (UndefinedResult): Replace function with macro/function
2837         combination.
2838         (sim_engine_run): Don't save PC in IPC.
2839
2840         * sim-main.h (IPC): Delete.
2841
2842
2843         * interp.c (signal_exception, store_word, load_word,
2844         address_translation, load_memory, store_memory, cache_op,
2845         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2846         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2847         current instruction address - cia - argument.
2848         (sim_read, sim_write): Call address_translation directly.
2849         (sim_engine_run): Rename variable vaddr to cia.
2850         (signal_exception): Pass cia to sim_monitor
2851
2852         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2853         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2854         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2855
2856         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2857         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2858         SIM_ASSERT.
2859
2860         * interp.c (signal_exception): Pass restart address to
2861         sim_engine_restart.
2862
2863         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2864         idecode.o): Add dependency.
2865
2866         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2867         Delete definitions
2868         (DELAY_SLOT): Update NIA not PC with branch address.
2869         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2870
2871         * mips.igen: Use CIA not PC in branch calculations.
2872         (illegal): Call SignalException.
2873         (BEQ, ADDIU): Fix assembler.
2874
2875 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2876
2877         * m16.igen (JALX): Was missing.
2878
2879         * configure.in (enable-sim-igen): New configuration option.
2880         * configure: Re-generate.
2881
2882         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2883
2884         * interp.c (load_memory, store_memory): Delete parameter RAW.
2885         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2886         bypassing {load,store}_memory.
2887
2888         * sim-main.h (ByteSwapMem): Delete definition.
2889
2890         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2891
2892         * interp.c (sim_do_command, sim_commands): Delete mips specific
2893         commands.  Handled by module sim-options.
2894
2895         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2896         (WITH_MODULO_MEMORY): Define.
2897
2898         * interp.c (sim_info): Delete code printing memory size.
2899
2900         * interp.c (mips_size): Nee sim_size, delete function.
2901         (power2): Delete.
2902         (monitor, monitor_base, monitor_size): Delete global variables.
2903         (sim_open, sim_close): Delete code creating monitor and other
2904         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2905         manage memory regions.
2906         (load_memory, store_memory): Use sim-core for memory model.
2907
2908         * interp.c (address_translation): Delete all memory map code
2909         except line forcing 32 bit addresses.
2910
2911 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2912
2913         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2914         trace options.
2915
2916         * interp.c (logfh, logfile): Delete globals.
2917         (sim_open, sim_close): Delete code opening & closing log file.
2918         (mips_option_handler): Delete -l and -n options.
2919         (OPTION mips_options): Ditto.
2920
2921         * interp.c (OPTION mips_options): Rename option trace to dinero.
2922         (mips_option_handler): Update.
2923
2924 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2925
2926         * interp.c (fetch_str): New function.
2927         (sim_monitor): Rewrite using sim_read & sim_write.
2928         (sim_open): Check magic number.
2929         (sim_open): Write monitor vectors into memory using sim_write.
2930         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2931         (sim_read, sim_write): Simplify - transfer data one byte at a
2932         time.
2933         (load_memory, store_memory): Clarify meaning of parameter RAW.
2934
2935         * sim-main.h (isHOST): Defete definition.
2936         (isTARGET): Mark as depreciated.
2937         (address_translation): Delete parameter HOST.
2938
2939         * interp.c (address_translation): Delete parameter HOST.
2940
2941 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2942
2943         * mips.igen:
2944
2945         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2946         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2947
2948 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2949
2950         * mips.igen: Add model filter field to records.
2951
2952 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2953
2954         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2955
2956         interp.c (sim_engine_run): Do not compile function sim_engine_run
2957         when WITH_IGEN == 1.
2958
2959         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2960         target architecture.
2961
2962         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2963         igen. Replace with configuration variables sim_igen_flags /
2964         sim_m16_flags.
2965
2966         * m16.igen: New file.  Copy mips16 insns here.
2967         * mips.igen: From here.
2968
2969 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2970
2971         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2972         to top.
2973         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2974
2975 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2976
2977         * gencode.c (build_instruction): Follow sim_write's lead in using
2978         BigEndianMem instead of !ByteSwapMem.
2979
2980 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2981
2982         * configure.in (sim_gen): Dependent on target, select type of
2983         generator.  Always select old style generator.
2984
2985         configure: Re-generate.
2986
2987         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2988         targets.
2989         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2990         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2991         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2992         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2993         SIM_@sim_gen@_*, set by autoconf.
2994
2995 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2996
2997         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2998
2999         * interp.c (ColdReset): Remove #ifdef HASFPU, check
3000         CURRENT_FLOATING_POINT instead.
3001
3002         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3003         (address_translation): Raise exception InstructionFetch when
3004         translation fails and isINSTRUCTION.
3005
3006         * interp.c (sim_open, sim_write, sim_monitor, store_word,
3007         sim_engine_run): Change type of of vaddr and paddr to
3008         address_word.
3009         (address_translation, prefetch, load_memory, store_memory,
3010         cache_op): Change type of vAddr and pAddr to address_word.
3011
3012         * gencode.c (build_instruction): Change type of vaddr and paddr to
3013         address_word.
3014
3015 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3016
3017         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3018         macro to obtain result of ALU op.
3019
3020 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3021
3022         * interp.c (sim_info): Call profile_print.
3023
3024 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3025
3026         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3027
3028         * sim-main.h (WITH_PROFILE): Do not define, defined in
3029         common/sim-config.h.  Use sim-profile module.
3030         (simPROFILE): Delete defintion.
3031
3032         * interp.c (PROFILE): Delete definition.
3033         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3034         (sim_close): Delete code writing profile histogram.
3035         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3036         Delete.
3037         (sim_engine_run): Delete code profiling the PC.
3038
3039 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3040
3041         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3042
3043         * interp.c (sim_monitor): Make register pointers of type
3044         unsigned_word*.
3045
3046         * sim-main.h: Make registers of type unsigned_word not
3047         signed_word.
3048
3049 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3050
3051         * interp.c (sync_operation): Rename from SyncOperation, make
3052         global, add SD argument.
3053         (prefetch): Rename from Prefetch, make global, add SD argument.
3054         (decode_coproc): Make global.
3055
3056         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3057
3058         * gencode.c (build_instruction): Generate DecodeCoproc not
3059         decode_coproc calls.
3060
3061         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3062         (SizeFGR): Move to sim-main.h
3063         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3064         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3065         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3066         sim-main.h.
3067         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3068         FP_RM_TOMINF, GETRM): Move to sim-main.h.
3069         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3070         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3071         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3072         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3073
3074         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3075         exception.
3076         (sim-alu.h): Include.
3077         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3078         (sim_cia): Typedef to instruction_address.
3079
3080 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3081
3082         * Makefile.in (interp.o): Rename generated file engine.c to
3083         oengine.c.
3084
3085         * interp.c: Update.
3086
3087 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3088
3089         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3090
3091 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3092
3093         * gencode.c (build_instruction): For "FPSQRT", output correct
3094         number of arguments to Recip.
3095
3096 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3097
3098         * Makefile.in (interp.o): Depends on sim-main.h
3099
3100         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3101
3102         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3103         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3104         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3105         STATE, DSSTATE): Define
3106         (GPR, FGRIDX, ..): Define.
3107
3108         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3109         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3110         (GPR, FGRIDX, ...): Delete macros.
3111
3112         * interp.c: Update names to match defines from sim-main.h
3113
3114 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3115
3116         * interp.c (sim_monitor): Add SD argument.
3117         (sim_warning): Delete.  Replace calls with calls to
3118         sim_io_eprintf.
3119         (sim_error): Delete. Replace calls with sim_io_error.
3120         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3121         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3122         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3123         argument.
3124         (mips_size): Rename from sim_size. Add SD argument.
3125
3126         * interp.c (simulator): Delete global variable.
3127         (callback): Delete global variable.
3128         (mips_option_handler, sim_open, sim_write, sim_read,
3129         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3130         sim_size,sim_monitor): Use sim_io_* not callback->*.
3131         (sim_open): ZALLOC simulator struct.
3132         (PROFILE): Do not define.
3133
3134 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3135
3136         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3137         support.h with corresponding code.
3138
3139         * sim-main.h (word64, uword64), support.h: Move definition to
3140         sim-main.h.
3141         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3142
3143         * support.h: Delete
3144         * Makefile.in: Update dependencies
3145         * interp.c: Do not include.
3146
3147 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3148
3149         * interp.c (address_translation, load_memory, store_memory,
3150         cache_op): Rename to from AddressTranslation et.al., make global,
3151         add SD argument
3152
3153         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3154         CacheOp): Define.
3155
3156         * interp.c (SignalException): Rename to signal_exception, make
3157         global.
3158
3159         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3160
3161         * sim-main.h (SignalException, SignalExceptionInterrupt,
3162         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3163         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3164         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3165         Define.
3166
3167         * interp.c, support.h: Use.
3168
3169 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3170
3171         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3172         to value_fpr / store_fpr. Add SD argument.
3173         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3174         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3175
3176         * sim-main.h (ValueFPR, StoreFPR): Define.
3177
3178 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3179
3180         * interp.c (sim_engine_run): Check consistency between configure
3181         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3182         and HASFPU.
3183
3184         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3185         (mips_fpu): Configure WITH_FLOATING_POINT.
3186         (mips_endian): Configure WITH_TARGET_ENDIAN.
3187         * configure: Update.
3188
3189 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3190
3191         * configure: Regenerated to track ../common/aclocal.m4 changes.
3192
3193 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3194
3195         * configure: Regenerated.
3196
3197 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3198
3199         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3200
3201 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3202
3203         * gencode.c (print_igen_insn_models): Assume certain architectures
3204         include all mips* instructions.
3205         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3206         instruction.
3207
3208         * Makefile.in (tmp.igen): Add target. Generate igen input from
3209         gencode file.
3210
3211         * gencode.c (FEATURE_IGEN): Define.
3212         (main): Add --igen option.  Generate output in igen format.
3213         (process_instructions): Format output according to igen option.
3214         (print_igen_insn_format): New function.
3215         (print_igen_insn_models): New function.
3216         (process_instructions): Only issue warnings and ignore
3217         instructions when no FEATURE_IGEN.
3218
3219 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3220
3221         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3222         MIPS targets.
3223
3224 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3225
3226         * configure: Regenerated to track ../common/aclocal.m4 changes.
3227
3228 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3229
3230         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3231         SIM_RESERVED_BITS): Delete, moved to common.
3232         (SIM_EXTRA_CFLAGS): Update.
3233
3234 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3235
3236         * configure.in: Configure non-strict memory alignment.
3237         * configure: Regenerated to track ../common/aclocal.m4 changes.
3238
3239 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3240
3241         * configure: Regenerated to track ../common/aclocal.m4 changes.
3242
3243 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3244
3245         * gencode.c (SDBBP,DERET): Added (3900) insns.
3246         (RFE): Turn on for 3900.
3247         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3248         (dsstate): Made global.
3249         (SUBTARGET_R3900): Added.
3250         (CANCELDELAYSLOT): New.
3251         (SignalException): Ignore SystemCall rather than ignore and
3252         terminate.  Add DebugBreakPoint handling.
3253         (decode_coproc): New insns RFE, DERET; and new registers Debug
3254         and DEPC protected by SUBTARGET_R3900.
3255         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3256         bits explicitly.
3257         * Makefile.in,configure.in: Add mips subtarget option.
3258         * configure: Update.
3259
3260 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3261
3262         * gencode.c: Add r3900 (tx39).
3263
3264
3265 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3266
3267         * gencode.c (build_instruction): Don't need to subtract 4 for
3268         JALR, just 2.
3269
3270 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3271
3272         * interp.c: Correct some HASFPU problems.
3273
3274 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3275
3276         * configure: Regenerated to track ../common/aclocal.m4 changes.
3277
3278 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3279
3280         * interp.c (mips_options): Fix samples option short form, should
3281         be `x'.
3282
3283 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3284
3285         * interp.c (sim_info): Enable info code.  Was just returning.
3286
3287 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3288
3289         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3290         MFC0.
3291
3292 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3293
3294         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3295         constants.
3296         (build_instruction): Ditto for LL.
3297
3298 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3299
3300         * configure: Regenerated to track ../common/aclocal.m4 changes.
3301
3302 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3303
3304         * configure: Regenerated to track ../common/aclocal.m4 changes.
3305         * config.in: Ditto.
3306
3307 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3308
3309         * interp.c (sim_open): Add call to sim_analyze_program, update
3310         call to sim_config.
3311
3312 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3313
3314         * interp.c (sim_kill): Delete.
3315         (sim_create_inferior): Add ABFD argument. Set PC from same.
3316         (sim_load): Move code initializing trap handlers from here.
3317         (sim_open): To here.
3318         (sim_load): Delete, use sim-hload.c.
3319
3320         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3321
3322 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3323
3324         * configure: Regenerated to track ../common/aclocal.m4 changes.
3325         * config.in: Ditto.
3326
3327 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3328
3329         * interp.c (sim_open): Add ABFD argument.
3330         (sim_load): Move call to sim_config from here.
3331         (sim_open): To here.  Check return status.
3332
3333 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3334
3335         * gencode.c (build_instruction): Two arg MADD should
3336         not assign result to $0.
3337
3338 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3339
3340         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3341         * sim/mips/configure.in: Regenerate.
3342
3343 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3344
3345         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3346         signed8, unsigned8 et.al. types.
3347
3348         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3349         hosts when selecting subreg.
3350
3351 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3352
3353         * interp.c (sim_engine_run): Reset the ZERO register to zero
3354         regardless of FEATURE_WARN_ZERO.
3355         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3356
3357 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3358
3359         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3360         (SignalException): For BreakPoints ignore any mode bits and just
3361         save the PC.
3362         (SignalException): Always set the CAUSE register.
3363
3364 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3365
3366         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3367         exception has been taken.
3368
3369         * interp.c: Implement the ERET and mt/f sr instructions.
3370
3371 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3372
3373         * interp.c (SignalException): Don't bother restarting an
3374         interrupt.
3375
3376 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3377
3378         * interp.c (SignalException): Really take an interrupt.
3379         (interrupt_event): Only deliver interrupts when enabled.
3380
3381 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3382
3383         * interp.c (sim_info): Only print info when verbose.
3384         (sim_info) Use sim_io_printf for output.
3385
3386 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3387
3388         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3389         mips architectures.
3390
3391 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3392
3393         * interp.c (sim_do_command): Check for common commands if a
3394         simulator specific command fails.
3395
3396 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3397
3398         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3399         and simBE when DEBUG is defined.
3400
3401 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3402
3403         * interp.c (interrupt_event): New function.  Pass exception event
3404         onto exception handler.
3405
3406         * configure.in: Check for stdlib.h.
3407         * configure: Regenerate.
3408
3409         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3410         variable declaration.
3411         (build_instruction): Initialize memval1.
3412         (build_instruction): Add UNUSED attribute to byte, bigend,
3413         reverse.
3414         (build_operands): Ditto.
3415
3416         * interp.c: Fix GCC warnings.
3417         (sim_get_quit_code): Delete.
3418
3419         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3420         * Makefile.in: Ditto.
3421         * configure: Re-generate.
3422
3423         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3424
3425 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3426
3427         * interp.c (mips_option_handler): New function parse argumes using
3428         sim-options.
3429         (myname): Replace with STATE_MY_NAME.
3430         (sim_open): Delete check for host endianness - performed by
3431         sim_config.
3432         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3433         (sim_open): Move much of the initialization from here.
3434         (sim_load): To here.  After the image has been loaded and
3435         endianness set.
3436         (sim_open): Move ColdReset from here.
3437         (sim_create_inferior): To here.
3438         (sim_open): Make FP check less dependant on host endianness.
3439
3440         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3441         run.
3442         * interp.c (sim_set_callbacks): Delete.
3443
3444         * interp.c (membank, membank_base, membank_size): Replace with
3445         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3446         (sim_open): Remove call to callback->init. gdb/run do this.
3447
3448         * interp.c: Update
3449
3450         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3451
3452         * interp.c (big_endian_p): Delete, replaced by
3453         current_target_byte_order.
3454
3455 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3456
3457         * interp.c (host_read_long, host_read_word, host_swap_word,
3458         host_swap_long): Delete. Using common sim-endian.
3459         (sim_fetch_register, sim_store_register): Use H2T.
3460         (pipeline_ticks): Delete.  Handled by sim-events.
3461         (sim_info): Update.
3462         (sim_engine_run): Update.
3463
3464 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3465
3466         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3467         reason from here.
3468         (SignalException): To here. Signal using sim_engine_halt.
3469         (sim_stop_reason): Delete, moved to common.
3470
3471 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3472
3473         * interp.c (sim_open): Add callback argument.
3474         (sim_set_callbacks): Delete SIM_DESC argument.
3475         (sim_size): Ditto.
3476
3477 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3478
3479         * Makefile.in (SIM_OBJS): Add common modules.
3480
3481         * interp.c (sim_set_callbacks): Also set SD callback.
3482         (set_endianness, xfer_*, swap_*): Delete.
3483         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3484         Change to functions using sim-endian macros.
3485         (control_c, sim_stop): Delete, use common version.
3486         (simulate): Convert into.
3487         (sim_engine_run): This function.
3488         (sim_resume): Delete.
3489
3490         * interp.c (simulation): New variable - the simulator object.
3491         (sim_kind): Delete global - merged into simulation.
3492         (sim_load): Cleanup.  Move PC assignment from here.
3493         (sim_create_inferior): To here.
3494
3495         * sim-main.h: New file.
3496         * interp.c (sim-main.h): Include.
3497
3498 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3499
3500         * configure: Regenerated to track ../common/aclocal.m4 changes.
3501
3502 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3503
3504         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3505
3506 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3507
3508         * gencode.c (build_instruction): DIV instructions: check
3509         for division by zero and integer overflow before using
3510         host's division operation.
3511
3512 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3513
3514         * Makefile.in (SIM_OBJS): Add sim-load.o.
3515         * interp.c: #include bfd.h.
3516         (target_byte_order): Delete.
3517         (sim_kind, myname, big_endian_p): New static locals.
3518         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3519         after argument parsing.  Recognize -E arg, set endianness accordingly.
3520         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3521         load file into simulator.  Set PC from bfd.
3522         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3523         (set_endianness): Use big_endian_p instead of target_byte_order.
3524
3525 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3526
3527         * interp.c (sim_size): Delete prototype - conflicts with
3528         definition in remote-sim.h.  Correct definition.
3529
3530 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3531
3532         * configure: Regenerated to track ../common/aclocal.m4 changes.
3533         * config.in: Ditto.
3534
3535 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3536
3537         * interp.c (sim_open): New arg `kind'.
3538
3539         * configure: Regenerated to track ../common/aclocal.m4 changes.
3540
3541 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3542
3543         * configure: Regenerated to track ../common/aclocal.m4 changes.
3544
3545 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3546
3547         * interp.c (sim_open): Set optind to 0 before calling getopt.
3548
3549 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3550
3551         * configure: Regenerated to track ../common/aclocal.m4 changes.
3552
3553 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3554
3555         * interp.c : Replace uses of pr_addr with pr_uword64
3556         where the bit length is always 64 independent of SIM_ADDR.
3557         (pr_uword64) : added.
3558
3559 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3560
3561         * configure: Re-generate.
3562
3563 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3564
3565         * configure: Regenerate to track ../common/aclocal.m4 changes.
3566
3567 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3568
3569         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3570         in argv form.
3571         (other sim_*): New SIM_DESC argument.
3572
3573 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3574
3575         * interp.c: Fix printing of addresses for non-64-bit targets.
3576         (pr_addr): Add function to print address based on size.
3577
3578 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3579
3580         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3581
3582 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3583
3584         * gencode.c (build_mips16_operands): Correct computation of base
3585         address for extended PC relative instruction.
3586
3587 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3588
3589         * interp.c (mips16_entry): Add support for floating point cases.
3590         (SignalException): Pass floating point cases to mips16_entry.
3591         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3592         registers.
3593         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3594         or fmt_word.
3595         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3596         and then set the state to fmt_uninterpreted.
3597         (COP_SW): Temporarily set the state to fmt_word while calling
3598         ValueFPR.
3599
3600 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3601
3602         * gencode.c (build_instruction): The high order may be set in the
3603         comparison flags at any ISA level, not just ISA 4.
3604
3605 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3606
3607         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3608         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3609         * configure.in: sinclude ../common/aclocal.m4.
3610         * configure: Regenerated.
3611
3612 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3613
3614         * configure: Rebuild after change to aclocal.m4.
3615
3616 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3617
3618         * configure configure.in Makefile.in:  Update to new configure
3619         scheme which is more compatible with WinGDB builds.
3620         * configure.in:  Improve comment on how to run autoconf.
3621         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3622         * Makefile.in:  Use autoconf substitution to install common
3623         makefile fragment.
3624
3625 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3626
3627         * gencode.c (build_instruction): Use BigEndianCPU instead of
3628         ByteSwapMem.
3629
3630 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3631
3632         * interp.c (sim_monitor): Make output to stdout visible in
3633         wingdb's I/O log window.
3634
3635 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3636
3637         * support.h: Undo previous change to SIGTRAP
3638         and SIGQUIT values.
3639
3640 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3641
3642         * interp.c (store_word, load_word): New static functions.
3643         (mips16_entry): New static function.
3644         (SignalException): Look for mips16 entry and exit instructions.
3645         (simulate): Use the correct index when setting fpr_state after
3646         doing a pending move.
3647
3648 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3649
3650         * interp.c: Fix byte-swapping code throughout to work on
3651         both little- and big-endian hosts.
3652
3653 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3654
3655         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3656         with gdb/config/i386/xm-windows.h.
3657
3658 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3659
3660         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3661         that messes up arithmetic shifts.
3662
3663 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3664
3665         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3666         SIGTRAP and SIGQUIT for _WIN32.
3667
3668 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3669
3670         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3671         force a 64 bit multiplication.
3672         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3673         destination register is 0, since that is the default mips16 nop
3674         instruction.
3675
3676 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3677
3678         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3679         (build_endian_shift): Don't check proc64.
3680         (build_instruction): Always set memval to uword64.  Cast op2 to
3681         uword64 when shifting it left in memory instructions.  Always use
3682         the same code for stores--don't special case proc64.
3683
3684         * gencode.c (build_mips16_operands): Fix base PC value for PC
3685         relative operands.
3686         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3687         jal instruction.
3688         * interp.c (simJALDELAYSLOT): Define.
3689         (JALDELAYSLOT): Define.
3690         (INDELAYSLOT, INJALDELAYSLOT): Define.
3691         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3692
3693 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3694
3695         * interp.c (sim_open): add flush_cache as a PMON routine
3696         (sim_monitor): handle flush_cache by ignoring it
3697
3698 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3699
3700         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3701         BigEndianMem.
3702         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3703         (BigEndianMem): Rename to ByteSwapMem and change sense.
3704         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3705         BigEndianMem references to !ByteSwapMem.
3706         (set_endianness): New function, with prototype.
3707         (sim_open): Call set_endianness.
3708         (sim_info): Use simBE instead of BigEndianMem.
3709         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3710         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3711         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3712         ifdefs, keeping the prototype declaration.
3713         (swap_word): Rewrite correctly.
3714         (ColdReset): Delete references to CONFIG.  Delete endianness related
3715         code; moved to set_endianness.
3716
3717 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3718
3719         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3720         * interp.c (CHECKHILO): Define away.
3721         (simSIGINT): New macro.
3722         (membank_size): Increase from 1MB to 2MB.
3723         (control_c): New function.
3724         (sim_resume): Rename parameter signal to signal_number.  Add local
3725         variable prev.  Call signal before and after simulate.
3726         (sim_stop_reason): Add simSIGINT support.
3727         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3728         functions always.
3729         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3730         if logfh is NULL.
3731         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3732         a call to sim_warning.
3733
3734 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3735
3736         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3737         16 bit instructions.
3738
3739 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3740
3741         Add support for mips16 (16 bit MIPS implementation):
3742         * gencode.c (inst_type): Add mips16 instruction encoding types.
3743         (GETDATASIZEINSN): Define.
3744         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3745         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3746         mtlo.
3747         (MIPS16_DECODE): New table, for mips16 instructions.
3748         (bitmap_val): New static function.
3749         (struct mips16_op): Define.
3750         (mips16_op_table): New table, for mips16 operands.
3751         (build_mips16_operands): New static function.
3752         (process_instructions): If PC is odd, decode a mips16
3753         instruction.  Break out instruction handling into new
3754         build_instruction function.
3755         (build_instruction): New static function, broken out of
3756         process_instructions.  Check modifiers rather than flags for SHIFT
3757         bit count and m[ft]{hi,lo} direction.
3758         (usage): Pass program name to fprintf.
3759         (main): Remove unused variable this_option_optind.  Change
3760         ``*loptarg++'' to ``loptarg++''.
3761         (my_strtoul): Parenthesize && within ||.
3762         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3763         (simulate): If PC is odd, fetch a 16 bit instruction, and
3764         increment PC by 2 rather than 4.
3765         * configure.in: Add case for mips16*-*-*.
3766         * configure: Rebuild.
3767
3768 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3769
3770         * interp.c: Allow -t to enable tracing in standalone simulator.
3771         Fix garbage output in trace file and error messages.
3772
3773 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3774
3775         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3776         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3777         * configure.in: Simplify using macros in ../common/aclocal.m4.
3778         * configure: Regenerated.
3779         * tconfig.in: New file.
3780
3781 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3782
3783         * interp.c: Fix bugs in 64-bit port.
3784         Use ansi function declarations for msvc compiler.
3785         Initialize and test file pointer in trace code.
3786         Prevent duplicate definition of LAST_EMED_REGNUM.
3787
3788 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3789
3790         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3791
3792 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3793
3794         * interp.c (SignalException): Check for explicit terminating
3795         breakpoint value.
3796         * gencode.c: Pass instruction value through SignalException()
3797         calls for Trap, Breakpoint and Syscall.
3798
3799 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3800
3801         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3802         only used on those hosts that provide it.
3803         * configure.in: Add sqrt() to list of functions to be checked for.
3804         * config.in: Re-generated.
3805         * configure: Re-generated.
3806
3807 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3808
3809         * gencode.c (process_instructions): Call build_endian_shift when
3810         expanding STORE RIGHT, to fix swr.
3811         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3812         clear the high bits.
3813         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3814         Fix float to int conversions to produce signed values.
3815
3816 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3817
3818         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3819         (process_instructions): Correct handling of nor instruction.
3820         Correct shift count for 32 bit shift instructions. Correct sign
3821         extension for arithmetic shifts to not shift the number of bits in
3822         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3823         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3824         Fix madd.
3825         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3826         It's OK to have a mult follow a mult.  What's not OK is to have a
3827         mult follow an mfhi.
3828         (Convert): Comment out incorrect rounding code.
3829
3830 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3831
3832         * interp.c (sim_monitor): Improved monitor printf
3833         simulation. Tidied up simulator warnings, and added "--log" option
3834         for directing warning message output.
3835         * gencode.c: Use sim_warning() rather than WARNING macro.
3836
3837 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3838
3839         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3840         getopt1.o, rather than on gencode.c.  Link objects together.
3841         Don't link against -liberty.
3842         (gencode.o, getopt.o, getopt1.o): New targets.
3843         * gencode.c: Include <ctype.h> and "ansidecl.h".
3844         (AND): Undefine after including "ansidecl.h".
3845         (ULONG_MAX): Define if not defined.
3846         (OP_*): Don't define macros; now defined in opcode/mips.h.
3847         (main): Call my_strtoul rather than strtoul.
3848         (my_strtoul): New static function.
3849
3850 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3851
3852         * gencode.c (process_instructions):  Generate word64 and uword64
3853         instead of `long long' and `unsigned long long' data types.
3854         * interp.c:  #include sysdep.h to get signals, and define default
3855         for SIGBUS.
3856         * (Convert):  Work around for Visual-C++ compiler bug with type
3857         conversion.
3858         * support.h:  Make things compile under Visual-C++ by using
3859         __int64 instead of `long long'.  Change many refs to long long
3860         into word64/uword64 typedefs.
3861
3862 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3863
3864         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3865         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3866         (docdir): Removed.
3867         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3868         (AC_PROG_INSTALL): Added.
3869         (AC_PROG_CC): Moved to before configure.host call.
3870         * configure: Rebuilt.
3871
3872 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3873
3874         * configure.in: Define @SIMCONF@ depending on mips target.
3875         * configure: Rebuild.
3876         * Makefile.in (run): Add @SIMCONF@ to control simulator
3877         construction.
3878         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3879         * interp.c: Remove some debugging, provide more detailed error
3880         messages, update memory accesses to use LOADDRMASK.
3881
3882 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3883
3884         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3885         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3886         stamp-h.
3887         * configure: Rebuild.
3888         * config.in: New file, generated by autoheader.
3889         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3890         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3891         HAVE_ANINT and HAVE_AINT, as appropriate.
3892         * Makefile.in (run): Use @LIBS@ rather than -lm.
3893         (interp.o): Depend upon config.h.
3894         (Makefile): Just rebuild Makefile.
3895         (clean): Remove stamp-h.
3896         (mostlyclean): Make the same as clean, not as distclean.
3897         (config.h, stamp-h): New targets.
3898
3899 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3900
3901         * interp.c (ColdReset): Fix boolean test. Make all simulator
3902         globals static.
3903
3904 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3905
3906         * interp.c (xfer_direct_word, xfer_direct_long,
3907         swap_direct_word, swap_direct_long, xfer_big_word,
3908         xfer_big_long, xfer_little_word, xfer_little_long,
3909         swap_word,swap_long): Added.
3910         * interp.c (ColdReset): Provide function indirection to
3911         host<->simulated_target transfer routines.
3912         * interp.c (sim_store_register, sim_fetch_register): Updated to
3913         make use of indirected transfer routines.
3914
3915 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3916
3917         * gencode.c (process_instructions): Ensure FP ABS instruction
3918         recognised.
3919         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3920         system call support.
3921
3922 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3923
3924         * interp.c (sim_do_command): Complain if callback structure not
3925         initialised.
3926
3927 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3928
3929         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3930         support for Sun hosts.
3931         * Makefile.in (gencode): Ensure the host compiler and libraries
3932         used for cross-hosted build.
3933
3934 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3935
3936         * interp.c, gencode.c: Some more (TODO) tidying.
3937
3938 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3939
3940         * gencode.c, interp.c: Replaced explicit long long references with
3941         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3942         * support.h (SET64LO, SET64HI): Macros added.
3943
3944 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3945
3946         * configure: Regenerate with autoconf 2.7.
3947
3948 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3949
3950         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3951         * support.h: Remove superfluous "1" from #if.
3952         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3953
3954 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3955
3956         * interp.c (StoreFPR): Control UndefinedResult() call on
3957         WARN_RESULT manifest.
3958
3959 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3960
3961         * gencode.c: Tidied instruction decoding, and added FP instruction
3962         support.
3963
3964         * interp.c: Added dineroIII, and BSD profiling support. Also
3965         run-time FP handling.
3966
3967 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3968
3969         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3970         gencode.c, interp.c, support.h: created.