184c0f577415bb7e810356be0ed1939beddd84b3
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
1 # Makefile template for Configure for the MIPS simulator.
2 # Written by Cygnus Support.
3
4 ## COMMON_PRE_CONFIG_FRAG
5
6 srcdir=@srcdir@
7 srcroot=$(srcdir)/../../
8
9 SIM_NO_OBJ =
10
11 # start-sanitize-sky
12 SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
20 sky-vu.o \
21 sky-vu0.o \
22 sky-vu1.o \
23 sky-gdb.o
24 # end-sanitize-sky
25
26 SIM_IGEN_OBJ = \
27 support.o \
28 itable.o \
29 semantics.o \
30 idecode.o \
31 icache.o \
32 engine.o \
33 irun.o \
34
35 SIM_M16_OBJ = \
36 m16_support.o \
37 m16_semantics.o \
38 m16_idecode.o \
39 m16_icache.o \
40 \
41 m32_support.o \
42 m32_semantics.o \
43 m32_idecode.o \
44 m32_icache.o \
45 \
46 itable.o \
47 m16run.o \
48
49 MIPS_EXTRA_OBJS = @mips_extra_objs@
50 MIPS_EXTRA_LIBS = @mips_extra_libs@
51
52 SIM_OBJS = \
53 $(SIM_@sim_gen@_OBJ) \
54 $(SIM_NEW_COMMON_OBJS) \
55 $(MIPS_EXTRA_OBJS) \
56 interp.o \
57 sim-hload.o \
58 sim-engine.o \
59 sim-stop.o \
60 sim-resume.o \
61 sim-reason.o \
62
63
64 # List of flags to always pass to $(CC).
65 SIM_SUBTARGET=@SIM_SUBTARGET@
66
67 SIM_NO_CFLAGS = -DWITH_IGEN=0
68 SIM_IGEN_CFLAGS = -DWITH_IGEN=1
69 SIM_M16_CFLAGS = -DWITH_IGEN=1
70
71 # FIXME: Hack to find syscall.h? Better support for syscall.h
72 # is in progress.
73 SIM_EXTRA_CFLAGS = \
74 $(SIM_SUBTARGET) \
75 -I$(srcdir)/../../newlib/libc/sys/idt \
76 $(SIM_@sim_gen@_CFLAGS)
77
78 SIM_EXTRA_CLEAN = clean-extra
79
80 SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
81
82 SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
83
84 # List of main object files for `run'.
85 SIM_RUN_OBJS = nrun.o
86
87
88
89 ## COMMON_POST_CONFIG_FRAG
90
91 SIM_NO_INTERP = oengine.c
92 interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
93
94
95
96 #
97 # Old deprecated generator
98 #
99
100 SIM_NO_ALL = oengine.c
101
102 oengine.c: gencode
103 ./gencode @SIMCONF@ > tmp-oengine
104 mv tmp-oengine oengine.c
105
106 gencode: gencode.o getopt.o getopt1.o
107 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
108
109 gencode.o: $(srcdir)/gencode.c
110 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
111
112 getopt.o: $(srcdir)/../../libiberty/getopt.c
113 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
114 getopt1.o: $(srcdir)/../../libiberty/getopt1.c
115 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
116
117
118
119 ../igen/igen:
120 cd ../igen && $(MAKE)
121
122 IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
123 IGEN_INSN=$(srcdir)/mips.igen
124 IGEN_DC=$(srcdir)/mips.dc
125 M16_DC=$(srcdir)/m16.dc
126 IGEN_INCLUDE=\
127 $(start-sanitize-r5900) \
128 $(srcdir)/r5900.igen \
129 $(end-sanitize-r5900) \
130 $(start-sanitize-vr5400) \
131 $(srcdir)/vr5400.igen \
132 $(srcdir)/mdmx.igen \
133 $(end-sanitize-vr5400) \
134 $(start-sanitize-vr4320) \
135 $(srcdir)/vr4320.igen \
136 $(end-sanitize-vr4320) \
137 $(srcdir)/m16.igen
138
139 SIM_IGEN_ALL = tmp-igen
140
141 BUILT_SRC_FROM_IGEN = \
142 icache.h \
143 icache.c \
144 idecode.h \
145 idecode.c \
146 semantics.h \
147 semantics.c \
148 model.h \
149 model.c \
150 support.h \
151 support.c \
152 engine.h \
153 engine.c \
154 irun.c \
155
156 # NB: Since these can be built by either tmp-igen or tmp-m16
157 # they are explicitly marked as being dependant on the
158 # dependant on the selected generator.
159 BUILT_SRC_FROM_GEN = \
160 itable.h \
161 itable.c \
162
163 $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
164
165
166 $(BUILT_SRC_FROM_IGEN): tmp-igen
167
168 tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
169 cd ../igen && $(MAKE)
170 ../igen/igen \
171 $(IGEN_TRACE) \
172 -I $(srcdir) \
173 -Werror \
174 -Wnodiscard \
175 @sim_igen_flags@ \
176 -G gen-direct-access \
177 -G gen-zero-r0 \
178 -B 32 \
179 -H 31 \
180 -i $(IGEN_INSN) \
181 -o $(IGEN_DC) \
182 -x \
183 -n icache.h -hc tmp-icache.h \
184 -n icache.c -c tmp-icache.c \
185 -n semantics.h -hs tmp-semantics.h \
186 -n semantics.c -s tmp-semantics.c \
187 -n idecode.h -hd tmp-idecode.h \
188 -n idecode.c -d tmp-idecode.c \
189 -n model.h -hm tmp-model.h \
190 -n model.c -m tmp-model.c \
191 -n support.h -hf tmp-support.h \
192 -n support.c -f tmp-support.c \
193 -n itable.h -ht tmp-itable.h \
194 -n itable.c -t tmp-itable.c \
195 -n engine.h -he tmp-engine.h \
196 -n engine.c -e tmp-engine.c \
197 -n irun.c -r tmp-irun.c
198 $(srcdir)/../../move-if-change tmp-icache.h icache.h
199 $(srcdir)/../../move-if-change tmp-icache.c icache.c
200 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
201 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
202 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
203 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
204 $(srcdir)/../../move-if-change tmp-model.h model.h
205 $(srcdir)/../../move-if-change tmp-model.c model.c
206 $(srcdir)/../../move-if-change tmp-support.h support.h
207 $(srcdir)/../../move-if-change tmp-support.c support.c
208 $(srcdir)/../../move-if-change tmp-itable.h itable.h
209 $(srcdir)/../../move-if-change tmp-itable.c itable.c
210 $(srcdir)/../../move-if-change tmp-engine.h engine.h
211 $(srcdir)/../../move-if-change tmp-engine.c engine.c
212 $(srcdir)/../../move-if-change tmp-irun.c irun.c
213 touch tmp-igen
214
215 semantics.o: sim-main.h $(SIM_EXTRA_DEPS)
216 engine.o: sim-main.h $(SIM_EXTRA_DEPS)
217 support.o: sim-main.h $(SIM_EXTRA_DEPS)
218 idecode.o: sim-main.h $(SIM_EXTRA_DEPS)
219 itable.o: sim-main.h $(SIM_EXTRA_DEPS)
220
221
222
223 SIM_M16_ALL = tmp-m16
224
225 BUILT_SRC_FROM_M16 = \
226 m16_icache.h \
227 m16_icache.c \
228 m16_idecode.h \
229 m16_idecode.c \
230 m16_semantics.h \
231 m16_semantics.c \
232 m16_model.h \
233 m16_model.c \
234 m16_support.h \
235 m16_support.c \
236 \
237 m32_icache.h \
238 m32_icache.c \
239 m32_idecode.h \
240 m32_idecode.c \
241 m32_semantics.h \
242 m32_semantics.c \
243 m32_model.h \
244 m32_model.c \
245 m32_support.h \
246 m32_support.c \
247
248 $(BUILT_SRC_FROM_M16): tmp-m16
249
250 tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
251 cd ../igen && $(MAKE)
252 ../igen/igen \
253 $(IGEN_TRACE) \
254 -I $(srcdir) \
255 -Werror \
256 -Wnodiscard \
257 @sim_m16_flags@ \
258 -G gen-direct-access \
259 -G gen-zero-r0 \
260 -B 16 \
261 -H 15 \
262 -i $(IGEN_INSN) \
263 -o $(M16_DC) \
264 -P m16_ \
265 -x \
266 -n m16_icache.h -hc tmp-icache.h \
267 -n m16_icache.c -c tmp-icache.c \
268 -n m16_semantics.h -hs tmp-semantics.h \
269 -n m16_semantics.c -s tmp-semantics.c \
270 -n m16_idecode.h -hd tmp-idecode.h \
271 -n m16_idecode.c -d tmp-idecode.c \
272 -n m16_model.h -hm tmp-model.h \
273 -n m16_model.c -m tmp-model.c \
274 -n m16_support.h -hf tmp-support.h \
275 -n m16_support.c -f tmp-support.c \
276 #
277 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
278 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
279 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
280 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
281 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
282 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
283 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
284 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
285 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
286 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
287 ../igen/igen \
288 $(IGEN_TRACE) \
289 -I $(srcdir) \
290 -Werror \
291 -Wnodiscard \
292 @sim_igen_flags@ \
293 -G gen-direct-access \
294 -G gen-zero-r0 \
295 -B 32 \
296 -H 31 \
297 -i $(IGEN_INSN) \
298 -o $(IGEN_DC) \
299 -P m32_ \
300 -x \
301 -n m32_icache.h -hc tmp-icache.h \
302 -n m32_icache.c -c tmp-icache.c \
303 -n m32_semantics.h -hs tmp-semantics.h \
304 -n m32_semantics.c -s tmp-semantics.c \
305 -n m32_idecode.h -hd tmp-idecode.h \
306 -n m32_idecode.c -d tmp-idecode.c \
307 -n m32_model.h -hm tmp-model.h \
308 -n m32_model.c -m tmp-model.c \
309 -n m32_support.h -hf tmp-support.h \
310 -n m32_support.c -f tmp-support.c \
311 #
312 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
313 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
314 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
315 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
316 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
317 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
318 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
319 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
320 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
321 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
322 ../igen/igen \
323 $(IGEN_TRACE) \
324 -I $(srcdir) \
325 -Werror \
326 -Wnodiscard \
327 -Wnowidth \
328 @sim_igen_flags@ @sim_m16_flags@ \
329 -G gen-direct-access \
330 -G gen-zero-r0 \
331 -i $(IGEN_INSN) \
332 -n itable.h -ht tmp-itable.h \
333 -n itable.c -t tmp-itable.c \
334 #
335 $(srcdir)/../../move-if-change tmp-itable.h itable.h
336 $(srcdir)/../../move-if-change tmp-itable.c itable.c
337 touch tmp-m16
338
339
340 clean-extra:
341 rm -f gencode oengine.c tmp.igen
342 rm -f $(BUILT_SRC_FROM_GEN)
343 rm -f $(BUILT_SRC_FROM_IGEN)
344 rm -f $(BUILT_SRC_FROM_M16)
345 rm -f tmp-igen
346 rm -f tmp-m16
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