abfb81ad9607999fc0892a046dca9d4ab16ad822
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
1 # Makefile template for Configure for the MIPS simulator.
2 # Written by Cygnus Support.
3
4 ## COMMON_PRE_CONFIG_FRAG
5
6 srcdir=@srcdir@
7 srcroot=$(srcdir)/../../
8
9 SIM_NO_OBJ =
10
11 # start-sanitize-sky
12 SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
20 sky-vu.o \
21 sky-vu0.o \
22 sky-vu1.o \
23 sky-gs.o \
24 sky-gdb.o
25 # end-sanitize-sky
26
27 SIM_IGEN_OBJ = \
28 support.o \
29 itable.o \
30 semantics.o \
31 idecode.o \
32 icache.o \
33 engine.o \
34 irun.o \
35
36 SIM_M16_OBJ = \
37 m16_support.o \
38 m16_semantics.o \
39 m16_idecode.o \
40 m16_icache.o \
41 \
42 m32_support.o \
43 m32_semantics.o \
44 m32_idecode.o \
45 m32_icache.o \
46 \
47 itable.o \
48 m16run.o \
49
50 MIPS_EXTRA_OBJS = @mips_extra_objs@
51 MIPS_EXTRA_LIBS = @mips_extra_libs@
52
53 SIM_OBJS = \
54 $(SIM_@sim_gen@_OBJ) \
55 $(SIM_NEW_COMMON_OBJS) \
56 $(MIPS_EXTRA_OBJS) \
57 interp.o \
58 sim-hload.o \
59 sim-engine.o \
60 sim-stop.o \
61 sim-resume.o \
62 sim-reason.o \
63
64
65 # List of flags to always pass to $(CC).
66 SIM_SUBTARGET=@SIM_SUBTARGET@
67
68 SIM_NO_CFLAGS = -DWITH_IGEN=0
69 SIM_IGEN_CFLAGS = -DWITH_IGEN=1
70 SIM_M16_CFLAGS = -DWITH_IGEN=1
71
72 # FIXME: Hack to find syscall.h? Better support for syscall.h
73 # is in progress.
74 SIM_EXTRA_CFLAGS = \
75 $(SIM_SUBTARGET) \
76 -I$(srcdir)/../../newlib/libc/sys/idt \
77 $(SIM_@sim_gen@_CFLAGS)
78
79 SIM_EXTRA_CLEAN = clean-extra
80
81 SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
82
83 SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
84
85 # List of main object files for `run'.
86 SIM_RUN_OBJS = nrun.o
87
88
89
90 ## COMMON_POST_CONFIG_FRAG
91
92 SIM_NO_INTERP = oengine.c
93 interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
94
95
96
97 #
98 # Old deprecated generator
99 #
100
101 SIM_NO_ALL = oengine.c
102
103 oengine.c: gencode
104 ./gencode @SIMCONF@ > tmp-oengine
105 mv tmp-oengine oengine.c
106
107 gencode: gencode.o getopt.o getopt1.o
108 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
109
110 gencode.o: $(srcdir)/gencode.c
111 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
112
113 getopt.o: $(srcdir)/../../libiberty/getopt.c
114 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
115 getopt1.o: $(srcdir)/../../libiberty/getopt1.c
116 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
117
118
119
120 ../igen/igen:
121 cd ../igen && $(MAKE)
122
123 IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
124 IGEN_INSN=$(srcdir)/mips.igen
125 IGEN_DC=$(srcdir)/mips.dc
126 M16_DC=$(srcdir)/m16.dc
127 IGEN_INCLUDE=\
128 $(start-sanitize-r5900) \
129 $(srcdir)/r5900.igen \
130 $(end-sanitize-r5900) \
131 $(start-sanitize-vr5400) \
132 $(srcdir)/vr5400.igen \
133 $(srcdir)/mdmx.igen \
134 $(end-sanitize-vr5400) \
135 $(start-sanitize-vr4320) \
136 $(srcdir)/vr4320.igen \
137 $(end-sanitize-vr4320) \
138 $(srcdir)/m16.igen
139
140 SIM_IGEN_ALL = tmp-igen
141
142 BUILT_SRC_FROM_IGEN = \
143 icache.h \
144 icache.c \
145 idecode.h \
146 idecode.c \
147 semantics.h \
148 semantics.c \
149 model.h \
150 model.c \
151 support.h \
152 support.c \
153 engine.h \
154 engine.c \
155 irun.c \
156
157 # NB: Since these can be built by either tmp-igen or tmp-m16
158 # they are explicitly marked as being dependant on the
159 # dependant on the selected generator.
160 BUILT_SRC_FROM_GEN = \
161 itable.h \
162 itable.c \
163
164 $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
165
166
167 $(BUILT_SRC_FROM_IGEN): tmp-igen
168
169 tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
170 cd ../igen && $(MAKE)
171 ../igen/igen \
172 $(IGEN_TRACE) \
173 -I $(srcdir) \
174 -Werror \
175 -Wnodiscard \
176 @sim_igen_flags@ \
177 -G gen-direct-access \
178 -G gen-zero-r0 \
179 -B 32 \
180 -H 31 \
181 -i $(IGEN_INSN) \
182 -o $(IGEN_DC) \
183 -x \
184 -n icache.h -hc tmp-icache.h \
185 -n icache.c -c tmp-icache.c \
186 -n semantics.h -hs tmp-semantics.h \
187 -n semantics.c -s tmp-semantics.c \
188 -n idecode.h -hd tmp-idecode.h \
189 -n idecode.c -d tmp-idecode.c \
190 -n model.h -hm tmp-model.h \
191 -n model.c -m tmp-model.c \
192 -n support.h -hf tmp-support.h \
193 -n support.c -f tmp-support.c \
194 -n itable.h -ht tmp-itable.h \
195 -n itable.c -t tmp-itable.c \
196 -n engine.h -he tmp-engine.h \
197 -n engine.c -e tmp-engine.c \
198 -n irun.c -r tmp-irun.c
199 $(srcdir)/../../move-if-change tmp-icache.h icache.h
200 $(srcdir)/../../move-if-change tmp-icache.c icache.c
201 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
202 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
203 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
204 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
205 $(srcdir)/../../move-if-change tmp-model.h model.h
206 $(srcdir)/../../move-if-change tmp-model.c model.c
207 $(srcdir)/../../move-if-change tmp-support.h support.h
208 $(srcdir)/../../move-if-change tmp-support.c support.c
209 $(srcdir)/../../move-if-change tmp-itable.h itable.h
210 $(srcdir)/../../move-if-change tmp-itable.c itable.c
211 $(srcdir)/../../move-if-change tmp-engine.h engine.h
212 $(srcdir)/../../move-if-change tmp-engine.c engine.c
213 $(srcdir)/../../move-if-change tmp-irun.c irun.c
214 touch tmp-igen
215
216 semantics.o: sim-main.h $(SIM_EXTRA_DEPS)
217 engine.o: sim-main.h $(SIM_EXTRA_DEPS)
218 support.o: sim-main.h $(SIM_EXTRA_DEPS)
219 idecode.o: sim-main.h $(SIM_EXTRA_DEPS)
220 itable.o: sim-main.h $(SIM_EXTRA_DEPS)
221
222
223
224 SIM_M16_ALL = tmp-m16
225
226 BUILT_SRC_FROM_M16 = \
227 m16_icache.h \
228 m16_icache.c \
229 m16_idecode.h \
230 m16_idecode.c \
231 m16_semantics.h \
232 m16_semantics.c \
233 m16_model.h \
234 m16_model.c \
235 m16_support.h \
236 m16_support.c \
237 \
238 m32_icache.h \
239 m32_icache.c \
240 m32_idecode.h \
241 m32_idecode.c \
242 m32_semantics.h \
243 m32_semantics.c \
244 m32_model.h \
245 m32_model.c \
246 m32_support.h \
247 m32_support.c \
248
249 $(BUILT_SRC_FROM_M16): tmp-m16
250
251 tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
252 cd ../igen && $(MAKE)
253 ../igen/igen \
254 $(IGEN_TRACE) \
255 -I $(srcdir) \
256 -Werror \
257 -Wnodiscard \
258 @sim_m16_flags@ \
259 -G gen-direct-access \
260 -G gen-zero-r0 \
261 -B 16 \
262 -H 15 \
263 -i $(IGEN_INSN) \
264 -o $(M16_DC) \
265 -P m16_ \
266 -x \
267 -n m16_icache.h -hc tmp-icache.h \
268 -n m16_icache.c -c tmp-icache.c \
269 -n m16_semantics.h -hs tmp-semantics.h \
270 -n m16_semantics.c -s tmp-semantics.c \
271 -n m16_idecode.h -hd tmp-idecode.h \
272 -n m16_idecode.c -d tmp-idecode.c \
273 -n m16_model.h -hm tmp-model.h \
274 -n m16_model.c -m tmp-model.c \
275 -n m16_support.h -hf tmp-support.h \
276 -n m16_support.c -f tmp-support.c \
277 #
278 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
279 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
280 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
281 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
282 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
283 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
284 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
285 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
286 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
287 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
288 ../igen/igen \
289 $(IGEN_TRACE) \
290 -I $(srcdir) \
291 -Werror \
292 -Wnodiscard \
293 @sim_igen_flags@ \
294 -G gen-direct-access \
295 -G gen-zero-r0 \
296 -B 32 \
297 -H 31 \
298 -i $(IGEN_INSN) \
299 -o $(IGEN_DC) \
300 -P m32_ \
301 -x \
302 -n m32_icache.h -hc tmp-icache.h \
303 -n m32_icache.c -c tmp-icache.c \
304 -n m32_semantics.h -hs tmp-semantics.h \
305 -n m32_semantics.c -s tmp-semantics.c \
306 -n m32_idecode.h -hd tmp-idecode.h \
307 -n m32_idecode.c -d tmp-idecode.c \
308 -n m32_model.h -hm tmp-model.h \
309 -n m32_model.c -m tmp-model.c \
310 -n m32_support.h -hf tmp-support.h \
311 -n m32_support.c -f tmp-support.c \
312 #
313 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
314 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
315 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
316 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
317 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
318 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
319 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
320 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
321 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
322 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
323 ../igen/igen \
324 $(IGEN_TRACE) \
325 -I $(srcdir) \
326 -Werror \
327 -Wnodiscard \
328 -Wnowidth \
329 @sim_igen_flags@ @sim_m16_flags@ \
330 -G gen-direct-access \
331 -G gen-zero-r0 \
332 -i $(IGEN_INSN) \
333 -n itable.h -ht tmp-itable.h \
334 -n itable.c -t tmp-itable.c \
335 #
336 $(srcdir)/../../move-if-change tmp-itable.h itable.h
337 $(srcdir)/../../move-if-change tmp-itable.c itable.c
338 touch tmp-m16
339
340
341 clean-extra:
342 rm -f gencode oengine.c tmp.igen
343 rm -f $(BUILT_SRC_FROM_GEN)
344 rm -f $(BUILT_SRC_FROM_IGEN)
345 rm -f $(BUILT_SRC_FROM_M16)
346 rm -f tmp-igen
347 rm -f tmp-m16
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