1 # Makefile template for Configure for the MIPS simulator.
2 # Written by Cygnus Support.
4 ## COMMON_PRE_CONFIG_FRAG
7 srcroot
=$(srcdir)/..
/..
/
9 # Object files created by various simulator generators.
37 MIPS_EXTRA_OBJS
= @mips_extra_objs@
38 MIPS_EXTRA_LIBS
= @mips_extra_libs@
41 $(SIM_@sim_gen@_OBJ
) \
42 $(SIM_NEW_COMMON_OBJS
) \
55 # List of flags to always pass to $(CC).
56 SIM_SUBTARGET
=@SIM_SUBTARGET@
57 SIM_EXTRA_CFLAGS
= $(SIM_SUBTARGET
)
59 SIM_EXTRA_CLEAN
= clean-extra
61 SIM_EXTRA_ALL
= $(SIM_@sim_gen@_ALL
)
63 SIM_EXTRA_LIBS
= $(MIPS_EXTRA_LIBS
)
65 # List of main object files for `run'.
70 ## COMMON_POST_CONFIG_FRAG
72 interp.o
: $(srcdir)/interp.c config.h sim-main.h itable.h
73 cp1.o
: $(srcdir)/cp1.c config.h sim-main.h
75 mdmx.o
: $(srcdir)/mdmx.c
$(srcdir)/sim-main.h
80 IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
81 IGEN_INSN
=$(srcdir)/mips.igen
82 IGEN_DC
=$(srcdir)/mips.dc
83 M16_DC
=$(srcdir)/m16.dc
87 $(srcdir)/mips3d.igen \
92 # NB: Since these can be built by a number of generators, care
93 # must be taken to ensure that they are only dependant on
94 # one of those generators.
95 BUILT_SRC_FROM_GEN
= \
99 SIM_IGEN_ALL
= tmp-igen
100 SIM_M16_ALL
= tmp-m16
102 $(BUILT_SRC_FROM_GEN
): $(SIM_@sim_gen@_ALL
)
106 BUILT_SRC_FROM_IGEN
= \
121 $(BUILT_SRC_FROM_IGEN
): tmp-igen
123 tmp-igen
: $(IGEN_INSN
) $(IGEN_DC
) ..
/igen
/igen
$(IGEN_INCLUDE
)
124 cd ..
/igen
&& $(MAKE
)
131 -G gen-direct-access \
138 -n icache.h
-hc tmp-icache.h \
139 -n icache.c
-c tmp-icache.c \
140 -n semantics.h
-hs tmp-semantics.h \
141 -n semantics.c
-s tmp-semantics.c \
142 -n idecode.h
-hd tmp-idecode.h \
143 -n idecode.c
-d tmp-idecode.c \
144 -n model.h
-hm tmp-model.h \
145 -n model.c
-m tmp-model.c \
146 -n support.h
-hf tmp-support.h \
147 -n support.c
-f tmp-support.c \
148 -n itable.h
-ht tmp-itable.h \
149 -n itable.c
-t tmp-itable.c \
150 -n engine.h
-he tmp-engine.h \
151 -n engine.c
-e tmp-engine.c \
152 -n irun.c
-r tmp-irun.c
153 $(srcdir)/..
/..
/move-if-change tmp-icache.h icache.h
154 $(srcdir)/..
/..
/move-if-change tmp-icache.c icache.c
155 $(srcdir)/..
/..
/move-if-change tmp-idecode.h idecode.h
156 $(srcdir)/..
/..
/move-if-change tmp-idecode.c idecode.c
157 $(srcdir)/..
/..
/move-if-change tmp-semantics.h semantics.h
158 $(srcdir)/..
/..
/move-if-change tmp-semantics.c semantics.c
159 $(srcdir)/..
/..
/move-if-change tmp-model.h model.h
160 $(srcdir)/..
/..
/move-if-change tmp-model.c model.c
161 $(srcdir)/..
/..
/move-if-change tmp-support.h support.h
162 $(srcdir)/..
/..
/move-if-change tmp-support.c support.c
163 $(srcdir)/..
/..
/move-if-change tmp-itable.h itable.h
164 $(srcdir)/..
/..
/move-if-change tmp-itable.c itable.c
165 $(srcdir)/..
/..
/move-if-change tmp-engine.h engine.h
166 $(srcdir)/..
/..
/move-if-change tmp-engine.c engine.c
167 $(srcdir)/..
/..
/move-if-change tmp-irun.c irun.c
170 semantics.o
: sim-main.h semantics.c
$(SIM_EXTRA_DEPS
)
171 engine.o
: sim-main.h engine.c
$(SIM_EXTRA_DEPS
)
172 support.o
: sim-main.h support.c
$(SIM_EXTRA_DEPS
)
173 idecode.o
: sim-main.h idecode.c
$(SIM_EXTRA_DEPS
)
174 itable.o
: sim-main.h itable.c
$(SIM_EXTRA_DEPS
)
179 BUILT_SRC_FROM_M16
= \
202 $(BUILT_SRC_FROM_M16
): tmp-m16
204 tmp-m16
: $(IGEN_INSN
) $(IGEN_DC
) ..
/igen
/igen
$(IGEN_INCLUDE
)
205 cd ..
/igen
&& $(MAKE
)
212 -G gen-direct-access \
220 -n m16_icache.h
-hc tmp-icache.h \
221 -n m16_icache.c
-c tmp-icache.c \
222 -n m16_semantics.h
-hs tmp-semantics.h \
223 -n m16_semantics.c
-s tmp-semantics.c \
224 -n m16_idecode.h
-hd tmp-idecode.h \
225 -n m16_idecode.c
-d tmp-idecode.c \
226 -n m16_model.h
-hm tmp-model.h \
227 -n m16_model.c
-m tmp-model.c \
228 -n m16_support.h
-hf tmp-support.h \
229 -n m16_support.c
-f tmp-support.c \
231 $(srcdir)/..
/..
/move-if-change tmp-icache.h m16_icache.h
232 $(srcdir)/..
/..
/move-if-change tmp-icache.c m16_icache.c
233 $(srcdir)/..
/..
/move-if-change tmp-idecode.h m16_idecode.h
234 $(srcdir)/..
/..
/move-if-change tmp-idecode.c m16_idecode.c
235 $(srcdir)/..
/..
/move-if-change tmp-semantics.h m16_semantics.h
236 $(srcdir)/..
/..
/move-if-change tmp-semantics.c m16_semantics.c
237 $(srcdir)/..
/..
/move-if-change tmp-model.h m16_model.h
238 $(srcdir)/..
/..
/move-if-change tmp-model.c m16_model.c
239 $(srcdir)/..
/..
/move-if-change tmp-support.h m16_support.h
240 $(srcdir)/..
/..
/move-if-change tmp-support.c m16_support.c
247 -G gen-direct-access \
255 -n m32_icache.h
-hc tmp-icache.h \
256 -n m32_icache.c
-c tmp-icache.c \
257 -n m32_semantics.h
-hs tmp-semantics.h \
258 -n m32_semantics.c
-s tmp-semantics.c \
259 -n m32_idecode.h
-hd tmp-idecode.h \
260 -n m32_idecode.c
-d tmp-idecode.c \
261 -n m32_model.h
-hm tmp-model.h \
262 -n m32_model.c
-m tmp-model.c \
263 -n m32_support.h
-hf tmp-support.h \
264 -n m32_support.c
-f tmp-support.c \
266 $(srcdir)/..
/..
/move-if-change tmp-icache.h m32_icache.h
267 $(srcdir)/..
/..
/move-if-change tmp-icache.c m32_icache.c
268 $(srcdir)/..
/..
/move-if-change tmp-idecode.h m32_idecode.h
269 $(srcdir)/..
/..
/move-if-change tmp-idecode.c m32_idecode.c
270 $(srcdir)/..
/..
/move-if-change tmp-semantics.h m32_semantics.h
271 $(srcdir)/..
/..
/move-if-change tmp-semantics.c m32_semantics.c
272 $(srcdir)/..
/..
/move-if-change tmp-model.h m32_model.h
273 $(srcdir)/..
/..
/move-if-change tmp-model.c m32_model.c
274 $(srcdir)/..
/..
/move-if-change tmp-support.h m32_support.h
275 $(srcdir)/..
/..
/move-if-change tmp-support.c m32_support.c
282 @sim_igen_flags@ @sim_m16_flags@ \
283 -G gen-direct-access \
286 -n itable.h
-ht tmp-itable.h \
287 -n itable.c
-t tmp-itable.c \
289 $(srcdir)/..
/..
/move-if-change tmp-itable.h itable.h
290 $(srcdir)/..
/..
/move-if-change tmp-itable.c itable.c
295 rm -f
$(BUILT_SRC_FROM_GEN
)
296 rm -f
$(BUILT_SRC_FROM_IGEN
)
297 rm -f
$(BUILT_SRC_FROM_M16
)
299 rm -f m16
*.o m32
*.o itable
*.o