sim: make nrun the default run program
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
1 # Makefile template for Configure for the MIPS simulator.
2 # Written by Cygnus Support.
3
4 SHELL = @SHELL@
5
6 ## COMMON_PRE_CONFIG_FRAG
7
8 srcdir=@srcdir@
9 srcroot=$(srcdir)/../../
10
11 # Object files created by various simulator generators.
12
13
14 SIM_IGEN_OBJ = \
15 support.o \
16 itable.o \
17 semantics.o \
18 idecode.o \
19 icache.o \
20 @mips_igen_engine@ \
21 irun.o \
22
23
24 SIM_M16_OBJ = \
25 m16_support.o \
26 m16_semantics.o \
27 m16_idecode.o \
28 m16_icache.o \
29 \
30 m32_support.o \
31 m32_semantics.o \
32 m32_idecode.o \
33 m32_icache.o \
34 \
35 itable.o \
36 m16run.o \
37
38 SIM_MULTI_OBJ = itable.o @sim_multi_obj@
39
40 MIPS_EXTRA_OBJS = @mips_extra_objs@
41 MIPS_EXTRA_LIBS = @mips_extra_libs@
42
43 SIM_OBJS = \
44 $(SIM_@sim_gen@_OBJ) \
45 $(SIM_NEW_COMMON_OBJS) \
46 $(MIPS_EXTRA_OBJS) \
47 cp1.o \
48 interp.o \
49 mdmx.o \
50 dsp.o \
51 sim-main.o \
52 sim-hload.o \
53 sim-engine.o \
54 sim-stop.o \
55 sim-resume.o \
56 sim-reason.o \
57
58
59 # List of flags to always pass to $(CC).
60 SIM_SUBTARGET=@SIM_SUBTARGET@
61 SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
62
63 SIM_EXTRA_CLEAN = clean-extra
64 SIM_EXTRA_DISTCLEAN = distclean-extra
65
66 SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
67
68 SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
69
70
71 ## COMMON_POST_CONFIG_FRAG
72
73 interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
74 cp1.o: $(srcdir)/cp1.c config.h sim-main.h
75
76 mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
77
78 dsp.o: $(srcdir)/dsp.c $(srcdir)/sim-main.h
79
80 multi-run.o: multi-include.h tmp-mach-multi
81
82 ../igen/igen:
83 cd ../igen && $(MAKE)
84
85 IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
86 IGEN_INSN=$(srcdir)/mips.igen
87 IGEN_DC=$(srcdir)/mips.dc
88 M16_DC=$(srcdir)/m16.dc
89 IGEN_INCLUDE=\
90 $(srcdir)/m16.igen \
91 $(srcdir)/m16e.igen \
92 $(srcdir)/mdmx.igen \
93 $(srcdir)/mips3d.igen \
94 $(srcdir)/sb1.igen \
95 $(srcdir)/tx.igen \
96 $(srcdir)/vr.igen \
97 $(srcdir)/dsp.igen \
98 $(srcdir)/dsp2.igen \
99 $(srcdir)/mips3264r2.igen \
100
101 # NB: Since these can be built by a number of generators, care
102 # must be taken to ensure that they are only dependant on
103 # one of those generators.
104 BUILT_SRC_FROM_GEN = \
105 itable.h \
106 itable.c \
107
108 SIM_IGEN_ALL = tmp-igen
109 SIM_M16_ALL = tmp-m16
110 SIM_MULTI_ALL = tmp-multi
111
112 $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
113
114
115
116 BUILT_SRC_FROM_IGEN = \
117 icache.h \
118 icache.c \
119 idecode.h \
120 idecode.c \
121 semantics.h \
122 semantics.c \
123 model.h \
124 model.c \
125 support.h \
126 support.c \
127 engine.h \
128 engine.c \
129 irun.c \
130
131 $(BUILT_SRC_FROM_IGEN): tmp-igen
132
133 tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
134 cd ../igen && $(MAKE)
135 ../igen/igen \
136 $(IGEN_TRACE) \
137 -I $(srcdir) \
138 -Werror \
139 -Wnodiscard \
140 @sim_igen_flags@ \
141 -G gen-direct-access \
142 -G gen-zero-r0 \
143 -B 32 \
144 -H 31 \
145 -i $(IGEN_INSN) \
146 -o $(IGEN_DC) \
147 -x \
148 -n icache.h -hc tmp-icache.h \
149 -n icache.c -c tmp-icache.c \
150 -n semantics.h -hs tmp-semantics.h \
151 -n semantics.c -s tmp-semantics.c \
152 -n idecode.h -hd tmp-idecode.h \
153 -n idecode.c -d tmp-idecode.c \
154 -n model.h -hm tmp-model.h \
155 -n model.c -m tmp-model.c \
156 -n support.h -hf tmp-support.h \
157 -n support.c -f tmp-support.c \
158 -n itable.h -ht tmp-itable.h \
159 -n itable.c -t tmp-itable.c \
160 -n engine.h -he tmp-engine.h \
161 -n engine.c -e tmp-engine.c \
162 -n irun.c -r tmp-irun.c
163 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
164 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
165 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
166 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
167 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
168 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
169 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
170 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
171 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
172 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
173 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
174 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
175 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
176 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
177 $(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
178 touch tmp-igen
179
180 semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
181 engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
182 support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
183 idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
184 itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
185 m16run.o: sim-main.h m16_idecode.h m32_idecode.h $(SIM_EXTRA_DEPS)
186
187 m16_semantics.o: sim-main.h m16_semantics.c $(SIM_EXTRA_DEPS)
188 m16_support.o: sim-main.h m16_support.c $(SIM_EXTRA_DEPS)
189 m16_idecode.o: sim-main.h m16_idecode.c $(SIM_EXTRA_DEPS)
190 m16_icache.o: sim-main.h m16_icache.c $(SIM_EXTRA_DEPS)
191
192 m32_semantics.o: sim-main.h m32_semantics.c $(SIM_EXTRA_DEPS)
193 m32_support.o: sim-main.h m32_support.c $(SIM_EXTRA_DEPS)
194 m32_idecode.o: sim-main.h m32_idecode.c $(SIM_EXTRA_DEPS)
195 m32_icache.o: sim-main.h m32_icache.c $(SIM_EXTRA_DEPS)
196
197 $(SIM_MULTI_OBJ): sim-main.h $(SIM_EXTRA_DEPS)
198
199 BUILT_SRC_FROM_M16 = \
200 m16_icache.h \
201 m16_icache.c \
202 m16_idecode.h \
203 m16_idecode.c \
204 m16_semantics.h \
205 m16_semantics.c \
206 m16_model.h \
207 m16_model.c \
208 m16_support.h \
209 m16_support.c \
210 \
211 m32_icache.h \
212 m32_icache.c \
213 m32_idecode.h \
214 m32_idecode.c \
215 m32_semantics.h \
216 m32_semantics.c \
217 m32_model.h \
218 m32_model.c \
219 m32_support.h \
220 m32_support.c \
221
222 $(BUILT_SRC_FROM_M16): tmp-m16
223
224 tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
225 cd ../igen && $(MAKE)
226 ../igen/igen \
227 $(IGEN_TRACE) \
228 -I $(srcdir) \
229 -Werror \
230 -Wnodiscard \
231 @sim_m16_flags@ \
232 -G gen-direct-access \
233 -G gen-zero-r0 \
234 -B 16 \
235 -H 15 \
236 -i $(IGEN_INSN) \
237 -o $(M16_DC) \
238 -P m16_ \
239 -x \
240 -n m16_icache.h -hc tmp-icache.h \
241 -n m16_icache.c -c tmp-icache.c \
242 -n m16_semantics.h -hs tmp-semantics.h \
243 -n m16_semantics.c -s tmp-semantics.c \
244 -n m16_idecode.h -hd tmp-idecode.h \
245 -n m16_idecode.c -d tmp-idecode.c \
246 -n m16_model.h -hm tmp-model.h \
247 -n m16_model.c -m tmp-model.c \
248 -n m16_support.h -hf tmp-support.h \
249 -n m16_support.c -f tmp-support.c \
250 #
251 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
252 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
253 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
254 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
255 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
256 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
257 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
258 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
259 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
260 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
261 ../igen/igen \
262 $(IGEN_TRACE) \
263 -I $(srcdir) \
264 -Werror \
265 -Wnodiscard \
266 @sim_igen_flags@ \
267 -G gen-direct-access \
268 -G gen-zero-r0 \
269 -B 32 \
270 -H 31 \
271 -i $(IGEN_INSN) \
272 -o $(IGEN_DC) \
273 -P m32_ \
274 -x \
275 -n m32_icache.h -hc tmp-icache.h \
276 -n m32_icache.c -c tmp-icache.c \
277 -n m32_semantics.h -hs tmp-semantics.h \
278 -n m32_semantics.c -s tmp-semantics.c \
279 -n m32_idecode.h -hd tmp-idecode.h \
280 -n m32_idecode.c -d tmp-idecode.c \
281 -n m32_model.h -hm tmp-model.h \
282 -n m32_model.c -m tmp-model.c \
283 -n m32_support.h -hf tmp-support.h \
284 -n m32_support.c -f tmp-support.c \
285 #
286 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
287 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
288 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
289 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
290 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
291 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
292 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
293 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
294 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
295 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
296 ../igen/igen \
297 $(IGEN_TRACE) \
298 -I $(srcdir) \
299 -Werror \
300 -Wnodiscard \
301 -Wnowidth \
302 @sim_igen_flags@ @sim_m16_flags@ \
303 -G gen-direct-access \
304 -G gen-zero-r0 \
305 -i $(IGEN_INSN) \
306 -n itable.h -ht tmp-itable.h \
307 -n itable.c -t tmp-itable.c \
308 #
309 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
310 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
311 touch tmp-m16
312
313
314 BUILT_SRC_FROM_MULTI = @sim_multi_src@
315 SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
316
317 $(BUILT_SRC_FROM_MULTI): tmp-multi
318 tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
319 tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
320 for t in $(SIM_MULTI_IGEN_CONFIGS); do \
321 p=`echo $${t} | sed -e 's/:.*//'` ; \
322 m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
323 f=`echo $${t} | sed -e 's/.*://'` ; \
324 case $${p} in \
325 m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
326 *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
327 esac; \
328 ../igen/igen \
329 $(IGEN_TRACE) \
330 $${e} \
331 -I $(srcdir) \
332 -Werror \
333 -Wnodiscard \
334 -N 0 \
335 -M $${m} \
336 -G gen-direct-access \
337 -G gen-zero-r0 \
338 -i $(IGEN_INSN) \
339 -P $${p}_ \
340 -x \
341 -n $${p}_icache.h -hc tmp-icache.h \
342 -n $${p}_icache.c -c tmp-icache.c \
343 -n $${p}_semantics.h -hs tmp-semantics.h \
344 -n $${p}_semantics.c -s tmp-semantics.c \
345 -n $${p}_idecode.h -hd tmp-idecode.h \
346 -n $${p}_idecode.c -d tmp-idecode.c \
347 -n $${p}_model.h -hm tmp-model.h \
348 -n $${p}_model.c -m tmp-model.c \
349 -n $${p}_support.h -hf tmp-support.h \
350 -n $${p}_support.c -f tmp-support.c \
351 -n $${p}_engine.h -he tmp-engine.h \
352 -n $${p}_engine.c -e tmp-engine.c \
353 || exit; \
354 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
355 $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
356 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
357 $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
358 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
359 $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
360 $(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
361 $(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
362 $(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
363 $(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
364 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
365 $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
366 done
367 touch tmp-mach-multi
368 tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
369 ../igen/igen \
370 $(IGEN_TRACE) \
371 -I $(srcdir) \
372 -Werror \
373 -Wnodiscard \
374 -Wnowidth \
375 -N 0 \
376 @sim_multi_flags@ \
377 -G gen-direct-access \
378 -G gen-zero-r0 \
379 -i $(IGEN_INSN) \
380 -n itable.h -ht tmp-itable.h \
381 -n itable.c -t tmp-itable.c \
382 #
383 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
384 $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
385 touch tmp-itable-multi
386 tmp-run-multi: $(srcdir)/m16run.c
387 for t in $(SIM_MULTI_IGEN_CONFIGS); do \
388 case $${t} in \
389 m16*) \
390 m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
391 sed < $(srcdir)/m16run.c > tmp-run \
392 -e "s/^sim_/m16$${m}_/" \
393 -e "s/m16_/m16$${m}_/" \
394 -e "s/m32_/m32$${m}_/" ; \
395 $(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
396 esac \
397 done
398 touch tmp-run-multi
399
400 clean-extra:
401 rm -f $(BUILT_SRC_FROM_GEN)
402 rm -f $(BUILT_SRC_FROM_IGEN)
403 rm -f $(BUILT_SRC_FROM_M16)
404 rm -f $(BUILT_SRC_FROM_MULTI)
405 rm -f tmp-*
406 rm -f m16*.o m32*.o itable*.o
407
408 distclean-extra:
409 rm -f multi-include.h multi-run.c
This page took 0.037467 seconds and 5 git commands to generate.