3 // Simulator definition for the MIPS MDMX ASE.
4 // Copyright (C) 2002 Free Software Foundation, Inc.
5 // Contributed by Broadcom Corporation (SiByte).
7 // This file is part of GDB, the GNU debugger.
9 // This program is free software; you can redistribute it and/or modify
10 // it under the terms of the GNU General Public License as published by
11 // the Free Software Foundation; either version 2, or (at your option)
14 // This program is distributed in the hope that it will be useful,
15 // but WITHOUT ANY WARRANTY; without even the implied warranty of
16 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 // GNU General Public License for more details.
19 // You should have received a copy of the GNU General Public License along
20 // with this program; if not, write to the Free Software Foundation, Inc.,
21 // 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 // Reference: MIPS64 Architecture Volume IV-b:
24 // The MDMX Application-Specific Extension
26 // Notes on "format selectors" (FMTSEL):
28 // A selector with final bit 0 indicates OB format.
29 // A selector with final bits 01 indicates QH format.
30 // A selector with final bits 11 has UNPREDICTABLE result per the spec.
32 // Similarly, for the single-bit fields which differentiate between
33 // formats (FMTOP), 0 is OB format and 1 is QH format.
38 // Check whether MDMX is usable, and if not signal an appropriate exception.
41 :function:::void:check_mdmx:instruction_word insn
45 SignalExceptionCoProcessorUnusable (1);
46 if ((SR & (status_MX|status_FR)) != (status_MX|status_FR))
47 SignalExceptionMDMX ();
48 check_u64 (SD_, insn);
54 // Check whether a given MDMX format selector indicates a valid and usable
55 // format, and if not signal an appropriate exception.
58 :function:::int:check_mdmx_fmtsel:instruction_word insn, int fmtsel
61 switch (fmtsel & 0x03)
67 case 0x03: /* UNPREDICTABLE */
68 SignalException (ReservedInstruction, insn);
77 // Check whether a given MDMX format bit indicates a valid and usable
78 // format, and if not signal an appropriate exception.
81 :function:::int:check_mdmx_fmtop:instruction_word insn, int fmtop
94 :%s::::FMTSEL:int fmtsel
97 if ((fmtsel & 0x1) == 0)
99 else if ((fmtsel & 0x3) == 1)
106 :%s::::FMTOP:int fmtop
121 if ((shop & 0x11) == 0x00)
122 switch ((shop >> 1) & 0x07)
124 case 3: return "upsl.ob";
125 case 4: return "pach.ob";
126 case 6: return "mixh.ob";
127 case 7: return "mixl.ob";
130 else if ((shop & 0x03) == 0x01)
131 switch ((shop >> 2) & 0x07)
133 case 0: return "mixh.qh";
134 case 1: return "mixl.qh";
135 case 2: return "pach.qh";
136 case 4: return "bfla.qh";
137 case 6: return "repa.qh";
138 case 7: return "repb.qh";
146 011110,5.FMTSEL,5.VT,5.VS,5.VD,001011:MDMX:64::ADD.fmt
147 "add.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
150 check_mdmx (SD_, instruction_0);
151 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
152 StoreFPR(VD,fmt_mdmx,MX_Add(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
156 011110,5.FMTSEL,5.VT,5.VS,0,0000,110111:MDMX:64::ADDA.fmt
157 "adda.%s<FMTSEL> v<VS>, v<VT>"
160 check_mdmx (SD_, instruction_0);
161 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
162 MX_AddA(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
166 011110,5.FMTSEL,5.VT,5.VS,1,0000,110111:MDMX:64::ADDL.fmt
167 "addl.%s<FMTSEL> v<VS>, v<VT>"
170 check_mdmx (SD_, instruction_0);
171 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
172 MX_AddL(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
176 011110,00,3.IMM,5.VT,5.VS,5.VD,0110,1.FMTOP,0:MDMX:64::ALNI.fmt
177 "alni.%s<FMTOP> v<VD>, v<VS>, v<VT>, <IMM>"
182 check_mdmx (SD_, instruction_0);
183 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
185 result = ValueFPR(VS,fmt_mdmx) << s;
186 if (s != 0) // x86 gcc treats >> 64 as >> 0
187 result |= ValueFPR(VT,fmt_mdmx) >> (64 - s);
188 StoreFPR(VD,fmt_mdmx,result);
192 011110,5.RS,5.VT,5.VS,5.VD,0110,1.FMTOP,1:MDMX:64::ALNV.fmt
193 "alnv.%s<FMTOP> v<VD>, v<VS>, v<VT>, r<RS>"
198 check_mdmx (SD_, instruction_0);
199 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
200 s = ((GPR[RS] & 0x7) << 3);
201 result = ValueFPR(VS,fmt_mdmx) << s;
202 if (s != 0) // x86 gcc treats >> 64 as >> 0
203 result |= ValueFPR(VT,fmt_mdmx) >> (64 - s);
204 StoreFPR(VD,fmt_mdmx,result);
208 011110,5.FMTSEL,5.VT,5.VS,5.VD,001100:MDMX:64::AND.fmt
209 "and.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
212 check_mdmx (SD_, instruction_0);
213 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
214 StoreFPR(VD,fmt_mdmx,MX_And(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
218 011110,5.FMTSEL,5.VT,5.VS,00000,000001:MDMX:64::C.EQ.fmt
219 "c.eq.%s<FMTSEL> v<VS>, v<VT>"
222 check_mdmx (SD_, instruction_0);
223 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
224 MX_Comp(ValueFPR(VS,fmt_mdmx),MX_C_EQ,VT,FMTSEL);
228 011110,5.FMTSEL,5.VT,5.VS,00000,000101:MDMX:64::C.LE.fmt
229 "c.le.%s<FMTSEL> v<VS>, v<VT>"
232 check_mdmx (SD_, instruction_0);
233 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
234 MX_Comp(ValueFPR(VS,fmt_mdmx),MX_C_LT|MX_C_EQ,VT,FMTSEL);
238 011110,5.FMTSEL,5.VT,5.VS,00000,000100:MDMX:64::C.LT.fmt
239 "c.lt.%s<FMTSEL> v<VS>, v<VT>"
242 check_mdmx (SD_, instruction_0);
243 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
244 MX_Comp(ValueFPR(VS,fmt_mdmx),MX_C_LT,VT,FMTSEL);
248 011110,5.FMTSEL,5.VT,5.VS,5.VD,000111:MDMX:64::MAX.fmt
249 "max.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
252 check_mdmx (SD_, instruction_0);
253 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
254 StoreFPR(VD,fmt_mdmx,MX_Max(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
258 011110,5.FMTSEL,5.VT,5.VS,5.VD,000110:MDMX:64::MIN.fmt
259 "min.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
262 check_mdmx (SD_, instruction_0);
263 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
264 StoreFPR(VD,fmt_mdmx,MX_Min(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
268 011110,3.SEL,01,5.VT,5.VS,5.VD,000000:MDMX:64::MSGN.QH
269 "msgn.qh v<VD>, v<VS>, v<VT>"
272 check_mdmx (SD_, instruction_0);
273 StoreFPR(VD,fmt_mdmx,MX_Msgn(ValueFPR(VS,fmt_mdmx),VT,qh_fmtsel(SEL)));
277 011110,5.FMTSEL,5.VT,5.VS,5.VD,110000:MDMX:64::MUL.fmt
278 "mul.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
281 check_mdmx (SD_, instruction_0);
282 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
283 StoreFPR(VD,fmt_mdmx,MX_Mul(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
287 011110,5.FMTSEL,5.VT,5.VS,0,0000,110011:MDMX:64::MULA.fmt
288 "mula.%s<FMTSEL> v<VS>, v<VT>"
291 check_mdmx (SD_, instruction_0);
292 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
293 MX_MulA(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
297 011110,5.FMTSEL,5.VT,5.VS,1,0000,110011:MDMX:64::MULL.fmt
298 "mull.%s<FMTSEL> v<VS>, v<VT>"
301 check_mdmx (SD_, instruction_0);
302 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
303 MX_MulL(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
307 011110,5.FMTSEL,5.VT,5.VS,0,0000,110010:MDMX:64::MULS.fmt
308 "muls.%s<FMTSEL> v<VS>, v<VT>"
311 check_mdmx (SD_, instruction_0);
312 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
313 MX_MulS(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
317 011110,5.FMTSEL,5.VT,5.VS,1,0000,110010:MDMX:64::MULSL.fmt
318 "mulsl.%s<FMTSEL> v<VS>, v<VT>"
321 check_mdmx (SD_, instruction_0);
322 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
323 MX_MulSL(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
327 011110,5.FMTSEL,5.VT,5.VS,5.VD,001111:MDMX:64::NOR.fmt
328 "nor.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
331 check_mdmx (SD_, instruction_0);
332 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
333 StoreFPR(VD,fmt_mdmx,MX_Nor(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
337 011110,5.FMTSEL,5.VT,5.VS,5.VD,001110:MDMX:64::OR.fmt
338 "or.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
341 check_mdmx (SD_, instruction_0);
342 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
343 StoreFPR(VD,fmt_mdmx,MX_Or(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
347 011110,5.FMTSEL,5.VT,5.VS,5.VD,000010:MDMX:64::PICKF.fmt
348 "pickf.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
351 check_mdmx (SD_, instruction_0);
352 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
353 StoreFPR(VD,fmt_mdmx,MX_Pick(0,ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
357 011110,5.FMTSEL,5.VT,5.VS,5.VD,000011:MDMX:64::PICKT.fmt
358 "pickt.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
361 check_mdmx (SD_, instruction_0);
362 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
363 StoreFPR(VD,fmt_mdmx,MX_Pick(1,ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
367 011110,1000,1.FMTOP,00000,00000,5.VD,111111:MDMX:64::RACH.fmt
368 "rach.%s<FMTOP> v<VD>"
371 check_mdmx (SD_, instruction_0);
372 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
373 StoreFPR(VD,fmt_mdmx,MX_RAC(MX_RAC_H,FMTOP));
377 011110,0000,1.FMTOP,00000,00000,5.VD,111111:MDMX:64::RACL.fmt
378 "racl.%s<FMTOP> v<VD>"
381 check_mdmx (SD_, instruction_0);
382 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
383 StoreFPR(VD,fmt_mdmx,MX_RAC(MX_RAC_L,FMTOP));
387 011110,0100,1.FMTOP,00000,00000,5.VD,111111:MDMX:64::RACM.fmt
388 "racm.%s<FMTOP> v<VD>"
391 check_mdmx (SD_, instruction_0);
392 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
393 StoreFPR(VD,fmt_mdmx,MX_RAC(MX_RAC_M,FMTOP));
397 011110,3.SEL,01,5.VT,00000,5.VD,100101:MDMX:64::RNAS.QH
398 "rnas.qh v<VD>, v<VT>"
401 check_mdmx (SD_, instruction_0);
402 StoreFPR(VD,fmt_mdmx,MX_RNAS(VT,qh_fmtsel(SEL)));
406 011110,5.FMTSEL,5.VT,00000,5.VD,100001:MDMX:64::RNAU.fmt
407 "rnau.%s<FMTSEL> v<VD>, v<VT>"
410 check_mdmx (SD_, instruction_0);
411 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
412 StoreFPR(VD,fmt_mdmx,MX_RNAU(VT,FMTSEL));
416 011110,3.SEL,01,5.VT,00000,5.VD,100110:MDMX:64::RNES.QH
417 "rnes.qh v<VD>, v<VT>"
420 check_mdmx (SD_, instruction_0);
421 StoreFPR(VD,fmt_mdmx,MX_RNES(VT,qh_fmtsel(SEL)));
425 011110,5.FMTSEL,5.VT,00000,5.VD,100010:MDMX:64::RNEU.fmt
426 "rneu.%s<FMTSEL> v<VD>, v<VT>"
429 check_mdmx (SD_, instruction_0);
430 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
431 StoreFPR(VD,fmt_mdmx,MX_RNEU(VT,FMTSEL));
435 011110,3.SEL,01,5.VT,00000,5.VD,100100:MDMX:64::RZS.QH
436 "rzs.qh v<VD>, v<VT>"
439 check_mdmx (SD_, instruction_0);
440 StoreFPR(VD,fmt_mdmx,MX_RZS(VT,qh_fmtsel(SEL)));
444 011110,5.FMTSEL,5.VT,00000,5.VD,100000:MDMX:64::RZU.fmt
445 "rzu.%s<FMTSEL> v<VD>, v<VT>"
448 check_mdmx (SD_, instruction_0);
449 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
450 StoreFPR(VD,fmt_mdmx,MX_RZU(VT,FMTSEL));
454 011110,5.SHOP,5.VT,5.VS,5.VD,011111:MDMX:64::SHFL.op.fmt
455 "shfl.%s<SHOP> v<VD>, v<VS>, v<VT>"
458 check_mdmx (SD_, instruction_0);
459 if (check_mdmx_fmtsel (SD_, instruction_0, SHOP))
460 StoreFPR(VD,fmt_mdmx,MX_SHFL(SHOP,ValueFPR(VS,fmt_mdmx),ValueFPR(VT,fmt_mdmx)));
464 011110,5.FMTSEL,5.VT,5.VS,5.VD,010000:MDMX:64::SLL.fmt
465 "sll.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
468 check_mdmx (SD_, instruction_0);
469 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
470 StoreFPR(VD,fmt_mdmx,MX_ShiftLeftLogical(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
474 011110,3.SEL,01,5.VT,5.VS,5.VD,010011:MDMX:64::SRA.QH
475 "sra.qh v<VD>, v<VS>, v<VT>"
478 check_mdmx (SD_, instruction_0);
479 StoreFPR(VD,fmt_mdmx,MX_ShiftRightArith(ValueFPR(VS,fmt_mdmx),VT,qh_fmtsel(SEL)));
483 011110,5.FMTSEL,5.VT,5.VS,5.VD,010010:MDMX:64::SRL.fmt
484 "srl.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
487 check_mdmx (SD_, instruction_0);
488 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
489 StoreFPR(VD,fmt_mdmx,MX_ShiftRightLogical(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
493 011110,5.FMTSEL,5.VT,5.VS,5.VD,001010:MDMX:64::SUB.fmt
494 "sub.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
497 check_mdmx (SD_, instruction_0);
498 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
499 StoreFPR(VD,fmt_mdmx,MX_Sub(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));
503 011110,5.FMTSEL,5.VT,5.VS,0,0000,110110:MDMX:64::SUBA.fmt
504 "suba.%s<FMTSEL> v<VS>, v<VT>"
507 check_mdmx (SD_, instruction_0);
508 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
509 MX_SubA(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
513 011110,5.FMTSEL,5.VT,5.VS,1,0000,110110:MDMX:64::SUBL.fmt
514 "subl.%s<FMTSEL> v<VS>, v<VT>"
517 check_mdmx (SD_, instruction_0);
518 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
519 MX_SubL(ValueFPR(VS,fmt_mdmx),VT,FMTSEL);
523 011110,1000,1.FMTOP,00000,5.VS,00000,111110:MDMX:64::WACH.fmt
524 "wach.%s<FMTOP> v<VS>"
527 check_mdmx (SD_, instruction_0);
528 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
529 MX_WACH(FMTOP,ValueFPR(VS,fmt_mdmx));
533 011110,0000,1.FMTOP,5.VT,5.VS,00000,111110:MDMX:64::WACL.fmt
534 "wacl.%s<FMTOP> v<VS>, v<VT>"
537 check_mdmx (SD_, instruction_0);
538 check_mdmx_fmtop (SD_, instruction_0, FMTOP);
539 MX_WACL(FMTOP,ValueFPR(VS,fmt_mdmx),ValueFPR(VT,fmt_mdmx));
543 011110,5.FMTSEL,5.VT,5.VS,5.VD,001101:MDMX:64::XOR.fmt
544 "xor.%s<FMTSEL> v<VD>, v<VS>, v<VT>"
547 check_mdmx (SD_, instruction_0);
548 if (check_mdmx_fmtsel (SD_, instruction_0, FMTSEL))
549 StoreFPR(VD,fmt_mdmx,MX_Xor(ValueFPR(VS,fmt_mdmx),VT,FMTSEL));