sim/mips/vr.igen

   1 // -*- C -*-
   2 //
   3 // NEC specific instructions
   4 //
   5
   6 // Integer Instructions
   7 // --------------------
   8 //
   9 // MulAcc is the Multiply Accumulator.
  10 //     This register is mapped on the the HI and LO registers.
  11 //     Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
  12 //     Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
  13
  14
  15 :function:::unsigned64:MulAcc:
  16 {
  17   unsigned64 result = U8_4 (HI, LO);
  18   return result;
  19 }
  20
  21 :function:::void:SET_MulAcc:unsigned64 value
  22 {
  23   *AL4_8 (&HI) = VH4_8 (value);
  24   *AL4_8 (&LO) = VL4_8 (value);
  25 }
  26
  27 :function:::signed64:SignedMultiply:signed32 l, signed32 r
  28 {
  29   signed64 result = (signed64) l * (signed64) r;
  30   return result;
  31 }
  32
  33 :function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
  34 {
  35   unsigned64 result = (unsigned64) l * (unsigned64) r;
  36   return result;
  37 }
  38
  39 :function:::unsigned64:Low32Bits:unsigned64 value
  40 {
  41   unsigned64 result = (signed64) (signed32) VL4_8 (value);
  42   return result;
  43 }
  44
  45 :function:::unsigned64:High32Bits:unsigned64 value
  46 {
  47   unsigned64 result = (signed64) (signed32) VH4_8 (value);
  48   return result;
  49 }
  50
  51
  52
  53 // Multiply, Accumulate
  54 000000,5.RS,5.RT,00000,00000,101000::::MAC
  55 "mac r<RS>, r<RT>"
  56 *vr4100:
  57 // start-sanitize-vr4320
  58 *vr4320:
  59 // end-sanitize-vr4320
  60 {
  61   SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
  62 }
  63
  64
  65 // D-Multiply, Accumulate
  66 000000,5.RS,5.RT,00000,00000,101001::::DMAC
  67 "dmac r<RS>, r<RT>"
  68 *vr4100:
  69 // start-sanitize-vr4320
  70 *vr4320:
  71 // end-sanitize-vr4320
  72 {
  73   LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
  74 }
  75
  76
  77 // start-sanitize-vr4320
  78 // Count Leading Zeros
  79 000000,5.RS,00000,5.RD,00000,110101::::CLZ
  80 "clz r<RD>, r<RS>"
  81 // end-sanitize-vr4320
  82 // start-sanitize-vr4320
  83 *vr4320:
  84 // end-sanitize-vr4320
  85 // start-sanitize-vr4320
  86 {
  87   unsigned32 t = Low32Bits (SD_, GPR[RS]);
  88   signed64 c = 0;
  89
  90   while (! (t & ( 1 << 31))
  91         && c < 32)
  92     {
  93     c++;
  94     t <<= 1;
  95     }
  96
  97   GPR[RD] = c;
  98 }
  99
 100
 101 // end-sanitize-vr4320
 102 // start-sanitize-vr4320
 103 // D-Count Leading Zeros
 104 000000,5.RS,00000,5.RD,00000,111101::::DCLZ
 105 "dclz r<RD>, r<RS>"
 106 // end-sanitize-vr4320
 107 // start-sanitize-vr4320
 108 *vr4320:
 109 // end-sanitize-vr4320
 110 // start-sanitize-vr4320
 111 {
 112   unsigned64 t = GPR[RS];
 113   signed64 c = 0;
 114
 115   while (! (t & ( (unsigned64)1 << 63))
 116         && c < 64)
 117     {
 118     c++;
 119     t <<= 1;
 120     }
 121
 122   printf("lo %d\n", (int) c);
 123   GPR[RD] = c;
 124 }
 125
 126
 127
 128
 129
 130
 131
 132 // end-sanitize-vr4320
 133 // start-sanitize-vrXXXX
 134 // Multiply and Move LO.
 135 000000,5.RS,5.RT,5.RD,00100,101000::::MUL
 136 "mul r<RD>, r<RS>, r<RT>"
 137 // end-sanitize-vrXXXX
 138 // start-sanitize-vr4320
 139 *vr4320:
 140 // end-sanitize-vr4320
 141 // start-sanitize-vr5400
 142 *vr5400:
 143 // end-sanitize-vr5400
 144 // start-sanitize-vrXXXX
 145 {
 146   SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
 147   GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
 148 }
 149
 150
 151 // end-sanitize-vrXXXX
 152 // start-sanitize-vrXXXX
 153 // Unsigned Multiply and Move LO.
 154 000000,5.RS,5.RT,5.RD,00101,101000::::MULU
 155 "mulu r<RD>, r<RS>, r<RT>"
 156 // end-sanitize-vrXXXX
 157 // start-sanitize-vr4320
 158 *vr4320:
 159 // end-sanitize-vr4320
 160 // start-sanitize-vr5400
 161 *vr5400:
 162 // end-sanitize-vr5400
 163 // start-sanitize-vrXXXX
 164 {
 165   SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 166   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 167 }
 168
 169
 170 // end-sanitize-vrXXXX
 171 // start-sanitize-vrXXXX
 172 // Multiply and Move HI.
 173 000000,5.RS,5.RT,5.RD,01100,101000::::MULHI
 174 "mulhi r<RD>, r<RS>, r<RT>"
 175 // end-sanitize-vrXXXX
 176 // start-sanitize-vr4320
 177 *vr4320:
 178 // end-sanitize-vr4320
 179 // start-sanitize-vr5400
 180 *vr5400:
 181 // end-sanitize-vr5400
 182 // start-sanitize-vrXXXX
 183 {
 184   SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
 185   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 186 }
 187
 188
 189 // end-sanitize-vrXXXX
 190 // start-sanitize-vrXXXX
 191 // Unsigned Multiply and Move HI.
 192 000000,5.RS,5.RT,5.RD,01101,101000::::MULHIU
 193 "mulhiu r<RD>, r<RS>, r<RT>"
 194 // end-sanitize-vrXXXX
 195 // start-sanitize-vr4320
 196 *vr4320:
 197 // end-sanitize-vr4320
 198 // start-sanitize-vr5400
 199 *vr5400:
 200 // end-sanitize-vr5400
 201 // start-sanitize-vrXXXX
 202 {
 203   SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 204   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 205 }
 206
 207
 208 // end-sanitize-vrXXXX
 209 // start-sanitize-vr5400
 210 // Multiply, Negate and Move LO.
 211 000000,5.RS,5.RT,5.RD,00011,011000::::MULS
 212 "muls r<RD>, r<RS>, r<RT>"
 213 // end-sanitize-vr5400
 214 // start-sanitize-vr5400
 215 *vr5400:
 216 // end-sanitize-vr5400
 217 // start-sanitize-vr5400
 218 {
 219   SET_MulAcc (SD_, 0 - SignedMultiply   (SD_, GPR[RS], GPR[RT]));
 220   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 221 }
 222
 223
 224 // end-sanitize-vr5400
 225 // start-sanitize-vr5400
 226 // Unsigned Multiply, Negate and Move LO.
 227 000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
 228 "mulsu r<RD>, r<RS>, r<RT>"
 229 // end-sanitize-vr5400
 230 // start-sanitize-vr5400
 231 *vr5400:
 232 // end-sanitize-vr5400
 233 // start-sanitize-vr5400
 234 {
 235   SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 236   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 237 }
 238
 239
 240 // end-sanitize-vr5400
 241 // start-sanitize-vr5400
 242 // Multiply, Negate and Move HI.
 243 000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
 244 "mulshi r<RD>, r<RS>, r<RT>"
 245 // end-sanitize-vr5400
 246 // start-sanitize-vr5400
 247 *vr5400:
 248 // end-sanitize-vr5400
 249 // start-sanitize-vr5400
 250 {
 251   SET_MulAcc (SD_, 0 - SignedMultiply   (SD_, GPR[RS], GPR[RT]));
 252   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 253 }
 254
 255
 256 // end-sanitize-vr5400
 257 // start-sanitize-vr5400
 258 // Unsigned Multiply, Negate and Move HI.
 259 000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
 260 "mulshiu r<RD>, r<RS>, r<RT>"
 261 // end-sanitize-vr5400
 262 // start-sanitize-vr5400
 263 *vr5400:
 264 // end-sanitize-vr5400
 265 // start-sanitize-vr5400
 266 {
 267   SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 268   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 269 }
 270
 271
 272
 273
 274
 275 // end-sanitize-vr5400
 276 // Multiply, Accumulate and Move LO.
 277 000000,5.RS,5.RT,5.RD,00010,101000::::MACC
 278 "macc r<RD>, r<RS>, r<RT>"
 279 // start-sanitize-vr4320
 280 *vr4320:
 281 // end-sanitize-vr4320
 282 // start-sanitize-vr5400
 283 *vr5400:
 284 // end-sanitize-vr5400
 285 {
 286   SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
 287   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 288 }
 289
 290
 291 // start-sanitize-vrXXXX
 292 // Unsigned Multiply, Accumulate and Move LO.
 293 000000,5.RS,5.RT,5.RD,00011,101000::::MACCU
 294 "maccu r<RD>, r<RS>, r<RT>"
 295 // end-sanitize-vrXXXX
 296 // start-sanitize-vr4320
 297 *vr4320:
 298 // end-sanitize-vr4320
 299 // start-sanitize-vr5400
 300 *vr5400:
 301 // end-sanitize-vr5400
 302 // start-sanitize-vrXXXX
 303 {
 304   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 305   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 306 }
 307
 308
 309 // end-sanitize-vrXXXX
 310 // start-sanitize-vrXXXX
 311 // Multiply, Accumulate and Move HI.
 312 000000,5.RS,5.RT,5.RD,01010,101000::::MACCHI
 313 "macchi r<RD>, r<RS>, r<RT>"
 314 // end-sanitize-vrXXXX
 315 // start-sanitize-vr4320
 316 *vr4320:
 317 // end-sanitize-vr4320
 318 // start-sanitize-vr5400
 319 *vr5400:
 320 // end-sanitize-vr5400
 321 // start-sanitize-vrXXXX
 322 {
 323   SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
 324   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 325 }
 326
 327
 328 // end-sanitize-vrXXXX
 329 // start-sanitize-vrXXXX
 330 // Unsigned Multiply, Accumulate and Move HI.
 331 000000,5.RS,5.RT,5.RD,01011,101000::::MACCHIU
 332 "macchiu r<RD>, r<RS>, r<RT>"
 333 // end-sanitize-vrXXXX
 334 // start-sanitize-vr4320
 335 *vr4320:
 336 // end-sanitize-vr4320
 337 // start-sanitize-vr5400
 338 *vr5400:
 339 // end-sanitize-vr5400
 340 // start-sanitize-vrXXXX
 341 {
 342   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 343   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 344
 345 }
 346
 347
 348
 349 // end-sanitize-vrXXXX
 350 // start-sanitize-vr5400
 351 // Multiply, Negate, Accumulate and Move LO.
 352 000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
 353 "msac r<RD>, r<RS>, r<RT>"
 354 // end-sanitize-vr5400
 355 // start-sanitize-vr5400
 356 *vr5400:
 357 // end-sanitize-vr5400
 358 // start-sanitize-vr5400
 359 {
 360   SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
 361   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 362 }
 363
 364
 365 // end-sanitize-vr5400
 366 // start-sanitize-vr5400
 367 // Unsigned Multiply, Negate, Accumulate and Move LO.
 368 000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
 369 "msacu r<RD>, r<RS>, r<RT>"
 370 // end-sanitize-vr5400
 371 // start-sanitize-vr5400
 372 *vr5400:
 373 // end-sanitize-vr5400
 374 // start-sanitize-vr5400
 375 {
 376   SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 377   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
 378 }
 379
 380
 381 // end-sanitize-vr5400
 382 // start-sanitize-vr5400
 383 // Multiply, Negate, Accumulate and Move HI.
 384 000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
 385 "msachi r<RD>, r<RS>, r<RT>"
 386 // end-sanitize-vr5400
 387 // start-sanitize-vr5400
 388 *vr5400:
 389 // end-sanitize-vr5400
 390 // start-sanitize-vr5400
 391 {
 392   SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
 393   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 394 }
 395
 396 // end-sanitize-vr5400
 397 // start-sanitize-vr5400
 398 // Unsigned Multiply, Negate, Accumulate and Move HI.
 399 000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
 400 "msachiu r<RD>, r<RS>, r<RT>"
 401 // end-sanitize-vr5400
 402 // start-sanitize-vr5400
 403 *vr5400:
 404 // end-sanitize-vr5400
 405 // start-sanitize-vr5400
 406 {
 407   SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
 408   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 409 }
 410
 411
 412 // end-sanitize-vr5400
 413 // start-sanitize-vr5400
 414 // Rotate Right.
 415 000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
 416 "ror r<RD>, r<RT>, <SHIFT>"
 417 // end-sanitize-vr5400
 418 // start-sanitize-vr5400
 419 *vr5400:
 420 // end-sanitize-vr5400
 421 // start-sanitize-vr5400
 422 {
 423   int s = SHIFT;
 424   GPR[RD] = ROTR32 (GPR[RT], s);
 425 }
 426
 427
 428 // end-sanitize-vr5400
 429 // start-sanitize-vr5400
 430 // Rotate Right Variable.
 431 000000,5.RS,5.RT,5.RD,00001,000110::::RORV
 432 "rorv r<RD>, r<RT>, <RS>"
 433 // end-sanitize-vr5400
 434 // start-sanitize-vr5400
 435 *vr5400:
 436 // end-sanitize-vr5400
 437 // start-sanitize-vr5400
 438 {
 439   int s = MASKED (GPR[RS], 4, 0);
 440   GPR[RD] = ROTR32 (GPR[RT], s);
 441 }
 442
 443
 444 // end-sanitize-vr5400
 445 // start-sanitize-vr5400
 446 // Double Rotate Right.
 447 000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
 448 "dror r<RD>, r<RT>, <SHIFT>"
 449 // end-sanitize-vr5400
 450 // start-sanitize-vr5400
 451 *vr5400:
 452 // end-sanitize-vr5400
 453 // start-sanitize-vr5400
 454 {
 455   int s = SHIFT;
 456   GPR[RD] = ROTR64 (GPR[RT], s);
 457 }
 458
 459
 460 // end-sanitize-vr5400
 461 // start-sanitize-vr5400
 462 // Double Rotate Right Plus 32.
 463 000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
 464 "dror32 r<RD>, r<RT>, <SHIFT>"
 465 // end-sanitize-vr5400
 466 // start-sanitize-vr5400
 467 *vr5400:
 468 // end-sanitize-vr5400
 469 // start-sanitize-vr5400
 470 {
 471   int s = SHIFT + 32;
 472   GPR[RD] = ROTR64 (GPR[RT], s);
 473 }
 474
 475
 476 // end-sanitize-vr5400
 477 // start-sanitize-vr5400
 478 // Double Rotate Right Variable.
 479 000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
 480 "drorv r<RD>, r<RT>, <RS>"
 481 // end-sanitize-vr5400
 482 // start-sanitize-vr5400
 483 *vr5400:
 484 // end-sanitize-vr5400
 485 // start-sanitize-vr5400
 486 {
 487   int s = MASKED (GPR[RS], 5, 0);
 488   GPR[RD] = ROTR64 (GPR[RT], s);
 489 }
 490
 491
 492 // end-sanitize-vr5400