3 // NEC specific instructions
6 // Integer Instructions
7 // --------------------
9 // MulAcc is the Multiply Accumulator.
10 // This register is mapped on the the HI and LO registers.
11 // Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
12 // Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
15 :function:::unsigned64:MulAcc:
17 // start-sanitize-vr4xxx
19 // end-sanitize-vr4xxx
20 // start-sanitize-vr4320
22 // end-sanitize-vr4320
23 // start-sanitize-cygnus
25 // end-sanitize-cygnus
27 unsigned64 result = U8_4 (HI, LO);
31 :function:::void:SET_MulAcc:unsigned64 value
33 // start-sanitize-vr4xxx
35 // end-sanitize-vr4xxx
36 // start-sanitize-vr4320
38 // end-sanitize-vr4320
39 // start-sanitize-cygnus
41 // end-sanitize-cygnus
44 *AL4_8 (&HI) = VH4_8 (value);
45 *AL4_8 (&LO) = VL4_8 (value);
48 :function:::signed64:SignedMultiply:signed32 l, signed32 r
50 // start-sanitize-vr4xxx
52 // end-sanitize-vr4xxx
53 // start-sanitize-vr4320
55 // end-sanitize-vr4320
56 // start-sanitize-cygnus
58 // end-sanitize-cygnus
60 signed64 result = (signed64) l * (signed64) r;
64 :function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
66 // start-sanitize-vr4xxx
68 // end-sanitize-vr4xxx
69 // start-sanitize-vr4320
71 // end-sanitize-vr4320
72 // start-sanitize-cygnus
74 // end-sanitize-cygnus
76 unsigned64 result = (unsigned64) l * (unsigned64) r;
80 // start-sanitize-vr4xxx
81 :function:::signed64:SaturatedAdd:signed32 l, signed32 r
84 signed64 result = (signed64) l + (signed64) r;
86 result = 0xFFFFFFFF8000000LL;
87 else if (result > 0x000000007FFFFFFFLL)
88 result = 0x000000007FFFFFFFLL;
92 :function:::unsigned64:SaturatedUnsignedAdd:unsigned32 l, unsigned32 r
95 unsigned64 result = (unsigned64) l + (unsigned64) r;
96 if (result > 0x000000007FFFFFFFLL)
97 result = 0xFFFFFFFFFFFFFFFFLL;
102 // end-sanitize-vr4xxx
103 :function:::unsigned64:Low32Bits:unsigned64 value
105 // start-sanitize-vr4xxx
107 // end-sanitize-vr4xxx
108 // start-sanitize-vr4320
110 // end-sanitize-vr4320
111 // start-sanitize-cygnus
113 // end-sanitize-cygnus
115 unsigned64 result = (signed64) (signed32) VL4_8 (value);
119 :function:::unsigned64:High32Bits:unsigned64 value
121 // start-sanitize-vr4xxx
123 // end-sanitize-vr4xxx
124 // start-sanitize-vr4320
126 // end-sanitize-vr4320
127 // start-sanitize-cygnus
129 // end-sanitize-cygnus
131 unsigned64 result = (signed64) (signed32) VH4_8 (value);
137 // Multiply, Accumulate
138 000000,5.RS,5.RT,00000,00000,101000::64::MAC
141 // start-sanitize-vr4320
143 // end-sanitize-vr4320
145 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
149 // D-Multiply, Accumulate
150 000000,5.RS,5.RT,00000,00000,101001::64::DMAC
153 // start-sanitize-vr4320
155 // end-sanitize-vr4320
157 LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
161 // start-sanitize-vr4320
162 // Count Leading Zeros
163 000000,5.RS,00000,5.RD,00000,110101::64::CLZ
165 // end-sanitize-vr4320
166 // start-sanitize-vr4320
168 // end-sanitize-vr4320
169 // start-sanitize-vr4320
171 unsigned32 t = Low32Bits (SD_, GPR[RS]);
174 while (! (t & ( 1 << 31))
185 // end-sanitize-vr4320
186 // start-sanitize-vr4320
187 // D-Count Leading Zeros
188 000000,5.RS,00000,5.RD,00000,111101::64::DCLZ
190 // end-sanitize-vr4320
191 // start-sanitize-vr4320
193 // end-sanitize-vr4320
194 // start-sanitize-vr4320
196 unsigned64 t = GPR[RS];
199 while (! (t & ( (unsigned64)1 << 63))
206 printf("lo %d\n", (int) c);
216 // end-sanitize-vr4320
217 // start-sanitize-cygnus
218 // Multiply and Move LO.
219 000000,5.RS,5.RT,5.RD,00100,101000::64::MUL
220 "mul r<RD>, r<RS>, r<RT>"
221 // end-sanitize-cygnus
222 // start-sanitize-vr4320
224 // end-sanitize-vr4320
225 // start-sanitize-cygnus
227 // end-sanitize-cygnus
228 // start-sanitize-cygnus
230 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
231 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
235 // end-sanitize-cygnus
236 // start-sanitize-cygnus
237 // Unsigned Multiply and Move LO.
238 000000,5.RS,5.RT,5.RD,00101,101000::64::MULU
239 "mulu r<RD>, r<RS>, r<RT>"
240 // end-sanitize-cygnus
241 // start-sanitize-vr4320
243 // end-sanitize-vr4320
244 // start-sanitize-cygnus
246 // end-sanitize-cygnus
247 // start-sanitize-cygnus
249 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
250 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
254 // end-sanitize-cygnus
255 // start-sanitize-cygnus
256 // Multiply and Move HI.
257 000000,5.RS,5.RT,5.RD,01100,101000::64::MULHI
258 "mulhi r<RD>, r<RS>, r<RT>"
259 // end-sanitize-cygnus
260 // start-sanitize-vr4320
262 // end-sanitize-vr4320
263 // start-sanitize-cygnus
265 // end-sanitize-cygnus
266 // start-sanitize-cygnus
268 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
269 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
273 // end-sanitize-cygnus
274 // start-sanitize-cygnus
275 // Unsigned Multiply and Move HI.
276 000000,5.RS,5.RT,5.RD,01101,101000::64::MULHIU
277 "mulhiu r<RD>, r<RS>, r<RT>"
278 // end-sanitize-cygnus
279 // start-sanitize-vr4320
281 // end-sanitize-vr4320
282 // start-sanitize-cygnus
284 // end-sanitize-cygnus
285 // start-sanitize-cygnus
287 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
288 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
292 // end-sanitize-cygnus
293 // start-sanitize-cygnus
294 // Multiply, Negate and Move LO.
295 000000,5.RS,5.RT,5.RD,00011,011000::64::MULS
296 "muls r<RD>, r<RS>, r<RT>"
297 // end-sanitize-cygnus
298 // start-sanitize-cygnus
300 // end-sanitize-cygnus
301 // start-sanitize-cygnus
303 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
304 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
308 // end-sanitize-cygnus
309 // start-sanitize-cygnus
310 // Unsigned Multiply, Negate and Move LO.
311 000000,5.RS,5.RT,5.RD,00011,011001::64::MULSU
312 "mulsu r<RD>, r<RS>, r<RT>"
313 // end-sanitize-cygnus
314 // start-sanitize-cygnus
316 // end-sanitize-cygnus
317 // start-sanitize-cygnus
319 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
320 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
324 // end-sanitize-cygnus
325 // start-sanitize-cygnus
326 // Multiply, Negate and Move HI.
327 000000,5.RS,5.RT,5.RD,01011,011000::64::MULSHI
328 "mulshi r<RD>, r<RS>, r<RT>"
329 // end-sanitize-cygnus
330 // start-sanitize-cygnus
332 // end-sanitize-cygnus
333 // start-sanitize-cygnus
335 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
336 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
340 // end-sanitize-cygnus
341 // start-sanitize-cygnus
342 // Unsigned Multiply, Negate and Move HI.
343 000000,5.RS,5.RT,5.RD,01011,011001::64::MULSHIU
344 "mulshiu r<RD>, r<RS>, r<RT>"
345 // end-sanitize-cygnus
346 // start-sanitize-cygnus
348 // end-sanitize-cygnus
349 // start-sanitize-cygnus
351 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
352 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
356 // end-sanitize-cygnus
357 // start-sanitize-cygnus
359 // Multiply, Accumulate and Move LO.
361 000000,5.RS,5.RT,5.RD,00010,101000::64::MACC
362 "macc r<RD>, r<RS>, r<RT>"
363 // end-sanitize-cygnus
364 // start-sanitize-vr4320
366 // end-sanitize-vr4320
367 // start-sanitize-cygnus
369 // end-sanitize-cygnus
370 // start-sanitize-cygnus
372 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
373 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
375 // end-sanitize-cygnus
377 // start-sanitize-vr4xxx
378 000000,5.RS,5.RT,5.RD,00000,101000::::MACC
379 "macc r<RD>, r<RS>, r<RT>"
382 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
383 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
386 000000,5.RS,5.RT,5.RD,00000,101001::::DMACC
387 "dmacc r<RD>, r<RS>, r<RT>"
390 LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
394 000000,5.RS,5.RT,5.RD,10000,101000::::MACCS
395 "maccs r<RD>, r<RS>, r<RT>"
398 SET_MulAcc (SD_, SaturatedAdd (SD_, MulAcc (SD_),
399 SignedMultiply (SD_, GPR[RS], GPR[RT])));
400 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
403 000000,5.RS,5.RT,5.RD,10000,101001::::DMACCS
404 "dmaccs r<RD>, r<RS>, r<RT>"
407 LO = SaturatedAdd (SD_, LO, SignedMultiply (SD_, GPR[RS], GPR[RT]));
415 // end-sanitize-vr4xxx
416 // start-sanitize-cygnus
418 // Unsigned Multiply, Accumulate and Move LO.
420 000000,5.RS,5.RT,5.RD,00011,101000::64::MACCU
421 "maccu r<RD>, r<RS>, r<RT>"
422 // end-sanitize-cygnus
423 // start-sanitize-vr4320
425 // end-sanitize-vr4320
426 // start-sanitize-cygnus
428 // end-sanitize-cygnus
429 // start-sanitize-cygnus
431 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
432 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
435 // end-sanitize-cygnus
436 // start-sanitize-vr4xxx
437 000000,5.RS,5.RT,5.RD,00001,101000::64::MACCU
438 "maccu r<RD>, r<RS>, r<RT>"
441 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
442 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
445 000000,5.RS,5.RT,5.RD,00001,101001::64::DMACCU
446 "dmaccu r<RD>, r<RS>, r<RT>"
449 LO = LO + UnsignedMultiply (SD_, GPR[RS], GPR[RT]);
453 000000,5.RS,5.RT,5.RD,10001,101000::64::MACCUS
454 "maccus r<RD>, r<RS>, r<RT>"
458 SaturatedUnsignedAdd (SD_, MulAcc (SD_),
459 UnsignedMultiply (SD_, GPR[RS], GPR[RT])));
460 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
463 000000,5.RS,5.RT,5.RD,10001,101001::64::DMACCUS
464 "dmaccus r<RD>, r<RS>, r<RT>"
467 LO = SaturatedUnsignedAdd (SD_, LO,
468 UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
474 // end-sanitize-vr4xxx
475 // start-sanitize-cygnus
477 // Multiply, Accumulate and Move HI.
479 000000,5.RS,5.RT,5.RD,01010,101000::64::MACCHI
480 "macchi r<RD>, r<RS>, r<RT>"
481 // end-sanitize-cygnus
482 // start-sanitize-vr4320
484 // end-sanitize-vr4320
485 // start-sanitize-cygnus
487 // end-sanitize-cygnus
488 // start-sanitize-cygnus
490 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
491 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
494 // end-sanitize-cygnus
495 // start-sanitize-vr4xxx
496 000000,5.RS,5.RT,5.RD,01000,101000::64::MACCHI
497 "macchi r<RD>, r<RS>, r<RT>"
500 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
501 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
504 000000,5.RS,5.RT,5.RD,11000,101000::64::MACCHIS
505 "macchis r<RD>, r<RS>, r<RT>"
508 SET_MulAcc (SD_, SaturatedAdd (SD_, MulAcc (SD_),
509 SignedMultiply (SD_, GPR[RS], GPR[RT])));
510 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
515 // end-sanitize-vr4xxx
516 // start-sanitize-cygnus
518 // Unsigned Multiply, Accumulate and Move HI.
520 000000,5.RS,5.RT,5.RD,01011,101000::64::MACCHIU
521 "macchiu r<RD>, r<RS>, r<RT>"
522 // end-sanitize-cygnus
523 // start-sanitize-vr4320
525 // end-sanitize-vr4320
526 // start-sanitize-cygnus
528 // end-sanitize-cygnus
529 // start-sanitize-cygnus
531 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
532 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
536 // end-sanitize-cygnus
537 // start-sanitize-vr4xxx
538 000000,5.RS,5.RT,5.RD,01001,101000::64::MACCHIU
539 "macchiu r<RD>, r<RS>, r<RT>"
542 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
543 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
547 000000,5.RS,5.RT,5.RD,11001,101000::64::MACCHIUS
548 "macchius r<RD>, r<RS>, r<RT>"
552 SaturatedUnsignedAdd (SD_, MulAcc (SD_),
553 UnsignedMultiply (SD_, GPR[RS], GPR[RT])));
554 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
560 // end-sanitize-vr4xxx
561 // start-sanitize-cygnus
562 // Unsigned Multiply, Negate, Accumulate and Move LO.
563 000000,5.RS,5.RT,5.RD,00111,011001::64::MSACU
564 "msacu r<RD>, r<RS>, r<RT>"
565 // end-sanitize-cygnus
566 // start-sanitize-cygnus
568 // end-sanitize-cygnus
569 // start-sanitize-cygnus
571 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
572 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
576 // end-sanitize-cygnus
577 // start-sanitize-cygnus
578 // Multiply, Negate, Accumulate and Move HI.
579 000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
580 "msachi r<RD>, r<RS>, r<RT>"
581 // end-sanitize-cygnus
582 // start-sanitize-cygnus
584 // end-sanitize-cygnus
585 // start-sanitize-cygnus
587 SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
588 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
591 // end-sanitize-cygnus
592 // start-sanitize-cygnus
593 // Unsigned Multiply, Negate, Accumulate and Move HI.
594 000000,5.RS,5.RT,5.RD,01111,011001::64::MSACHIU
595 "msachiu r<RD>, r<RS>, r<RT>"
596 // end-sanitize-cygnus
597 // start-sanitize-cygnus
599 // end-sanitize-cygnus
600 // start-sanitize-cygnus
602 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
603 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
607 // end-sanitize-cygnus
608 // start-sanitize-cygnus
610 000000,00001,5.RT,5.RD,5.SHIFT,000010::64::ROR
611 "ror r<RD>, r<RT>, <SHIFT>"
612 // end-sanitize-cygnus
613 // start-sanitize-cygnus
615 // end-sanitize-cygnus
616 // start-sanitize-cygnus
619 GPR[RD] = ROTR32 (GPR[RT], s);
623 // end-sanitize-cygnus
624 // start-sanitize-cygnus
625 // Rotate Right Variable.
626 000000,5.RS,5.RT,5.RD,00001,000110::64::RORV
627 "rorv r<RD>, r<RT>, <RS>"
628 // end-sanitize-cygnus
629 // start-sanitize-cygnus
631 // end-sanitize-cygnus
632 // start-sanitize-cygnus
634 int s = MASKED (GPR[RS], 4, 0);
635 GPR[RD] = ROTR32 (GPR[RT], s);
639 // end-sanitize-cygnus
640 // start-sanitize-cygnus
641 // Double Rotate Right.
642 000000,00001,5.RT,5.RD,5.SHIFT,111010::64::DROR
643 "dror r<RD>, r<RT>, <SHIFT>"
644 // end-sanitize-cygnus
645 // start-sanitize-cygnus
647 // end-sanitize-cygnus
648 // start-sanitize-cygnus
651 GPR[RD] = ROTR64 (GPR[RT], s);
655 // end-sanitize-cygnus
656 // start-sanitize-cygnus
657 // Double Rotate Right Plus 32.
658 000000,00001,5.RT,5.RD,5.SHIFT,111110::64::DROR32
659 "dror32 r<RD>, r<RT>, <SHIFT>"
660 // end-sanitize-cygnus
661 // start-sanitize-cygnus
663 // end-sanitize-cygnus
664 // start-sanitize-cygnus
667 GPR[RD] = ROTR64 (GPR[RT], s);
671 // end-sanitize-cygnus
672 // start-sanitize-cygnus
673 // Double Rotate Right Variable.
674 000000,5.RS,5.RT,5.RD,00001,010110::64::DRORV
675 "drorv r<RD>, r<RT>, <RS>"
676 // end-sanitize-cygnus
677 // start-sanitize-cygnus
679 // end-sanitize-cygnus
680 // start-sanitize-cygnus
682 int s = MASKED (GPR[RS], 5, 0);
683 GPR[RD] = ROTR64 (GPR[RT], s);
687 // end-sanitize-cygnus