3 // Integer Instructions
4 // --------------------
6 // MulAcc is the Multiply Accumulator.
7 // This register is mapped on the the HI and LO registers.
8 // Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
9 // Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
12 :function:::unsigned64:MulAcc:
14 unsigned64 result = U8_4 (HI, LO);
18 :function:::void:SET_MulAcc:unsigned64 value
20 *AL4_8 (&HI) = VH4_8 (value);
21 *AL4_8 (&LO) = VL4_8 (value);
24 :function:::signed64:SignedMultiply:signed32 l, signed32 r
26 signed64 result = (signed64) l * (signed64) r;
30 :function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
32 unsigned64 result = (unsigned64) l * (unsigned64) r;
36 :function:::unsigned64:Low32Bits:unsigned64 value
38 unsigned64 result = VL4_8 (value);
42 :function:::unsigned64:High32Bits:unsigned64 value
44 unsigned64 result = VH4_8 (value);
50 // Multiply and Move LO.
51 000000,5.RS,5.RT,5.RD,00001,011000::::MUL
52 "mul r<RD>, r<RS>, r<RT>"
55 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
56 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
59 // Unsigned Multiply and Move LO.
60 000000,5.RS,5.RT,5.RD,00001,011001::::MULU
61 "mulu r<RD>, r<RS>, r<RT>"
64 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
65 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
68 // Multiply and Move HI.
69 000000,5.RS,5.RT,5.RD,01001,011000::::MULHI
70 "mulhi r<RD>, r<RS>, r<RT>"
73 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
74 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
77 // Unsigned Multiply and Move HI.
78 000000,5.RS,5.RT,5.RD,01001,011001::::MULHIU
79 "mulhiu r<RD>, r<RS>, r<RT>"
82 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
83 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
87 // Multiply, Negate and Move LO.
88 000000,5.RS,5.RT,5.RD,00011,011000::::MULS
89 "muls r<RD>, r<RS>, r<RT>"
92 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
93 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
96 // Unsigned Multiply, Negate and Move LO.
97 000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
98 "mulsu r<RD>, r<RS>, r<RT>"
101 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
102 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
105 // Multiply, Negate and Move HI.
106 000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
107 "mulshi r<RD>, r<RS>, r<RT>"
110 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
111 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
114 // Unsigned Multiply, Negate and Move HI.
115 000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
116 "mulshiu r<RD>, r<RS>, r<RT>"
119 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
120 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
124 // Multiply, Accumulate and Move LO.
125 000000,5.RS,5.RT,5.RD,00101,011000::::MACC
126 "macc r<RD>, r<RS>, r<RT>"
129 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
130 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
133 // Unsigned Multiply, Accumulate and Move LO.
134 000000,5.RS,5.RT,5.RD,00101,011001::::MACCU
135 "maccu r<RD>, r<RS>, r<RT>"
138 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
139 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
142 // Multiply, Accumulate and Move HI.
143 000000,5.RS,5.RT,5.RD,01101,011000::::MACCHI
144 "macchi r<RD>, r<RS>, r<RT>"
147 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
148 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
151 // Unsigned Multiply, Accumulate and Move HI.
152 000000,5.RS,5.RT,5.RD,01101,011001::::MACCHIU
153 "macchiu r<RD>, r<RS>, r<RT>"
156 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
157 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
161 // Multiply, Negate, Accumulate and Move LO.
162 000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
163 "msac r<RD>, r<RS>, r<RT>"
166 SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
167 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
170 // Unsigned Multiply, Negate, Accumulate and Move LO.
171 000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
172 "msacu r<RD>, r<RS>, r<RT>"
175 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
176 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
179 // Multiply, Negate, Accumulate and Move HI.
180 000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
181 "msachi r<RD>, r<RS>, r<RT>"
184 SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
185 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
188 // Unsigned Multiply, Negate, Accumulate and Move HI.
189 000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
190 "msachiu r<RD>, r<RS>, r<RT>"
193 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
194 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
199 000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
200 "ror r<RD>, r<RT>, <SHIFT>"
204 GPR[RD] = ROTR32 (GPR[RT], s);
207 // Rotate Right Variable.
208 000000,5.RS,5.RT,5.RD,00001,000110::::RORV
209 "rorv r<RD>, r<RT>, <RS>"
212 int s = MASKED (GPR[RS], 4, 0);
213 GPR[RD] = ROTR32 (GPR[RT], s);
216 // Double Rotate Right.
217 000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
218 "dror r<RD>, r<RT>, <SHIFT>"
222 GPR[RD] = ROTR64 (GPR[RT], s);
225 // Double Rotate Right Plus 32.
226 000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
227 "dror32 r<RD>, r<RT>, <SHIFT>"
231 GPR[RD] = ROTR64 (GPR[RT], s);
234 // Double Rotate Right Variable.
235 000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
236 "drorv r<RD>, r<RT>, <RS>"
239 int s = MASKED (GPR[RS], 5, 0);
240 GPR[RD] = ROTR64 (GPR[RT], s);