1 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
3 * simops.c: Don't lose the upper 24 bits of the return
4 pointer in "call" and "calls" instructions. Rough cut
5 at emulated system calls.
7 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
9 * simops.c: Implement remaining 4 byte instructions.
11 * simops.c: Implement remaining 3 byte instructions.
13 * simops.c: Implement remaining 2 byte instructions. Call
14 abort for instructions we're not implementing now.
16 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
18 * simops.c: Implement lots of random instructions.
20 * simops.c: Implement "movm" and "bCC" insns.
22 * mn10300_sim.h (_state): Add another register (MDR).
24 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
25 a few additional random insns.
27 * mn10300_sim.h (PSW_*): Define for CC status tracking.
28 (REG_D0, REG_A0, REG_SP): Define.
29 * simops.c: Implement "add", "addc" and a few other random
32 * gencode.c, interp.c: Snapshot current simulator code.
34 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
36 * Makefile.in, config.in, configure, configure.in: New files.
37 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.