ad4abf2aca430ac9e0df9bfae7e34c16c5582af3
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
1 Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
2
3 * Makefile.in: Last change was bad. Define NL_TARGET
4 so that targ-vals.h will be used instead of syscall.h.
5 * simops.c: Use targ-vals.h instead of syscall.h.
6 (OP_F020): Disable unsupported system calls.
7
8 Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
9
10 * Makefile.in: Get header files from libgloss/mn10300/sys.
11
12 Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
13
14 * simops.c: Include sim-types.h.
15
16 Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
17
18 * simops.c (multiply instructions): Cast input operands to a
19 signed64/unsigned64 type as appropriate.
20
21 Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
22
23 * interp.c (sim_store_register, sim_fetch_register): Pass in
24 length parameter. Return -1.
25
26 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
27
28 * configure: Regenerated to track ../common/aclocal.m4 changes.
29
30 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
31
32 * configure: Regenerated to track ../common/aclocal.m4 changes.
33
34 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
35
36 * configure: Regenerated to track ../common/aclocal.m4 changes.
37
38 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
39
40 * configure: Regenerated to track ../common/aclocal.m4 changes.
41 * config.in: Ditto.
42
43 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
44
45 * configure: Regenerated to track ../common/aclocal.m4 changes.
46
47 Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
48
49 * simops.c (call:16 call:32): Stack adjustment is determined solely
50 by the imm8 field.
51
52 Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
53
54 * interp.c (sim_load): Pass lma_p and sim_write args to
55 sim_load_file.
56
57 Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
58
59 * simops.c: Correctly handle register restores for "ret" and "retf"
60 instructions.
61
62 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
63
64 * configure: Regenerated to track ../common/aclocal.m4 changes.
65
66 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
67
68 * configure: Regenerated to track ../common/aclocal.m4 changes.
69
70 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
71
72 * configure: Regenerated to track ../common/aclocal.m4 changes.
73
74 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
75
76 * configure: Regenerated to track ../common/aclocal.m4 changes.
77
78 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
79
80 * configure: Regenerated to track ../common/aclocal.m4 changes.
81
82 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
83
84 * configure: Regenerated to track ../common/aclocal.m4 changes.
85
86 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
87
88 * configure: Regenerated to track ../common/aclocal.m4 changes.
89
90 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
91
92 * configure: Regenerated to track ../common/aclocal.m4 changes.
93 * config.in: Ditto.
94
95 Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
96
97 * interp.c (sim_kill): Delete.
98 (sim_create_inferior): Add ABFD argument.
99 (sim_load): Move setting of PC from here.
100 (sim_create_inferior): To here.
101
102 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
103
104 * configure: Regenerated to track ../common/aclocal.m4 changes.
105 * config.in: Ditto.
106
107 Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
108
109 * interp.c (sim_open): Add ABFD argument.
110
111 Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
112
113 * interp.c (sim_resume): Clear State.exited.
114 (sim_stop_reason): If State.exited is nonzero, then indicate that
115 the simulator exited instead of stopped.
116 * mn10300_sim.h (struct _state): Add exited field.
117 * simops.c (syscall): Set State.exited for SYS_exit.
118
119 Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
120
121 * simops.c: Fix thinko in last change.
122
123 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
124
125 * simops.c: "call" stores the callee saved registers into the
126 stack! Update the stack pointer properly when done with
127 register saves.
128
129 * simops.c: Fix return address computation for "call" instructions.
130
131 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
132
133 * interp.c (sim_open): Fix typo.
134
135 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
136
137 * interp.c (sim_resume): Add missing case in big switch
138 statement (for extb instruction).
139
140 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
141
142 * interp.c: Replace all references to load_mem and store_mem
143 with references to load_byte, load_half, load_3_byte, load_word
144 and store_byte, store_half, store_3_byte, store_word.
145 (INLINE): Delete definition.
146 (load_mem_big): Likewise.
147 (max_mem): Make it global.
148 (dispatch): Make this function inline.
149 (load_mem, store_mem): Delete functions.
150 * mn10300_sim.h (INLINE): Define.
151 (RLW): Delete unused definition.
152 (load_mem, store_mem): Delete declarations.
153 (load_mem_big): New definition.
154 (load_byte, load_half, load_3_byte, load_word): New functions.
155 (store_byte, store_half, store_3_byte, store_word): New functions.
156 * simops.c: Replace all references to load_mem and store_mem
157 with references to load_byte, load_half, load_3_byte, load_word
158 and store_byte, store_half, store_3_byte, store_word.
159
160 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
161
162 * interp.c (sim_open): Add callback to arguments.
163 (sim_set_callbacks): Delete SIM_DESC argument.
164
165 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
166
167 * interp.c (dispatch): Make this an inline function.
168
169 * simops.c (syscall): Use callback->write regardless of
170 what file descriptor we're writing too.
171
172 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
173
174 * interp.c (load_mem_big): Remove function. It's now a macro
175 defined elsewhere.
176 (compare_simops): New function.
177 (sim_open): Sort the Simops table before inserting entries
178 into the hash table.
179 * mn10300_sim.h: Remove unused #defines.
180 (load_mem_big): Define.
181
182 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
183
184 * interp.c (load_mem): If we get a load from an out of range
185 address, abort.
186 (store_mem): Likewise for stores.
187 (max_mem): New variable.
188
189 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
190
191 * mn10300_sim.h: Fix ordering of bits in the PSW.
192
193 * interp.c: Improve hashing routine to avoid long list
194 traversals for common instructions. Add HASH_STAT support.
195 Rewrite opcode dispatch code using a big switch instead of
196 cascaded if/else statements. Avoid useless calls to load_mem.
197
198 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
199
200 * mn10300_sim.h (struct _state): Add space for mdrq register.
201 (REG_MDRQ): Define.
202 * simops.c: Don't abort for trap. Add support for the extended
203 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
204 and "bsch".
205
206 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
207
208 * configure: Regenerated to track ../common/aclocal.m4 changes.
209
210 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
211
212 * interp.c (sim_stop): Add stub function.
213
214 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
215
216 * Makefile.in (SIM_OBJS): Add sim-load.o.
217 * interp.c (sim_kind, myname): New static locals.
218 (sim_open): Set sim_kind, myname. Ignore -E arg.
219 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
220 load file into simulator. Set start address from bfd.
221 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
222
223 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
224
225 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
226 only include if implemented by host.
227 (OP_F020): Typecast arg passed to time function;
228
229 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
230
231 * simops.c (syscall): Handle new mn10300 calling conventions.
232
233 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
234
235 * configure: Regenerated to track ../common/aclocal.m4 changes.
236 * config.in: Ditto.
237
238 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
239
240 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
241 corresponding change in opcodes directory.
242
243 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
244
245 * interp.c (sim_open): New arg `kind'.
246
247 * configure: Regenerated to track ../common/aclocal.m4 changes.
248
249 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
250
251 * configure: Regenerated to track ../common/aclocal.m4 changes.
252
253 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
254
255 * simops.c: Fix register extraction for a two "movbu" variants.
256 Somewhat simplify "sub" instructions.
257 Correctly sign extend operands for "mul". Put the correct
258 half of the result in MDR for "mul" and "mulu".
259 Implement remaining instructions.
260 Tweak opcode for "syscall".
261
262 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
263
264 * simops.c: Do syscall emulation in "syscall" instruction. Add
265 dummy "trap" instruction.
266
267 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
268
269 * configure: Regenerated to track ../common/aclocal.m4 changes.
270
271 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
272
273 * configure: Re-generate.
274
275 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
276
277 * configure: Regenerate to track ../common/aclocal.m4 changes.
278
279 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
280
281 * interp.c (sim_open): New SIM_DESC result. Argument is now
282 in argv form.
283 (other sim_*): New SIM_DESC argument.
284
285 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
286
287 * simops.c: Fix carry bit computation for "add" instructions.
288
289 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
290 for bset imm8,(d8,an) and bclr imm8,(d8,an).
291
292 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
293
294 * simops.c: Fix register references when computing Z and N bits
295 for lsr imm8,dn.
296
297 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
298
299 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
300 COMMON_{PRE,POST}_CONFIG_FRAG instead.
301 * configure.in: sinclude ../common/aclocal.m4.
302 * configure: Regenerated.
303
304 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
305
306 * interp.c (init_system): Allocate 2^19 bytes of space for the
307 simulator.
308
309 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
310
311 * configure configure.in Makefile.in: Update to new configure
312 scheme which is more compatible with WinGDB builds.
313 * configure.in: Improve comment on how to run autoconf.
314 * configure: Re-run autoconf to get new ../common/aclocal.m4.
315 * Makefile.in: Use autoconf substitution to install common
316 makefile fragment.
317
318 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
319
320 * simops.c: Undo last change to "rol" and "ror", original code
321 was correct!
322
323 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
324
325 * simops.c: Fix "rol" and "ror".
326
327 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
328
329 * simops.c: Fix typo in last change.
330
331 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
332
333 * simops.c: Use REG macros in few places not using them yet.
334
335 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
336
337 * mn10300_sim.h (struct _state): Fix number of registers!
338
339 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
340
341 * mn10300_sim.h (struct _state): Put all registers into a single
342 array to make gdb implementation easier.
343 (REG_*): Add definitions for all registers in the state array.
344 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
345 * simops.c: Related changes.
346
347 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
348
349 * interp.c (sim_resume): Handle 0xff as a single byte insn.
350
351 * simops.c: Fix overflow computation for "add" and "inc"
352 instructions.
353
354 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
355
356 * simops.c: Handle "break" instruction.
357
358 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
359
360 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
361
362 * gencode.c (write_opcodes): Also write out the format of the
363 opcode.
364 * mn10300_sim.h (simops): Add "format" field.
365 * interp.c (sim_resume): Deal with endianness issues here.
366
367 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
368
369 * simops.c (REG0_4): Define.
370 Use REG0_4 for indexed loads/stores.
371
372 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
373
374 * simops.c (REG0_16): Fix typo.
375
376 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
377
378 * simops.c: Call abort for any instruction that's not currently
379 simulated.
380
381 * simops.c: Define accessor macros to extract register
382 values from instructions. Use them consistently.
383
384 * interp.c: Delete unused global variable "OP".
385 (sim_resume): Remove unused variable "opcode".
386 * simops.c: Fix some uninitialized variable problems, add
387 parens to fix various -Wall warnings.
388
389 * gencode.c (write_header): Add "insn" and "extension" arguments
390 to the OP_* declarations.
391 (write_template): Similarly for function templates.
392 * interp.c (insn, extension): Remove global variables. Instead
393 pass them as arguments to the OP_* functions.
394 * mn10300_sim.h: Remove decls for "insn" and "extension".
395 * simops.c (OP_*): Accept "insn" and "extension" as arguments
396 instead of using globals.
397
398 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
399
400 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
401
402 * simops.c: Fix thinkos in last change to "inc dn".
403
404 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
405
406 * simops.c: "add imm,sp" does not effect the condition codes.
407 "inc dn" does effect the condition codes.
408
409 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
410
411 * simops.c: Treat both operands as signed values for
412 "div" instruction.
413
414 * simops.c: Fix simulation of division instructions.
415 Fix typos/thinkos in several "cmp" and "sub" instructions.
416
417 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
418
419 * simops.c: Fix carry bit handling in "sub" and "cmp"
420 instructions.
421
422 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
423
424 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
425
426 * simops.c: Fix overflow computation for many instructions.
427
428 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
429
430 * simops.c: Fix "mov am, dn".
431
432 * simops.c: Fix more bugs in "add imm,an" and
433 "add imm,dn".
434
435 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
436
437 * simops.c: Fix bugs in "movm" and "add imm,an".
438
439 * simops.c: Don't lose the upper 24 bits of the return
440 pointer in "call" and "calls" instructions. Rough cut
441 at emulated system calls.
442
443 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
444
445 * simops.c: Implement remaining 4 byte instructions.
446
447 * simops.c: Implement remaining 3 byte instructions.
448
449 * simops.c: Implement remaining 2 byte instructions. Call
450 abort for instructions we're not implementing now.
451
452 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
453
454 * simops.c: Implement lots of random instructions.
455
456 * simops.c: Implement "movm" and "bCC" insns.
457
458 * mn10300_sim.h (_state): Add another register (MDR).
459 (REG_MDR): Define.
460 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
461 a few additional random insns.
462
463 * mn10300_sim.h (PSW_*): Define for CC status tracking.
464 (REG_D0, REG_A0, REG_SP): Define.
465 * simops.c: Implement "add", "addc" and a few other random
466 instructions.
467
468 * gencode.c, interp.c: Snapshot current simulator code.
469
470 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
471
472 * Makefile.in, config.in, configure, configure.in: New files.
473 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
474
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