1 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
3 * simops.c: Fix return address computation for "call" instructions.
5 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
7 * interp.c (sim_open): Fix typo.
9 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
11 * interp.c (sim_resume): Add missing case in big switch
12 statement (for extb instruction).
14 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
16 * interp.c: Replace all references to load_mem and store_mem
17 with references to load_byte, load_half, load_3_byte, load_word
18 and store_byte, store_half, store_3_byte, store_word.
19 (INLINE): Delete definition.
20 (load_mem_big): Likewise.
21 (max_mem): Make it global.
22 (dispatch): Make this function inline.
23 (load_mem, store_mem): Delete functions.
24 * mn10300_sim.h (INLINE): Define.
25 (RLW): Delete unused definition.
26 (load_mem, store_mem): Delete declarations.
27 (load_mem_big): New definition.
28 (load_byte, load_half, load_3_byte, load_word): New functions.
29 (store_byte, store_half, store_3_byte, store_word): New functions.
30 * simops.c: Replace all references to load_mem and store_mem
31 with references to load_byte, load_half, load_3_byte, load_word
32 and store_byte, store_half, store_3_byte, store_word.
34 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
36 * interp.c (sim_open): Add callback to arguments.
37 (sim_set_callbacks): Delete SIM_DESC argument.
39 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
41 * interp.c (dispatch): Make this an inline function.
43 * simops.c (syscall): Use callback->write regardless of
44 what file descriptor we're writing too.
46 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
48 * interp.c (load_mem_big): Remove function. It's now a macro
50 (compare_simops): New function.
51 (sim_open): Sort the Simops table before inserting entries
53 * mn10300_sim.h: Remove unused #defines.
54 (load_mem_big): Define.
56 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
58 * interp.c (load_mem): If we get a load from an out of range
60 (store_mem): Likewise for stores.
61 (max_mem): New variable.
63 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
65 * mn10300_sim.h: Fix ordering of bits in the PSW.
67 * interp.c: Improve hashing routine to avoid long list
68 traversals for common instructions. Add HASH_STAT support.
69 Rewrite opcode dispatch code using a big switch instead of
70 cascaded if/else statements. Avoid useless calls to load_mem.
72 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
74 * mn10300_sim.h (struct _state): Add space for mdrq register.
76 * simops.c: Don't abort for trap. Add support for the extended
77 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
80 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
82 * configure: Regenerated to track ../common/aclocal.m4 changes.
84 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
86 * interp.c (sim_stop): Add stub function.
88 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
90 * Makefile.in (SIM_OBJS): Add sim-load.o.
91 * interp.c (sim_kind, myname): New static locals.
92 (sim_open): Set sim_kind, myname. Ignore -E arg.
93 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
94 load file into simulator. Set start address from bfd.
95 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
97 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
99 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
100 only include if implemented by host.
101 (OP_F020): Typecast arg passed to time function;
103 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
105 * simops.c (syscall): Handle new mn10300 calling conventions.
107 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
109 * configure: Regenerated to track ../common/aclocal.m4 changes.
112 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
114 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
115 corresponding change in opcodes directory.
117 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
119 * interp.c (sim_open): New arg `kind'.
121 * configure: Regenerated to track ../common/aclocal.m4 changes.
123 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
125 * configure: Regenerated to track ../common/aclocal.m4 changes.
127 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
129 * simops.c: Fix register extraction for a two "movbu" variants.
130 Somewhat simplify "sub" instructions.
131 Correctly sign extend operands for "mul". Put the correct
132 half of the result in MDR for "mul" and "mulu".
133 Implement remaining instructions.
134 Tweak opcode for "syscall".
136 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
138 * simops.c: Do syscall emulation in "syscall" instruction. Add
139 dummy "trap" instruction.
141 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
143 * configure: Regenerated to track ../common/aclocal.m4 changes.
145 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
147 * configure: Re-generate.
149 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
151 * configure: Regenerate to track ../common/aclocal.m4 changes.
153 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
155 * interp.c (sim_open): New SIM_DESC result. Argument is now
157 (other sim_*): New SIM_DESC argument.
159 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
161 * simops.c: Fix carry bit computation for "add" instructions.
163 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
164 for bset imm8,(d8,an) and bclr imm8,(d8,an).
166 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
168 * simops.c: Fix register references when computing Z and N bits
171 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
173 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
174 COMMON_{PRE,POST}_CONFIG_FRAG instead.
175 * configure.in: sinclude ../common/aclocal.m4.
176 * configure: Regenerated.
178 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
180 * interp.c (init_system): Allocate 2^19 bytes of space for the
183 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
185 * configure configure.in Makefile.in: Update to new configure
186 scheme which is more compatible with WinGDB builds.
187 * configure.in: Improve comment on how to run autoconf.
188 * configure: Re-run autoconf to get new ../common/aclocal.m4.
189 * Makefile.in: Use autoconf substitution to install common
192 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
194 * simops.c: Undo last change to "rol" and "ror", original code
197 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
199 * simops.c: Fix "rol" and "ror".
201 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
203 * simops.c: Fix typo in last change.
205 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
207 * simops.c: Use REG macros in few places not using them yet.
209 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
211 * mn10300_sim.h (struct _state): Fix number of registers!
213 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
215 * mn10300_sim.h (struct _state): Put all registers into a single
216 array to make gdb implementation easier.
217 (REG_*): Add definitions for all registers in the state array.
218 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
219 * simops.c: Related changes.
221 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
223 * interp.c (sim_resume): Handle 0xff as a single byte insn.
225 * simops.c: Fix overflow computation for "add" and "inc"
228 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
230 * simops.c: Handle "break" instruction.
232 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
234 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
236 * gencode.c (write_opcodes): Also write out the format of the
238 * mn10300_sim.h (simops): Add "format" field.
239 * interp.c (sim_resume): Deal with endianness issues here.
241 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
243 * simops.c (REG0_4): Define.
244 Use REG0_4 for indexed loads/stores.
246 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
248 * simops.c (REG0_16): Fix typo.
250 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
252 * simops.c: Call abort for any instruction that's not currently
255 * simops.c: Define accessor macros to extract register
256 values from instructions. Use them consistently.
258 * interp.c: Delete unused global variable "OP".
259 (sim_resume): Remove unused variable "opcode".
260 * simops.c: Fix some uninitialized variable problems, add
261 parens to fix various -Wall warnings.
263 * gencode.c (write_header): Add "insn" and "extension" arguments
264 to the OP_* declarations.
265 (write_template): Similarly for function templates.
266 * interp.c (insn, extension): Remove global variables. Instead
267 pass them as arguments to the OP_* functions.
268 * mn10300_sim.h: Remove decls for "insn" and "extension".
269 * simops.c (OP_*): Accept "insn" and "extension" as arguments
270 instead of using globals.
272 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
274 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
276 * simops.c: Fix thinkos in last change to "inc dn".
278 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
280 * simops.c: "add imm,sp" does not effect the condition codes.
281 "inc dn" does effect the condition codes.
283 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
285 * simops.c: Treat both operands as signed values for
288 * simops.c: Fix simulation of division instructions.
289 Fix typos/thinkos in several "cmp" and "sub" instructions.
291 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
293 * simops.c: Fix carry bit handling in "sub" and "cmp"
296 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
298 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
300 * simops.c: Fix overflow computation for many instructions.
302 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
304 * simops.c: Fix "mov am, dn".
306 * simops.c: Fix more bugs in "add imm,an" and
309 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
311 * simops.c: Fix bugs in "movm" and "add imm,an".
313 * simops.c: Don't lose the upper 24 bits of the return
314 pointer in "call" and "calls" instructions. Rough cut
315 at emulated system calls.
317 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
319 * simops.c: Implement remaining 4 byte instructions.
321 * simops.c: Implement remaining 3 byte instructions.
323 * simops.c: Implement remaining 2 byte instructions. Call
324 abort for instructions we're not implementing now.
326 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
328 * simops.c: Implement lots of random instructions.
330 * simops.c: Implement "movm" and "bCC" insns.
332 * mn10300_sim.h (_state): Add another register (MDR).
334 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
335 a few additional random insns.
337 * mn10300_sim.h (PSW_*): Define for CC status tracking.
338 (REG_D0, REG_A0, REG_SP): Define.
339 * simops.c: Implement "add", "addc" and a few other random
342 * gencode.c, interp.c: Snapshot current simulator code.
344 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
346 * Makefile.in, config.in, configure, configure.in: New files.
347 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.