sim/mn10300/ChangeLog

   1 Wed Nov 27 09:20:42 1996  Jeffrey A Law  (law@cygnus.com)
   2
   3         * simops.c Implement remaining 3 byte instructions.
   4
   5         * simops.c: Implement remaining 2 byte instructions.  Call
   6         abort for instructions we're not implementing now.
   7
   8 Tue Nov 26 15:43:41 1996  Jeffrey A Law  (law@cygnus.com)
   9
  10         * simops.c: Implement lots of random instructions.
  11
  12         * simops.c: Implement "movm" and "bCC" insns.
  13
  14         * mn10300_sim.h (_state): Add another register (MDR).
  15         (REG_MDR): Define.
  16         * simops.c: Implement "cmp", "calls", "rets", "jmp" and
  17         a few additional random insns.
  18
  19         * mn10300_sim.h (PSW_*): Define for CC status tracking.
  20         (REG_D0, REG_A0, REG_SP): Define.
  21         * simops.c: Implement "add", "addc" and a few other random
  22         instructions.
  23
  24         * gencode.c, interp.c: Snapshot current simulator code.
  25
  26 Mon Nov 25 12:46:38 1996  Jeffrey A Law  (law@cygnus.com)
  27
  28         * Makefile.in, config.in, configure, configure.in: New files.
  29         * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
  30