sim/mn10300/ChangeLog

   1 Wed Nov 27 09:20:42 1996  Jeffrey A Law  (law@cygnus.com)
   2
   3         * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
   4
   5         * simops.c: Implement remaining 4 byte instructions.
   6
   7         * simops.c: Implement remaining 3 byte instructions.
   8
   9         * simops.c: Implement remaining 2 byte instructions.  Call
  10         abort for instructions we're not implementing now.
  11
  12 Tue Nov 26 15:43:41 1996  Jeffrey A Law  (law@cygnus.com)
  13
  14         * simops.c: Implement lots of random instructions.
  15
  16         * simops.c: Implement "movm" and "bCC" insns.
  17
  18         * mn10300_sim.h (_state): Add another register (MDR).
  19         (REG_MDR): Define.
  20         * simops.c: Implement "cmp", "calls", "rets", "jmp" and
  21         a few additional random insns.
  22
  23         * mn10300_sim.h (PSW_*): Define for CC status tracking.
  24         (REG_D0, REG_A0, REG_SP): Define.
  25         * simops.c: Implement "add", "addc" and a few other random
  26         instructions.
  27
  28         * gencode.c, interp.c: Snapshot current simulator code.
  29
  30 Mon Nov 25 12:46:38 1996  Jeffrey A Law  (law@cygnus.com)
  31
  32         * Makefile.in, config.in, configure, configure.in: New files.
  33         * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
  34