sim/mn10300/interp.c

   1 #include <signal.h>
   2 #include "sysdep.h"
   3 #include "bfd.h"
   4
   5 #include "mn10300_sim.h"
   6
   7 host_callback *mn10300_callback;
   8 int mn10300_debug;
   9 static SIM_OPEN_KIND sim_kind;
  10 static char *myname;
  11
  12 static void dispatch PARAMS ((uint32, uint32, int));
  13 static long hash PARAMS ((long));
  14 static void init_system PARAMS ((void));
  15 #define MAX_HASH  127
  16
  17 struct hash_entry
  18 {
  19   struct hash_entry *next;
  20   long opcode;
  21   long mask;
  22   struct simops *ops;
  23 #ifdef HASH_STAT
  24   unsigned long count;
  25 #endif
  26 };
  27
  28 static int max_mem = 0;
  29 struct hash_entry hash_table[MAX_HASH+1];
  30
  31
  32 /* This probably doesn't do a very good job at bucket filling, but
  33    it's simple... */
  34 static INLINE long
  35 hash(insn)
  36      long insn;
  37 {
  38   /* These are one byte insns, we special case these since, in theory,
  39      they should be the most heavily used.  */
  40   if ((insn & 0xffffff00) == 0)
  41     {
  42       switch (insn & 0xf0)
  43         {
  44           case 0x00:
  45             return 0x70;
  46
  47           case 0x40:
  48             return 0x71;
  49
  50           case 0x10:
  51             return 0x72;
  52
  53           case 0x30:
  54             return 0x73;
  55
  56           case 0x50:
  57             return 0x74;
  58
  59           case 0x60:
  60             return 0x75;
  61
  62           case 0x70:
  63             return 0x76;
  64
  65           case 0x80:
  66             return 0x77;
  67
  68           case 0x90:
  69             return 0x78;
  70
  71           case 0xa0:
  72             return 0x79;
  73
  74           case 0xb0:
  75             return 0x7a;
  76
  77           case 0xe0:
  78             return 0x7b;
  79
  80           default:
  81             return 0x7c;
  82         }
  83     }
  84
  85   /* These are two byte insns */
  86   if ((insn & 0xffff0000) == 0)
  87     {
  88       if ((insn & 0xf000) == 0x2000
  89           || (insn & 0xf000) == 0x5000)
  90         return ((insn & 0xfc00) >> 8) & 0x7f;
  91
  92       if ((insn & 0xf000) == 0x4000)
  93         return ((insn & 0xf300) >> 8) & 0x7f;
  94
  95       if ((insn & 0xf000) == 0x8000
  96           || (insn & 0xf000) == 0x9000
  97           || (insn & 0xf000) == 0xa000
  98           || (insn & 0xf000) == 0xb000)
  99         return ((insn & 0xf000) >> 8) & 0x7f;
 100
 101       if ((insn & 0xff00) == 0xf000
 102           || (insn & 0xff00) == 0xf100
 103           || (insn & 0xff00) == 0xf200
 104           || (insn & 0xff00) == 0xf500
 105           || (insn & 0xff00) == 0xf600)
 106         return ((insn & 0xfff0) >> 4) & 0x7f;
 107
 108       if ((insn & 0xf000) == 0xc000)
 109         return ((insn & 0xff00) >> 8) & 0x7f;
 110
 111       return ((insn & 0xffc0) >> 6) & 0x7f;
 112     }
 113
 114   /* These are three byte insns.  */
 115   if ((insn & 0xff000000) == 0)
 116     {
 117       if ((insn & 0xf00000) == 0x000000)
 118         return ((insn & 0xf30000) >> 16) & 0x7f;
 119
 120       if ((insn & 0xf00000) == 0x200000
 121           || (insn & 0xf00000) == 0x300000)
 122         return ((insn & 0xfc0000) >> 16) & 0x7f;
 123
 124       if ((insn & 0xff0000) == 0xf80000)
 125         return ((insn & 0xfff000) >> 12) & 0x7f;
 126
 127       if ((insn & 0xff0000) == 0xf90000)
 128         return ((insn & 0xfffc00) >> 10) & 0x7f;
 129
 130       return ((insn & 0xff0000) >> 16) & 0x7f;
 131     }
 132
 133   /* These are four byte or larger insns.  */
 134   if ((insn & 0xf0000000) == 0xf0000000)
 135     return ((insn & 0xfff00000) >> 20) & 0x7f;
 136
 137   return ((insn & 0xff000000) >> 24) & 0x7f;
 138 }
 139
 140 static INLINE void
 141 dispatch (insn, extension, length)
 142      uint32 insn;
 143      uint32 extension;
 144      int length;
 145 {
 146   struct hash_entry *h;
 147
 148   h = &hash_table[hash(insn)];
 149
 150   while ((insn & h->mask) != h->opcode
 151           || (length != h->ops->length))
 152     {
 153       if (!h->next)
 154         {
 155           (*mn10300_callback->printf_filtered) (mn10300_callback,
 156             "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
 157           exit(1);
 158         }
 159       h = h->next;
 160     }
 161
 162
 163 #ifdef HASH_STAT
 164   h->count++;
 165 #endif
 166
 167   /* Now call the right function.  */
 168   (h->ops->func)(insn, extension);
 169   PC += length;
 170 }
 171
 172 /* FIXME These would more efficient to use than load_mem/store_mem,
 173    but need to be changed to use the memory map.  */
 174
 175 uint8
 176 get_byte (x)
 177      uint8 *x;
 178 {
 179   return *x;
 180 }
 181
 182 uint16
 183 get_half (x)
 184      uint8 *x;
 185 {
 186   uint8 *a = x;
 187   return (a[1] << 8) + (a[0]);
 188 }
 189
 190 uint32
 191 get_word (x)
 192       uint8 *x;
 193 {
 194   uint8 *a = x;
 195   return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
 196 }
 197
 198 void
 199 put_byte (addr, data)
 200      uint8 *addr;
 201      uint8 data;
 202 {
 203   uint8 *a = addr;
 204   a[0] = data;
 205 }
 206
 207 void
 208 put_half (addr, data)
 209      uint8 *addr;
 210      uint16 data;
 211 {
 212   uint8 *a = addr;
 213   a[0] = data & 0xff;
 214   a[1] = (data >> 8) & 0xff;
 215 }
 216
 217 void
 218 put_word (addr, data)
 219      uint8 *addr;
 220      uint32 data;
 221 {
 222   uint8 *a = addr;
 223   a[0] = data & 0xff;
 224   a[1] = (data >> 8) & 0xff;
 225   a[2] = (data >> 16) & 0xff;
 226   a[3] = (data >> 24) & 0xff;
 227 }
 228
 229 void
 230 sim_size (power)
 231      int power;
 232
 233 {
 234   if (State.mem)
 235     free (State.mem);
 236
 237   max_mem = 1 << power;
 238   State.mem = (uint8 *) calloc (1,  1 << power);
 239   if (!State.mem)
 240     {
 241       (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
 242       exit (1);
 243     }
 244 }
 245
 246 static void
 247 init_system ()
 248 {
 249   if (!State.mem)
 250     sim_size(19);
 251 }
 252
 253 int
 254 sim_write (sd, addr, buffer, size)
 255      SIM_DESC sd;
 256      SIM_ADDR addr;
 257      unsigned char *buffer;
 258      int size;
 259 {
 260   int i;
 261
 262   init_system ();
 263
 264   for (i = 0; i < size; i++)
 265     store_byte (addr + i, buffer[i]);
 266
 267   return size;
 268 }
 269
 270 /* Compare two opcode table entries for qsort.  */
 271 static int
 272 compare_simops (arg1, arg2)
 273      const PTR arg1;
 274      const PTR arg2;
 275 {
 276   unsigned long code1 = ((struct simops *)arg1)->opcode;
 277   unsigned long code2 = ((struct simops *)arg2)->opcode;
 278
 279   if (code1 < code2)
 280     return -1;
 281   if (code2 < code1)
 282     return 1;
 283   return 0;
 284 }
 285
 286 SIM_DESC
 287 sim_open (kind, cb, abfd, argv)
 288      SIM_OPEN_KIND kind;
 289      host_callback *cb;
 290      struct _bfd *abfd;
 291      char **argv;
 292 {
 293   struct simops *s;
 294   struct hash_entry *h;
 295   char **p;
 296   int i;
 297
 298   mn10300_callback = cb;
 299
 300   /* Sort the opcode array from smallest opcode to largest.
 301      This will generally improve simulator performance as the smaller
 302      opcodes are generally preferred to the larger opcodes.  */
 303   for (i = 0, s = Simops; s->func; s++, i++)
 304     ;
 305   qsort (Simops, i, sizeof (Simops[0]), compare_simops);
 306
 307   sim_kind = kind;
 308   myname = argv[0];
 309
 310   for (p = argv + 1; *p; ++p)
 311     {
 312       if (strcmp (*p, "-E") == 0)
 313         ++p; /* ignore endian spec */
 314       else
 315 #ifdef DEBUG
 316       if (strcmp (*p, "-t") == 0)
 317         mn10300_debug = DEBUG;
 318       else
 319 #endif
 320         (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
 321     }
 322
 323  /* put all the opcodes in the hash table */
 324   for (s = Simops; s->func; s++)
 325     {
 326       h = &hash_table[hash(s->opcode)];
 327
 328       /* go to the last entry in the chain */
 329       while (h->next)
 330         {
 331           /* Don't insert the same opcode more than once.  */
 332           if (h->opcode == s->opcode
 333               && h->mask == s->mask
 334               && h->ops == s)
 335             break;
 336           else
 337             h = h->next;
 338         }
 339
 340       /* Don't insert the same opcode more than once.  */
 341       if (h->opcode == s->opcode
 342           && h->mask == s->mask
 343           && h->ops == s)
 344         continue;
 345
 346       if (h->ops)
 347         {
 348           h->next = calloc(1,sizeof(struct hash_entry));
 349           h = h->next;
 350         }
 351       h->ops = s;
 352       h->mask = s->mask;
 353       h->opcode = s->opcode;
 354 #if HASH_STAT
 355       h->count = 0;
 356 #endif
 357     }
 358
 359
 360   /* fudge our descriptor for now */
 361   return (SIM_DESC) 1;
 362 }
 363
 364
 365 void
 366 sim_close (sd, quitting)
 367      SIM_DESC sd;
 368      int quitting;
 369 {
 370   /* nothing to do */
 371 }
 372
 373 void
 374 sim_set_profile (n)
 375      int n;
 376 {
 377   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
 378 }
 379
 380 void
 381 sim_set_profile_size (n)
 382      int n;
 383 {
 384   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
 385 }
 386
 387 int
 388 sim_stop (sd)
 389      SIM_DESC sd;
 390 {
 391   return 0;
 392 }
 393
 394 void
 395 sim_resume (sd, step, siggnal)
 396      SIM_DESC sd;
 397      int step, siggnal;
 398 {
 399   uint32 inst;
 400   reg_t oldpc;
 401   struct hash_entry *h;
 402
 403   if (step)
 404     State.exception = SIGTRAP;
 405   else
 406     State.exception = 0;
 407
 408   State.exited = 0;
 409
 410   do
 411     {
 412       unsigned long insn, extension;
 413
 414       /* Fetch the current instruction.  */
 415       inst = load_mem_big (PC, 2);
 416       oldpc = PC;
 417
 418       /* Using a giant case statement may seem like a waste because of the
 419         code/rodata size the table itself will consume.  However, using
 420         a giant case statement speeds up the simulator by 10-15% by avoiding
 421         cascading if/else statements or cascading case statements.  */
 422
 423       switch ((inst >> 8) & 0xff)
 424         {
 425           /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
 426              which must be handled specially.  */
 427           case 0x00:
 428           case 0x04:
 429           case 0x08:
 430           case 0x0c:
 431           case 0x10:
 432           case 0x11:
 433           case 0x12:
 434           case 0x13:
 435           case 0x14:
 436           case 0x15:
 437           case 0x16:
 438           case 0x17:
 439           case 0x18:
 440           case 0x19:
 441           case 0x1a:
 442           case 0x1b:
 443           case 0x1c:
 444           case 0x1d:
 445           case 0x1e:
 446           case 0x1f:
 447           case 0x3c:
 448           case 0x3d:
 449           case 0x3e:
 450           case 0x3f:
 451           case 0x40:
 452           case 0x41:
 453           case 0x44:
 454           case 0x45:
 455           case 0x48:
 456           case 0x49:
 457           case 0x4c:
 458           case 0x4d:
 459           case 0x50:
 460           case 0x51:
 461           case 0x52:
 462           case 0x53:
 463           case 0x54:
 464           case 0x55:
 465           case 0x56:
 466           case 0x57:
 467           case 0x60:
 468           case 0x61:
 469           case 0x62:
 470           case 0x63:
 471           case 0x64:
 472           case 0x65:
 473           case 0x66:
 474           case 0x67:
 475           case 0x68:
 476           case 0x69:
 477           case 0x6a:
 478           case 0x6b:
 479           case 0x6c:
 480           case 0x6d:
 481           case 0x6e:
 482           case 0x6f:
 483           case 0x70:
 484           case 0x71:
 485           case 0x72:
 486           case 0x73:
 487           case 0x74:
 488           case 0x75:
 489           case 0x76:
 490           case 0x77:
 491           case 0x78:
 492           case 0x79:
 493           case 0x7a:
 494           case 0x7b:
 495           case 0x7c:
 496           case 0x7d:
 497           case 0x7e:
 498           case 0x7f:
 499           case 0xcb:
 500           case 0xd0:
 501           case 0xd1:
 502           case 0xd2:
 503           case 0xd3:
 504           case 0xd4:
 505           case 0xd5:
 506           case 0xd6:
 507           case 0xd7:
 508           case 0xd8:
 509           case 0xd9:
 510           case 0xda:
 511           case 0xdb:
 512           case 0xe0:
 513           case 0xe1:
 514           case 0xe2:
 515           case 0xe3:
 516           case 0xe4:
 517           case 0xe5:
 518           case 0xe6:
 519           case 0xe7:
 520           case 0xe8:
 521           case 0xe9:
 522           case 0xea:
 523           case 0xeb:
 524           case 0xec:
 525           case 0xed:
 526           case 0xee:
 527           case 0xef:
 528           case 0xff:
 529             insn = (inst >> 8) & 0xff;
 530             extension = 0;
 531             dispatch (insn, extension, 1);
 532             break;
 533
 534           /* Special cases where dm == dn is used to encode a different
 535              instruction.  */
 536           case 0x80:
 537           case 0x85:
 538           case 0x8a:
 539           case 0x8f:
 540           case 0x90:
 541           case 0x95:
 542           case 0x9a:
 543           case 0x9f:
 544           case 0xa0:
 545           case 0xa5:
 546           case 0xaa:
 547           case 0xaf:
 548           case 0xb0:
 549           case 0xb5:
 550           case 0xba:
 551           case 0xbf:
 552             insn = inst;
 553             extension = 0;
 554             dispatch (insn, extension, 2);
 555             break;
 556
 557           case 0x81:
 558           case 0x82:
 559           case 0x83:
 560           case 0x84:
 561           case 0x86:
 562           case 0x87:
 563           case 0x88:
 564           case 0x89:
 565           case 0x8b:
 566           case 0x8c:
 567           case 0x8d:
 568           case 0x8e:
 569           case 0x91:
 570           case 0x92:
 571           case 0x93:
 572           case 0x94:
 573           case 0x96:
 574           case 0x97:
 575           case 0x98:
 576           case 0x99:
 577           case 0x9b:
 578           case 0x9c:
 579           case 0x9d:
 580           case 0x9e:
 581           case 0xa1:
 582           case 0xa2:
 583           case 0xa3:
 584           case 0xa4:
 585           case 0xa6:
 586           case 0xa7:
 587           case 0xa8:
 588           case 0xa9:
 589           case 0xab:
 590           case 0xac:
 591           case 0xad:
 592           case 0xae:
 593           case 0xb1:
 594           case 0xb2:
 595           case 0xb3:
 596           case 0xb4:
 597           case 0xb6:
 598           case 0xb7:
 599           case 0xb8:
 600           case 0xb9:
 601           case 0xbb:
 602           case 0xbc:
 603           case 0xbd:
 604           case 0xbe:
 605             insn = (inst >> 8) & 0xff;
 606             extension = 0;
 607           dispatch (insn, extension, 1);
 608           break;
 609
 610           /* The two byte instructions.  */
 611           case 0x20:
 612           case 0x21:
 613           case 0x22:
 614           case 0x23:
 615           case 0x28:
 616           case 0x29:
 617           case 0x2a:
 618           case 0x2b:
 619           case 0x42:
 620           case 0x43:
 621           case 0x46:
 622           case 0x47:
 623           case 0x4a:
 624           case 0x4b:
 625           case 0x4e:
 626           case 0x4f:
 627           case 0x58:
 628           case 0x59:
 629           case 0x5a:
 630           case 0x5b:
 631           case 0x5c:
 632           case 0x5d:
 633           case 0x5e:
 634           case 0x5f:
 635           case 0xc0:
 636           case 0xc1:
 637           case 0xc2:
 638           case 0xc3:
 639           case 0xc4:
 640           case 0xc5:
 641           case 0xc6:
 642           case 0xc7:
 643           case 0xc8:
 644           case 0xc9:
 645           case 0xca:
 646           case 0xce:
 647           case 0xcf:
 648           case 0xf0:
 649           case 0xf1:
 650           case 0xf2:
 651           case 0xf3:
 652           case 0xf4:
 653           case 0xf5:
 654           case 0xf6:
 655             insn = inst;
 656             extension = 0;
 657             dispatch (insn, extension, 2);
 658             break;
 659
 660           /* The three byte insns with a 16bit operand in little endian
 661              format.  */
 662           case 0x01:
 663           case 0x02:
 664           case 0x03:
 665           case 0x05:
 666           case 0x06:
 667           case 0x07:
 668           case 0x09:
 669           case 0x0a:
 670           case 0x0b:
 671           case 0x0d:
 672           case 0x0e:
 673           case 0x0f:
 674           case 0x24:
 675           case 0x25:
 676           case 0x26:
 677           case 0x27:
 678           case 0x2c:
 679           case 0x2d:
 680           case 0x2e:
 681           case 0x2f:
 682           case 0x30:
 683           case 0x31:
 684           case 0x32:
 685           case 0x33:
 686           case 0x34:
 687           case 0x35:
 688           case 0x36:
 689           case 0x37:
 690           case 0x38:
 691           case 0x39:
 692           case 0x3a:
 693           case 0x3b:
 694           case 0xcc:
 695             insn = load_byte (PC);
 696             insn <<= 16;
 697             insn |= load_half (PC + 1);
 698             extension = 0;
 699             dispatch (insn, extension, 3);
 700             break;
 701
 702           /* The three byte insns without 16bit operand.  */
 703           case 0xde:
 704           case 0xdf:
 705           case 0xf8:
 706           case 0xf9:
 707             insn = load_mem_big (PC, 3);
 708             extension = 0;
 709             dispatch (insn, extension, 3);
 710             break;
 711
 712           /* Four byte insns.  */
 713           case 0xfa:
 714           case 0xfb:
 715             if ((inst & 0xfffc) == 0xfaf0
 716                 || (inst & 0xfffc) == 0xfaf4
 717                 || (inst & 0xfffc) == 0xfaf8)
 718               insn = load_mem_big (PC, 4);
 719             else
 720               {
 721                 insn = inst;
 722                 insn <<= 16;
 723                 insn |= load_half (PC + 2);
 724                 extension = 0;
 725               }
 726             dispatch (insn, extension, 4);
 727             break;
 728
 729           /* Five byte insns.  */
 730           case 0xcd:
 731             insn = load_byte (PC);
 732             insn <<= 24;
 733             insn |= (load_half (PC + 1) << 8);
 734             insn |= load_byte (PC + 3);
 735             extension = load_byte (PC + 4);
 736             dispatch (insn, extension, 5);
 737             break;
 738
 739           case 0xdc:
 740             insn = load_byte (PC);
 741             insn <<= 24;
 742             extension = load_word (PC + 1);
 743             insn |= (extension & 0xffffff00) >> 8;
 744             extension &= 0xff;
 745             dispatch (insn, extension, 5);
 746             break;
 747
 748           /* Six byte insns.  */
 749           case 0xfc:
 750           case 0xfd:
 751             insn = (inst << 16);
 752             extension = load_word (PC + 2);
 753             insn |= ((extension & 0xffff0000) >> 16);
 754             extension &= 0xffff;
 755             dispatch (insn, extension, 6);
 756             break;
 757
 758           case 0xdd:
 759             insn = load_byte (PC) << 24;
 760             extension = load_word (PC + 1);
 761             insn |= ((extension >> 8) & 0xffffff);
 762             extension = (extension & 0xff) << 16;
 763             extension |= load_byte (PC + 5) << 8;
 764             extension |= load_byte (PC + 6);
 765             dispatch (insn, extension, 7);
 766             break;
 767
 768           case 0xfe:
 769             insn = inst << 16;
 770             extension = load_word (PC + 2);
 771             insn |= ((extension >> 16) & 0xffff);
 772             extension <<= 8;
 773             extension &= 0xffff00;
 774             extension |= load_byte (PC + 6);
 775             dispatch (insn, extension, 7);
 776             break;
 777
 778           default:
 779             abort ();
 780         }
 781     }
 782   while (!State.exception);
 783
 784 #ifdef HASH_STAT
 785   {
 786     int i;
 787     for (i = 0; i < MAX_HASH; i++)
 788       {
 789          struct hash_entry *h;
 790          h = &hash_table[i];
 791
 792          printf("hash 0x%x:\n", i);
 793
 794          while (h)
 795            {
 796              printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
 797              h = h->next;
 798            }
 799
 800          printf("\n\n");
 801       }
 802     fflush (stdout);
 803   }
 804 #endif
 805
 806 }
 807
 808 int
 809 sim_trace (sd)
 810      SIM_DESC sd;
 811 {
 812 #ifdef DEBUG
 813   mn10300_debug = DEBUG;
 814 #endif
 815   sim_resume (sd, 0, 0);
 816   return 1;
 817 }
 818
 819 void
 820 sim_info (sd, verbose)
 821      SIM_DESC sd;
 822      int verbose;
 823 {
 824   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
 825 }
 826
 827 SIM_RC
 828 sim_create_inferior (sd, argv, env)
 829      SIM_DESC sd;
 830      char **argv;
 831      char **env;
 832 {
 833   return SIM_RC_OK;
 834 }
 835
 836 void
 837 sim_set_callbacks (p)
 838      host_callback *p;
 839 {
 840   mn10300_callback = p;
 841 }
 842
 843 /* All the code for exiting, signals, etc needs to be revamped.
 844
 845    This is enough to get c-torture limping though.  */
 846
 847 void
 848 sim_stop_reason (sd, reason, sigrc)
 849      SIM_DESC sd;
 850      enum sim_stop *reason;
 851      int *sigrc;
 852 {
 853   if (State.exited)
 854     *reason = sim_exited;
 855   else
 856     *reason = sim_stopped;
 857   if (State.exception == SIGQUIT)
 858     *sigrc = 0;
 859   else
 860     *sigrc = State.exception;
 861 }
 862
 863 void
 864 sim_fetch_register (sd, rn, memory)
 865      SIM_DESC sd;
 866      int rn;
 867      unsigned char *memory;
 868 {
 869   put_word (memory, State.regs[rn]);
 870 }
 871
 872 void
 873 sim_store_register (sd, rn, memory)
 874      SIM_DESC sd;
 875      int rn;
 876      unsigned char *memory;
 877 {
 878   State.regs[rn] = get_word (memory);
 879 }
 880
 881 int
 882 sim_read (sd, addr, buffer, size)
 883      SIM_DESC sd;
 884      SIM_ADDR addr;
 885      unsigned char *buffer;
 886      int size;
 887 {
 888   int i;
 889   for (i = 0; i < size; i++)
 890     buffer[i] = load_byte (addr + i);
 891
 892   return size;
 893 }
 894
 895 void
 896 sim_do_command (sd, cmd)
 897      SIM_DESC sd;
 898      char *cmd;
 899 {
 900   (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
 901 }
 902
 903 SIM_RC
 904 sim_load (sd, prog, abfd, from_tty)
 905      SIM_DESC sd;
 906      char *prog;
 907      bfd *abfd;
 908      int from_tty;
 909 {
 910   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
 911   bfd *prog_bfd;
 912
 913   prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
 914                             sim_kind == SIM_OPEN_DEBUG);
 915   if (prog_bfd == NULL)
 916     return SIM_RC_FAIL;
 917   PC = bfd_get_start_address (prog_bfd);
 918   if (abfd == NULL)
 919     bfd_close (prog_bfd);
 920   return SIM_RC_OK;
 921 }