sim/mn10300/interp.c

   1 #include <signal.h>
   2 #include "sysdep.h"
   3 #include "bfd.h"
   4
   5 #include "mn10300_sim.h"
   6
   7 host_callback *mn10300_callback;
   8 int mn10300_debug;
   9 static SIM_OPEN_KIND sim_kind;
  10 static char *myname;
  11
  12 static void dispatch PARAMS ((uint32, uint32, int));
  13 static long hash PARAMS ((long));
  14 static void init_system PARAMS ((void));
  15 #define MAX_HASH  127
  16
  17 struct hash_entry
  18 {
  19   struct hash_entry *next;
  20   long opcode;
  21   long mask;
  22   struct simops *ops;
  23 #ifdef HASH_STAT
  24   unsigned long count;
  25 #endif
  26 };
  27
  28 static int max_mem = 0;
  29 struct hash_entry hash_table[MAX_HASH+1];
  30
  31
  32 /* This probably doesn't do a very good job at bucket filling, but
  33    it's simple... */
  34 static INLINE long
  35 hash(insn)
  36      long insn;
  37 {
  38   /* These are one byte insns, we special case these since, in theory,
  39      they should be the most heavily used.  */
  40   if ((insn & 0xffffff00) == 0)
  41     {
  42       switch (insn & 0xf0)
  43         {
  44           case 0x00:
  45             return 0x70;
  46
  47           case 0x40:
  48             return 0x71;
  49
  50           case 0x10:
  51             return 0x72;
  52
  53           case 0x30:
  54             return 0x73;
  55
  56           case 0x50:
  57             return 0x74;
  58
  59           case 0x60:
  60             return 0x75;
  61
  62           case 0x70:
  63             return 0x76;
  64
  65           case 0x80:
  66             return 0x77;
  67
  68           case 0x90:
  69             return 0x78;
  70
  71           case 0xa0:
  72             return 0x79;
  73
  74           case 0xb0:
  75             return 0x7a;
  76
  77           case 0xe0:
  78             return 0x7b;
  79
  80           default:
  81             return 0x7c;
  82         }
  83     }
  84
  85   /* These are two byte insns */
  86   if ((insn & 0xffff0000) == 0)
  87     {
  88       if ((insn & 0xf000) == 0x2000
  89           || (insn & 0xf000) == 0x5000)
  90         return ((insn & 0xfc00) >> 8) & 0x7f;
  91
  92       if ((insn & 0xf000) == 0x4000)
  93         return ((insn & 0xf300) >> 8) & 0x7f;
  94
  95       if ((insn & 0xf000) == 0x8000
  96           || (insn & 0xf000) == 0x9000
  97           || (insn & 0xf000) == 0xa000
  98           || (insn & 0xf000) == 0xb000)
  99         return ((insn & 0xf000) >> 8) & 0x7f;
 100
 101       if ((insn & 0xff00) == 0xf000
 102           || (insn & 0xff00) == 0xf100
 103           || (insn & 0xff00) == 0xf200
 104           || (insn & 0xff00) == 0xf500
 105           || (insn & 0xff00) == 0xf600)
 106         return ((insn & 0xfff0) >> 4) & 0x7f;
 107
 108       if ((insn & 0xf000) == 0xc000)
 109         return ((insn & 0xff00) >> 8) & 0x7f;
 110
 111       return ((insn & 0xffc0) >> 6) & 0x7f;
 112     }
 113
 114   /* These are three byte insns.  */
 115   if ((insn & 0xff000000) == 0)
 116     {
 117       if ((insn & 0xf00000) == 0x000000)
 118         return ((insn & 0xf30000) >> 16) & 0x7f;
 119
 120       if ((insn & 0xf00000) == 0x200000
 121           || (insn & 0xf00000) == 0x300000)
 122         return ((insn & 0xfc0000) >> 16) & 0x7f;
 123
 124       if ((insn & 0xff0000) == 0xf80000)
 125         return ((insn & 0xfff000) >> 12) & 0x7f;
 126
 127       if ((insn & 0xff0000) == 0xf90000)
 128         return ((insn & 0xfffc00) >> 10) & 0x7f;
 129
 130       return ((insn & 0xff0000) >> 16) & 0x7f;
 131     }
 132
 133   /* These are four byte or larger insns.  */
 134   if ((insn & 0xf0000000) == 0xf0000000)
 135     return ((insn & 0xfff00000) >> 20) & 0x7f;
 136
 137   return ((insn & 0xff000000) >> 24) & 0x7f;
 138 }
 139
 140 static INLINE void
 141 dispatch (insn, extension, length)
 142      uint32 insn;
 143      uint32 extension;
 144      int length;
 145 {
 146   struct hash_entry *h;
 147
 148   h = &hash_table[hash(insn)];
 149
 150   while ((insn & h->mask) != h->opcode
 151           || (length != h->ops->length))
 152     {
 153       if (!h->next)
 154         {
 155           (*mn10300_callback->printf_filtered) (mn10300_callback,
 156             "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
 157           exit(1);
 158         }
 159       h = h->next;
 160     }
 161
 162
 163 #ifdef HASH_STAT
 164   h->count++;
 165 #endif
 166
 167   /* Now call the right function.  */
 168   (h->ops->func)(insn, extension);
 169   PC += length;
 170 }
 171
 172 /* FIXME These would more efficient to use than load_mem/store_mem,
 173    but need to be changed to use the memory map.  */
 174
 175 uint8
 176 get_byte (x)
 177      uint8 *x;
 178 {
 179   return *x;
 180 }
 181
 182 uint16
 183 get_half (x)
 184      uint8 *x;
 185 {
 186   uint8 *a = x;
 187   return (a[1] << 8) + (a[0]);
 188 }
 189
 190 uint32
 191 get_word (x)
 192       uint8 *x;
 193 {
 194   uint8 *a = x;
 195   return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
 196 }
 197
 198 void
 199 put_byte (addr, data)
 200      uint8 *addr;
 201      uint8 data;
 202 {
 203   uint8 *a = addr;
 204   a[0] = data;
 205 }
 206
 207 void
 208 put_half (addr, data)
 209      uint8 *addr;
 210      uint16 data;
 211 {
 212   uint8 *a = addr;
 213   a[0] = data & 0xff;
 214   a[1] = (data >> 8) & 0xff;
 215 }
 216
 217 void
 218 put_word (addr, data)
 219      uint8 *addr;
 220      uint32 data;
 221 {
 222   uint8 *a = addr;
 223   a[0] = data & 0xff;
 224   a[1] = (data >> 8) & 0xff;
 225   a[2] = (data >> 16) & 0xff;
 226   a[3] = (data >> 24) & 0xff;
 227 }
 228
 229 void
 230 sim_size (power)
 231      int power;
 232
 233 {
 234   if (State.mem)
 235     free (State.mem);
 236
 237   max_mem = 1 << power;
 238   State.mem = (uint8 *) calloc (1,  1 << power);
 239   if (!State.mem)
 240     {
 241       (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
 242       exit (1);
 243     }
 244 }
 245
 246 static void
 247 init_system ()
 248 {
 249   if (!State.mem)
 250     sim_size(19);
 251 }
 252
 253 int
 254 sim_write (sd, addr, buffer, size)
 255      SIM_DESC sd;
 256      SIM_ADDR addr;
 257      unsigned char *buffer;
 258      int size;
 259 {
 260   int i;
 261
 262   init_system ();
 263
 264   for (i = 0; i < size; i++)
 265     store_byte (addr + i, buffer[i]);
 266
 267   return size;
 268 }
 269
 270 /* Compare two opcode table entries for qsort.  */
 271 static int
 272 compare_simops (arg1, arg2)
 273      const PTR arg1;
 274      const PTR arg2;
 275 {
 276   unsigned long code1 = ((struct simops *)arg1)->opcode;
 277   unsigned long code2 = ((struct simops *)arg2)->opcode;
 278
 279   if (code1 < code2)
 280     return -1;
 281   if (code2 < code1)
 282     return 1;
 283   return 0;
 284 }
 285
 286 SIM_DESC
 287 sim_open (kind,cb,argv)
 288      SIM_OPEN_KIND kind;
 289      host_callback *cb;
 290      char **argv;
 291 {
 292   struct simops *s;
 293   struct hash_entry *h;
 294   char **p;
 295   int i;
 296
 297   mn10300_callback = cb;
 298
 299   /* Sort the opcode array from smallest opcode to largest.
 300      This will generally improve simulator performance as the smaller
 301      opcodes are generally preferred to the larger opcodes.  */
 302   for (i = 0, s = Simops; s->func; s++, i++)
 303     ;
 304   qsort (Simops, i, sizeof (Simops[0]), compare_simops);
 305
 306   sim_kind = kind;
 307   myname = argv[0];
 308
 309   for (p = argv + 1; *p; ++p)
 310     {
 311       if (strcmp (*p, "-E") == 0)
 312         ++p; /* ignore endian spec */
 313       else
 314 #ifdef DEBUG
 315       if (strcmp (*p, "-t") == 0)
 316         mn10300_debug = DEBUG;
 317       else
 318 #endif
 319         (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
 320     }
 321
 322  /* put all the opcodes in the hash table */
 323   for (s = Simops; s->func; s++)
 324     {
 325       h = &hash_table[hash(s->opcode)];
 326
 327       /* go to the last entry in the chain */
 328       while (h->next)
 329         {
 330           /* Don't insert the same opcode more than once.  */
 331           if (h->opcode == s->opcode
 332               && h->mask == s->mask
 333               && h->ops == s)
 334             continue;
 335           else
 336             h = h->next;
 337         }
 338
 339       /* Don't insert the same opcode more than once.  */
 340       if (h->opcode == s->opcode
 341           && h->mask == s->mask
 342           && h->ops == s)
 343         continue;
 344
 345       if (h->ops)
 346         {
 347           h->next = calloc(1,sizeof(struct hash_entry));
 348           h = h->next;
 349         }
 350       h->ops = s;
 351       h->mask = s->mask;
 352       h->opcode = s->opcode;
 353 #if HASH_STAT
 354       h->count = 0;
 355 #endif
 356     }
 357
 358
 359   /* fudge our descriptor for now */
 360   return (SIM_DESC) 1;
 361 }
 362
 363
 364 void
 365 sim_close (sd, quitting)
 366      SIM_DESC sd;
 367      int quitting;
 368 {
 369   /* nothing to do */
 370 }
 371
 372 void
 373 sim_set_profile (n)
 374      int n;
 375 {
 376   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
 377 }
 378
 379 void
 380 sim_set_profile_size (n)
 381      int n;
 382 {
 383   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
 384 }
 385
 386 int
 387 sim_stop (sd)
 388      SIM_DESC sd;
 389 {
 390   return 0;
 391 }
 392
 393 void
 394 sim_resume (sd, step, siggnal)
 395      SIM_DESC sd;
 396      int step, siggnal;
 397 {
 398   uint32 inst;
 399   reg_t oldpc;
 400   struct hash_entry *h;
 401
 402   if (step)
 403     State.exception = SIGTRAP;
 404   else
 405     State.exception = 0;
 406
 407   do
 408     {
 409       unsigned long insn, extension;
 410
 411       /* Fetch the current instruction.  */
 412       inst = load_mem_big (PC, 2);
 413       oldpc = PC;
 414
 415       /* Using a giant case statement may seem like a waste because of the
 416         code/rodata size the table itself will consume.  However, using
 417         a giant case statement speeds up the simulator by 10-15% by avoiding
 418         cascading if/else statements or cascading case statements.  */
 419
 420       switch ((inst >> 8) & 0xff)
 421         {
 422           /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
 423              which must be handled specially.  */
 424           case 0x00:
 425           case 0x04:
 426           case 0x08:
 427           case 0x0c:
 428           case 0x10:
 429           case 0x11:
 430           case 0x12:
 431           case 0x13:
 432           case 0x14:
 433           case 0x15:
 434           case 0x16:
 435           case 0x17:
 436           case 0x18:
 437           case 0x19:
 438           case 0x1a:
 439           case 0x1b:
 440           case 0x1c:
 441           case 0x1d:
 442           case 0x1e:
 443           case 0x1f:
 444           case 0x3c:
 445           case 0x3d:
 446           case 0x3e:
 447           case 0x3f:
 448           case 0x40:
 449           case 0x41:
 450           case 0x44:
 451           case 0x45:
 452           case 0x48:
 453           case 0x49:
 454           case 0x4c:
 455           case 0x4d:
 456           case 0x50:
 457           case 0x51:
 458           case 0x52:
 459           case 0x53:
 460           case 0x54:
 461           case 0x55:
 462           case 0x56:
 463           case 0x57:
 464           case 0x60:
 465           case 0x61:
 466           case 0x62:
 467           case 0x63:
 468           case 0x64:
 469           case 0x65:
 470           case 0x66:
 471           case 0x67:
 472           case 0x68:
 473           case 0x69:
 474           case 0x6a:
 475           case 0x6b:
 476           case 0x6c:
 477           case 0x6d:
 478           case 0x6e:
 479           case 0x6f:
 480           case 0x70:
 481           case 0x71:
 482           case 0x72:
 483           case 0x73:
 484           case 0x74:
 485           case 0x75:
 486           case 0x76:
 487           case 0x77:
 488           case 0x78:
 489           case 0x79:
 490           case 0x7a:
 491           case 0x7b:
 492           case 0x7c:
 493           case 0x7d:
 494           case 0x7e:
 495           case 0x7f:
 496           case 0xcb:
 497           case 0xd0:
 498           case 0xd1:
 499           case 0xd2:
 500           case 0xd3:
 501           case 0xd4:
 502           case 0xd5:
 503           case 0xd6:
 504           case 0xd7:
 505           case 0xd8:
 506           case 0xd9:
 507           case 0xda:
 508           case 0xdb:
 509           case 0xe0:
 510           case 0xe1:
 511           case 0xe2:
 512           case 0xe3:
 513           case 0xe4:
 514           case 0xe5:
 515           case 0xe6:
 516           case 0xe7:
 517           case 0xe8:
 518           case 0xe9:
 519           case 0xea:
 520           case 0xeb:
 521           case 0xec:
 522           case 0xed:
 523           case 0xee:
 524           case 0xef:
 525           case 0xff:
 526             insn = (inst >> 8) & 0xff;
 527             extension = 0;
 528             dispatch (insn, extension, 1);
 529             break;
 530
 531           /* Special cases where dm == dn is used to encode a different
 532              instruction.  */
 533           case 0x80:
 534           case 0x85:
 535           case 0x8a:
 536           case 0x8f:
 537           case 0x90:
 538           case 0x95:
 539           case 0x9a:
 540           case 0x9f:
 541           case 0xa0:
 542           case 0xa5:
 543           case 0xaa:
 544           case 0xaf:
 545           case 0xb0:
 546           case 0xb5:
 547           case 0xba:
 548           case 0xbf:
 549             insn = inst;
 550             extension = 0;
 551             dispatch (insn, extension, 2);
 552             break;
 553
 554           case 0x81:
 555           case 0x82:
 556           case 0x83:
 557           case 0x84:
 558           case 0x86:
 559           case 0x87:
 560           case 0x88:
 561           case 0x89:
 562           case 0x8b:
 563           case 0x8c:
 564           case 0x8d:
 565           case 0x8e:
 566           case 0x91:
 567           case 0x92:
 568           case 0x93:
 569           case 0x94:
 570           case 0x96:
 571           case 0x97:
 572           case 0x98:
 573           case 0x99:
 574           case 0x9b:
 575           case 0x9c:
 576           case 0x9d:
 577           case 0x9e:
 578           case 0xa1:
 579           case 0xa2:
 580           case 0xa3:
 581           case 0xa4:
 582           case 0xa6:
 583           case 0xa7:
 584           case 0xa8:
 585           case 0xa9:
 586           case 0xab:
 587           case 0xac:
 588           case 0xad:
 589           case 0xae:
 590           case 0xb1:
 591           case 0xb2:
 592           case 0xb3:
 593           case 0xb4:
 594           case 0xb6:
 595           case 0xb7:
 596           case 0xb8:
 597           case 0xb9:
 598           case 0xbb:
 599           case 0xbc:
 600           case 0xbd:
 601           case 0xbe:
 602             insn = (inst >> 8) & 0xff;
 603             extension = 0;
 604           dispatch (insn, extension, 1);
 605           break;
 606
 607           /* The two byte instructions.  */
 608           case 0x20:
 609           case 0x21:
 610           case 0x22:
 611           case 0x23:
 612           case 0x28:
 613           case 0x29:
 614           case 0x2a:
 615           case 0x2b:
 616           case 0x42:
 617           case 0x43:
 618           case 0x46:
 619           case 0x47:
 620           case 0x4a:
 621           case 0x4b:
 622           case 0x4e:
 623           case 0x4f:
 624           case 0x58:
 625           case 0x59:
 626           case 0x5a:
 627           case 0x5b:
 628           case 0x5c:
 629           case 0x5d:
 630           case 0x5e:
 631           case 0x5f:
 632           case 0xc0:
 633           case 0xc1:
 634           case 0xc2:
 635           case 0xc3:
 636           case 0xc4:
 637           case 0xc5:
 638           case 0xc6:
 639           case 0xc7:
 640           case 0xc8:
 641           case 0xc9:
 642           case 0xca:
 643           case 0xce:
 644           case 0xcf:
 645           case 0xf0:
 646           case 0xf1:
 647           case 0xf2:
 648           case 0xf3:
 649           case 0xf4:
 650           case 0xf5:
 651           case 0xf6:
 652             insn = inst;
 653             extension = 0;
 654             dispatch (insn, extension, 2);
 655             break;
 656
 657           /* The three byte insns with a 16bit operand in little endian
 658              format.  */
 659           case 0x01:
 660           case 0x02:
 661           case 0x03:
 662           case 0x05:
 663           case 0x06:
 664           case 0x07:
 665           case 0x09:
 666           case 0x0a:
 667           case 0x0b:
 668           case 0x0d:
 669           case 0x0e:
 670           case 0x0f:
 671           case 0x24:
 672           case 0x25:
 673           case 0x26:
 674           case 0x27:
 675           case 0x2c:
 676           case 0x2d:
 677           case 0x2e:
 678           case 0x2f:
 679           case 0x30:
 680           case 0x31:
 681           case 0x32:
 682           case 0x33:
 683           case 0x34:
 684           case 0x35:
 685           case 0x36:
 686           case 0x37:
 687           case 0x38:
 688           case 0x39:
 689           case 0x3a:
 690           case 0x3b:
 691           case 0xcc:
 692             insn = load_byte (PC);
 693             insn <<= 16;
 694             insn |= load_half (PC + 1);
 695             extension = 0;
 696             dispatch (insn, extension, 3);
 697             break;
 698
 699           /* The three byte insns without 16bit operand.  */
 700           case 0xde:
 701           case 0xdf:
 702           case 0xf8:
 703           case 0xf9:
 704             insn = load_mem_big (PC, 3);
 705             extension = 0;
 706             dispatch (insn, extension, 3);
 707             break;
 708
 709           /* Four byte insns.  */
 710           case 0xfa:
 711           case 0xfb:
 712             if ((inst & 0xfffc) == 0xfaf0
 713                 || (inst & 0xfffc) == 0xfaf4
 714                 || (inst & 0xfffc) == 0xfaf8)
 715               insn = load_mem_big (PC, 4);
 716             else
 717               {
 718                 insn = inst;
 719                 insn <<= 16;
 720                 insn |= load_half (PC + 2);
 721                 extension = 0;
 722               }
 723             dispatch (insn, extension, 4);
 724             break;
 725
 726           /* Five byte insns.  */
 727           case 0xcd:
 728             insn = load_byte (PC);
 729             insn <<= 24;
 730             insn |= (load_half (PC + 1) << 8);
 731             insn |= load_byte (PC + 3);
 732             extension = load_byte (PC + 4);
 733             dispatch (insn, extension, 5);
 734             break;
 735
 736           case 0xdc:
 737             insn = load_byte (PC);
 738             insn <<= 24;
 739             extension = load_word (PC + 1);
 740             insn |= (extension & 0xffffff00) >> 8;
 741             extension &= 0xff;
 742             dispatch (insn, extension, 5);
 743             break;
 744
 745           /* Six byte insns.  */
 746           case 0xfc:
 747           case 0xfd:
 748             insn = (inst << 16);
 749             extension = load_word (PC + 2);
 750             insn |= ((extension & 0xffff0000) >> 16);
 751             extension &= 0xffff;
 752             dispatch (insn, extension, 6);
 753             break;
 754
 755           case 0xdd:
 756             insn = load_byte (PC) << 24;
 757             extension = load_word (PC + 1);
 758             insn |= ((extension >> 8) & 0xffffff);
 759             extension = (extension & 0xff) << 16;
 760             extension |= load_byte (PC + 5) << 8;
 761             extension |= load_byte (PC + 6);
 762             dispatch (insn, extension, 7);
 763             break;
 764
 765           case 0xfe:
 766             insn = inst << 16;
 767             extension = load_word (PC + 2);
 768             insn |= ((extension >> 16) & 0xffff);
 769             extension <<= 8;
 770             extension &= 0xffff00;
 771             extension |= load_byte (PC + 6);
 772             dispatch (insn, extension, 7);
 773             break;
 774
 775           default:
 776             abort ();
 777         }
 778     }
 779   while (!State.exception);
 780
 781 #ifdef HASH_STAT
 782   {
 783     int i;
 784     for (i = 0; i < MAX_HASH; i++)
 785       {
 786          struct hash_entry *h;
 787          h = &hash_table[i];
 788
 789          printf("hash 0x%x:\n", i);
 790
 791          while (h)
 792            {
 793              printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
 794              h = h->next;
 795            }
 796
 797          printf("\n\n");
 798       }
 799     fflush (stdout);
 800   }
 801 #endif
 802
 803 }
 804
 805 int
 806 sim_trace (sd)
 807      SIM_DESC sd;
 808 {
 809 #ifdef DEBUG
 810   mn10300_debug = DEBUG;
 811 #endif
 812   sim_resume (sd, 0, 0);
 813   return 1;
 814 }
 815
 816 void
 817 sim_info (sd, verbose)
 818      SIM_DESC sd;
 819      int verbose;
 820 {
 821   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
 822 }
 823
 824 SIM_RC
 825 sim_create_inferior (sd, argv, env)
 826      SIM_DESC sd;
 827      char **argv;
 828      char **env;
 829 {
 830   return SIM_RC_OK;
 831 }
 832
 833 void
 834 sim_kill (sd)
 835      SIM_DESC sd;
 836 {
 837   /* nothing to do */
 838 }
 839
 840 void
 841 sim_set_callbacks (p)
 842      host_callback *p;
 843 {
 844   mn10300_callback = p;
 845 }
 846
 847 /* All the code for exiting, signals, etc needs to be revamped.
 848
 849    This is enough to get c-torture limping though.  */
 850
 851 void
 852 sim_stop_reason (sd, reason, sigrc)
 853      SIM_DESC sd;
 854      enum sim_stop *reason;
 855      int *sigrc;
 856 {
 857   *reason = sim_stopped;
 858   if (State.exception == SIGQUIT)
 859     *sigrc = 0;
 860   else
 861     *sigrc = State.exception;
 862 }
 863
 864 void
 865 sim_fetch_register (sd, rn, memory)
 866      SIM_DESC sd;
 867      int rn;
 868      unsigned char *memory;
 869 {
 870   put_word (memory, State.regs[rn]);
 871 }
 872
 873 void
 874 sim_store_register (sd, rn, memory)
 875      SIM_DESC sd;
 876      int rn;
 877      unsigned char *memory;
 878 {
 879   State.regs[rn] = get_word (memory);
 880 }
 881
 882 int
 883 sim_read (sd, addr, buffer, size)
 884      SIM_DESC sd;
 885      SIM_ADDR addr;
 886      unsigned char *buffer;
 887      int size;
 888 {
 889   int i;
 890   for (i = 0; i < size; i++)
 891     buffer[i] = load_byte (addr + i);
 892
 893   return size;
 894 }
 895
 896 void
 897 sim_do_command (sd, cmd)
 898      SIM_DESC sd;
 899      char *cmd;
 900 {
 901   (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
 902 }
 903
 904 SIM_RC
 905 sim_load (sd, prog, abfd, from_tty)
 906      SIM_DESC sd;
 907      char *prog;
 908      bfd *abfd;
 909      int from_tty;
 910 {
 911   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
 912   bfd *prog_bfd;
 913
 914   prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
 915                             sim_kind == SIM_OPEN_DEBUG);
 916   if (prog_bfd == NULL)
 917     return SIM_RC_FAIL;
 918   PC = bfd_get_start_address (prog_bfd);
 919   if (abfd == NULL)
 920     bfd_close (prog_bfd);
 921   return SIM_RC_OK;
 922 }