sim/mn10300/interp.c

   1 #include <signal.h>
   2
   3 #include "sim-main.h"
   4 #include "sim-options.h"
   5 #include "sim-hw.h"
   6
   7 #include "sysdep.h"
   8 #include "bfd.h"
   9 #include "sim-assert.h"
  10
  11
  12 #ifdef HAVE_STDLIB_H
  13 #include <stdlib.h>
  14 #endif
  15
  16 #ifdef HAVE_STRING_H
  17 #include <string.h>
  18 #else
  19 #ifdef HAVE_STRINGS_H
  20 #include <strings.h>
  21 #endif
  22 #endif
  23
  24 #include "bfd.h"
  25
  26 #ifndef INLINE
  27 #ifdef __GNUC__
  28 #define INLINE inline
  29 #else
  30 #define INLINE
  31 #endif
  32 #endif
  33
  34
  35 host_callback *mn10300_callback;
  36 int mn10300_debug;
  37 struct _state State;
  38
  39
  40 /* simulation target board.  NULL=default configuration */
  41 static char* board = NULL;
  42
  43 static DECLARE_OPTION_HANDLER (mn10300_option_handler);
  44
  45 enum {
  46   OPTION_BOARD = OPTION_START,
  47 };
  48
  49 static SIM_RC
  50 mn10300_option_handler (SIM_DESC sd,
  51                         sim_cpu *cpu,
  52                         int opt,
  53                         char *arg,
  54                         int is_command)
  55 {
  56   int cpu_nr;
  57   switch (opt)
  58     {
  59     case OPTION_BOARD:
  60       {
  61         if (arg)
  62           {
  63             board = zalloc(strlen(arg) + 1);
  64             strcpy(board, arg);
  65           }
  66         return SIM_RC_OK;
  67       }
  68     }
  69
  70   return SIM_RC_OK;
  71 }
  72
  73 static const OPTION mn10300_options[] =
  74 {
  75 #define BOARD_AM32 "stdeval1"
  76   { {"board", required_argument, NULL, OPTION_BOARD},
  77      '\0', "none" /* rely on compile-time string concatenation for other options */
  78            "|" BOARD_AM32
  79     , "Customize simulation for a particular board.", mn10300_option_handler },
  80
  81   { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
  82 };
  83
  84 /* For compatibility */
  85 SIM_DESC simulator;
  86
  87 /* These default values correspond to expected usage for the chip.  */
  88
  89 SIM_DESC
  90 sim_open (SIM_OPEN_KIND kind,
  91           host_callback *cb,
  92           struct bfd *abfd,
  93           char **argv)
  94 {
  95   SIM_DESC sd = sim_state_alloc (kind, cb);
  96   mn10300_callback = cb;
  97
  98   SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  99
 100   /* for compatibility */
 101   simulator = sd;
 102
 103   /* FIXME: should be better way of setting up interrupts.  For
 104      moment, only support watchpoints causing a breakpoint (gdb
 105      halt). */
 106   STATE_WATCHPOINTS (sd)->pc = &(PC);
 107   STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
 108   STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
 109   STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
 110
 111   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
 112     return 0;
 113   sim_add_option_table (sd, NULL, mn10300_options);
 114
 115   /* Allocate core managed memory */
 116   sim_do_command (sd, "memory region 0,0x100000");
 117   sim_do_command (sd, "memory region 0x40000000,0x200000");
 118
 119   /* getopt will print the error message so we just have to exit if this fails.
 120      FIXME: Hmmm...  in the case of gdb we need getopt to call
 121      print_filtered.  */
 122   if (sim_parse_args (sd, argv) != SIM_RC_OK)
 123     {
 124       /* Uninstall the modules to avoid memory leaks,
 125          file descriptor leaks, etc.  */
 126       sim_module_uninstall (sd);
 127       return 0;
 128     }
 129
 130   if ( NULL != board
 131        && (strcmp(board, BOARD_AM32) == 0 ) )
 132     {
 133       /* environment */
 134       STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
 135
 136       sim_do_command (sd, "memory region 0x44000000,0x40000");
 137       sim_do_command (sd, "memory region 0x48000000,0x400000");
 138
 139       /* device support for mn1030002 */
 140       /* interrupt controller */
 141
 142       sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
 143
 144       /* DEBUG: NMI input's */
 145       sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
 146       sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
 147       sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
 148       sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
 149
 150       /* DEBUG: ACK input */
 151       sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
 152       sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
 153
 154       /* DEBUG: LEVEL output */
 155       sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
 156       sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
 157       sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
 158
 159       /* DEBUG: A bunch of interrupt inputs */
 160       sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
 161       sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
 162       sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
 163       sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
 164       sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
 165       sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
 166       sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
 167       sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
 168       sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
 169
 170       /* processor interrupt device */
 171
 172       /* the device */
 173       sim_hw_parse (sd, "/mn103cpu@0x20000000");
 174       sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
 175
 176       /* DEBUG: ACK output wired upto a glue device */
 177       sim_hw_parse (sd, "/glue@0x20002000");
 178       sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
 179       sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
 180
 181       /* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
 182       sim_hw_parse (sd, "/glue@0x20004000");
 183       sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
 184       sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
 185       sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
 186       sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
 187
 188       /* REAL: The processor wired up to the real interrupt controller */
 189       sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
 190       sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
 191       sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
 192
 193
 194       /* PAL */
 195
 196       /* the device */
 197       sim_hw_parse (sd, "/pal@0x31000000");
 198       sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
 199       sim_hw_parse (sd, "/pal@0x31000000/poll? true");
 200
 201       /* DEBUG: PAL wired up to a glue device */
 202       sim_hw_parse (sd, "/glue@0x31002000");
 203       sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
 204       sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
 205       sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
 206       sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
 207       sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
 208       sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
 209       sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
 210
 211       /* REAL: The PAL wired up to the real interrupt controller */
 212       sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
 213       sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
 214       sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
 215
 216       /* 8 and 16 bit timers */
 217       sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100 0x34004000 16");
 218
 219       /* Hook timer interrupts up to interrupt controller */
 220       sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
 221       sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
 222       sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
 223       sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
 224       sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
 225       sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
 226       sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
 227       sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
 228       sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
 229
 230
 231       /* Serial devices 0,1,2 */
 232       sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
 233       sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
 234
 235       /* Hook serial interrupts up to interrupt controller */
 236       sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
 237       sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
 238       sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-1-receive /mn103int");
 239       sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-1-transmit /mn103int");
 240       sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-2-receive /mn103int");
 241       sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-2-transmit /mn103int");
 242
 243       sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
 244
 245       /* Memory control registers */
 246       sim_do_command (sd, "memory region 0x32000020,0x30");
 247       /* Cache control register */
 248       sim_do_command (sd, "memory region 0x20000070,0x4");
 249       /* Cache purge regions */
 250       sim_do_command (sd, "memory region 0x28400000,0x800");
 251       sim_do_command (sd, "memory region 0x28401000,0x800");
 252       /* DMA registers */
 253       sim_do_command (sd, "memory region 0x32000100,0xF");
 254       sim_do_command (sd, "memory region 0x32000200,0xF");
 255       sim_do_command (sd, "memory region 0x32000400,0xF");
 256       sim_do_command (sd, "memory region 0x32000800,0xF");
 257     }
 258   else
 259     {
 260       if (board != NULL)
 261         {
 262           sim_io_eprintf (sd, "Error: Board `%s' unknown.\n", board);
 263           return 0;
 264         }
 265     }
 266
 267
 268
 269   /* check for/establish the a reference program image */
 270   if (sim_analyze_program (sd,
 271                            (STATE_PROG_ARGV (sd) != NULL
 272                             ? *STATE_PROG_ARGV (sd)
 273                             : NULL),
 274                            abfd) != SIM_RC_OK)
 275     {
 276       sim_module_uninstall (sd);
 277       return 0;
 278     }
 279
 280   /* establish any remaining configuration options */
 281   if (sim_config (sd) != SIM_RC_OK)
 282     {
 283       sim_module_uninstall (sd);
 284       return 0;
 285     }
 286
 287   if (sim_post_argv_init (sd) != SIM_RC_OK)
 288     {
 289       /* Uninstall the modules to avoid memory leaks,
 290          file descriptor leaks, etc.  */
 291       sim_module_uninstall (sd);
 292       return 0;
 293     }
 294
 295
 296   /* set machine specific configuration */
 297 /*   STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
 298 /*                           | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
 299
 300   return sd;
 301 }
 302
 303
 304 void
 305 sim_close (SIM_DESC sd, int quitting)
 306 {
 307   sim_module_uninstall (sd);
 308 }
 309
 310
 311 SIM_RC
 312 sim_create_inferior (SIM_DESC sd,
 313                      struct bfd *prog_bfd,
 314                      char **argv,
 315                      char **env)
 316 {
 317   memset (&State, 0, sizeof (State));
 318   if (prog_bfd != NULL) {
 319     PC = bfd_get_start_address (prog_bfd);
 320   } else {
 321     PC = 0;
 322   }
 323   CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
 324
 325   return SIM_RC_OK;
 326 }
 327
 328 void
 329 sim_do_command (SIM_DESC sd, char *cmd)
 330 {
 331   char *mm_cmd = "memory-map";
 332   char *int_cmd = "interrupt";
 333
 334   if (sim_args_command (sd, cmd) != SIM_RC_OK)
 335     {
 336       if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
 337         sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
 338       else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
 339         sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
 340       else
 341         sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
 342     }
 343 }
 344
 345 /* FIXME These would more efficient to use than load_mem/store_mem,
 346    but need to be changed to use the memory map.  */
 347
 348 uint8
 349 get_byte (uint8 *x)
 350 {
 351   return *x;
 352 }
 353
 354 uint16
 355 get_half (uint8 *x)
 356 {
 357   uint8 *a = x;
 358   return (a[1] << 8) + (a[0]);
 359 }
 360
 361 uint32
 362 get_word (uint8 *x)
 363 {
 364   uint8 *a = x;
 365   return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
 366 }
 367
 368 void
 369 put_byte (uint8 *addr, uint8 data)
 370 {
 371   uint8 *a = addr;
 372   a[0] = data;
 373 }
 374
 375 void
 376 put_half (uint8 *addr, uint16 data)
 377 {
 378   uint8 *a = addr;
 379   a[0] = data & 0xff;
 380   a[1] = (data >> 8) & 0xff;
 381 }
 382
 383 void
 384 put_word (uint8 *addr, uint32 data)
 385 {
 386   uint8 *a = addr;
 387   a[0] = data & 0xff;
 388   a[1] = (data >> 8) & 0xff;
 389   a[2] = (data >> 16) & 0xff;
 390   a[3] = (data >> 24) & 0xff;
 391 }
 392
 393 int
 394 sim_fetch_register (SIM_DESC sd,
 395                     int rn,
 396                     unsigned char *memory,
 397                     int length)
 398 {
 399   put_word (memory, State.regs[rn]);
 400   return -1;
 401 }
 402
 403 int
 404 sim_store_register (SIM_DESC sd,
 405                     int rn,
 406                     unsigned char *memory,
 407                     int length)
 408 {
 409   State.regs[rn] = get_word (memory);
 410   return -1;
 411 }
 412
 413
 414 void
 415 mn10300_core_signal (SIM_DESC sd,
 416                      sim_cpu *cpu,
 417                      sim_cia cia,
 418                      unsigned map,
 419                      int nr_bytes,
 420                      address_word addr,
 421                      transfer_type transfer,
 422                      sim_core_signals sig)
 423 {
 424   const char *copy = (transfer == read_transfer ? "read" : "write");
 425   address_word ip = CIA_ADDR (cia);
 426
 427   switch (sig)
 428     {
 429     case sim_core_unmapped_signal:
 430       sim_io_eprintf (sd, "mn10300-core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
 431                       nr_bytes, copy,
 432                       (unsigned long) addr, (unsigned long) ip);
 433       program_interrupt(sd, cpu, cia, SIM_SIGSEGV);
 434       break;
 435
 436     case sim_core_unaligned_signal:
 437       sim_io_eprintf (sd, "mn10300-core: %d byte %s to unaligned address 0x%lx at 0x%lx\n",
 438                       nr_bytes, copy,
 439                       (unsigned long) addr, (unsigned long) ip);
 440       program_interrupt(sd, cpu, cia, SIM_SIGBUS);
 441       break;
 442
 443     default:
 444       sim_engine_abort (sd, cpu, cia,
 445                         "mn10300_core_signal - internal error - bad switch");
 446     }
 447 }
 448
 449
 450 void
 451 program_interrupt (SIM_DESC sd,
 452                    sim_cpu *cpu,
 453                    sim_cia cia,
 454                    SIM_SIGNAL sig)
 455 {
 456   int status;
 457   struct hw *device;
 458   static int in_interrupt = 0;
 459
 460 #ifdef SIM_CPU_EXCEPTION_TRIGGER
 461   SIM_CPU_EXCEPTION_TRIGGER(sd,cpu,cia);
 462 #endif
 463
 464   /* avoid infinite recursion */
 465   if (in_interrupt)
 466     {
 467       (*mn10300_callback->printf_filtered) (mn10300_callback,
 468                                             "ERROR: recursion in program_interrupt during software exception dispatch.");
 469     }
 470   else
 471     {
 472       in_interrupt = 1;
 473       /* copy NMI handler code from dv-mn103cpu.c */
 474       store_word (SP - 4, CIA_GET (cpu));
 475       store_half (SP - 8, PSW);
 476
 477       /* Set the SYSEF flag in NMICR by backdoor method.  See
 478          dv-mn103int.c:write_icr().  This is necessary because
 479          software exceptions are not modelled by actually talking to
 480          the interrupt controller, so it cannot set its own SYSEF
 481          flag. */
 482      if ((NULL != board) && (strcmp(board, BOARD_AM32) == 0))
 483        store_byte (0x34000103, 0x04);
 484     }
 485
 486   PSW &= ~PSW_IE;
 487   SP = SP - 8;
 488   CIA_SET (cpu, 0x40000008);
 489
 490   in_interrupt = 0;
 491   sim_engine_halt(sd, cpu, NULL, cia, sim_stopped, sig);
 492 }
 493
 494
 495 void
 496 mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word cia)
 497 {
 498   ASSERT(cpu != NULL);
 499
 500   if(State.exc_suspended > 0)
 501     sim_io_eprintf(sd, "Warning, nested exception triggered (%d)\n", State.exc_suspended);
 502
 503   CIA_SET (cpu, cia);
 504   memcpy(State.exc_trigger_regs, State.regs, sizeof(State.exc_trigger_regs));
 505   State.exc_suspended = 0;
 506 }
 507
 508 void
 509 mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception)
 510 {
 511   ASSERT(cpu != NULL);
 512
 513   if(State.exc_suspended > 0)
 514     sim_io_eprintf(sd, "Warning, nested exception signal (%d then %d)\n",
 515                    State.exc_suspended, exception);
 516
 517   memcpy(State.exc_suspend_regs, State.regs, sizeof(State.exc_suspend_regs));
 518   memcpy(State.regs, State.exc_trigger_regs, sizeof(State.regs));
 519   CIA_SET (cpu, PC); /* copy PC back from new State.regs */
 520   State.exc_suspended = exception;
 521 }
 522
 523 void
 524 mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception)
 525 {
 526   ASSERT(cpu != NULL);
 527
 528   if(exception == 0 && State.exc_suspended > 0)
 529     {
 530       if(State.exc_suspended != SIGTRAP) /* warn not for breakpoints */
 531          sim_io_eprintf(sd, "Warning, resuming but ignoring pending exception signal (%d)\n",
 532                        State.exc_suspended);
 533     }
 534   else if(exception != 0 && State.exc_suspended > 0)
 535     {
 536       if(exception != State.exc_suspended)
 537         sim_io_eprintf(sd, "Warning, resuming with mismatched exception signal (%d vs %d)\n",
 538                        State.exc_suspended, exception);
 539
 540       memcpy(State.regs, State.exc_suspend_regs, sizeof(State.regs));
 541       CIA_SET (cpu, PC); /* copy PC back from new State.regs */
 542     }
 543   else if(exception != 0 && State.exc_suspended == 0)
 544     {
 545       sim_io_eprintf(sd, "Warning, ignoring spontanous exception signal (%d)\n", exception);
 546     }
 547   State.exc_suspended = 0;
 548 }