5 #include "opcode/mn10300.h"
7 #include "remote-sim.h"
18 extern host_callback
*mn10300_callback
;
19 extern SIM_DESC simulator
;
21 #define DEBUG_TRACE 0x00000001
22 #define DEBUG_VALUES 0x00000002
24 extern int mn10300_debug
;
27 typedef unsigned char uint8
;
28 typedef signed char int8
;
30 #error "Char is not an 8-bit type"
34 typedef unsigned short uint16
;
35 typedef signed short int16
;
37 #error "Short is not a 16-bit type"
40 #if INT_MAX == 2147483647
42 typedef unsigned int uint32
;
43 typedef signed int int32
;
46 # if LONG_MAX == 2147483647
48 typedef unsigned long uint32
;
49 typedef signed long int32
;
52 # error "Neither int nor long is a 32-bit type"
69 /* The current state of the processor; registers, memory, etc. */
73 reg_t regs
[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw,
74 lir, lar, mdrq, plus some room for processor
76 uint8
*mem
; /* main memory */
80 /* All internal state modified by signal_exception() that may need to be
81 rolled back for passing moment-of-exception image back to gdb. */
82 reg_t exc_trigger_regs
[32];
83 reg_t exc_suspend_regs
[32];
86 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA)
87 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC)
88 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC)
91 extern struct _state State
;
93 extern struct simops Simops
[];
95 #define PC (State.regs[REG_PC])
96 #define SP (State.regs[REG_SP])
98 #define PSW (State.regs[11])
103 #define PSW_IE LSBIT (11)
104 #define PSW_LM LSMASK (10, 8)
106 #define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8)
107 #define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8)
127 /* These definitions conflict with similar macros in common. */
129 #define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
131 /* sign-extend a 4-bit number */
132 #define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
134 /* sign-extend a 5-bit number */
135 #define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
137 /* sign-extend an 8-bit number */
138 #define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
140 /* sign-extend a 9-bit number */
141 #define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
143 /* sign-extend a 16-bit number */
144 #define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
146 /* sign-extend a 22-bit number */
147 #define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
149 #define MAX32 0x7fffffffLL
150 #define MIN32 0xff80000000LL
151 #define MASK32 0xffffffffLL
152 #define MASK40 0xffffffffffLL
153 #endif /* not WITH_COMMON */
162 #define FETCH32(a,b,c,d) \
163 ((a)+((b)<<8)+((c)<<16)+((d)<<24))
165 #define FETCH24(a,b,c) \
166 ((a)+((b)<<8)+((c)<<16))
168 #define FETCH16(a,b) ((a)+((b)<<8))
170 #define load_byte(ADDR) \
171 sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
173 #define load_half(ADDR) \
174 sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
176 #define load_word(ADDR) \
177 sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
179 #define store_byte(ADDR, DATA) \
180 sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \
181 PC, write_map, (ADDR), (DATA))
184 #define store_half(ADDR, DATA) \
185 sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \
186 PC, write_map, (ADDR), (DATA))
189 #define store_word(ADDR, DATA) \
190 sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \
191 PC, write_map, (ADDR), (DATA))
192 #endif /* WITH_COMMON */
196 #define load_mem_big(addr,len) \
197 (len == 1 ? *((addr) + State.mem) : \
198 len == 2 ? ((*((addr) + State.mem) << 8) \
199 | *(((addr) + 1) + State.mem)) : \
200 len == 3 ? ((*((addr) + State.mem) << 16) \
201 | (*(((addr) + 1) + State.mem) << 8) \
202 | *(((addr) + 2) + State.mem)) : \
203 ((*((addr) + State.mem) << 24) \
204 | (*(((addr) + 1) + State.mem) << 16) \
205 | (*(((addr) + 2) + State.mem) << 8) \
206 | *(((addr) + 3) + State.mem)))
212 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
215 if ((addr
& 0xffffff) > max_mem
)
226 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
229 if ((addr
& 0xffffff) > max_mem
)
233 return p
[1] << 8 | p
[0];
240 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
243 if ((addr
& 0xffffff) > max_mem
)
247 return p
[2] << 16 | p
[1] << 8 | p
[0];
254 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
257 if ((addr
& 0xffffff) > max_mem
)
261 return p
[3] << 24 | p
[2] << 16 | p
[1] << 8 | p
[0];
269 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
272 if ((addr
& 0xffffff) > max_mem
)
281 return p
[1] << 8 | p
[0];
283 return p
[2] << 16 | p
[1] << 8 | p
[0];
285 return p
[3] << 24 | p
[2] << 16 | p
[1] << 8 | p
[0];
292 store_byte (addr
, data
)
296 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
299 if ((addr
& 0xffffff) > max_mem
)
307 store_half (addr
, data
)
311 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
314 if ((addr
& 0xffffff) > max_mem
)
323 store_3_byte (addr
, data
)
327 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
330 if ((addr
& 0xffffff) > max_mem
)
340 store_word (addr
, data
)
344 uint8
*p
= (addr
& 0xffffff) + State
.mem
;
347 if ((addr
& 0xffffff) > max_mem
)
356 #endif /* not WITH_COMMON */
358 /* Function declarations. */
360 uint32 get_word
PARAMS ((uint8
*));
361 uint16 get_half
PARAMS ((uint8
*));
362 uint8 get_byte
PARAMS ((uint8
*));
363 void put_word
PARAMS ((uint8
*, uint32
));
364 void put_half
PARAMS ((uint8
*, uint16
));
365 void put_byte
PARAMS ((uint8
*, uint8
));
367 extern uint8
*map
PARAMS ((SIM_ADDR addr
));
369 INLINE_SIM_MAIN (void) genericAdd
PARAMS ((unsigned long source
, unsigned long destReg
));
370 INLINE_SIM_MAIN (void) genericSub
PARAMS ((unsigned long source
, unsigned long destReg
));
371 INLINE_SIM_MAIN (void) genericCmp
PARAMS ((unsigned long leftOpnd
, unsigned long rightOpnd
));
372 INLINE_SIM_MAIN (void) genericOr
PARAMS ((unsigned long source
, unsigned long destReg
));
373 INLINE_SIM_MAIN (void) genericXor
PARAMS ((unsigned long source
, unsigned long destReg
));
374 INLINE_SIM_MAIN (void) genericBtst
PARAMS ((unsigned long leftOpnd
, unsigned long rightOpnd
));
375 INLINE_SIM_MAIN (int) syscall_read_mem
PARAMS ((host_callback
*cb
,
376 struct cb_syscall
*sc
,
380 INLINE_SIM_MAIN (int) syscall_write_mem
PARAMS ((host_callback
*cb
,
381 struct cb_syscall
*sc
,
385 INLINE_SIM_MAIN (void) do_syscall
PARAMS ((void));
386 void program_interrupt (SIM_DESC sd
, sim_cpu
*cpu
, sim_cia cia
, SIM_SIGNAL sig
);
388 void mn10300_cpu_exception_trigger(SIM_DESC sd
, sim_cpu
* cpu
, address_word pc
);
389 void mn10300_cpu_exception_suspend(SIM_DESC sd
, sim_cpu
* cpu
, int exception
);
390 void mn10300_cpu_exception_resume(SIM_DESC sd
, sim_cpu
* cpu
, int exception
);
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