4 #include "gdb/callback.h"
5 #include "opcode/mn10300.h"
7 #include "gdb/remote-sim.h"
11 extern host_callback
*mn10300_callback
;
12 extern SIM_DESC simulator
;
14 typedef unsigned8 uint8
;
16 typedef unsigned16 uint16
;
17 typedef signed16 int16
;
18 typedef unsigned32 uint32
;
19 typedef signed32 int32
;
38 /* The current state of the processor; registers, memory, etc. */
42 reg_t regs
[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw,
43 lir, lar, mdrq, plus some room for processor
47 reg_t fs
[32]; /* FS0-31 */
48 dword fd
[16]; /* FD0,2,...,30 */
51 /* All internal state modified by signal_exception() that may need to be
52 rolled back for passing moment-of-exception image back to gdb. */
53 reg_t exc_trigger_regs
[32];
54 reg_t exc_suspend_regs
[32];
57 #define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA)
58 #define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC)
59 #define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC)
62 extern struct _state State
;
64 #define PC (State.regs[REG_PC])
65 #define SP (State.regs[REG_SP])
67 #define PSW (State.regs[11])
72 #define PSW_IE LSBIT (11)
73 #define PSW_LM LSMASK (10, 8)
75 #define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8)
76 #define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8)
97 #define FPCR (State.regs[REG_FPCR])
99 #define FCC_MASK LSMASK (21, 18)
100 #define RM_MASK LSMASK (17, 16) /* Must always be zero. */
101 #define EC_MASK LSMASK (14, 10)
102 #define EE_MASK LSMASK ( 9, 5)
103 #define EF_MASK LSMASK ( 4, 0)
104 #define FPCR_MASK (FCC_MASK | EC_MASK | EE_MASK | EF_MASK)
106 #define FCC_L LSBIT (21)
107 #define FCC_G LSBIT (20)
108 #define FCC_E LSBIT (19)
109 #define FCC_U LSBIT (18)
111 #define EC_V LSBIT (14)
112 #define EC_Z LSBIT (13)
113 #define EC_O LSBIT (12)
114 #define EC_U LSBIT (11)
115 #define EC_I LSBIT (10)
117 #define EE_V LSBIT (9)
118 #define EE_Z LSBIT (8)
119 #define EE_O LSBIT (7)
120 #define EE_U LSBIT (6)
121 #define EE_I LSBIT (5)
123 #define EF_V LSBIT (4)
124 #define EF_Z LSBIT (3)
125 #define EF_O LSBIT (2)
126 #define EF_U LSBIT (1)
127 #define EF_I LSBIT (0)
129 #define PSW_FE LSBIT(20)
130 #define FPU_DISABLED !(PSW & PSW_FE)
132 #define XS2FS(X,S) State.fpregs.fs[((X<<4)|(S))]
133 #define AS2FS(A,S) State.fpregs.fs[((A<<2)|(S))]
134 #define Xf2FD(X,f) State.fpregs.fd[((X<<3)|(f))]
136 #define FS2FPU(FS,F) sim_fpu_32to (&(F), (FS))
137 #define FD2FPU(FD,F) sim_fpu_232to (&(F), ((FD).high), ((FD).low))
138 #define FPU2FS(F,FS) sim_fpu_to32 (&(FS), &(F))
139 #define FPU2FD(F,FD) sim_fpu_to232 (&((FD).high), &((FD).low), &(F))
141 #define FETCH32(a,b,c,d) \
142 ((a)+((b)<<8)+((c)<<16)+((d)<<24))
144 #define FETCH24(a,b,c) \
145 ((a)+((b)<<8)+((c)<<16))
147 #define FETCH16(a,b) ((a)+((b)<<8))
149 #define load_byte(ADDR) \
150 sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
152 #define load_half(ADDR) \
153 sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
155 #define load_word(ADDR) \
156 sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
158 #define load_dword(ADDR) \
159 u642dw (sim_core_read_unaligned_8 (STATE_CPU (simulator, 0), \
160 PC, read_map, (ADDR)))
163 u642dw (unsigned64 dw
)
167 r
.low
= (unsigned32
)dw
;
168 r
.high
= (unsigned32
)(dw
>> 32);
172 #define store_byte(ADDR, DATA) \
173 sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \
174 PC, write_map, (ADDR), (DATA))
177 #define store_half(ADDR, DATA) \
178 sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \
179 PC, write_map, (ADDR), (DATA))
182 #define store_word(ADDR, DATA) \
183 sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \
184 PC, write_map, (ADDR), (DATA))
185 #define store_dword(ADDR, DATA) \
186 sim_core_write_unaligned_8 (STATE_CPU (simulator, 0), \
187 PC, write_map, (ADDR), dw2u64 (DATA))
189 static INLINE unsigned64
192 return data
.low
| (((unsigned64
)data
.high
) << 32);
195 /* Function declarations. */
197 INLINE_SIM_MAIN (void) genericAdd (unsigned32 source
, unsigned32 destReg
);
198 INLINE_SIM_MAIN (void) genericSub (unsigned32 source
, unsigned32 destReg
);
199 INLINE_SIM_MAIN (void) genericCmp (unsigned32 leftOpnd
, unsigned32 rightOpnd
);
200 INLINE_SIM_MAIN (void) genericOr (unsigned32 source
, unsigned32 destReg
);
201 INLINE_SIM_MAIN (void) genericXor (unsigned32 source
, unsigned32 destReg
);
202 INLINE_SIM_MAIN (void) genericBtst (unsigned32 leftOpnd
, unsigned32 rightOpnd
);
203 INLINE_SIM_MAIN (void) do_syscall (void);
204 void program_interrupt (SIM_DESC sd
, sim_cpu
*cpu
, sim_cia cia
, SIM_SIGNAL sig
);
206 void mn10300_cpu_exception_trigger(SIM_DESC sd
, sim_cpu
* cpu
, address_word pc
);
207 void mn10300_cpu_exception_suspend(SIM_DESC sd
, sim_cpu
* cpu
, int exception
);
208 void mn10300_cpu_exception_resume(SIM_DESC sd
, sim_cpu
* cpu
, int exception
);
210 void fpu_disabled_exception (SIM_DESC
, sim_cpu
*, address_word
);
211 void fpu_unimp_exception (SIM_DESC
, sim_cpu
*, address_word
);
212 void fpu_check_signal_exception (SIM_DESC
, sim_cpu
*, address_word
);
214 extern const struct fp_prec_t
216 void (* reg2val
) (const void *, sim_fpu
*);
217 int (* round
) (sim_fpu
*);
218 void (* val2reg
) (const sim_fpu
*, void *);
219 } fp_single_prec
, fp_double_prec
;
221 #define FP_SINGLE (&fp_single_prec)
222 #define FP_DOUBLE (&fp_double_prec)
224 void fpu_rsqrt (SIM_DESC
, sim_cpu
*, address_word
, const void *, void *, const struct fp_prec_t
*);
225 void fpu_sqrt (SIM_DESC
, sim_cpu
*, address_word
, const void *, void *, const struct fp_prec_t
*);
226 void fpu_cmp (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, const struct fp_prec_t
*);
227 void fpu_add (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, void *, const struct fp_prec_t
*);
228 void fpu_sub (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, void *, const struct fp_prec_t
*);
229 void fpu_mul (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, void *, const struct fp_prec_t
*);
230 void fpu_div (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, void *, const struct fp_prec_t
*);
231 void fpu_fmadd (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, const void *, void *, const struct fp_prec_t
*);
232 void fpu_fmsub (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, const void *, void *, const struct fp_prec_t
*);
233 void fpu_fnmadd (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, const void *, void *, const struct fp_prec_t
*);
234 void fpu_fnmsub (SIM_DESC
, sim_cpu
*, address_word
, const void *, const void *, const void *, void *, const struct fp_prec_t
*);
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